not unsigned_char_..., as index type for ..._array_type_node.
(pushdecl): Avoid multiple extern decl mismatch warnings
when previous decl is built-in.
From-SVN: r3167
(subst, simplify_and_const_int, nonzero_bits, num_sign_bit_copies): Use them.
(subst, case SET): Make a SIGN_EXTEND instead of paradoxical SUBREG if
BYTE_LOADS_SIGN_EXTEND; previously only made ZERO_EXTEND.
From-SVN: r3160
* pa.h (target_switches): Add "-mtrailing-colon"
(ASM_OUTPUT_LABEL): If TARGET_TRAILING_COLON then emit
a colon after the label.
(ASM_OUTPUT_INTERNAL_LABEL): Likewise.
(ASM_OUTPUT_COMMON): Likewise.
(ASM_OUTPUT_LOCAL): Likewise.
From-SVN: r3154
(main move:SI recognizer): Add alternative for greg -> reg 112.
(floatsisf2 patterns): Put output template here, don't
call output_floatsiXf2.
(floatsidf2 patterns): Likewise.
(floatunssidf2, floatunssisf2): New patterns.
(floatdisf2, floatdidf2): New patterns.
(fix_truncsfdi2, fix_truncdfdi2): New patterns.
(rotrsi3, rotlsi3): New patterns.
(shd optimizers): 2 new patterns.
(ashlsi3, ashrsi3, lshrsi3): Rewrite not to mention SAR.
(zvdep32, vextrs32): New named recognizers.
From-SVN: r3142
(reload) [SMALL_REGISTER_CLASSES]: When adding an extra
need if the insn uses the function value return register,
likewise add an extra single-reg need for each class in which
the insn needs a group.
From-SVN: r3141
* pa.h (target_switches): Add "-mdisable-fpregs" and
"-mdisable-indexing.
(CONDITIONAL_REGISTER_USAGE): If TARGET_DISABLE_FPREGS, then mark
all FP registers as fixed.
From-SVN: r3131
* pa.md (millicode expands): Change operand 3 in the expand
pattern from a clobber of a match_scratch to a clobber of a
match_operand with a register predicate. Make appropriate
change in the generated RTL.
(millicode insns): Clobber a match_operand with a register
predicate instead of a match_scratch expression.
* pa.c (emit_hpdiv_const): Likewise.
From-SVN: r3122
* pa.md (millicode expands): Change operand 3 in the expand
pattern from a clobber of a match_scratch to a clobber of a
match_operand with a register predicate. Make appropriate
change in the generated RTL.
(millicode insns): Clobber a match_operand with a register
predicate instead of a match_scratch expression.
* pa.c (emit_hpdiv_const): Likewise.
* pa.md (movsi, movhi, movqi, movdi): Use reg_or_0_operand
consistently.
From-SVN: r3121
