PR tree-optimization/29484
* tree-inline.c (inline_forbidden_p_2): New function.
(inline_forbidden_p): Disallow inlining if some static var
has an address of a local LABEL_DECL in its initializer.
* doc/extend.texi (Labels as Values): Document &&foo behaviour
vs. inlining.
* gcc.c-torture/execute/20071220-1.c: New test.
* gcc.c-torture/execute/20071220-2.c: New test.
From-SVN: r131300
PR debug/29436, c/32326
* tree.c (build_type_attribute_qual_variant): Refuse to make
a distinct copy of a struct/enum type. Use build_distinct_type_copy.
* doc/extend.texi (Type Attributes): Don't encourage people to add
attributes to struct/enum types in a typedef. Fix
transparent_union example.
* tree-inline.c (remap_type_1): Remove code that's redundant with
remap_type.
(build_duplicate_type): Set id.copy_decl.
* c-common.c (handle_transparent_union_attribute): Simplify logic.
From-SVN: r130297
* expr.c (expand_expr_real_1) <case CALL_EXPR>: Use get_callee_fndecl
instead of checking CALL_EXPR_FN directly to test for builtins.
If error or warning attributes are present, print
error resp. warning.
* c-common.c (handle_error_attribute): New function.
(c_common_attribute_table): Add error and warning
attributes.
* doc/extend.texi: Document error and warning attributes.
* gcc.dg/va-arg-pack-len-1.c: Use error and warning
attributes.
* gcc.dg/va-arg-pack-len-2.c: New test.
* g++.dg/ext/va-arg-pack-len-1.C: Use error and warning
attributes.
* g++.dg/ext/va-arg-pack-len-2.C: New test.
From-SVN: r128687
* builtins.def (BUILT_IN_VA_ARG_PACK_LEN): New builtin.
* builtins.c (expand_builtin) <case BUILT_IN_VA_ARG_PACK_LEN>: Issue
error if __builtin_va_arg_pack_len () wasn't optimized out during
inlining.
* tree-inline.c (copy_bb): Replace __builtin_va_arg_pack_len ()
with the number of inline's anonymous arguments.
* doc/extend.texi: Document __builtin_va_arg_pack_len ().
* gcc.dg/va-arg-pack-len-1.c: New test.
* g++.dg/va-arg-pack-len-1.C: New test.
From-SVN: r128376
* builtins.def (BUILT_IN_VA_ARG_PACK): New built-in.
* tree.h (CALL_EXPR_VA_ARG_PACK): Define.
* tree-inline.h (copy_body_data): Add call_expr field.
* tree-inline.c (expand_call_inline): Initialize call_expr.
(copy_bb): Append anonymous inline fn arguments to arguments
when inlining a CALL_EXPR_VA_ARG_PACK call.
* builtins.c (expand_builtin): Issue an error if
BUILT_IN_VA_ARG_PACK is seen during expand.
(fold_call_expr, fold_builtin_call_array): Don't fold
CALL_EXPR_VA_ARG_PACK CALL_EXPRs or calls with
__builtin_va_arg_pack () call as last argument.
* gimplify.c (gimplify_call_expr): If last argument to a vararg
function is __builtin_va_arg_pack (), decrease number of call
arguments and instead set CALL_EXPR_VA_ARG_PACK on the CALL_EXPR.
* expr.c (expand_expr_real_1): Issue an error if
CALL_EXPR_VA_ARG_PACK CALL_EXPR is seen during expand.
* tree-pretty-print.c (dump_generic_node): Handle printing
CALL_EXPR_VA_ARG_PACK bit on CALL_EXPRs.
* doc/extend.texi (__builtin_va_arg_pack): Document.
* gcc.c-torture/execute/va-arg-pack-1.c: New test.
* gcc.dg/va-arg-pack-1.c: New test.
From-SVN: r128150
gcc/
* Makefile.in (TEXI_GCC_FILES): Add arm-neon-intrinsics.texi.
* config.gcc (arm*-*-*): Add arm_neon.h to extra headers.
(with_fpu): Allow --with-fpu=neon.
* config/arm/aof.h (ADDITIONAL_REGISTER_NAMES): Add Q0-Q15.
* config/arm/aout.h (ADDITIONAL_REGISTER_NAMES): Add Q0-Q15.
* config/arm/arm-modes.def (EI, OI, CI, XI): New modes.
* config/arm/arm-protos.h (neon_immediate_valid_for_move)
(neon_immediate_valid_for_logic, neon_output_logic_immediate)
(neon_pairwise_reduce, neon_expand_vector_init, neon_reinterpret)
(neon_emit_pair_result_insn, neon_disambiguate_copy)
(neon_vector_mem_operand, neon_struct_mem_operand, output_move_quad)
(output_move_neon): Add prototypes.
* config/arm/arm.c (FL_NEON): New flag for NEON processor capability.
(all_fpus): Add FPUTYPE_NEON.
(fp_model_for_fpu): Add NEON field.
(arm_return_in_memory): Return vectors <= 16 bytes in ARM registers.
(arm_arg_partial_bytes): Allow NEON vectors to be passed partially
in registers.
(arm_legitimate_address_p): Don't support fancy addressing for NEON
structure moves.
(thumb2_legitimate_address_p): Likewise.
(neon_valid_immediate): Recognize and prepare constants suitable for
NEON instructions.
(neon_immediate_valid_for_move): New function. Recognize and prepare
immediates for NEON move instructions.
(neon_immediate_valid_for_logic): New function. Recognize and
prepare immediates for NEON logic instructions.
(neon_output_logic_immediate): New function. Create asm string
suitable for outputting immediate logic instructions.
(neon_pairwise_reduce): New function. Implement reduction using
pairwise operations.
(neon_expand_vector_init): New function. Expand a (possibly
non-constant) vector initialization.
(neon_vector_mem_operand): New function. Memory operands supported
for quad-word loads/stores to/from ARM or NEON registers. Don't
allow base+offset addressing for core regs.
(neon_struct_mem_operand): New function. Valid mems for NEON
structure moves.
(coproc_secondary_reload_class): Enable NEON registers to be loaded
from neon_vector_mem_operand addresses without a secondary register.
(add_minipool_forward_ref): Handle >8-byte minipool entries.
(add_minipool_backward_ref): Likewise.
(dump_minipool): Likewise.
(push_minipool_fix): Likewise.
(output_move_quad): New function. Output quad-word moves, loads and
stores using ARM registers.
(output_move_vfp): Add support for vectors in VFP (NEON) D
registers.
(output_move_neon): Output a NEON load/store to/from a quadword
register.
(arm_print_operand): Implement new codes:
- 'c' for unadorned integers (without a # sign).
- 'J', 'K' for reg+2/reg+3, reg+3/reg+2 in little/big-endian
mode.
- 'e', 'f' for the low and high D parts of a NEON Q register.
- 'q' outputs a NEON Q register.
- 'h' outputs ranges of D registers for VLDM/VSTM etc.
- 'T' prints NEON opcode features from a coded bitmask.
- 'F' is similar to T, but signed/unsigned codes both print as
'i'.
- 't' is similar to T, but 'u' is printed instead of 'p'.
- 'O' prints 'r' if NEON instruction should perform rounding (as
specified by bitmask), else prints nothing.
- '#' is a punctuation character to stop operand numbers from
running together with following digits in the assembler
strings for instructions (when using mode attributes).
(arm_assemble_integer): Handle extra NEON vector modes. Permute
constant vectors in big-endian mode, where necessary.
(arm_hard_regno_mode_ok): Allow vectors in VFP/NEON registers.
Handle EI, OI, CI, XI modes.
(ashlv4hi3, ashlv2si3, lshrv4hi3, lshrv2si3, ashrv4hi3)
(ashrv2si3): Rename IWMMXT2_BUILTINs to...
(ashlv4hi3_iwmmxt, ashlv2si3_iwmmxt, lshrv4hi3_iwmmxt)
(lshrv2si3_iwmmxt, ashrv4hi3_iwmmxt, ashrv2si3_iwmmxt): New names.
(neon_builtin_type_bits): Add enumeration, one bit for each vector
type.
(v8qi_UP, v4hi_UP, v2si_UP, v2sf_UP, di_UP, v16qi_UP, v8hi_UP)
(v4si_UP, v4sf_UP, v2di_UP, ti_UP, ei_UP, oi_UP, UP): Define macros
to turn v8qi, etc. into bits defined above.
(neon_itype): New enumeration. Classifications of NEON builtins.
(neon_builtin_datum): Define struct. Contains information about
a single builtin (with multiple modes).
(CF): Define helper macro for...
(VAR1...VAR10): Define builtins with a type, name and 1-10 different
modes.
(neon_builtin_data): New array. Define information about builtins
for use during initialization/expansion.
(arm_init_neon_builtins): New function.
(arm_init_builtins): Call arm_init_neon_builtins if TARGET_NEON is
true.
(neon_builtin_compare): New function.
(locate_neon_builtin_icode): New function. Find an insn code for a
builtin given a function code for that builtin. Also return type of
builtin (NEON_BINOP, NEON_UNOP etc.).
(builtin_arg): New enumeration. Types of arguments for builtins.
(arm_expand_neon_args): New function. Expand a generic NEON builtin.
Takes a variable argument list of builtin_arg types, terminated by
NEON_ARG_STOP.
(arm_expand_neon_builtin): New function. Expand a NEON builtin.
(neon_reinterpret): New function. Expand NEON reinterpret intrinsic.
(neon_emit_pair_result_insn): New function. Support returning pairs
of vectors via a pointer.
(neon_disambiguate_copy): New function. Set up operands for a
multi-word copy such that registers do not get clobbered.
(arm_expand_builtin): Call arm_expand_neon_builtin if fcode >=
ARM_BUILTIN_NEON_BASE.
(arm_file_start): Set float-abi attribute for NEON.
(arm_vector_mode_supported_p): Enable NEON vector modes.
(arm_mangle_map_entry): New.
(arm_mangle_map): New.
(arm_mangle_vector_type): New.
* config/arm/arm.h (TARGET_CPU_CPP_BUILTINS): Define __ARM_NEON__
when appropriate.
(TARGET_NEON): New macro. Target supports NEON.
(fputype): Add FPUTYPE_NEON.
(UNITS_PER_SIMD_WORD): Define. Allow quad-word registers to be used
for vectorization based on command-line arg.
(NEON_REGNO_OK_FOR_NREGS): Define.
(VALID_NEON_DREG_MODE, VALID_NEON_QREG_MODE)
(VALID_NEON_STRUCT_MODE): Define.
(PRINT_OPERAND_PUNCT_VALID_P): '#' is valid punctuation.
(arm_builtins): Add ARM_BUILTIN_NEON_BASE.
* config/arm/arm.md (VUNSPEC_POOL_16): Insert constant for unspec.
(consttable_16): Add pattern for outputting 16-byte minipool
entries.
(movv2si, movv4hi, movv8qi): Remove blank expanders (redefined in
vec-common.md).
(vec-common.md, neon.md): Include md files.
* config/arm/arm.opt (mvectorize-with-neon-quad): Add option.
* config/arm/constraints.md (constraint "Dn", "Dl", "DL"): Define.
(memory_constraint "Ut", "Un", "Us"): Define.
* config/arm/iwmmxt.md (VMMX, VSHFT): New mode macros.
(MMX_char): New mode attribute.
(addv8qi3, addv4hi3, addv2si3): Remove. Replace with...
(*add<mode>3_iwmmxt): New insn pattern.
(subv8qi3, subv4hi3, subv2si3): Remove. Replace with...
(*sub<mode>3_iwmmxt): New insn pattern.
(mulv4hi3): Rename to...
(*mulv4hi3_iwmmxt): This.
(smaxv8qi3, smaxv4hi3, smaxv2si3, umaxv8qi3, umaxv4hi3)
(umaxv2si3, sminv8qi3, sminv4hi3, sminv2si3, uminv8qi3)
(uminv4hi3, uminv2si3): Remove. Replace with...
(*smax<mode>3_iwmmxt, *umax<mode>3_iwmmxt, *smin<mode>3_iwmmxt)
(*umin<mode>3_iwmmxt): These.
(ashrv4hi3, ashrv2si3, ashrdi3_iwmmxt): Replace with...
(ashr<mode>3_iwmmxt): This new pattern.
(lshrv4hi3, lshrv2si3, lshrdi3_iwmmxt): Replace with...
(lshr<mode>3_iwmmxt): This new pattern.
(ashlv4hi3, ashlv2si3, ashldi3_iwmmxt): Replace with...
(ashl<mode>3_iwmmxt): This new pattern.
* config/arm/neon-docgen.ml: New file. Generate documentation for
intrinsics.
* config/arm/neon-gen.ml: New file. Generate arm_neon.h header.
* config/arm/arm_neon.h: New (autogenerated).
* config/arm/neon-testgen.ml: New file. Generate NEON tests
automatically.
* config/arm/neon.md: New file. Define NEON instructions.
* config/arm/neon.ml: New file. Abstract description of NEON
instructions, used to generate arm_neon.h header, documentation and tests.
* config/arm/t-arm (MD_INCLUDES): Add vec-common.md, neon.md.
* vec-common.md: New file. Shared parts for iWMMXt and NEON vector
support.
* doc/extend.texi (ARM Built-in Functions): Rename and remove
extraneous comma.
(ARM NEON Intrinsics): New subsection.
* doc/arm-neon-intrinsics.texi: New (autogenerated).
gcc/testsuite/
* gcc.dg/vect/vect.exp: Check is-effective-target arm_neon_hw.
* gcc.dg/vect/tree-vect.h: Check for NEON SIMD support.
* lib/gcc-dg.exp (cleanup-saved-temps): Fix comment.
* lib/target-supports.exp (check_effective_target_arm_neon_ok)
(check_effective_target_arm_neon_hw): New.
* gcc.target/arm/neon/neon.exp: New file.
* gcc.target/arm/neon/polytypes.c: New file.
* gcc.target/arm/neon/v*.c (1870 files): New (autogenerated).
Co-Authored-By: Joseph Myers <joseph@codesourcery.com>
Co-Authored-By: Mark Shinwell <shinwell@codesourcery.com>
Co-Authored-By: Paul Brook <paul@codesourcery.com>
From-SVN: r126911
2007-07-09 Geoffrey Keating <geoffk@apple.com>
PR 32617
* c-common.c (c_alignof_expr): Look at DECL_ALIGN of
FUNCTION_DECLs.
(handle_aligned_attribute): Allow use on FUNCTION_DECLs.
* varasm.c (assemble_start_function): Honor DECL_ALIGN
for FUNCTION_DECLs. Don't use align_functions_log if
DECL_USER_ALIGN.
* print-tree.c (print_node): Print DECL_ALIGN and DECL_USER_ALIGN
even for FUNCTION_DECLs.
* c-decl.c (merge_decls): Propagate DECL_ALIGN even for
FUNCTION_DECLs.
* tree.h (DECL_ALIGN): Update for new location of 'align'.
(DECL_FUNCTION_CODE): Update for new location and name of
'function_code'.
(DECL_OFFSET_ALIGN): Update for new location of 'off_align'.
(struct tree_decl_common): Move 'align' and 'off_align' out
of union, ensure they're still on a 32-bit boundary. Remove
other fields in union 'u1'.
(struct tree_function_decl): Add field 'function_code' replacing
'u1.f' in tree_decl_common.
* tree.c (build_decl_stat): Set initial value of DECL_ALIGN.
* doc/extend.texi (Function Attributes): Add 'aligned' attribute.
(Variable Attributes): Cross-reference 'aligned' attribute
to Function Attributes.
* flags.h (force_align_functions_log): Delete.
* toplev.c (force_align_functions_log): Delete.
Index: gcc/testsuite/ChangeLog
2007-07-09 Geoffrey Keating <geoffk@apple.com>
PR 32617
* gcc.c-torture/execute/align-3.c: New.
Index: gcc/java/ChangeLog
2007-07-09 Geoffrey Keating <geoffk@apple.com>
PR 32617
* lang.c (java_init): Remove setting of force_align_functions_log.
* class.c (add_method_1): Set DECL_ALIGN of non-static method
to cope with ptrmemfunc_vbit_in_pfn.
Index: gcc/cp/ChangeLog
2007-07-09 Geoffrey Keating <geoffk@apple.com>
PR 32617
* decl.c (cxx_init_decl_processing): Don't set
force_align_functions_log.
(grokfndecl): Honour ptrmemfunc_vbit_in_pfn.
* typeck.c (cxx_alignof_expr): When alignof is used on a plain
FUNCTION_DECL, return its alignment.
From-SVN: r126529
libcpp/ChangeLog:
* include/cpplib.h (CPP_N_WIDTH_MD, CPP_N_MD_W, CPP_N_MD_Q):
Add new constants.
* expr.c (interpret_float_suffix): Process 'w', 'W', 'q' and 'Q'
suffixes. Return CPP_N_MD_W for 'w' or 'W' suffixes and CPP_N_MD_Q
for 'q' or 'Q' suffixes.
gcc/ChangeLog:
* targhooks.h (default_mode_for_suffix): New function declaration.
* targhooks.c (default_mode_for_suffix): New default target hook.
* target.h (struct c): New structure in the targetm struct.
(mode_for_suffix): New target hook as part of struct c.
target-def.h (TARGET_C_MODE_FOR_SUFFIX): Define as
default_mode_for_suffix.
(TARGET_C): New define.
* c-lex.c: Include "target.h".
(interpret_float): Use targetm.c.mode_for_suffix to determine
the mode for a given non-standard suffix.
Makefile.in (c-lex.o): Depend on $(TARGET_H).
* config/i386/i386.c (ix86_c_mode_for_suffix): New static function.
(TARGET_C_MODE_FOR_SUFFIX): Define to ix86_c_mode_for_suffix.
* doc/extend.texi (Floating Types): New node. Document __float80 and
__float128 types. Document 'w', 'W', 'q' and 'Q' suffixes.
testsuite/ChangeLog:
* gcc.dg/const-float80.c : New test.
* gcc.dg/const-float128.c : New test.
* gcc.dg/const-float80-ped.c : New test.
* gcc.dg/const-float128-ped.c : New test.
From-SVN: r126244
2007-06-23 Mark Mitchell <mark@codesourcery.com>
* doc/extend.texi: Document that dllimport and dllexport imply
default visibility.
* tree.c (handle_dll_attribute): Set DECL_VISIBILITY on the
imported or exported declaration, including type declarations.
* c-common.c (handle_visibility_attribute): Check for conflicts
with dllimport/dllexport.
(c_determine_visibility): Handle dllimport/dllexport as an
explicit visibility atttribute.
2007-06-23 Mark Mitchell <mark@codesourcery.com>
* decl2.c (determine_visibility): Don't look for dllexport here.
(determine_visibility_from_class): Tidy.
2007-06-23 Mark Mitchell <mark@codesourcery.com>
* gcc.dg/visibility-12.c: New test.
* gcc.dg/visibility-13.c: Likewise.
* g++.dg/ext/visibility-9.C: Likewise.
* g++.dg/ext/visibility-10.C: Likewise.
From-SVN: r125975
2007-05-25 Sandra Loosemore <sandra@codesourcery.com>
Nigel Stephens <nigel@mips.com>
gcc/
* config/mips/mips.c (mips_attribute_table): Add "near" and "far"
function attributes, "far" being an alias for "long_call".
(TARGET_COMP_TYPE_ATTRIBUTES): Define as mips_comp_type_attributes.
(mips_near_type_p, mips_far_type_p): New.
(mips_comp_type_attributes): New function to check that attributes
attached to a function type are compatible.
(mips_output_mi_thunk): Test SYMBOL_REF_LONG_CALL_P() rather than
TARGET_LONG_CALLS when deciding whether we can do a direct sibcall
to the target function of the thunk.
(mips_encode_section_info): Check for "near" and "far" function
attributes, and always set the SYMBOL_FLAG_LONG_CALL bit explicitly.
* config/mips/predicates.md (const_call_insn_operand): Test only
SYMBOL_REF_LONG_CALL_P() and not TARGET_LONG_CALLS.
* doc/extend.texi (Function Attributes): Document MIPS "near" and
"far" attributes.
* testsuite/gcc.target/mips/near-far-1.c: New test case.
* testsuite/gcc.target/mips/near-far-2.c: New test case.
* testsuite/gcc.target/mips/near-far-3.c: New test case.
* testsuite/gcc.target/mips/near-far-4.c: New test case.
Co-Authored-By: Nigel Stephens <nigel@mips.com>
From-SVN: r125086
gcc/
* config/m68k/m68k-protos.h: Rename m68k_interrupt_function_p
to m68k_get_function_kind. Update its prototype.
* config/m68k/m68k.c (m68k_attribute_table): Add an entry for
interrupt_thread.
(m68k_interrupt_function_p): Return enum m68k_function_type
instead of bool. Rename to m68k_get_function_kind.
(m68k_handle_fndecl_attribute): Reject interrupt_thread if the
target is not fido.
(m68k_compute_frame_layout): Don't mark any register for save
if an interrupt_thread attribute is specified.
(m68k_hard_regno_rename_ok): Update a use of
m68k_interrupt_function_p.
* config/m68k/m68k.h (EPILOGUE_USES): Update a use of
m68k_interrupt_function_p.
(m68k_function_type): New.
* config/m68k/m68k.md (*return): Output a 'sleep' instruction
for a function with an interrupt_thread attribute.
* doc/extend.texi: Document the interrupt_thread attribute.
gcc/testsuite/
* gcc.target/m68k/interrupt_thread-1.c,
gcc.target/m68k/interrupt_thread-2.c,
gcc.target/m68k/interrupt_thread-3.c: New.
* gcc.target/m68k/m68k.exp: Accept fido.
From-SVN: r124713
* doc/extend.texi (Other Builtins): Add decimal float variants
of signbit.
* builtins.def: Ditto.
* builtins.c (expand_builtin): Ditto.
testsuite/
* gcc.dg/dfp/signbit-1.c
* gcc.dg/dfp/signbit-2.c
M gcc/doc/extend.texi
M gcc/builtins.c
M gcc/ChangeLog
A gcc/testsuite/gcc.dg/dfp/signbit-2.c
A gcc/testsuite/gcc.dg/dfp/signbit-1.c
M gcc/testsuite/ChangeLog
M gcc/builtins.def
From-SVN: r123528
* doc/extend.texi (MIPS DSP Built-in Functions): Document the DSP
REV 2.
* doc/invoke.texi (-mdspr2): Document new option.
* config/mips/mips.md (UNSPEC_ABSQ_S_QB .. UNSPEC_DPSQX_SA_W_PH):
New unspec for DSP REV 2.
(<u>mulsidi3_32bit_internal): Check if !TARGET_DSPR2, because
these instructions are extended in DSP REV 2.
(mips-dspr2.md): Include.
* config/mips/mips.opt (mdspr2): New option.
* config/mips/mips.c (mips_function_type): Add MIPS_V4QI_FTYPE_V4QI,
MIPS_SI_FTYPE_SI_SI_SI, MIPS_DI_FTYPE_DI_USI_USI, MIPS_DI_FTYPE_SI_SI,
MIPS_DI_FTYPE_USI_USI, MIPS_V2HI_FTYPE_SI_SI_SI.
(override_options): Check TARGET_DSPR2 to enable MASK_DSP.
(CODE_FOR_mips_mul_ph): Define it to CODE_FOR_mulv2hi3.
(dsp_bdesc): Add DSP REV 2 builtins. Remove 32-bit only DSP builtins.
(dsp_32only_bdesc): New description table for 32-bit only DSP REV 1
and 2 builtins.
(bdesc_map): Add one field of unsupported_target_flags.
(bdesc_arrays): Update entries to have extra fields. Add
dsp_32only_bdesc.
(mips_init_builtins): Initialize new function types.
Check unsupported_target_fileds to filter out builtins.
* config/mips/mips.h (TARGET_CPU_CPP_BUILTINS): Define __mips_dspr2 if
TARGET_DSPR2.
(ASM_SPEC): Pass mdspr2 to the assembler.
* config/mips/mips-dspr2.md: New file.
From-SVN: r122756
Joseph Myers
Jakub Jelinek
Jason Merrill
Danny Smith
Kazu Hirata
Geoffrey Keating
Michael Meissner
Chao-ying Fu
Jakub Jelinek
Sandra Loosemore
Eric Weddington
Jie Zhang
Alexandre Oliva
Julian Brown
Kaveh R. Ghazi
David Daney
Uros Bizjak
Mark Mitchell
Matthew Wilcox
Joerg Wunsch
H.J. Lu
Dirk Mueller
Paolo Carlini
Jayant Sonar
Janis Johnson
Jan Hubicka
Ian Lance Taylor
Manuel López-Ibáñez
Harsha Jagasia
Ralf Wildenhues
Steve Ellcey