Commit Graph

154351 Commits

Author SHA1 Message Date
Richard Earnshaw 93aa40fee6 [arm] Rewrite t-aprofile using new selector methodology
Now that the default FPU is 'auto' we can finally rewrite (and
simplify) the rules for mapping compiler options to multilibs.  We
no-longer need to know the specific CPU, since the driver will
construct a suitable -march flag for us; this greatly simplifies the
overall logic.  This patch rewrites the library list for A-profile
cores.  We use various Make extention rules to simplify the logic even
further.

A couple of minor tweaks to the configure script and to the main
driver ensures that we always know the setting of -mfloat-abi and
-marm/-mthumb.  Again, this helps simplify the logic further.  The
change to arm_target_thumb_only relies on the fact that this routine
is only called if neither -marm nor -mthumb has been previously
selected or specified by the user.

A new testsuite module is added to check the libraries generated.  The
new tests are only run if the compiler is configured with the relevant
multilibs enabled.

gcc:
	* config.gcc: (arm*-*-*): When building a-profile libraries, force
	the driver to pass through the default setting of -mfloat-abi.
	* common/config/arm/arm-common.c (arm_target_thumb_only): Return -marm
	rather than NULL.
	* config/arm/t-multilib (MULTILIB_REUSE): Initialize to empty.
	(all_feat_combs): New rule.
	(MULTILIB_OPTIONS): Use explicit ARM and Thumb directories.  Rework
	default libraries.
	* config/arm/t-aprofile: Rewrite.

gcc/testsuite:
	* gcc.target/arm/multilibs.exp: New file.

From-SVN: r249296
2017-06-16 21:04:41 +00:00
Richard Earnshaw 1138961024 [arm] Make 'auto' the default FPU selection option.
Finally, we can make 'auto' the default choice for the FPU option.  It's
still possible to override this during configure, but we will eventually
deprecate that, moving to the new cpu/architecture selection mechanism.

	* config/arm/arm.h (FPUTYPE_AUTO): Define.
	* config/arm/arm.c (arm_option_override): Use FPUTYPE_AUTO if the
	fpu is not specified by the user/command-line.
	* config/arm/bpabi.h (FPUTYPE_DEFAULT): Delete.
	* config/arm/netbsd-elf.h (FPUTYPE_DEFAULT): Delete.
	* config/arm/linux-elf.h (FPUTYPE_DEFAULT): Delete.
	* config/arm/vxworks.h (FPUTYPE_DEFAULT): Delete.
	* common/config/arm/arm-common.c (arm_canon_arch_option): Use
	FPUTYPE_AUTO insted of FPUTYPE_DEFAULT.

From-SVN: r249295
2017-06-16 21:04:23 +00:00
Richard Earnshaw aaf8008ce7 [genmultilib] Update basic multilib configuration
The standard arm-eabi configuration comes with a basic set of multilibs that
are suitable mostly for simple testing of the compiler in various
configurations.  We try to keep the number of libraries build small so
that build times do not become too onerous.

Using the new auto-fp selection code we can now cover all supported
architectures except for those with single-precision only FP units with
just 4 multilibs.  This is done with the rewrite of t-arm-elf.  Now that we
canonicalize -mcpu into suitable -march definitions we don't need to match
CPU names to architectures any more; the driver will do this for us.

I also noticed whilst writing this patch that the existing MULTILIB_DEFAULTS
setting in the compiler was causing more problems than it was worth; and
furthermore was simply wrong if the compiler is ever configured with
--with-mode, --with-float or --with-endian.  The remaining options also
pertained to pre-eabi builds and aren't interesting today either.  It
seemed best to just delete the definition entirely.

	* config/arm/elf.h (MULTILIB_DEFAULTS): Delete.
	* config/arm/t-arm-elf: Rewritten.

From-SVN: r249294
2017-06-16 21:04:14 +00:00
Richard Earnshaw 2e17e31925 [arm] Make -mfloat-abi=softfp work when there are no
Before this patch series it wasn't really possible to not have an FPU;
it was always there, even if the hardware didn't really support it.
Now that we have -mfpu=auto, the concept of not having an FPU becomes
real.  Consequently, when the -mfloat-abi switch is set to softfp
doing the Right Thing is much more important.  In this case we have a
soft-float ABI, but can use FP instructions if they are available.
To support this we have to separate out TARGET_HARD_FLOAT into two
use cases: one where the instructions exist and one when they don't.
We preserve the original meaning of TARGET_HARD_FLOAT (but add an extra
check) of meaning that we are generating HW FP instructions, and add a
new macro for the special case when use of FP instructions is permitted,
but might not be available at this time (the distinction is important
because they might be enabled by an attribute during the compilation).
TARGET_SOFT_FLOAT continues to be the exact inverse of TARGET_HARD_FLOAT,
but we now define it as such.

	* config/arm/arm.h (TARGET_HARD_FLOAT): Also check that we
	have some floating-point instructions.
	(TARGET_SOFT_FLOAT): Define as inverse of TARGET_HARD_FLOAT.
	(TARGET_MAYBE_HARD_FLOAT): New macro.
	* config/arm/arm-builtins.c (arm_init_builtins): Use
	TARGET_MAYBE_HARD_FLOAT.
	* config/arm/arm.c (arm_option_override): Use TARGET_HARD_FLOAT_ABI.

From-SVN: r249293
2017-06-16 21:04:07 +00:00
Richard Earnshaw 0b97b8f84a [arm] Generate a canonical form for -march
This patch uses the driver and some spec rewrite rules to generate a
canonicalized form of the -march= option.  We want to do this for
several reasons, all relating to making multi-lib selection sane.

1) It can remove redundant extension options to produce a minimal
list.

2) The general syntax of the option permits a plethora of features,
these are permitted in any order.  Canonicalization ensures that there
is a single ordering of the options that are needed.

3) It can use additional options to remove extensions that aren't
relevant, such as removing all features that relate to the FPU when
use of that is disabled.

Once we have this information in a sensible form the multilib rules
can be vastly simplified making for much more understandable Makefile
fragments.

	* common/config/arm/arm-common.c: Define INCLUDE_LIST.
	(configargs.h): Include it.
	(arm_print_hint_for_fpu_option): New function.
	(arm_parse_fpu_option): New function.
	(candidate_extension): New class.
	(arm_canon_for_multilib): New function.
	* config/arm/arm.h (CANON_ARCH_SPEC_FUNCTION): New macro.
	(EXTRA_SPEC_FUNCTIONS): Add CANON_ARCH_SPEC_FUNCTION.
	(ARCH_CANONICAL_SPECS): New macro.
	(DRIVER_SELF_SPECS): Add ARCH_CANONICAL_SPECS.

From-SVN: r249292
2017-06-16 21:04:02 +00:00
Richard Earnshaw a4af8a1046 [arm] Force a CPU default in the config args defaults
Currently if the user does not specify a default CPU or architecture
the compiler provieds no default values in the spec defaults.  We can
try to work from TARGET_CPU_DEFAULT but pulling that into the driver
is a bit crufty and doesn't really work well with the general
spec-processing model.  A better way is to ensure that with_cpu is
always set appropirately during configure.  To avoid problems with the
multilib fragment processing we defer this until after we have
processed any required fragments before selecting the default.

	* config.gcc (arm*-*-*): Ensure both target_cpu_cname and with_cpu
	are set after handling multilib fragments.  Set target_cpu_default2
	from with_cpu.

From-SVN: r249291
2017-06-16 21:03:55 +00:00
Richard Earnshaw bf35d17a30 [arm] Allow new extended syntax CPU and architecture
This patch extends support for the new extended-style architecture
strings to configure and the target default options.  We validate any
options passed by the user to configure against the permitted
extensions for that CPU or architecture.

	* config.gcc (arm*-*-fucshia*): Set target_cpu_cname to the real
	cpu name.
	(arm*-*-*): Set target_cpu_default2 to a quoted string.
	* config/arm/parsecpu.awk (check_cpu): Validate any extension
	options.
	(check_arch): Likewise.
	* config/arm/arm.c (arm_configure_build_target): Handle
	TARGET_CPU_DEFAULT being a string constant.  Scan any feature
	options in the default.

From-SVN: r249290
2017-06-16 21:03:46 +00:00
Richard Earnshaw 357e1023c9 [arm] Allow CPU and architecture extensions to be
A follow up patch to this one will start to canonicalize options to
simplify generating multilib fragments.  This patch is enabling work
for that.  If we have extension options that duplicate other options
(done principally for back-wards compatibility purposes) we need to
ensure that just one of them will be used consistently when generating
a canonical form of the user-specified options.  We do this by
explicitly noting when an option is defined as an alias of another.

Another aspect of canonicalization is to enforce a strict order in
which the options are inspected, we do this by ensuring that no later
option examined can be a subset of an earlier option (add and remove
options are treated separtely).

It's practically impossible to check all this in parsecpu.awk since
that premits use of C macros in the ISA features list, so instead we
enforce the ordering with a selftest function in the compiler, which
is only run when self tests are enabled (it's not something that will
change every day, so this should be sufficient).

	* config/arm/arm-protos.h (cpu_arch_extension): Add field to record
	when an option is an alias of another.
	* config/arm/parsecpu.awk (optalias): New parser token.
	(gen_comm_data): Mark non-alias options as such.  Emit entries
	for extension aliases.
	* config/arm/arm-cpus.in (armv5e): Make vfpv2 an alias.
	(armv5te, armv5tej, armv6, armv6j, armv6k, armv6z): Likewise.
	(armv6kz, armv6zk, armv6t2): Likewise.
	(armv7): Make vfpv3-d16 an alias.
	(armv7-a): Make vfpv3-d16, neon and neon-vfpv3 aliases.  Sort in
	canonical order.
	(armv7ve): Make vfpv4-d16, neon-vfpv3 and neon-vfpv4 aliases.
	Sort in canonical order.
	(armv8-a): Sort in canonical order.
	(armv8.1-a, armv8.2-a):  Likewise.
	(generic-armv7-a): Make neon and neon-vfpv3 aliases.  Sort in
	canonical order.
	(cortex-a9): Sort in canonical order.
	* config/arm/arm.c (selftests.h): Include it.
	(arm_test_cpu_arch_data): New function.
	(arm_run_self_tests): New function.
	(TARGET_RUN_TARGET_SELFTESTS): Redefine.
	(targetm): Move declaration to the end of the file.
	* arm-cpu-cdata.h: Regenerated.

From-SVN: r249289
2017-06-16 21:03:39 +00:00
Richard Earnshaw e53993efae [arm] Use standard option parsing code for detecting
Now that the standard CPU and architecture option parsing code is
available in the driver we can use the main CPU and architecture data
tables for driving the automatic enabling of Thumb code.

Doing this requires that the driver script tell the parser whether or
not the target string is a CPU name or an architecture, but beyond
that it is just standard use of the new capabilities.

We do, however, now get some error checking if the target isn't
recognized, when previously we just ignored unknown targets and hoped
that a later pass would pick up on this.

	* config/arm/arm.h (TARGET_MODE_SPECS): Add additional parameter to
	call to target_mode_check describing the type of option passed.
	* common/config/arm/arm-common.c (arm_arch_core_flag): Delete.
	(arm_target_thumb_only): Use arm_parse_arch_option_name or
	arm_parse_cpu_option_name to match parameters against list of
	available targets.
	* config/arm/parsecpu.awk (gen_comm_data): Don't generate
	arm_arch_core_flags data structure.
	* config/arm/arm-cpu_cdata.h: Regenerated.

From-SVN: r249288
2017-06-16 21:03:30 +00:00
Richard Earnshaw 435d12725b [arm] Move cpu and architecture option name parsing
This patch has no functional change.  The code used for parsing -mcpu,
-mtune and -march options is simply moved from arm.c arm-common.c.
The list of FPU options is also moved.  Subsequent patches will make
use of this within the driver.

Some small adjustments are needed as a consequence of moving the
definitions of the data objects to another object file, in that we
no-longer have direct access to the size of the object.

	* common/config/arm/arm-common.c (arm_initialize_isa): Moved here from
	config/arm/arm.c.
	(arm_print_hint_for_cpu_option): Likewise.
	(arm_print_hint_for_arch_option): Likewise.
	(arm_parse_cpu_option_name): Likewise.
	(arm_parse_arch_option_name): Likewise.
	* config/arm/arm.c (arm_identify_fpu_from_isa): Use the computed number
	of entries in the all_fpus list.
	* config/arm/arm-protos.h (all_architectures, all_cores): Declare.
	(arm_parse_cpu_option_name): Declare.
	(arm_parse_arch_option_name): Declare.
	(arm_parse_option_features): Declare.
	(arm_intialize_isa): Declare.
	* config/arm/parsecpu.awk (gen_data): Move CPU and architecture
	data tables to ...
	(gen_comm_data): ... here.  Make definitions non-static.
	* config/arm/arm-cpu-data.h: Regenerated.
	* config/arm/arm-cpu-cdata.h: Regenerated.

From-SVN: r249287
2017-06-16 21:03:17 +00:00
Richard Earnshaw 050809ed8a [arm] Split CPU, architecture and tuning data tables.
The driver really needs to handle some canonicalization of the new
-mcpu and -march options in order to make multilib selection
tractable.  This will require moving much of the logic to parse the
new options into the common code file.  However, the tuning data
definitely does not want to be there as it is very specific to the
compiler passes.  To facilitate this we need to split up the generated
configuration data into architectural and tuning related tables.

This patch starts that process, but does not yet move any code out of
the compiler backend.  Since I'm reworking all that code I took the
opportunity to also separate out the CPU data tables from the
architecture data tables.  Although they are related, there is a lot
of redundancy in the CPU options that is best handled by simply
indirecting to the architecture entry.

	* config/arm/arm-protos.h (arm_build_target): Remove arch_core.
	(cpu_arch_extension): New structure.
	(cpu_arch_option, arch_option, cpu_option): New structures.
	* config/arm/parsecpu.awk (gen_headers): Build an enumeration of
	architecture types.
	(gen_data): Generate new format data tables.
	* config/arm/arm.c (cpu_tune): New structure.
	(cpu_option, processors): Delete.
	(arm_print_hint_for_core_or_arch): Delete.  Replace with ...
	(arm_print_hint_for_cpu_option): ... this and ...
	(arm_print_hint_for_arch_option): ... this.
	(arm_parse_arch_cpu_name): Delete.  Replace with ...
	(arm_parse_cpu_option_name): ... this and ...
	(arm_parse_arch_option_name): ... this.
	(arm_unrecognized_feature): Change type of target parameter to
	cpu_arch_option.
	(arm_parse_arch_cpu_features): Delete.  Replace with ...
	(arm_parse_option_features): ... this.
	(arm_configure_build_target): Rework to use new configuration data
	tables.
	(arm_print_tune_info): Rework for new configuration data tables.
	* config/arm/arm-cpu-data.h: Regenerated.
	* config/arm/arm-cpu.h: Regenerated.

From-SVN: r249286
2017-06-16 21:03:08 +00:00
Richard Earnshaw 9ef88abef4 [build] Make sbitmap code available to the driver
The ARM option parsing code uses sbitmap data structures to manage
features and upcoming patches will shortly need to use these bitmaps
within the driver.  This patch moves sbitmap.o from OBJS to
OBJS-libcommon to facilitate this.

The patch has no impact on targets that don't need this functionality,
since the object is part of an archive and will only be extracted if
needed.

	* Makefile.in (OBJS): Move sbitmap.o from here ...
	(OBJS-libcommon): ... to here.

From-SVN: r249285
2017-06-16 21:02:59 +00:00
Richard Earnshaw e87afe54b8 [arm] Add default FPUs for CPUs.
This patch adds the default CPUs for each cpu and provides options for
changing the FPU variant when appropriate.

It turns out to be easier to describe removal options using general
mask operations that disable a concept rather than specific bits.
Sometimes the helper definitions for enabling a feature are not excat
duals when it comes to disabling them - for example, +simd forcibly
turns on double-precision capabilities in the FPU, but disabling just
simd (+nosimd) should not forcibly disable that.

	* config/arm/arm-isa.h (ISA_ALL_FPU_INTERNAL): Renamed from ISA_ALL_FPU.
	(ISA_ALL_CRYPTO): New macro.
	(ISA_ALL_SIMD): New macro
	(ISA_ALL_FP): New macro.
	* config/arm/arm.c (fpu_bitlist): Update initializer.
	* config/arm/arm-cpus.in: Use new ISA_ALL macros to disable crypto,
	simd or fp.
	(arm9e): Add fpu.  Add option for nofp
	(arm946e-s, arm966e-s, arm968e-s, arm10e, arm1020e, arm1022e): Likewise.
	(arm926ej-s, arm1026ej-s): Likewise.
	(generic-armv7-a): Add fpu.  Add options for simd, vfpv3, vfpv3-d16,
	vfpv3-fp16, vfpv3-d16-fp16, vfpv4, vfpv4-d16, neon, neon-vfp3,
	neon-fp16, neon-vfpv4, nofp and nosimd.
	(cortex-a5, cortex-a7): Add fpu.  Add options for nosimd and nofp.
	(cortex-a8): Add fpu.  Add option for nofp.
	(cortex-a9): Add fpu.  Add options for nosimd and nofp.
	(cortex-a12, cortex-a15, cortex-a17): Add fpu.  Add option for nofp.
	(cortex-r4f): Add fpu.
	(cortex-r5): Add fpu.  Add options for nofp.dp and nofp.
	(cortex-r7): Use idiv option from architecture.  Add fpu.  Add option
	for nofp.
	(cortex-r8): Likewise.
	(cortex-m4): Add fpu.  Add option for nofp.
	(cortex-a15.cortex-a7): Add fpu.  Add option for nofp.
	(cortex-a17.cortex-a7): Likewise.
	(cortex-a32): Add fpu.  Add options for crypto and nofp.
	(cortex-a35, cortex-a53): Likewise.
	(cortex-a57): Add fpu.  Add option for crypto.
	(cortex-a72, cortex-a73): Likewise.
	(exynos-m1): Likewise.
	(cortex-a57.cortex-a53, cortex-a72.cortex-a53): Likewise.
	(cortex-a73.cortex-a35, cortex-a73.cortex-a53): Likewise.
	(cortex-m33): Add fpu.  Add option for nofp.
	* config/arm/arm-cpu-cdata.h: Regenerated
	* config/arm/arm-cpu-data.h: Regenerated.

From-SVN: r249284
2017-06-16 21:02:52 +00:00
Richard Earnshaw 76d7d53349 [arm] Add architectural options
This patch adds the currently supported architecture options to the
individual architectures.  For floating point and SIMD we only permit
variants that the relevant versions of the architecture permit.  We also
add short-hand versions (+fp, +simd, etc) that allows the user to
describe using floating point without having to know the precise version
of the floating point sub-architecture that that architecture requires.

In a small number of cases we need to provide more precise versions of the
floating point architecture.  In those cases we permit traditional -mfpu
style names in the architecture description.

	* arm-cpus.in (armv5e): Add options fp, vfpv2 and nofp.
	(armv5te, armv5tej): Likewise.
	(armv6, armv6j, armv6k, armv6z, armv6kz, armv6zk, armv6t2): Likewise.
	(armv7): Add options fp and vfpv3-d16.
	(armv7-a): Add options fp, simd, vfpv3, vfpv3-d16, vfpv3-d16-fp16,
	vfpv3-fp16, vfpv4, vfpv4-d16, neon, neon-vfpv3, neon-fp16, neon-vfpv4,
	nofp and nosimd.
	(armv7ve): Likewise.
	(armv7-r): Add options fp, fp.sp, idiv, nofp and noidiv.
	(armv7e-m): Add options fp, fpv5, fp.dp and nofp.
	(armv8-a): Add nocrypto option.
	(armv8.1-a, armv8.2-a): Likewise.
	(armv8-m.main): add options fp, fp.dp and nofp.

From-SVN: r249283
2017-06-16 21:02:19 +00:00
Richard Earnshaw 250e088bc4 [arm] Allow +opt on arbitrary cpu and architecture
This is the main patch to provide the infrastructure for adding
feature extensions to CPU and architecture specifications.  It does not,
however, add all the extensions that we intend to support (just a small
number to permit some basic testing).  Now, instead of having specific
entries in the architecture table for variants such as armv8-a+crc, the
crc extension is specified as an optional component of the armv8-a
architecture entry.  Similar control can be added to CPU option names.
In both cases the list of permitted options is controlled by the main
architecture or CPU name to prevent arbitrary cross-products of options.

	* config/arm/arm-cpus.in (armv8-a): Add options crc, simd crypto and
	nofp.
	(armv8-a+crc): Delete.
	(armv8.1-a): Add options simd, crypto and nofp.
	(armv8.2-a): Add options fp16, simd, crypto and nofp.
	(armv8.2-a+fp16): Delete.
	(armv8-m.main): Add option dsp.
	(armv8-m.main+dsp): Delete.
	(cortex-a8): Add fpu.  Add nofp option.
	(cortex-a9): Add fpu.  Add nofp and nosimd options.
	* config/arm/parsecpu.awk (gen_data): Generate option tables and
	link to main cpu and architecture data structures.
	(gen_comm_data): Only put isa attributes from the main architecture
	in common tables.
	(option): New statement for architecture and CPU entries.
	* arm.c (struct cpu_option): New structure.
	(struct processors): Add entry for options.
	(arm_unrecognized_feature): New function.
	(arm_parse_arch_cpu_name): Ignore any characters after the first
	'+' character.
	(arm_parse_arch_cpu_feature): New function.
	(arm_configure_build_target): Separate out any CPU and architecture
	features and parse separately.  Don't error out if -mfpu=auto is
	used with only an architecture string.
	(arm_print_asm_arch_directives): New function.
	(arm_file_start): Call it.
	* config/arm/arm-cpu-cdata.h: Regenerated.
	* config/arm/arm-cpu-data.h: Likewise.
	* config/arm/arm-tables.opt: Likewise.

From-SVN: r249282
2017-06-16 21:02:10 +00:00
Richard Earnshaw 53c5aa9909 [arm] Don't pass -mfpu=auto through to the assembler.
The assembler doesn't understand -mfpu=auto.  The easiest way to handle this
is to surpress this value from being passed through, while still passing
through legacy values.

	* config/arm/elf.h (ASM_SPEC): Only pass -mfpu through to the
	assembler when it is not -mfpu=auto.

From-SVN: r249281
2017-06-16 21:01:51 +00:00
Richard Earnshaw 867944533b [arm] Rewrite -march and -mcpu options for passing to
The assembler does not understand all the '+' options accepted by the
compiler.  The best solution to this is to simply strip the extensions
and just pass the raw architecture or cpu name through to the
assembler.  We will use .arch and .arch_extension directives anyway to
turn on or off individual features.  We already do something similar
for big.little combinations and this just extends this principle a bit
further.  This patch also fixes a possible bug by ensuring that the
limited string copy is correctly NUL-terminated.

While messing with this code I've also taken the opportunity to clean up
the duplicate definitions of EXTRA_SPEC_FUNCTIONS by moving it outside of
the ifdef wrapper.

	* config/arm/arm.h (BIG_LITTLE_SPEC): Delete macro.
	(ASM_REWRITE_SPEC_FUNCTIONS): New macro.
	(BIG_LITTLE_CPU_SPEC_FUNCTIONS): Delete macro.
	(ASM_CPU_SPEC): Rewrite.
	(MCPU_MTUNE_NATIVE_FUNCTIONS): New macro.
	(EXTRA_SPEC_FUNCTIONS): Move outside of ifdef.  Use
	MCPU_MTUNE_NATIVE_FUNCTIONS and ASM_REWRITE_SPEC_FUNCTIONS.  Remove
	reference to BIG_LITTLE_CPU_SPEC_FUNCTIONS.
	* common/config/arm/arm-common.c (arm_rewrite_selected_cpu): Ensure
	copied string is NUL-terminated.  Also strip any characters prefixed
	by '+'.
	(arm_rewrite_selected_arch): New function.
	(arm_rewrite_march): New function.

From-SVN: r249280
2017-06-16 21:01:29 +00:00
Richard Earnshaw 80448ef602 [arm] Use strings for -march, -mcpu and -mtune options
In order to support more complex specifications for cpus and architectures
we need to move away from using enumerations to represent the set of
permitted options.  This basic change just moves the option parsing
infrastructure over to that, but changes nothing more beyond generating
a hint when the specified option does not match a known target (previously
the help option was able to print out all the permitted values, but we
can no-longer do that.

	* config/arm/arm.opt (x_arm_arch_string): New TargetSave option.
	(x_arm_cpu_string, x_arm_tune_string): Likewise.
	(march, mcpu, mtune): Convert to string-based options.
	* config/arm/arm.c (arm_print_hint_for_core_or_arch): New function.
	(arm_parse_arch_cpu_name): New function.
	(arm_configure_build_target): Use arm_parse_arch_cpu_name to
	identify selected architecture or CPU.
	(arm_option_save): New function.
	(TARGET_OPTION_SAVE): Redefine.
	(arm_option_restore): Restore string options.
	(arm_option_print): Print string options.

From-SVN: r249279
2017-06-16 21:01:22 +00:00
Martin Sebor b3d8d88efa PR tree-optimization/80934 - bzero should be assumed not to escape pointer argument
PR tree-optimization/80934 - bzero should be assumed not to escape pointer argument
PR tree-optimization/80933 - redundant bzero/bcopy calls not eliminated

gcc/ChangeLog:

	PR tree-optimization/80933
	PR tree-optimization/80934
	* builtins.c (fold_builtin_3): Do not handle bcmp here.
	* gimple-fold.c (gimple_fold_builtin_bcmp): New function.
	(gimple_fold_builtin_bcopy, gimple_fold_builtin_bzero): Likewise.
	(gimple_fold_builtin): Call them.

gcc/testsuite/ChangeLog:

	PR tree-optimization/80933
	PR tree-optimization/80934
	* gcc.dg/fold-bcopy.c: New test.
	* gcc.dg/tree-ssa/ssa-dse-30.c: Likewise..
	* gcc.dg/tree-ssa/alias-36.c: Likewise.
	* gcc/testsuite/gcc.dg/pr79214.c: Adjust.
	* gcc.dg/tree-prof/val-prof-7.c: Likewise.
	* gcc.dg/Wsizeof-pointer-memaccess1.c: Likewise.
	* gcc.dg/builtins-nonnull.c: Likewise.

From-SVN: r249278
2017-06-16 14:52:03 -06:00
Jan Hubicka aa11163b18 gimple-ssa-isolate-paths.c (isolate_path): Set edge leading to path as unlikely; update profile.
* gimple-ssa-isolate-paths.c (isolate_path): Set edge leading to path
	as unlikely; update profile.

From-SVN: r249277
2017-06-16 19:02:46 +00:00
Jan Hubicka 8d71d7cd02 predict.c (force_edge_cold): Handle declaring edges impossible more aggresively.
* predict.c (force_edge_cold): Handle declaring edges impossible
	more aggresively.

From-SVN: r249276
2017-06-16 19:02:11 +00:00
Jan Hubicka 8fb0ae8223 tree-ssa-loop-ivcanon.c (remove_exits_and_undefined_stmts): Update profile.
* tree-ssa-loop-ivcanon.c (remove_exits_and_undefined_stmts): Update
	profile.
	(try_unroll_loop_completely): Fix reporting.

From-SVN: r249275
2017-06-16 19:01:39 +00:00
Jan Hubicka deca6d6072 * tree-ssa-tail-merge.c (replace_block_by): Fix profile updating.
From-SVN: r249274
2017-06-16 19:01:01 +00:00
Nathan Sidwell 4086ef7d89 * pt.c (tsubst_baselink): Fix & clarify formatting.
From-SVN: r249273
2017-06-16 18:38:28 +00:00
James Greenhalgh 56960fd6d1 [Patch ARM] Fix PR71778
gcc/

	PR target/71778
	* config/arm/arm-builtins.c (arm_expand_builtin_args): Return TARGET
	if given a non-constant argument for an intrinsic which requires a
	constant.

gcc/testsuite/

	PR target/71778
	* gcc.target/arm/pr71778.c: New.

From-SVN: r249272
2017-06-16 17:29:56 +00:00
Jan Hubicka ec73e54d0a * gcc.dg/tree-ssa/ssa-lim-11.c: Disable branch prediction.
From-SVN: r249271
2017-06-16 17:19:50 +00:00
Jan Hubicka 28ae04d46e profile.c (compare_freqs): New function.
* profile.c (compare_freqs): New function.
	(branch_prob): Sort edge list.
	(find_spanning_tree): Assume that the list is priority sorted.

From-SVN: r249270
2017-06-16 16:08:36 +00:00
Nathan Sidwell e249fcad3a cp-tree.h (build_this_parm, [...]): Add FN parm.
gcc/cp/
	* cp-tree.h (build_this_parm, cp_build_parm_decl)
	build_artificial_parm): Add FN parm.
	* decl.c (start_cleanup_fn): Adjust.
	(build_this_parm): Add FN parm, pass it through.
	(grokfndecl): Adjust parm building.
	* decl2.c (cp_build_parm_decl): Add FN parm, set context.
	(build_artificial_parm): Add FN parm, pass through.
	(maybe_retrofit_in_chrg): Adjust parm building.
	(start_static_storage_duration_function): Likwise.
	* lambda.c (maybe_aadd_lambda_conv_op): Likewise.
	* method.c (implicitly_declare_fn): Likewise.
	* parser.c (inject_this_parameter): Likewise.

	libcc1/
	* libcp1plugin.cc (plugin_build_decl): Adjust parm building.
(--This line, and those below, will be ignored--

M    gcc/cp/parser.c
M    gcc/cp/ChangeLog
M    gcc/cp/decl.c
M    gcc/cp/lambda.c
M    gcc/cp/cp-tree.h
M    gcc/cp/method.c
M    gcc/cp/decl2.c
M    libcc1/libcp1plugin.cc
M    libcc1/ChangeLog

From-SVN: r249268
2017-06-16 15:42:33 +00:00
Jonathan Wakely 78a8b676f1 Add std::get_deleter overload with correct signature
* include/bits/shared_ptr.h (get_deleter): Add overload matching
	standard signature.
	* include/bits/shared_ptr_base.h (__shared_ptr): Declare new
	get_deleter overload as a friend.
	* testsuite/20_util/shared_ptr/misc/get_deleter.cc: New.

From-SVN: r249267
2017-06-16 16:20:14 +01:00
Nathan Sidwell d7b11178c4 Symbol tables are insert only.
* cp-tree.h (default_hash_traits <lang_identifier *>): Don't
	derive from pointer_hash.  Make undeletable.

From-SVN: r249266
2017-06-16 14:54:39 +00:00
Nathan Sidwell ba27a39d37 class.c (resort_type_method_vec): Avoid potential unsigned overflow.
* class.c (resort_type_method_vec): Avoid potential unsigned
	overflow.

From-SVN: r249265
2017-06-16 14:49:35 +00:00
Nathan Sidwell 0d1dc5862f Don't defer noexcept_deferred_spec.
* cp-tree.h (unevaluated_noexcept_spec): Don't declare.
	* decl.c (cxx_init_decl_processing): Initialize
	noexcept_deferred_spec.
	* except.c (unevaluated_noexcept_spec): Delete.
	* class.c (deduce_noexcept_on_destructor): Use
	noexcept_deferred_spec directly.
	* method.c (implicitly_declare_fn): Likewise.

From-SVN: r249264
2017-06-16 14:43:20 +00:00
Nathan Sidwell 6a2dfd9a66 Make keyed_classes a vector.
* cp-tree.h (CPTI_KEYED_CLASSES, keyed_classes): Delete.
	(keyed_classes): Declare as vector.
	* decl.c (keyed_classes): Define.
	(cxx_init_decl_processing): Allocate it.
	(record_key_method_defined): Use vec_safe_push.
	* class.c (finish_struct_1): Likewise.
	* pt.c (instantiate_class_template_1): Likewise.
	* decl2.c (c_parse_final_cleanups): Reverse iterate keyed_classes.

From-SVN: r249263
2017-06-16 14:33:45 +00:00
Nathan Sidwell 8c1ca7ee3a Fix keyboard flub.
From-SVN: r249262
2017-06-16 14:33:28 +00:00
Jakub Jelinek fb7a163397 re PR libstdc++/81092 (Missing symbols for new std::wstring constructors)
PR libstdc++/81092
	* config/abi/post/i486-linux-gnu/baseline_symbols.txt: Update.
	* config/abi/post/powerpc-linux-gnu/baseline_symbols.txt: Update.
	* config/abi/post/powerpc64-linux-gnu/32/baseline_symbols.txt: Update.

From-SVN: r249260
2017-06-16 16:29:55 +02:00
Nathan Sidwell ac9a1c7ec5 Make rtti lazier
Make rtti lazier
	* rtti.c (enum tinfo_kind): Add TK_DERIVED_TYPES,
	TK_VMI_CLASS_TYPES, TK_MAX.  Delete TK_FIXED.
	(tinfo_names): New.
	(typeid_ok_p): Add quotes to error messages.  Use get_tinfo_desc.
	(get_tinfo_decl): Use get_tinfo_desc.
	(get_pseudo_ti_init): Likewise. Adjust VMI construction.
	(create_pseudo_type_info): Delete.
	(get_pseudo_ti_index): Just determine the index.
	(get_tinfo_desc): New.  Create all types lazily.
	(create_tinfo_types): Just allocate the descriptor array.
	(emit_support_tinfos): Use non-inserting type lookup.  Set builtin
	location.

From-SVN: r249258
2017-06-16 14:16:20 +00:00
Jonathan Wakely bfe8a528aa Fix std::wbuffer_convert::sync()
* include/bits/locale_conv.h (wbuffer_convert::sync): Fix condition.
	* testsuite/22_locale/conversions/buffer/2.cc: New.

From-SVN: r249255
2017-06-16 14:23:42 +01:00
Richard Biener 01f1c24e42 re PR tree-optimization/81090 ([graphite] ICE in loop_preheader_edge)
2017-06-16  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/81090
	* passes.def (pass_record_bounds): Remove.
	* tree-pass.h (make_pass_record_bounds): Likewise.
	* tree-ssa-loop.c (pass_data_record_bounds, pass_record_bounds,
	make_pass_record_bounds): Likewise.
	* tree-ssa-loop-ivcanon.c (canonicalize_induction_variables): Do
	not free niter estimates at the beginning but at the end.
	* tree-scalar-evolution.c (scev_finalize): Free niter estimates.

	* gcc.dg/graphite/pr81090.c: New testcase.

From-SVN: r249249
2017-06-16 12:19:24 +00:00
Jonathan Wakely 4317778a9b PR libstdc++/81092 add std::wstring symbols and bump library version
PR libstdc++/81092
	* acinclude.m4: Bump libtool_VERSION.
	* config/abi/post/i386-linux-gnu/baseline_symbols.txt: Update.
	* config/abi/post/x86_64-linux-gnu/32/baseline_symbols.txt: Update.
	* config/abi/pre/gnu.ver: Add wstring constructor symbols to
	GLIBCXX_3.4.24 version and move random_device::_M_get_entropy() symbol
	to new GLIBCXX_3.4.25 version.
	* doc/xml/manual/abi.xml: Document new versions.
	* doc/html/*: Regenerate.
	* testsuite/21_strings/basic_string/cons/char/8.cc: Use base object
	constructors to ensure required symbols are exported.
	* testsuite/21_strings/basic_string/cons/wchar_t/8.cc: Likewise.
	* testsuite/util/testsuite_abi.cc: Add new version.

From-SVN: r249246
2017-06-16 12:54:59 +01:00
Richard Biener 66846c0794 tree-switch-conversion.c (emit_case_bit_tests): Adjust initializer to workaround ICE in host GCC 4.8.
2017-06-16  Richard Biener  <rguenther@suse.de>

	* tree-switch-conversion.c (emit_case_bit_tests): Adjust
	initializer to workaround ICE in host GCC 4.8.

From-SVN: r249245
2017-06-16 11:47:00 +00:00
Jan Hubicka 7d72a77f93 ipa-inline-transform.c (update_noncloned_frequencies): Update also counts.
* ipa-inline-transform.c (update_noncloned_frequencies): Update also
	counts.
	(clone_inlined_nodes): Update.

From-SVN: r249244
2017-06-16 11:41:19 +00:00
Janus Weil 8d94f9324a re PR fortran/80983 ([F03] memory leak when calling procedure-pointer component with allocatable result)
2017-06-16  Janus Weil  <janus@gcc.gnu.org>

	PR fortran/80983
	* gfortran.dg/proc_ptr_comp_51.f90: Repair test case.

From-SVN: r249243
2017-06-16 12:15:42 +02:00
Maxim Kuvyrkov 70c51b5891 Update prefetch tuning parameters for qdf24xx.
* config/aarch64/aarch64.c (qdf24xx_prefetch_tune): Update
	prefetch settings, and enable prefetching by default at -O3.

Change-Id: I2f0da54a8c262f6fbd0dcfde4584141bb09f1013

From-SVN: r249242
2017-06-16 09:31:00 +00:00
Maxim Kuvyrkov 16b2cafd00 Enable -fprefetch-loop-arrays at given optimization level.
* config/aarch64/aarch64.c (aarch64_override_options_internal):
	Set flag_prefetch_loop_arrays according to tuning data.

Change-Id: Id41411e671e0a55dc7268e0ad0a4e8ff1421c90a

From-SVN: r249241
2017-06-16 09:30:52 +00:00
Maxim Kuvyrkov 9d2c6e2eb7 Add prefetch configuration to aarch64 backend.
* config/aarch64/aarch64-protos.h (struct cpu_prefetch_tune):
	New tune structure.
	(struct tune_params): Use cpu_prefetch_tune instead of cache_line_size.
	[Unrelated to main purpose of the patch] Place the pointer field last
	to enable type checking errors when tune structure are wrongly merged.
	* config/aarch64/aarch64.c (generic_prefetch_tune,)
	(exynosm1_prefetch_tune, qdf24xx_prefetch_tune,)
	(thunderx2t99_prefetch_tune): New tune constants.
	(tune_params *_tunings): Update all tunings (no functional change).
	(aarch64_override_options_internal): Set PARAM_SIMULTANEOUS_PREFETCHES,
	PARAM_L1_CACHE_SIZE, PARAM_L1_CACHE_LINE_SIZE, and PARAM_L2_CACHE_SIZE
	from tunings structures.

Change-Id: I1ddbac1863dcf078a2e5b14dd904debc76a7da94

From-SVN: r249240
2017-06-16 09:30:43 +00:00
Jakub Jelinek b783399af9 re PR sanitizer/81094 (-fsanitize=object-size does not instrument aggregate call arguments)
PR sanitizer/81094
	* ubsan.c (instrument_null): Add T argument, use it instead
	of computing it based on IS_LHS.
	(instrument_object_size): Likewise.
	(pass_ubsan::execute): Adjust instrument_null and
	instrument_object_size callers to pass gimple_get_lhs or
	gimple_assign_rhs1 result to it.  Use instrument_null instead of
	calling get_base_address and instrument_mem_ref.  Handle
	aggregate call arguments for object-size sanitization.

	* c-c++-common/ubsan/object-size-11.c: New test.

From-SVN: r249239
2017-06-16 11:13:28 +02:00
Jonathan Wakely 6ec3c9c841 Fix missing returns in libstdc++ header and tests
* include/bits/locale_conv.h (wbuffer_convert::_M_put): Add missing
	return statement.
	* testsuite/21_strings/basic_string_view/operations/copy/char/1.cc:
	Return void.
	* testsuite/21_strings/basic_string_view/operations/copy/wchar_t/1.cc:
	Likewise.
	* testsuite/23_containers/map/modifiers/insert_or_assign/1.cc: Add
	missing return statements.
	* testsuite/23_containers/unordered_map/modifiers/insert_or_assign.cc:
	Likewise.
	* testsuite/27_io/basic_istream/extractors_arithmetic/char/12.cc:
	Return void.
	* testsuite/special_functions/14_expint/pr68397.cc: Likewise.

From-SVN: r249238
2017-06-16 09:13:37 +01:00
Yury Gribov 32e37414af re PR tree-optimization/81089 (ICE: tree check: expected ssa_name, have integer_cst in register_edge_assert_for_2, at tree-vrp.c:5023)
2017-06-16  Yury Gribov  <tetra2005@gmail.com>

	PR tree-optimization/81089
	* tree-vrp.c (is_masked_range_test): Validate operands of
	subexpression.

From-SVN: r249237
2017-06-16 07:16:34 +00:00
Rainer Orth 0186cacf95 Don't use >& for I/O redirection
* Makefile.am (check-go-tool): Don't use >& for I/O redirection.
	* Makefile.in: Regenerate.

From-SVN: r249236
2017-06-16 06:58:06 +00:00
François Dumont 7d594224c2 stl_bvector.h (__fill_bvector(_Bit_type*, unsigned int, unsigned int, bool)): Change signature.
2017-06-16  François Dumont  <fdumont@gcc.gnu.org>

	* include/bits/stl_bvector.h
	(__fill_bvector(_Bit_type*, unsigned int, unsigned int, bool)):
	Change signature.
	(std::fill(_Bit_iterator, _Bit_iterator, bool)): Adapt.
	(_Bvector_impl_data): New.
	(_Bvector_impl): Inherits from latter.
	(_Bvector_impl(_Bit_alloc_type&&)): Delete.
	(_Bvector_impl(_Bvector_impl&&)): New, default.
	(_Bvector_base()): Default.
	(_Bvector_base(_Bvector_base&&)): Default.
	(_Bvector_base::_M_move_data(_Bvector_base&&)): New.
	(vector(vector&&, const allocator_type&)): Use latter.
	(vector<bool>::operator=(vector&&)): Likewise.
	(vector<bool>::vector()): Default.
	(vector<bool>::vector(vector&&)): Default.
	(vector<bool>::assign(_InputIterator, _InputIterator)): Use
	_M_assign_aux.
	(vector<bool>::assign(initializer_list<bool>)): Likewise.
	(vector<bool>::_M_initialize_value(bool)): New.
	(vector<bool>(size_type, const bool&, const allocator_type&)): Use
	latter.
	(vector<bool>::_M_initialize_dispatch(_Integer, _Integer, __true_type)):
	Likewise.
	(vector<bool>::_M_fill_assign(size_t, bool)): Likewise.

From-SVN: r249235
2017-06-16 05:28:06 +00:00