The copy_file fix should have been part of r12-7063-gda72e0fd20f87b.
The path::begin() fix should have been part of r12-3930-gf2b7f56a15d9cb.
Thanks to Timm Bäder for reporting this one.
libstdc++-v3/ChangeLog:
* include/experimental/bits/fs_fwd.h (copy_file): Remove
incorrect noexcept from declaration.
* include/experimental/bits/fs_path.h (path::begin, path::end):
Add noexcept to declarations, to match definitions.
When running testcases libgomp.fortran/examples-4/declare_target-{1,2}.f90 on
an RTX A2000 (sm_86) with driver 510.60.02 and with GOMP_NVPTX_JIT=-O0 I run
into:
...
FAIL: libgomp.fortran/examples-4/declare_target-1.f90 -O0 \
-DGOMP_NVPTX_JIT=-O0 execution test
FAIL: libgomp.fortran/examples-4/declare_target-2.f90 -O0 \
-DGOMP_NVPTX_JIT=-O0 execution test
...
Fix this by further limiting recursion depth in the test-cases for nvptx.
Furthermore, make the recursion depth limiting nvptx-specific.
Tested on x86_64 with nvptx accelerator.
libgomp/ChangeLog:
2022-04-01 Tom de Vries <tdevries@suse.de>
* testsuite/libgomp.fortran/examples-4/declare_target-1.f90: Define
and use REC_DEPTH.
* testsuite/libgomp.fortran/examples-4/declare_target-2.f90: Same.
When running test-case libgomp.oacc-c-c++-common/vector-length-128-7.c on an
RTX A2000 (sm_86) with driver 510.60.02 I run into:
...
FAIL: libgomp.oacc-c/../libgomp.oacc-c-c++-common/vector-length-128-7.c \
-DACC_DEVICE_TYPE_nvidia=1 -DACC_MEM_SHARED=0 -foffload=nvptx-none -O0 \
output pattern test
...
The failing check verifies the launch dimensions:
...
/* { dg-output "nvptx_exec: kernel main\\\$_omp_fn\\\$0: \
launch gangs=1, workers=8, vectors=128" } */
...
which fails because (as we can see with GOMP_DEBUG=1) the actual num_workers
is 6:
...
nvptx_exec: kernel main$_omp_fn$0: launch gangs=1, workers=6, vectors=128
...
This is due to the result of cuOccupancyMaxPotentialBlockSize (which suggests
'a launch configuration with reasonable occupancy') printed just before:
...
cuOccupancyMaxPotentialBlockSize: grid = 52, block = 768
...
[ Note: 6 * 128 == 768. ]
Fix this by updating the check to allow num_workers in the range 1 to 8.
Tested on x86_64 with nvptx accelerator.
libgomp/ChangeLog:
2022-04-01 Tom de Vries <tdevries@suse.de>
* testsuite/libgomp.oacc-c-c++-common/vector-length-128-7.c: Fix
num_workers check.
The following patch fixes the P1 regression by reusing existing
value_replacement code. That function already has code to
handle simple preparation statements (casts, and +,&,|,^ binary
assignments) before a final binary assignment (which can be
much wider range of ops). When we have e.g.
if (y_3(D) == 0)
goto <bb 4>;
else
goto <bb 3>;
<bb 3>:
y_4 = y_3(D) & 31;
_1 = (int) y_4;
_6 = x_5(D) r<< _1;
<bb 4>:
# _2 = PHI <x_5(D)(2), _6(3)>
the preparation statements y_4 = y_3(D) & 31; and
_1 = (int) y_4; are handled by constant evaluation, passing through
y_3(D) = 0 initially and propagating that through the assignments
with checking that UB isn't invoked. But the final
_6 = x_5(D) r<< _1; assign is handled differently, either through
neutral_element_p or absorbing_element_p.
In the first function below we now have:
<bb 2> [local count: 1073741824]:
if (i_2(D) != 0)
goto <bb 3>; [50.00%]
else
goto <bb 4>; [50.00%]
<bb 3> [local count: 536870913]:
_3 = i_2(D) & 1;
iftmp.0_4 = (int) _3;
<bb 4> [local count: 1073741824]:
# iftmp.0_1 = PHI <iftmp.0_4(3), 0(2)>
where in GCC 11 we had:
<bb 2> :
if (i_3(D) != 0)
goto <bb 3>; [INV]
else
goto <bb 4>; [INV]
<bb 3> :
i.1_1 = (int) i_3(D);
iftmp.0_5 = i.1_1 & 1;
<bb 4> :
# iftmp.0_2 = PHI <iftmp.0_5(3), 0(2)>
Current value_replacement can handle the latter as the last
stmt of middle_bb is a binary op that in this case satisfies
absorbing_element_p.
But the former we can't handle, as the last stmt in middle_bb
is a cast.
The patch makes it work in that case by pretending all of middle_bb
are the preparation statements and there is no binary assign at the
end, so everything is handled through the constant evaluation.
We simply set at the start of middle_bb the lhs of comparison
virtually to the rhs, propagate it through and at the end
see if virtually the arg0 of the PHI is equal to arg1 of it.
For GCC 13, I think we just should throw away all the neutral/absorbing
element stuff and do the constant evaluation of the whole middle_bb
and handle that way all the ops we currently handle in neutral/absorbing
element.
2022-04-01 Jakub Jelinek <jakub@redhat.com>
PR tree-optimization/104645
* tree-ssa-phiopt.cc (value_replacement): If assign has
CONVERT_EXPR_CODE_P rhs_code, treat it like a preparation
statement with constant evaluation.
* gcc.dg/tree-ssa/pr104645.c: New test.
As discussed in PR102024, zero width bitfields might not be the only ones
causing ABI issues at least on mips, zero size arrays or (in C only) zero
sized (empty) structures can be problematic too.
The following patch adds some coverage for it too.
Tested on x86_64-linux with
make check-gcc check-g++ RUNTESTFLAGS='ALT_CC_UNDER_TEST=gcc ALT_CXX_UNDER_TEST=g++ --target_board=unix\{-m32,-m64\} compat.exp=pr102024*'
make check-gcc check-g++ RUNTESTFLAGS='ALT_CC_UNDER_TEST=clang ALT_CXX_UNDER_TEST=clang++ --target_board=unix\{-m32,-m64\} compat.exp=pr102024*'
with gcc/g++ 10.3 and clang 11. Everything but (expectedly)
FAIL: gcc.dg/compat/pr102024 c_compat_x_tst.o-c_compat_y_alt.o execute
FAIL: gcc.dg/compat/pr102024 c_compat_x_alt.o-c_compat_y_tst.o execute
for -m64 ALT_CC_UNDER_TEST=gcc passes.
2022-04-01 Jakub Jelinek <jakub@redhat.com>
PR target/102024
* gcc.dg/compat/pr102024_test.h: Add further tests with zero sized
structures and arrays.
* g++.dg/compat/pr102024_test.h: Add further tests with zero sized
arrays.
When running test-cases gcc.target/nvptx/alias-*.c on target board
nvptx-none-run/-misa=sm_80 we run into fails because the test-cases add
-mptx=6.3, which doesn't support sm_80.
Fix this by only adding -mptx=6.3 if necessary, and simplify the test-cases by
using ptx_alias feature abstractions:
...
/* { dg-do run { target runtime_ptx_alias } } */
/* { dg-add-options ptx_alias } */
...
Tested on nvptx.
gcc/testsuite/ChangeLog:
2022-04-01 Tom de Vries <tdevries@suse.de>
* gcc.target/nvptx/nvptx.exp
(check_effective_target_runtime_ptx_isa_version_6_3): Rename and
generalize to ...
(check_effective_target_runtime_ptx_isa_version_at_least): .. this.
(check_effective_target_default_ptx_isa_version_at_least)
(check_effective_target_runtime_ptx_alias, add_options_for_ptx_alias):
New proc.
* gcc.target/nvptx/alias-1.c: Use "target runtime_ptx_alias" and
"dg-add-options ptx_alias".
* gcc.target/nvptx/alias-2.c: Same.
* gcc.target/nvptx/alias-3.c: Same.
* gcc.target/nvptx/alias-4.c: Same.
If MIPS MCU extension is enable, the IPL section in Cause and Status
registers has been expand to 8bit instead of 6bit.
In Cause: the bits are 10-17.
In Status: the bits are 10-16 and 18.
MD00834-2B-MUCON-AFP-01.03.pdf: P49 and P61.
gcc/ChangeLog:
* config/mips/mips.cc (mips_expand_prologue):
IPL is 8bit for MCU ASE.
These tests require a target that supports arm soft-float. The
problem is that the test checks for compile-time soft-float support,
but they may hit a problem when the linker complains that it can't
combine the testcase's object file with hard-float init files and
target system libraries.
I don't see that the tests actually require linking, and they could be
simplified to dg-do assemble, but I figured a link test for soft-float
support could be useful, so I added that, and adjusted the tests to
require it instead.
for gcc/testsuite/ChangeLog
* lib/target-supports.exp
(check_effective_target_arm_soft_ok_link): New.
* gcc.target/arm/size-optimization-ieee-1.c: Use it.
* gcc.target/arm/size-optimization-ieee-2.c: Likewise.
* gcc.target/arm/size-optimization-ieee-3.c: Likewise.
PR104004 caught some misses on my part in converting to the new built-in
function infrastructure. In particular, I forgot to mark all of the "nosoft"
built-ins, and one of those should also have been marked "no32bit".
2022-01-27 Bill Schmidt <wschmidt@linux.ibm.com>
gcc/
PR target/104004
* config/rs6000/rs6000-builtins.def (MFFSL): Mark nosoft.
(MTFSB0): Likewise.
(MTFSB1): Likewise.
(SET_FPSCR_RN): Likewise.
(SET_FPSCR_DRN): Mark nosoft and no32bit.
This currently causes a confusing litany, for example:
options.cc:3245:2: error: #error Multiple different help strings for Wunused-result:
#error Multiple different help strings for Wunused-result:
^
options.cc:3246:2: error: 'Warn' was not declared in this scope
Warn if a caller of a function, marked with attribute warn_unused_result, does not use its return value.
^
options.cc:3246:7: error: expected '}' before 'if'
Warn if a caller of a function, marked with attribute warn_unused_result, does not use its return value.
^
options.cc:3246:7: error: expected ',' or ';' before 'if'
options.cc:3256:54: error: expected unqualified-id before ',' token
(unsigned short) -1, 0, CLVC_INTEGER, 0, -1, -1 },
^
[going on for several thousands of lines]
Fixed:
options.cc:3245:2: error: #error Multiple different help strings for Wunused-result:
#error Multiple different help strings for Wunused-result:
^
options.cc:3246:2: error: #error Warn if a caller of a function, marked with attribute warn_unused_result, does not use its return value.
#error Warn if a caller of a function, marked with attribute warn_unused_result, does not use its return value.
^
options.cc:3247:2: error: #error TEST.
#error TEST.
^
Fix-up for r187437/commit 71caddc556
"optc-gen.awk: Error instead of warning for conflicting help".
gcc/
* optc-gen.awk <END>: Fix "Multiple different help strings" error
diagnostic.
As found by Joseph, the dependency of
gcc/config/loongarch/loongarch-str.h is spelled incorrectly,
it should be
gcc/config/loongarch/genopts/loongarch-strings
but was using
gcc/config/loongarch/genopts/loongarch-string
2022-03-31 Jakub Jelinek <jakub@redhat.com>
Joseph Myers <joseph@codesourcery.com>
PR other/105114
* gcc_update: Fix up spelling of
gcc/config/loongarch/genopts/loongarch-strings dependency.
This patch implements the costing function determine_suggested_unroll_factor
for aarch64.
It determines the unrolling factor by dividing the number of X operations we
can do per cycle by the number of X operations, taking this information from
the vec_ops analysis during vector costing and the available issue_info
information.
We multiply the dividend by a potential reduction_latency, to improve our
pipeline utilization if we are stalled waiting on a particular reduction
operation.
gcc/ChangeLog:
* config/aarch64/aarch64.cc (aarch64_vector_costs): Define
determine_suggested_unroll_factor and m_has_avg.
(determine_suggested_unroll_factor): New function.
(aarch64_vector_costs::add_stmt_cost): Check for a qualifying pattern
to set m_nosve_pattern.
(aarch64_vector_costs::finish_costs): Use
determine_suggested_unroll_factor.
* config/aarch64/aarch64.opt (aarch64-vect-unroll-limit): New.
* doc/invoke.texi: (aarch64-vect-unroll-limit): Document new option.
IPA_JF_ANCESTOR jump functions are constructed also when the formal
parameter of the caller is first checked whether it is NULL and left
as it is if it is NULL, to accommodate C++ casts to an ancestor class.
The jump function type was invented for devirtualization and IPA-CP
propagation of tree constants is also careful to apply it only to
existing DECLs(*) but as PR 103083 shows, the part propagating "known
bits" was not careful about this, which can lead to miscompilations.
This patch introduces a flag to the ancestor jump functions which
tells whether a NULL-check was elided when creating it and makes the
bits propagation behave accordingly, masking any bits otherwise would
be known to be one. This should safely preserve alignment info, which
is the primary ifnormation that we keep in bits for pointers.
(*) There still may remain problems when a DECL resides on address
zero (with -fno-delete-null-pointer-checks ...I hope it cannot happen
otherwise). I am looking into that now but I think it will be easier
for everyone if I do so in a follow-up patch.
gcc/ChangeLog:
2022-02-11 Martin Jambor <mjambor@suse.cz>
PR ipa/103083
* ipa-prop.h (ipa_ancestor_jf_data): New flag keep_null;
(ipa_get_jf_ancestor_keep_null): New function.
* ipa-prop.cc (ipa_set_ancestor_jf): Initialize keep_null field of the
ancestor function.
(compute_complex_assign_jump_func): Pass false to keep_null
parameter of ipa_set_ancestor_jf.
(compute_complex_ancestor_jump_func): Pass true to keep_null
parameter of ipa_set_ancestor_jf.
(update_jump_functions_after_inlining): Carry over keep_null from the
original ancestor jump-function or merge them.
(ipa_write_jump_function): Stream keep_null flag.
(ipa_read_jump_function): Likewise.
(ipa_print_node_jump_functions_for_edge): Print the new flag.
* ipa-cp.cc (class ipcp_bits_lattice): Make various getters const. New
member function known_nonzero_p.
(ipcp_bits_lattice::known_nonzero_p): New.
(ipcp_bits_lattice::meet_with_1): New parameter drop_all_ones,
observe it.
(ipcp_bits_lattice::meet_with): Likewise.
(propagate_bits_across_jump_function): Simplify. Pass true in
drop_all_ones when it is necessary.
(propagate_aggs_across_jump_function): Take care of keep_null
flag.
(ipa_get_jf_ancestor_result): Propagate NULL accross keep_null
jump functions.
gcc/testsuite/ChangeLog:
2021-11-25 Martin Jambor <mjambor@suse.cz>
* gcc.dg/ipa/pr103083-1.c: New test.
* gcc.dg/ipa/pr103083-2.c: Likewise.
The memalign man page on Solaris and QNX lists an additional requirement
for the alignment value that is not present in all implementation of
that non-standard function. For both those targets we should actually be
using posix_memalign anyway, so it doesn't matter. This just adds a
comment making note of that fact.
libstdc++-v3/ChangeLog:
* libsupc++/new_opa.cc (aligned_alloc): Add comment.
PR 102513 shows we emit bogus array access warnings when IPA-CP
creates clones specialized for values which it deduces from arithmetic
jump functions describing self-recursive calls. Those can however be
avoided if we consult the IPA-VR information that the same pass also
has.
The patch below does that at the stage when normally values are only
examined for profitability. It would be better not to create lattices
describing such bogus values in the first place, however that presents
an ordering problem, the pass currently propagates all information,
and so both constants and VR, in no particular order when processing
SCCs, and so this approach seemed much simpler.
I plan to rearrange the pass so that it clones in multiple passes over
the call graph (or rather the lattice dependence graph) and it feels
natural to only do propagation for these kinds of recursion in the
second or later passes, which would fix the issue more elegantly.
gcc/ChangeLog:
2022-02-14 Martin Jambor <mjambor@suse.cz>
PR ipa/102513
* ipa-cp.cc (decide_whether_version_node): Skip scalar values
which do not fit the known value_range.
gcc/testsuite/ChangeLog:
2022-02-14 Martin Jambor <mjambor@suse.cz>
PR ipa/102513
* gcc.dg/ipa/pr102513.c: New test.
in r12-2523-g13586172d0b70c ipa-prop tracking of jump functions during
inlining got the ability to remove ADDR references when inlining
discovered that they were not necessary or turn them into LOAD
references when we know that what was a function call argument passed
by reference will end up as a load (one or more).
Unfortunately, the code only creates the LOAD references when
replacing removed ADDR references and PR 103171 showed that with some
ordering of inlining, we need to add the LOAD reference before we know
we can remove the ADDR one - or the reference will be lost, leading to
link errors or even ICEs.
Specifically in testcase gcc.dg/lto/pr103171_1.c added in this patch,
if foo() is inlined to entry(), we need to create the LOAD reference
so that when later bar() is inlined into foo() and we discover that
the paameter is unused, we can remove the ADDR reference and still
keep the varaible around for the load.
Martin
gcc/ChangeLog:
2022-01-28 Martin Jambor <mjambor@suse.cz>
PR ipa/103171
* ipa-prop.cc (propagate_controlled_uses): Add a LOAD reference
always when an ADDR_EXPR constant is known to reach a load because
of inlining, not just when removing an ADDR reference.
gcc/testsuite/ChangeLog:
2022-01-28 Martin Jambor <mjambor@suse.cz>
PR ipa/103171
* gcc.dg/ipa/remref-6.c: Adjust dump scan string.
* gcc.dg/ipa/remref-7.c: New test.
* gcc.dg/lto/pr103171_0.c: New test.
* gcc.dg/lto/pr103171_1.c: Likewise.
The dg-options line in gcc.target/nvptx/march.c:
...
/* { dg-options "-march=sm_30"} */
...
currently doesn't have any effect because it's missing a space between '"' and
'}'.
Fix this by adding the missing space.
Tested on nvptx.
gcc/testsuite/ChangeLog:
2022-03-31 Tom de Vries <tdevries@suse.de>
* gcc.target/nvptx/march.c: Add missing space in dg-options line.
When update_address_taken rewrites a _Complex into SSA it changes
stores to real/imaginary parts to loads of the other component and
a COMPLEX_EXPR. That matches what gimplification does but it misses
suppression of diagnostics for the load of the other component.
The following patch adds that, syncing up gimplification and
update_address_taken behavior.
2022-03-31 Richard Biener <rguenther@suse.de>
PR tree-optimization/105109
* tree-ssa.cc (execute_update_addresses_taken): Suppress
diagnostics on the load of the other complex component.
* gcc.dg/uninit-pr105109.c: New testcase.
Newer versions of CUDA no longer support sm_30, and nvptx-tools as
currently doesn't handle that gracefully when verifying
( https://github.com/MentorEmbedded/nvptx-tools/issues/30 ).
There's a --no-verify work-around in place in ASM_SPEC, but that one doesn't
work when using -Wa,--verify on the command line.
Use a more robust workaround: verify using sm_35 when misa=sm_30 is specified
(either implicitly or explicitly).
Tested on nvptx.
gcc/ChangeLog:
2022-03-30 Tom de Vries <tdevries@suse.de>
* config/nvptx/nvptx.h (ASM_SPEC): Use "-m sm_35" for -misa=sm_30.
When expanding an aggregate copy into a memcpy call RTL expansion
uses mark_addressable to ensure the base object is addressable but
that function doesn't handle TARGET_MEM_REF bases. Fixed as follows.
2022-03-31 Richard Biener <rguenther@suse.de>
PR rtl-optimization/105091
* gimple-expr.cc (mark_addressable): Handle TARGET_MEM_REF
bases.
The recent change to reject __is_constructible for nested classes with DMI
is, unsurprisingly, breaking some code. Let's allow simple cases by
immediately parsing DMI that do no name lookup; then being in complete class
scope makes no difference.
PR c++/96645
gcc/cp/ChangeLog:
* parser.cc (cp_parser_early_parsing_nsdmi): New.
(cp_parser_member_declaration): Call it.
gcc/testsuite/ChangeLog:
* g++.dg/cpp0x/nsdmi10.C: Now OK.
* g++.dg/ext/is_constructible3.C: Likewise.
* g++.dg/ext/is_constructible7.C: Likewise.
As the subject states. Fixing this is accomplished by moving the built-ins
to the correct stanzas, [altivec] and [vsx].
2022-01-27 Bill Schmidt <wschmidt@linux.ibm.com>
gcc/
* config/rs6000/rs6000-builtins.def (NEG_V16QI): Move to [altivec]
stanza.
(NEG_V4SF): Likewise.
(NEG_V4SI): Likewise.
(NEG_V8HI): Likewise.
(NEG_V2DF): Move to [vsx] stanza.
(NEG_V2DI): Likewise.
When trying to split hard reg live range to assign hard reg to a reload
pseudo, LRA searches for reload insns of the reload pseudo
assuming a specific order of the reload insns. This order is violated if
reload involved in inheritance transformation. In such case, the loop used
for reload insn searching can become infinite. The patch fixes this.
gcc/ChangeLog:
PR middle-end/105032
* lra-assigns.cc (find_reload_regno_insns): Modify loop condition.
gcc/testsuite/ChangeLog:
PR middle-end/105032
* gcc.target/i386/pr105032.c: New.
This patch fixes a crash in conversion_warning on a null expression.
It is null because the testcase uses the GNU A ?: B extension. We
could also use op0 instead of op1 in this case, but it doesn't seem
to be necessary.
PR c++/101030
gcc/c-family/ChangeLog:
* c-warn.cc (conversion_warning) <case COND_EXPR>: Don't call
conversion_warning when OP1 is null.
gcc/testsuite/ChangeLog:
* g++.dg/ext/cond5.C: New test.
Here we're crashing when diagnosing an unsatisfied __is_constructible
constraint because diagnose_trait_expr doesn't recognize this trait
(along with a bunch of other traits). Fix this by adding handling for
all remaining traits and removing the default case so that when adding a
new trait we'll get a warning that diagnose_trait_expr needs to handle it.
PR c++/100474
gcc/cp/ChangeLog:
* constraint.cc (diagnose_trait_expr): Handle all remaining
traits appropriately. Remove default case.
gcc/testsuite/ChangeLog:
* g++.dg/cpp2a/concepts-traits3.C: New test.
The testcase has UB at runtime, placement new shouldn't construct
an object with certain alignment requirements into an unaligned buffer.
2022-03-30 Jakub Jelinek <jakub@redhat.com>
PR tree-optimization/80334
PR target/102772
* g++.dg/torture/pr80334.C: Change from dg-do run to dg-do compile.
The attached 93280 test no longer ICEs but looks like it was never added to the
testsuite. The 104583 test, modified so that it closely resembles 93280, still
ICEs.
The problem is that in 104583 we have a value-init from {} (the line A a{};),
so this code in convert_like_internal
7960 /* If we're initializing from {}, it's value-initialization. */
7961 if (BRACE_ENCLOSED_INITIALIZER_P (expr)
7962 && CONSTRUCTOR_NELTS (expr) == 0
7963 && TYPE_HAS_DEFAULT_CONSTRUCTOR (totype)
7964 && !processing_template_decl)
7965 {
7966 bool direct = CONSTRUCTOR_IS_DIRECT_INIT (expr);
...
7974 TARGET_EXPR_DIRECT_INIT_P (expr) = direct;
sets TARGET_EXPR_DIRECT_INIT_P. This does not happen in 93280 where we
initialize from {0}.
In 104583, when gimplifying, the d = {}; line, we have
d = {.a=TARGET_EXPR <D.2474, <<< Unknown tree: aggr_init_expr
4
__ct_comp
D.2474
(struct A *) <<< Unknown tree: void_cst >>> >>>>}
where the TARGET_EXPR is the one with TARGET_EXPR_DIRECT_INIT_P set. In
gimplify_init_ctor_preeval we do
4724 FOR_EACH_VEC_SAFE_ELT (v, ix, ce)
4725 gimplify_init_ctor_preeval (&ce->value, pre_p, post_p, data);
so we gimplify the TARGET_EXPR, crashing at
744 case TARGET_EXPR:
745 /* A TARGET_EXPR that expresses direct-initialization should have
been
746 elided by cp_gimplify_init_expr. */
747 gcc_checking_assert (!TARGET_EXPR_DIRECT_INIT_P (*expr_p));
but there is no INIT_EXPR so cp_gimplify_init_expr was never called!
Now, the fix for c++/93280
<https://gcc.gnu.org/pipermail/gcc-patches/2020-January/538414.html>
says "let's only set TARGET_EXPR_DIRECT_INIT_P when we're using the DMI in
a constructor." and the comment talks about the full initialization. Is
is accurate to say that our TARGET_EXPR does not represent the full
initialization, because it only initializes the 'a' subobject? If so,
then maybe get_nsdmi should clear TARGET_EXPR_DIRECT_INIT_P when in_ctor
is false.
I've compared the 93280.s and 104583.s files, they differ only in one
movl $0, so there are no extra calls and similar.
PR c++/93280
PR c++/104583
gcc/cp/ChangeLog:
* init.cc (get_nsdmi): Set TARGET_EXPR_DIRECT_INIT_P to in_ctor.
gcc/testsuite/ChangeLog:
* g++.dg/cpp0x/nsdmi-list7.C: New test.
* g++.dg/cpp0x/nsdmi-list8.C: New test.
The following testcase ICEs, because for a volatile X & RESULT_DECL
ubsan wants to take address of that reference. instrument_object_size
is called with x, so the base is equal to the access and the var
is automatic, so there is no risk of an out of bounds access for it.
Normally we wouldn't instrument those because we fold address of the
t - address of inner to 0, add constant size of the decl and it is
equal to what __builtin_object_size computes. But the volatile
results in the subtraction not being folded.
The first hunk fixes it by punting if we access the whole automatic
decl, so that even volatile won't cause a problem.
The second hunk (not strictly needed for this testcase) is similar
to what has been added to asan.cc recently, if we actually take
address of a decl and keep it in the IL, we better mark it addressable.
2022-03-30 Jakub Jelinek <jakub@redhat.com>
PR sanitizer/105093
* ubsan.cc (instrument_object_size): If t is equal to inner and
is a decl other than global var, punt. When emitting call to
UBSAN_OBJECT_SIZE ifn, make sure base is addressable.
* g++.dg/ubsan/pr105093.C: New test.
On the following testcase on 64-bit targets, store-merging sees
a MEM_REF store from {} ctor with "negative" bitsize where bitoff + bitsize
wraps around to very small end offset. This later confuses the code
so that it allocates just a few bytes of memory but fills in huge amounts of
it. Later on there is a param_store_merging_max_size size check but due to
the wrap-around we pass that.
The following patch punts on such large bitsizes.
2022-03-30 Jakub Jelinek <jakub@redhat.com>
PR tree-optimization/105094
* gimple-ssa-store-merging.cc (mem_valid_for_store_merging): Punt if
bitsize <= 0 rather than just == 0.
* gcc.dg/pr105094.c: New test.
cp_parser_omp_iterators does:
DECL_ARTIFICIAL (iter_var) = 1;
DECL_CONTEXT (iter_var) = current_function_decl;
pushdecl (iter_var);
on the newly created iterator vars, but when we instantiate templates
containing them, we just tsubst_decl them (which apparently for
automatic vars clears DECL_CONTEXT with a comment that pushdecl should
be called on them later).
The result is that we have automatic vars in the IL which have NULL
DECL_CONTEXT and the analyzer is upset about those.
Fixed by setting DECL_CONTEXT and calling pushdecl during the instantiation.
2022-03-30 Jakub Jelinek <jakub@redhat.com>
PR c++/105092
* pt.cc (tsubst_omp_clause_decl): When handling iterators, set
DECL_CONTEXT of the iterator var to current_function_decl and
call pushdecl.
* g++.dg/gomp/pr105092.C: New test.
The concepts support (in particular template introductions from concepts TS)
broke the following testcase, valid unnamed bitfields with dependent
types (or even just typedefs) were diagnosed as typos (: instead of correct
::) in template introduction during their tentative parsing.
The following patch fixes that by not doing this : to :: correction when
member_p is true.
2022-03-30 Jakub Jelinek <jakub@redhat.com>
PR c++/105061
* parser.cc (cp_parser_template_introduction): If member_p, temporarily
clear parser->colon_corrects_to_scope_p around tentative parsing of
nested name specifier.
* g++.dg/concepts/pr105061.C: New test.
No changes in generated files.
gcc/
* opt-functions.awk (n_args): New function.
(lang_enabled_by): Merge function into...
* optc-gen.awk <END>: ... sole user here.
Improve diagnostics.
A one-argument form of the 'LangEnabledBy' option property isn't defined,
and effectively appears to be a no-op. Removing these only changes
'build-gcc/gcc/optionlist' accordingly, but no other generated files.
Clean-up for commit ee336ecb2a
"c++: Add new warning options for C++ language mismatches".
gcc/c-family/
* c.opt (Wc++11-extensions, Wc++14-extensions, Wc++17-extensions)
(Wc++20-extensions, Wc++23-extensions): Remove 'LangEnabledBy'
option properties.
A one-argument form of the 'LangEnabledBy' option property isn't defined,
and effectively appears to be a no-op. Removing that one, the
'gcc/c-family/c.opt:Wuse-after-free' option definition record becomes
empty, and doesn't add anything over 'gcc/common.opt:Wuse-after-free', and
may thus be removed entirely. This only changes 'build-gcc/gcc/optionlist'
accordingly, but no other generated files.
Clean-up after recent commit 671a283636
"Add -Wuse-after-free [PR80532]".
gcc/c-family/
* c.opt (Wuse-after-free): Remove.
A one-argument form of the 'LangEnabledBy' option property isn't defined,
and effectively appears to be a no-op. Removing that one, the
'gcc/c-family/c.opt:Warray-bounds' option definition record becomes empty,
and doesn't add anything over 'gcc/common.opt:Warray-bounds', and may thus
be removed entirely. This only changes 'build-gcc/gcc/optionlist'
accordingly, but no other generated files.
Clean-up after r262912/commit 0d7f906520
"PR middle-end/82063 - issues with arguments enabled by -Wall".
gcc/c-family/
* c.opt (Warray-bounds): Remove.
Add vxworks to the set of operating systems whose C libraries don't
support strndup.
for gcc/testsuite/ChangeLog
* gcc.dg/analyzer/strndup-1.c: Add *-*-vxworks* to no-strndup
in libc.
Some ARM configurations, such as with -mlong-calls, load the call
target from the constant pool, breaking the expectation of the test as
on several other targets.
for gcc/testsuite/ChangeLog
* gcc.dg/weak/typeof-2.c: Add arm*-*-* to targets that may
place the call target in a constant pool.
