Commit Graph

176479 Commits

Author SHA1 Message Date
H.J. Lu b3d16040fe libdecnumber: Enable Intel CET on Intel CET enabled host for jit
Since on Intel CET enabled host, dlopen in Intel CET enabled applications
fails on shared libraries which aren't Intel CET enabled, compile with
-fcf-protection on Intel CET enabled host when jit is enabled to enable
Intel CET on libgccjit.

	* Makefile.in (CET_HOST_FLAGS): New.
	(COMPILER): Add $(CET_HOST_FLAGS).
	* configure.ac: Add GCC_CET_HOST_FLAGS(CET_HOST_FLAGS) and
	AC_SUBST(CET_HOST_FLAGS).  Clear CET_HOST_FLAGS if jit isn't
	enabled.
	* aclocal.m4: Regenerated.
	* configure: Likewise.
2020-05-12 09:19:28 -07:00
H.J. Lu 051da74259 libcpp: Enable Intel CET on Intel CET enabled host for jit
Since on Intel CET enabled host, dlopen in Intel CET enabled applications
fails on shared libraries which aren't Intel CET enabled, compile with
-fcf-protection on Intel CET enabled host when jit is enabled to enable
Intel CET on libgccjit.

	* Makefile.in (CET_HOST_FLAGS): New.
	(COMPILER): Add $(CET_HOST_FLAGS).
	* configure.ac: Add GCC_CET_HOST_FLAGS(CET_HOST_FLAGS) and
	AC_SUBST(CET_HOST_FLAGS).  Clear CET_HOST_FLAGS if jit isn't
	enabled.
	* aclocal.m4: Regenerated.
	* configure: Likewise.
2020-05-12 09:17:45 -07:00
H.J. Lu 7e9c5bb0fd gcc: Enable Intel CET on Intel CET enabled host for jit
Since on Intel CET enabled host, dlopen in Intel CET enabled applications
fails on shared libraries which aren't Intel CET enabled, compile with
-fcf-protection on Intel CET enabled host when jit is enabled to enable
Intel CET on libgccjit.

	* Makefile.in (CET_HOST_FLAGS): New.
	(COMPILER): Add $(CET_HOST_FLAGS).
	* configure.ac: Add GCC_CET_HOST_FLAGS(CET_HOST_FLAGS) and
	AC_SUBST(CET_HOST_FLAGS).  Clear CET_HOST_FLAGS if jit isn't
	enabled.
	* aclocal.m4: Regenerated.
	* configure: Likewise.
2020-05-12 09:14:52 -07:00
H.J. Lu af3bef0ea2 libcc1: Enable Intel CET on Intel CET enabled host
Since on Intel CET enabled host, dlopen in Intel CET enabled applications
fails on shared libraries which aren't Intel CET enabled, enable Intel
CET in libcc1 on Intel CET enabled host.

	* Makefile.am (AM_CXXFLAGS): Add $(CET_HOST_FLAGS).
	* configure.ac: Add GCC_CET_HOST_FLAGS(CET_HOST_FLAGS) and
	AC_SUBST(CET_HOST_FLAGS).
	* Makefile.in: Regenerated.
	* aclocal.m4: Likewise.
	* configure: Likewise.
2020-05-12 09:12:37 -07:00
Uros Bizjak 2a2dea6b63 i386: Add V2SFmode NEG, ABS and logic insn patterns [PR95046]
gcc/ChangeLog:

	PR target/95046
	* config/i386/mmx.md (<code>v2sf2): New insn pattern.
	(*mmx_<code>v2sf2): New insn_and_split pattern.
	(*mmx_nabsv2sf2): Ditto.
	(*mmx_andnotv2sf3): New insn pattern.
	(*mmx_<code>v2sf3): Ditto.
	* config/i386/i386.md (absneg_op): New code attribute.
	* config/i386/i386.c (ix86_build_const_vector): Handle V2SFmode.
	(ix86_build_signbit_mask): Ditto.

testsuite/ChangeLog:

	PR target/95046
	* gcc.target/i386/pr95046-2.c: New test.
2020-05-12 17:08:03 +02:00
Uros Bizjak 6416f67273 i386: Add V2SFmode NEG, ABS and logic insn patterns [PR95046]
gcc/ChangeLog:

	PR target/95046
	* config/i386/mmx.md (<code>v2sf2): New insn pattern.
	(*mmx_<code>v2sf2): New insn_and_split pattern.
	(*mmx_nabsv2sf2): Ditto.
	(*mmx_andnotv2sf3): New insn pattern.
	(*mmx_<code>v2sf3): Ditto.
	* config/i386/i386.md (absneg_op): New code attribute.
	* config/i386/i386.c (ix86_build_const_vector): Handle V2SFmode.
	(ix86_build_signbit_mask): Ditto.

testsuite/ChangeLog:

	PR target/95046
	* gcc.target/i386/pr95046-2.c: New test.
2020-05-12 17:06:13 +02:00
Richard Biener 998fbe9f1f remove dead debug-bind resets
This removes debug-bind resets aka

 # DEBUG b = NULL

when the reset variable is otherwise unused.  I've gathered statistics
for a single TU, fold-const.ii which at -O2 -g shows

28 ssa "dead debug bind reset" 1
34 einline "dead debug bind reset" 340
54 release_ssa "dead debug bind reset" 176
54 release_ssa "live debug bind reset of dead var" 4
86 inline "dead debug bind reset" 5131
86 inline "live debug bind reset of dead var" 61
241 optimized "dead debug bind reset" 970
241 optimized "live debug bind reset of dead var" 287

where "live debug bind reset of dead var" means the variable is unused
but there were debug binds with a value for them and
"dead debug bind reset" means the variable is unused and there were
only debug bind resets (each reset of the same variable is counted
for both counters).  This shows A considerable amount of dead stmts
removed esp. after IPA inlining.

2020-05-12  Richard Biener  <rguenther@suse.de>

	* tree-ssa-live.c (remove_unused_locals): Remove dead debug
	bind resets.
2020-05-12 15:52:03 +02:00
Richard Biener 119a7db1e0 middle-end/94988 fix testcase for big-endian
The testcase only works for little-endian, mark it so.

2020-05-12  Richard Biener  <rguenther@suse.de>

	PR middle-end/94988
	* gcc.dg/torture/pr94988.c: Disable runtime test for
	* non-little-endian.
2020-05-12 14:15:28 +02:00
Jozef Lawrynowicz e8fb1a3892 MSP430: Define ASM_OUTPUT_ALIGNED_DECL_LOCAL
gcc/ChangeLog:

2020-05-12  Jozef Lawrynowicz  <jozef.l@mittosystems.com>

	* config/msp430/msp430-protos.h (msp430_output_aligned_decl_common):
	Update prototype to include "local" argument.
	* config/msp430/msp430.c (msp430_output_aligned_decl_common): Add
	"local" argument.  Handle local common decls.
	* config/msp430/msp430.h (ASM_OUTPUT_ALIGNED_DECL_COMMON): Adjust
	msp430_output_aligned_decl_common call with 0 for "local" argument.
	(ASM_OUTPUT_ALIGNED_DECL_LOCAL): Define.

gcc/testsuite/ChangeLog:

2020-05-12  Jozef Lawrynowicz  <jozef.l@mittosystems.com>

	* gcc.c-torture/execute/noinit-attribute.c: Skip for msp430
	in the large memory model.
2020-05-12 12:54:16 +01:00
Jozef Lawrynowicz 89aa37dc3c MSP430: Allow .bss section to be created in region-attribute-misuse test
2020-05-12  Jozef Lawrynowicz  <jozef.l@mittosystems.com>

	* gcc.target/msp430/region-attribute-misuse.c: Allow a .bss section to
	be created.
2020-05-12 12:36:47 +01:00
Eric Botcazou 90aea3e8d4 Fix incorrect scalar storage order handling
This fixes an oversight in the new canonicalization code for packable
types: it does not take into account the scalar storage order.

	PR ada/95035
	* gcc-interface/utils.c (packable_type_hasher::equal): Also compare
	the scalar storage order.
	(hash_packable_type): Also hash the scalar storage order.
	(hash_pad_type): Likewise.
2020-05-12 13:15:48 +02:00
Richard Biener 5e3c2d4b23 preserve EDGE_DFS_BACK across split_edge
This moves EDGE_DFS_BACK to the appropriate edge when the split
edge had it set.

2020-05-12  Richard Biener  <rguenther@suse.de>

	* cfghooks.c (split_edge): Preserve EDGE_DFS_BACK if set.
2020-05-12 12:28:24 +02:00
Martin Liska 6b41920bd5
ASAN: clear DECL_NOT_GIMPLE_REG_P.
PR sanitizer/95033
	PR sanitizer/95051
	* sanopt.c (sanitize_rewrite_addressable_params):
	Clear DECL_NOT_GIMPLE_REG_P for argument.
	PR sanitizer/95033
	PR sanitizer/95051
	* g++.dg/asan/function-argument-4.C: New test.
	* gcc.dg/asan/pr95033.c: New test.
	* gcc.dg/asan/pr95051.c: New test.
2020-05-12 10:23:09 +02:00
Jakub Jelinek 99b0c9ec47 openmp: Fix up handling of DECL_OMP_PRIVATIZED_MEMBER for bit-fields [PR95063]
The r11-15 change broke this testcase, as it now asserts type is equal to
the type of the DECL_VALUE_EXPR, but for DECL_OMP_PRIVATIZED_MEMBER artificial
vars mapping to bitfields it wasn't.  Fixed by changing the
DECL_OMP_PRIVATIZED_MEMBER var type in that case.

2020-05-12  Jakub Jelinek  <jakub@redhat.com>

	PR c++/95063
	* pt.c (tsubst_decl): Deal with DECL_OMP_PRIVATIZED_MEMBER for
	a bit-field.

	* g++.dg/gomp/pr95063.C: New test.
2020-05-12 10:05:27 +02:00
Richard Sandiford 4c0283b9ad tree-vect-generic: Fix bitfield widths [PR94980 3/3]
This third patch of three actually fixes the PR.  We were using
8-bit BIT_FIELD_REFs to access single-bit elements, and multiplying
the vector index by 8 bits rather than 1 bit.

2020-05-12  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	PR tree-optimization/94980
	* tree-vect-generic.c (expand_vector_comparison): Use
	vector_element_bits_tree to get the element size in bits,
	rather than using TYPE_SIZE.
	(expand_vector_condition, vector_element): Likewise.

gcc/testsuite/
	PR tree-optimization/94980
	* gcc.target/i386/pr94980.c: New test.
2020-05-12 09:01:13 +01:00
Richard Sandiford 14605b6bd8 tree-vect-generic: Tweak build_replicated_const [PR94980 2/3]
This patch makes build_replicated_const take the number of bits
in VALUE rather than calculating the width from the element type.
The callers can then use vector_element_bits to calculate the
correct element size from the vector type.

2020-05-12  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	PR tree-optimization/94980
	* tree-vect-generic.c (build_replicated_const): Take the number
	of bits as a parameter, instead of the type of the elements.
	(do_plus_minus): Update accordingly, using vector_element_bits
	to calculate the correct number of bits.
	(do_negate): Likewise.
2020-05-12 09:01:12 +01:00
Richard Sandiford d17a896da1 tree: Add vector_element_bits(_tree) [PR94980 1/3]
A lot of code that wants to know the number of bits in a vector
element gets that information from the element's TYPE_SIZE,
which is always equal to TYPE_SIZE_UNIT * BITS_PER_UNIT.
This doesn't work for SVE and AVX512-style packed boolean vectors,
where several elements can occupy a single byte.

This patch introduces a new pair of helpers for getting the true
(possibly sub-byte) size.  I made a token attempt to convert obvious
element size calculations, but I'm sure I missed some.

2020-05-12  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	PR tree-optimization/94980
	* tree.h (vector_element_bits, vector_element_bits_tree): Declare.
	* tree.c (vector_element_bits, vector_element_bits_tree): New.
	* match.pd: Use the new functions instead of determining the
	vector element size directly from TYPE_SIZE(_UNIT).
	* tree-vect-data-refs.c (vect_gather_scatter_fn_p): Likewise.
	* tree-vect-patterns.c (vect_recog_mask_conversion_pattern): Likewise.
	* tree-vect-stmts.c (vect_is_simple_cond): Likewise.
	* tree-vect-generic.c (expand_vector_piecewise): Likewise.
	(expand_vector_conversion): Likewise.
	(expand_vector_addition): Likewise for a TYPE_SIZE_UNIT used as
	a divisor.  Convert the dividend to bits to compensate.
	* tree-vect-loop.c (vectorizable_live_operation): Call
	vector_element_bits instead of open-coding it.
2020-05-12 09:01:10 +01:00
Jakub Jelinek dc703151d4 openmp: Implement discovery of implicit declare target to clauses
This attempts to implement what the OpenMP 5.0 spec in declare target section
says as ammended by the 5.1 changes so far (related to device_type(host)), except
that it doesn't have the device(ancestor: ...) handling yet because we do not
support it yet, and I've left so far out the except lambda note, because I need
that clarified.

2020-05-12  Jakub Jelinek  <jakub@redhat.com>

	* omp-offload.h (omp_discover_implicit_declare_target): Declare.
	* omp-offload.c: Include context.h.
	(omp_declare_target_fn_p, omp_declare_target_var_p,
	omp_discover_declare_target_fn_r, omp_discover_declare_target_var_r,
	omp_discover_implicit_declare_target): New functions.
	* cgraphunit.c (analyze_functions): Call
	omp_discover_implicit_declare_target.

	* testsuite/libgomp.c/target-39.c: New test.
2020-05-12 09:17:09 +02:00
Richard Biener fe8c8f1e5e Fold &MEM[0 + CST]->a.b.c to a constant
This canonicalizes those to a constant literal.

2020-05-12  Richard Biener  <rguenther@suse.de>

	* gimple-fold.c (maybe_canonicalize_mem_ref_addr): Canonicalize
	literal constant &MEM[..] to a constant literal.
2020-05-12 08:27:59 +02:00
Richard Biener bb63ca63e7 tree-optimization/95045 - fix SM with exit exiting multiple loops
Since we apply SM to an edge which exits multiple loops we have
to make sure to commit insertions on it immediately since otherwise
store order is not preserved.

2020-05-12  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/95045
	* dbgcnt.def (lim): Add debug-counter.
	* tree-ssa-loop-im.c: Include dbgcnt.h.
	(find_refs_for_sm): Use lim debug counter for store motion
	candidates.
	(do_store_motion): Rename form store_motion.  Commit edge
	insertions...
	(store_motion_loop): ... here.
	(tree_ssa_lim): Adjust.
2020-05-12 08:22:19 +02:00
Ulrich Drepper 7a2e715c9a Actually comment the new tests 2020-05-12 07:38:28 +02:00
Ulrich Drepper 491ba663e0 Implent C++20 std::atomic_flag::test
* include/bits/atomic_base.h (atomic_flag): Implement test member
        function.
        * include/std/version: Define __cpp_lib_atomic_flag_test.
        * testsuite/29_atomics/atomic_flag/test/explicit.cc: New file.
        * testsuite/29_atomics/atomic_flag/test/implicit.cc: New file.
2020-05-12 07:37:09 +02:00
Kelvin Nilsen 3ebd168b44 rs6000: Built-in cleanups for vec_clzm, vec_ctzm, and vec_gnb
Changes to the built-in specification occurred after early patches
added support for these.  The name of vec_clzm became vec_cntlzm,
and vec_ctzm became vec_cnttzm.  Four of the overloaded forms of
vec_gnb were removed, and the fourth argument redefined as an
unsigned int, not an unsigned char.  This patch reflects those
changes in the code and test cases.  Eight of the vec_gnb test
cases are removed as a result.

[gcc]

2020-05-11  Kelvin Nilsen  <kelvin@gcc.gnu.org>

	* config/rs6000/altivec.h (vec_clzm): Rename to vec_cntlzm.
	(vec_ctzm): Rename to vec_cnttzm.
	* config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin):
	Change fourth operand for vec_ternarylogic to require
	compatibility with unsigned SImode rather than unsigned QImode.
	* config/rs6000/rs6000-call.c (altivec_overloaded_builtins):
	Remove overloaded forms of vec_gnb that are no longer needed.
	* doc/extend.texi (PowerPC AltiVec Built-in Functions Available
	for a Future Architecture): Replace vec_clzm with vec_cntlzm;
	replace vec_ctzm with vec_cntlzm; remove four unwanted forms of
	vec_gnb; move vec_ternarylogic documentation into this section
	and replace const unsigned char with const unsigned int as its
	fourth argument.

[gcc/testsuite]

2020-05-11  Kelvin Nilsen  <kelvin@gcc.gnu.org>

	* gcc.target/powerpc/vec-clzm-0.c: Rename to...
	* gcc.target/powerpc/vec-cntlzm-0.c: ...this.
	* gcc.target/powerpc/vec-clzm-1.c: Rename to...
	* gcc.target/powerpc/vec-cntlzm-1.c: ...this.
	* gcc.target/powerpc/vec-ctzm-0.c: Rename to...
	* gcc.target/powerpc/vec-cnttzm-0.c: ...this.
	* gcc.target/powerpc/vec-ctzm-1.c: Rename to...
	* gcc.target/powerpc/vec-cnttzm-1.c: ...this.
	* gcc.target/powerpc/vec-gnb-8.c: Rename to...
	* gcc.target/powerpc/vec-gnb-0.c: ...this, deleting the old file.
	* gcc.target/powerpc/vec-gnb-9.c: Rename to...
	* gcc.target/powerpc/vec-gnb-1.c: ...this, deleting the old file.
	* gcc.target/powerpc/vec-gnb-10.c: Rename to...
	* gcc.target/powerpc/vec-gnb-2.c: ...this, deleting the old file.
	* gcc.target/powerpc/vec-gnb-3.c: Delete.
	* gcc.target/powerpc/vec-gnb-4.c: Delete.
	* gcc.target/powerpc/vec-gnb-5.c: Delete.
	* gcc.target/powerpc/vec-gnb-6.c: Delete.
	* gcc.target/powerpc/vec-gnb-7.c: Delete.
2020-05-11 21:37:41 -05:00
Carl Love b8eaa7545b rs6000: Add xxgenpcvwm and xxgenpcvdm
Add support for xxgenpcv[dw]m, along with individual and overloaded
built-in functions for access.

[gcc]

2020-05-11  Carl Love  <cel@us.ibm.com>

	* config/rs6000/altivec.h (vec_genpcvm): New #define.
	* config/rs6000/rs6000-builtin.def (XXGENPCVM_V16QI): New built-in
	instantiation.
	(XXGENPCVM_V8HI): Likewise.
	(XXGENPCVM_V4SI): Likewise.
	(XXGENPCVM_V2DI): Likewise.
	(XXGENPCVM): New overloaded built-in instantiation.
	* config/rs6000/rs6000-call.c (altivec_overloaded_builtins): Add
	entries for FUTURE_BUILTIN_VEC_XXGENPCVM.
	(altivec_expand_builtin): Add special handling for
	FUTURE_BUILTIN_VEC_XXGENPCVM.
	(builtin_function_type): Add handling for
	FUTURE_BUILTIN_XXGENPCVM_{V16QI,V8HI,V4SI,V2DI}.
	* config/rs6000/vsx.md (VSX_EXTRACT_I4): New mode iterator.
	(UNSPEC_XXGENPCV): New constant.
	(xxgenpcvm_<mode>_internal): New insn.
	(xxgenpcvm_<mode>): New expansion.
	* doc/extend.texi: Add documentation for vec_genpcvm built-ins.

[gcc/testsuite]

2020-05-11  Carl Love  <cel@us.ibm.com>

	* gcc.target/powerpc/xxgenpc-runnable.c: New.
2020-05-11 21:22:07 -05:00
eric fang 5ca5751823 runtime: fix TestCallersNilPointerPanic
The expected result of TestCallersNilPointerPanic has changed in
GoLLVM.  This CL makes some elements of the expected result optional
so that this test passes in both gccgo and GoLLVM.

Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/230138
2020-05-11 17:36:24 -07:00
Ian Lance Taylor 4f157ed774 syscall: append to environment in tests, don't clobber it
This is a partial backport of https://golang.org/cl/233318.
It's only a partial backport because part of the change was
already applied to libgo in CL 193497 as part of the update
to the Go 1.13beta1 release.

Fixes PR go/95061

Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/233359
2020-05-11 17:27:46 -07:00
GCC Administrator b58c5e0c73 Daily bump. 2020-05-12 00:16:19 +00:00
Ian Lance Taylor 2f4aeb2f53 compiler: use const std::string& in a couple of places
Use a reference to avoid copying a std::string.

Fixes go/94766

Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/233320
2020-05-11 16:11:04 -07:00
Kelvin Nilsen 89ce32902a rs6000: Vector string isolate instructions
Adds new instructions vstribr, vstrihr, vstribl, and vstrihl, with
overloaded built-in support.

[gcc]

2020-05-11  Kelvin Nilsen  <kelvin@gcc.gnu.org>

	* config/rs6000/altivec.h (vec_strir): New #define.
	(vec_stril): Likewise.
	(vec_strir_p): Likewise.
	(vec_stril_p): Likewise.
	* config/rs6000/altivec.md (UNSPEC_VSTRIR): New constant.
	(UNSPEC_VSTRIL): Likewise.
	(vstrir_<mode>): New expansion.
	(vstrir_code_<mode>): New insn.
	(vstrir_p_<mode>): New expansion.
	(vstrir_p_code_<mode>): New insn.
	(vstril_<mode>): New expansion.
	(vstril_code_<mode>): New insn.
	(vstril_p_<mode>): New expansion.
	(vstril_p_code_<mode>): New insn.
	* config/rs6000/rs6000-builtin.def (__builtin_altivec_vstribr):
	New built-in function.
	(__builtin_altivec_vstrihr): Likewise.
	(__builtin_altivec_vstribl): Likewise.
	(__builtin_altivec_vstrihl): Likewise.
	(__builtin_altivec_vstribr_p): Likewise.
	(__builtin_altivec_vstrihr_p): Likewise.
	(__builtin_altivec_vstribl_p): Likewise.
	(__builtin_altivec_vstrihl_p): Likewise.
	(__builtin_vec_strir): New overloaded built-in function.
	(__builtin_vec_stril): Likewise.
	(__builtin_vec_strir_p): Likewise.
	(__builtin_vec_stril_p): Likewise.
	* config/rs6000/rs6000-call.c (altivec_overloaded_builtins):
	Define overloaded forms of __builtin_vec_strir,
	__builtin_vec_stril, __builtin_vec_strir_p, and
	__builtin_vec_stril_p.
	* doc/extend.texi (PowerPC AltiVec Built-in Functions Available
	for a Future Architecture): Add description of vec_stril,
	vec_stril_p, vec_strir, and vec_strir_p built-in functions.

[gcc]

2020-05-11  Kelvin Nilsen  <kelvin@gcc.gnu.org>

	* gcc.target/powerpc/vec-stril-0.c: New.
	* gcc.target/powerpc/vec-stril-1.c: New.
	* gcc.target/powerpc/vec-stril-10.c: New.
	* gcc.target/powerpc/vec-stril-11.c: New.
	* gcc.target/powerpc/vec-stril-12.c: New.
	* gcc.target/powerpc/vec-stril-13.c: New.
	* gcc.target/powerpc/vec-stril-14.c: New.
	* gcc.target/powerpc/vec-stril-15.c: New.
	* gcc.target/powerpc/vec-stril-16.c: New.
	* gcc.target/powerpc/vec-stril-17.c: New.
	* gcc.target/powerpc/vec-stril-18.c: New.
	* gcc.target/powerpc/vec-stril-19.c: New.
	* gcc.target/powerpc/vec-stril-2.c: New.
	* gcc.target/powerpc/vec-stril-20.c: New.
	* gcc.target/powerpc/vec-stril-21.c: New.
	* gcc.target/powerpc/vec-stril-22.c: New.
	* gcc.target/powerpc/vec-stril-23.c: New.
	* gcc.target/powerpc/vec-stril-3.c: New.
	* gcc.target/powerpc/vec-stril-4.c: New.
	* gcc.target/powerpc/vec-stril-5.c: New.
	* gcc.target/powerpc/vec-stril-6.c: New.
	* gcc.target/powerpc/vec-stril-7.c: New.
	* gcc.target/powerpc/vec-stril-8.c: New.
	* gcc.target/powerpc/vec-stril-9.c: New.
	* gcc.target/powerpc/vec-stril_p-0.c: New.
	* gcc.target/powerpc/vec-stril_p-1.c: New.
	* gcc.target/powerpc/vec-stril_p-10.c: New.
	* gcc.target/powerpc/vec-stril_p-11.c: New.
	* gcc.target/powerpc/vec-stril_p-2.c: New.
	* gcc.target/powerpc/vec-stril_p-3.c: New.
	* gcc.target/powerpc/vec-stril_p-4.c: New.
	* gcc.target/powerpc/vec-stril_p-5.c: New.
	* gcc.target/powerpc/vec-stril_p-6.c: New.
	* gcc.target/powerpc/vec-stril_p-7.c: New.
	* gcc.target/powerpc/vec-stril_p-8.c: New.
	* gcc.target/powerpc/vec-stril_p-9.c: New.
	* gcc.target/powerpc/vec-strir-0.c: New.
	* gcc.target/powerpc/vec-strir-1.c: New.
	* gcc.target/powerpc/vec-strir-10.c: New.
	* gcc.target/powerpc/vec-strir-11.c: New.
	* gcc.target/powerpc/vec-strir-12.c: New.
	* gcc.target/powerpc/vec-strir-13.c: New.
	* gcc.target/powerpc/vec-strir-14.c: New.
	* gcc.target/powerpc/vec-strir-15.c: New.
	* gcc.target/powerpc/vec-strir-16.c: New.
	* gcc.target/powerpc/vec-strir-17.c: New.
	* gcc.target/powerpc/vec-strir-18.c: New.
	* gcc.target/powerpc/vec-strir-19.c: New.
	* gcc.target/powerpc/vec-strir-2.c: New.
	* gcc.target/powerpc/vec-strir-20.c: New.
	* gcc.target/powerpc/vec-strir-21.c: New.
	* gcc.target/powerpc/vec-strir-22.c: New.
	* gcc.target/powerpc/vec-strir-23.c: New.
	* gcc.target/powerpc/vec-strir-3.c: New.
	* gcc.target/powerpc/vec-strir-4.c: New.
	* gcc.target/powerpc/vec-strir-5.c: New.
	* gcc.target/powerpc/vec-strir-6.c: New.
	* gcc.target/powerpc/vec-strir-7.c: New.
	* gcc.target/powerpc/vec-strir-8.c: New.
	* gcc.target/powerpc/vec-strir-9.c: New.
	* gcc.target/powerpc/vec-strir_p-0.c: New.
	* gcc.target/powerpc/vec-strir_p-1.c: New.
	* gcc.target/powerpc/vec-strir_p-10.c: New.
	* gcc.target/powerpc/vec-strir_p-11.c: New.
	* gcc.target/powerpc/vec-strir_p-2.c: New.
	* gcc.target/powerpc/vec-strir_p-3.c: New.
	* gcc.target/powerpc/vec-strir_p-4.c: New.
	* gcc.target/powerpc/vec-strir_p-5.c: New.
	* gcc.target/powerpc/vec-strir_p-6.c: New.
	* gcc.target/powerpc/vec-strir_p-7.c: New.
	* gcc.target/powerpc/vec-strir_p-8.c: New.
	* gcc.target/powerpc/vec-strir_p-9.c: New.
2020-05-11 16:33:19 -05:00
Kelvin Nilsen 840ac85ced rs6000: Add xxeval and vec_ternarylogic
Add the xxeval insn and access it via the vec_ternarylogic built-in
function.  As part of this, add support to the built-in function
infrastructure for functions that take four arguments.

[gcc]

2020-05-11  Kelvin Nilsen  <wschmidt@linux.ibm.com>

	* config/rs6000/altivec.h (vec_ternarylogic): New #define.
	* config/rs6000/altivec.md (UNSPEC_XXEVAL): New constant.
	(xxeval): New insn.
	* config/rs6000/predicates.md (u8bit_cint_operand): New predicate.
	* config/rs6000/rs6000-builtin.def: Add handling of new macro
	RS6000_BUILTIN_4.
	(BU_FUTURE_V_4): New macro. Use it.
	(BU_FUTURE_OVERLOAD_4): Likewise.
	* config/rs6000/rs6000-c.c (altivec_build_resolved_builtin): Add
	handling for quaternary built-in functions.
	(altivec_resolve_overloaded_builtin): Add special-case handling
	for __builtin_vec_xxeval.
	* config/rs6000/rs6000-call.c: Add handling of new macro
	RS6000_BUILTIN_4 in initialization of rs6000_builtin_info,
	bdesc0_arg, bdesc1_arg, bdesc2_arg, bdesc_3arg,
	bdesc_altivec_preds, bdesc_abs, and bdesc_htm arrays.
	(altivec_overloaded_builtins): Add definitions for
	FUTURE_BUILTIN_VEC_XXEVAL.
	(bdesc_4arg): New array.
	(htm_expand_builtin): Add handling for quaternary built-in
	functions.
	(rs6000_expand_quaternop_builtin): New function.
	(rs6000_expand_builtin): Add handling for quaternary built-in
	functions.
	(rs6000_init_builtins): Initialize builtin_mode_to_type entries
	for unsigned QImode and unsigned HImode.
	(builtin_quaternary_function_type): New function.
	(rs6000_common_init_builtins): Add handling of quaternary
	operations.
	* config/rs6000/rs6000.h (RS6000_BTC_QUATERNARY): New defined
	constant.
	(RS6000_BTC_PREDICATE): Change value of constant.
	(RS6000_BTC_ABS): Likewise.
	(rs6000_builtins): Add support for new macro RS6000_BUILTIN_4.
	* doc/extend.texi (PowerPC AltiVec Built-In Functions Available
	for a Future Architecture): Add description of vec_ternarylogic
	built-in function.

[gcc/testsuite]

2020-05-11  Kelvin Nilsen  <wschmidt@linux.ibm.com>

	* gcc.target/powerpc/vec-ternarylogic-0.c: New.
	* gcc.target/powerpc/vec-ternarylogic-1.c: New.
	* gcc.target/powerpc/vec-ternarylogic-10.c: New.
	* gcc.target/powerpc/vec-ternarylogic-2.c: New.
	* gcc.target/powerpc/vec-ternarylogic-3.c: New.
	* gcc.target/powerpc/vec-ternarylogic-4.c: New.
	* gcc.target/powerpc/vec-ternarylogic-5.c: New.
	* gcc.target/powerpc/vec-ternarylogic-6.c: New.
	* gcc.target/powerpc/vec-ternarylogic-7.c: New.
	* gcc.target/powerpc/vec-ternarylogic-8.c: New.
	* gcc.target/powerpc/vec-ternarylogic-9.c: New.
2020-05-11 16:25:03 -05:00
Kelvin Nilsen 2202299c2a rs6000: Add pdepd and pextd
Add scalar instructions for parallel bit deposit and extract, with
built-in function support.

[gcc]

2020-05-11  Kelvin Nilsen  <kelvin@gcc.gnu.org>

	* config/rs6000/rs6000-builtin.def (__builtin_pdepd): New built-in
	function.
	(__builtin_pextd): Likewise.
	* config/rs6000/rs6000.md (UNSPEC_PDEPD): New constant.
	(UNSPEC_PEXTD): Likewise.
	(pdepd): New insn.
	(pextd): Likewise.
	* doc/extend.texi (Basic PowerPC Built-in Functions Available for
	a Future Architecture): Add descriptions of __builtin_pdepd and
	__builtin_pextd functions.

[gcc/testsuite]

2020-05-11  Kelvin Nilsen  <kelvin@gcc.gnu.org>

	* gcc.target/powerpc/pdep-0.c: New.
	* gcc.target/powerpc/pdep-1.c: New.
	* gcc.target/powerpc/pextd-0.c: New.
	* gcc.target/powerpc/pextd-1.c: New.
2020-05-11 16:16:15 -05:00
Kelvin Nilsen 25bf7d32c3 rs6000: Add vclrlb and vclrrb
Add new vector instructions to clear leftmost and rightmost bytes.

[gcc]

2020-05-11  Kelvin Nilsen  <kelvin@gcc.gnu.org>

	* config/rs6000/altivec.h (vec_clrl): New #define.
	(vec_clrr): Likewise.
	* config/rs6000/altivec.md (UNSPEC_VCLRLB): New constant.
	(UNSPEC_VCLRRB): Likewise.
	(vclrlb): New insn.
	(vclrrb): Likewise.
	* config/rs6000/rs6000-builtin.def (__builtin_altivec_vclrlb): New
	built-in function.
	(__builtin_altivec_vclrrb): Likewise.
	(__builtin_vec_clrl): New overloaded built-in function.
	(__builtin_vec_clrr): Likewise.
	* config/rs6000/rs6000-call.c (altivec_overloaded_builtins):
	Define overloaded forms of __builtin_vec_clrl and
	__builtin_vec_clrr.
	* doc/extend.texi (PowerPC AltiVec Built-in Functions Available
	for a Future Architecture): Add descriptions of vec_clrl and
	vec_clrr.

[gcc/testsuite]

2020-05-11  Kelvin Nilsen  <kelvin@gcc.gnu.org>

	* gcc.target/powerpc/vec-clrl-0.c: New.
	* gcc.target/powerpc/vec-clrl-1.c: New.
	* gcc.target/powerpc/vec-clrr-0.c: New.
	* gcc.target/powerpc/vec-clrr-1.c: New.
2020-05-11 16:09:53 -05:00
Bill Schmidt 0e47fe3ab5 Fix change log ordering from previous commit 2020-05-11 16:04:55 -05:00
Joseph Myers f804945f4a Update gcc .po files.
* be.po, da.po, de.po, el.po, es.po, fi.po, fr.po, hr.po, id.po,
	ja.po, nl.po, ru.po, sr.po, sv.po, tr.po, uk.po, vi.po, zh_CN.po,
	zh_TW.po: Update.
2020-05-11 20:42:46 +00:00
Kelvin Nilsen 9acfb58a46 rs6000: Add cntlzdm and cnttzdm
Add support for new scalar instructions for counting leading or
trailing zeros under control of a bitmask.

[gcc]

2020-05-11  Kelvin Nilsen  <kelvin@gcc.gnu.org>

	* config/rs6000/rs6000-builtin.def (__builtin_cntlzdm): New
	built-in function definition.
	(__builtin_cnttzdm): Likewise.
	* config/rs6000/rs6000.md (UNSPEC_CNTLZDM): New constant.
	(UNSPEC_CNTTZDM): Likewise.
	(cntlzdm): New insn.
	(cnttzdm): Likewise.
	* doc/extend.texi (Basic PowerPC Built-in Functions available for
	a Future Architecture): Add descriptions of __builtin_cntlzdm and
	__builtin_cnttzdm functions.

[gcc/testsuite]

2020-05-11  Kelvin Nilsen  <kelvin@gcc.gnu.org>

	* gcc.target/powerpc/cntlzdm-0.c: New test.
	* gcc.target/powerpc/cntlzdm-1.c: New test.
	* gcc.target/powerpc/cnttzdm-0.c: New test.
	* gcc.target/powerpc/cnttzdm-1.c: New test.
2020-05-11 15:27:24 -05:00
Jason Merrill 52c5933f58 c++: Fix specialization of constrained member template.
The resolution of comment CA104 clarifies that we need to do direct
substitution of constraints in order to determine which member template
corresponds to an explicit specialization.

gcc/cp/ChangeLog
2020-05-11  Jason Merrill  <jason@redhat.com>

	Resolve C++20 NB comment CA104
	* pt.c (determine_specialization): Compare constraints for
	specialization of member template of class instantiation.
2020-05-11 16:19:53 -04:00
Jason Merrill 0f50f6daa1 c++: tree walk into TYPENAME_TYPE.
While looking at 92583/92654 it occurred to me that typename types needed
the same fix.  So extract_locals_r also needs to see the TYPE_CONTEXT of a
TYPENAME_TYPE.  But it must not look through a typedef.

Most tree walking in the front end wants to walk through the syntactic form
of a type of expression, and doesn't care about the type referred to by a
typedef.  But min_vis_r does care.

gcc/cp/ChangeLog
2020-05-11  Jason Merrill  <jason@redhat.com>

	PR c++/92583
	PR c++/92654
	* tree.c (cp_walk_subtrees): Stop at typedefs.
	Handle TYPENAME_TYPE here.
	* pt.c (find_parameter_packs_r): Not here.
	(for_each_template_parm_r): Clear *walk_subtrees.
	* decl2.c (min_vis_r): Look through typedefs.
2020-05-11 16:18:11 -04:00
Jason Merrill 42e9f80bf4 c++: Better diagnostic in converted const expr.
This improves the diagnostic from

error: could not convert ‘((A<>*)(void)0)->A<>::e’ from
       ‘<unresolved overloaded function type>’ to ‘bool’

to

error: cannot convert ‘A<>::e’ from type ‘void (A<>::)()’ to type ‘bool’

gcc/cp/ChangeLog
2020-05-11  Jason Merrill  <jason@redhat.com>

	* call.c (implicit_conversion_error): Split out from...
	(perform_implicit_conversion_flags): ...here.
	(build_converted_constant_expr_internal): Use it.
2020-05-11 15:41:15 -04:00
Jason Merrill f981395c22 c++: Use of 'this' in parameter declaration [PR90748]
We were incorrectly accepting the use of 'this' at parse time and then
crashing when we tried to instantiate it.  It is invalid because 'this' is
not in scope until after the function-cv-quals.  So let's hoist setting
current_class_ptr up from cp_parser_late_return_type_opt into
cp_parser_direct_declarator where it can work for noexcept as well.

gcc/cp/ChangeLog
2020-05-11  Jason Merrill  <jason@redhat.com>

	PR c++/90748
	* parser.c (inject_parm_decls): Set current_class_ptr here.
	(cp_parser_direct_declarator): And here.
	(cp_parser_late_return_type_opt): Not here.
	(cp_parser_noexcept_specification_opt): Nor here.
	(cp_parser_exception_specification_opt)
	(cp_parser_late_noexcept_specifier): Remove unneeded parameters.
2020-05-11 15:40:16 -04:00
Harald Anlauf 1422c2e446 PR fortran/95053 - ICE in gfc_divide(): Bad basic type
The fix for PR 93499 introduced a too strict check in gfc_divide
	that could trigger errors in the early parsing phase.  Relax the
	check and defer to a later stage.

gcc/fortran/

2020-05-11  Harald Anlauf  <anlauf@gmx.de>

	PR fortran/95053
	* arith.c (gfc_divide): Do not error out if operand 2 is
	non-numeric.  Defer checks to later stage.

gcc/testsuite/

2020-05-11  Harald Anlauf  <anlauf@gmx.de>

	PR fortran/95053
	* gfortran.dg/pr95053.f: New test.
2020-05-11 21:27:11 +02:00
Jason Merrill aa2c978400 c++: Make references to __cxa_pure_virtual weak.
If a program has no other dependencies on libstdc++, we shouldn't require it
just for __cxa_pure_virtual, which is only there to give a prettier
diagnostic before crashing the program; resolving the reference to NULL will
also crash, just without the diagnostic.

gcc/cp/ChangeLog
2020-05-11  Jason Merrill  <jason@redhat.com>

	* decl.c (cxx_init_decl_processing): Call declare_weak for
	__cxa_pure_virtual.
2020-05-11 15:10:05 -04:00
Jason Merrill e5ccab839a c++: Improve print_tree of static_assert.
We weren't printing the condition and message of a STATIC_ASSERT.

It's also unnecessary to duplicate the code for instantiating a
STATIC_ASSERT between tsubst_expr and instantiate_class_template_1.

gcc/cp/ChangeLog
2020-05-11  Jason Merrill  <jason@redhat.com>

	* pt.c (instantiate_class_template_1): Call tsubst_expr for
	STATIC_ASSERT member.
	* ptree.c (cxx_print_xnode): Handle STATIC_ASSERT.
2020-05-11 15:09:42 -04:00
Jason Merrill f3f9cc41a1 c++: Remove redundant code.
We walk the lambda captures in cp_walk_subtrees, so we don't also need to
walk them here.

gcc/cp/ChangeLog
2020-05-11  Jason Merrill  <jason@redhat.com>

	* pt.c (find_parameter_packs_r) [LAMBDA_EXPR]: Remove redundant
	walking of capture list.
2020-05-11 15:09:24 -04:00
Jason Merrill 08434b02e2 c++: Remove LOOKUP_EXPLICIT_TMPL_ARGS.
This flag is redundant with the explicit_targs field in the overload
candidate information.

gcc/cp/ChangeLog
2020-05-11  Jason Merrill  <jason@redhat.com>

	* cp-tree.h (LOOKUP_EXPLICIT_TMPL_ARGS): Remove.
	* call.c (build_new_function_call): Don't set it.
	(build_new_method_call_1): Likewise.
	(build_over_call): Check cand->explicit_targs instead.
2020-05-11 14:50:57 -04:00
Jason Merrill f315d1477d c++: Tweak VLA representation.
If we put the SAVE_EXPR for a VLA size inside the MINUS_EXPR rather than
outside, it will work better with constant folding.

The equivalent change was made in the C front-end in 2004, in commit
r0-64535-g8b0b9aefd29dfe6398857bcf5628662e2f0e21f6

gcc/cp/ChangeLog
2020-05-11  Jason Merrill  <jason@redhat.com>

	* decl.c (compute_array_index_type_loc): Stabilize before building
	the MINUS_EXPR.
2020-05-11 14:50:41 -04:00
Jason Merrill 3a3e1ea9c6 c++: Avoid unnecessary deprecated warnings.
There's no need to warn that a deprecated function uses a deprecated type,
that just adds noise.  We were preventing that in start_decl, but that
didn't help member declarations that go through grokfield.  So handle it in
grokdeclarator instead, which is shared between them.

gcc/cp/ChangeLog
2020-05-11  Jason Merrill  <jason@redhat.com>

	* decl.c (grokdeclarator): Adjust deprecated_state here.
	(start_decl): Not here.
2020-05-11 14:50:13 -04:00
Uros Bizjak 2b2d298ff8 i386: Add V2SFmode sqrt insn pattern [PR95046]
gcc/ChangeLog:

2020-05-11  Uroš Bizjak  <ubizjak@gmail.com>

	PR target/95046
	* config/i386/mmx.md (sqrtv2sf2): New insn pattern.

testsuite/ChangeLog:

2020-05-11  Uroš Bizjak  <ubizjak@gmail.com>

	PR target/95046
	* gcc.target/i386/pr95046-1.c (test_sqrt): Add.
2020-05-11 20:12:14 +02:00
Ian Lance Taylor 47f4703c33 libbacktrace: declare getpagesize if necessary
libbacktrace/
	PR libbacktrace/95012
	* configure.ac: Check for getpagesize declaration.
	* mmap.c: Declare getpagesize if necessary.
	* mmapio.c: Likewise.
2020-05-11 10:51:59 -07:00
Kelvin Nilsen ed07d68141 rs6000: Add vcfuged instruction
Add the new vector centrifuge-doubleword instruction and built-in
function access.

[gcc]

2020-05-11  Kelvin Nilsen  <kelvin@gcc.gnu.org>

	* config/rs6000/altivec.h (vec_cfuge): New #define.
	* config/rs6000/altivec.md (UNSPEC_VCFUGED): New constant.
	(vcfuged): New insn.
	* config/rs6000/rs6000-builtin.def (__builtin_altivec_vcfuged):
	New built-in function.
	* config/rs6000/rs6000-call.c (builtin_function_type): Add
	handling for FUTURE_BUILTIN_VCFUGED case.
	* doc/extend.texi (PowerPC AltiVec Built-in Functions Available
	for a Future Architecture): Add description of vec_cfuge built-in
	function.

[gcc/testsuite]

2020-05-11  Kelvin Nilsen  <kelvin@gcc.gnu.org>

	* gcc.target/powerpc/vec-cfuged-0.c: New test.
	* gcc.target/powerpc/vec-cfuged-1.c: New test.
2020-05-11 11:41:23 -05:00
Kelvin Nilsen 2403d3d7a5 rs6000: Add scalar cfuged instruction
Add the centifuge-doubleword instruction and built-in access.

[gcc]

2020-05-11  Kelvin Nilsen  <kelvin@gcc.gnu.org>

	* config/rs6000/rs6000-builtin.def (BU_FUTURE_MISC_0): New
	#define.
	(BU_FUTURE_MISC_1): Likewise.
	(BU_FUTURE_MISC_2): Likewise.
	(BU_FUTURE_MISC_3): Likewise.
	(__builtin_cfuged): New built-in function definition.
	* config/rs6000/rs6000.md (UNSPEC_CFUGED): New constant.
	(cfuged): New insn.
	* doc/extend.texi (Basic PowerPC Built-in Functions Available for
	a Future Architecture): New subsubsection.

[gcc/testsuite]

2020-05-11  Kelvin Nilsen  <kelvin@gcc.gnu.org>

	* gcc.target.powerpc/cfuged-0.c: New test.
	* gcc.target.powerpc/cfuged-1.c: New test.
2020-05-11 11:01:32 -05:00