The MIPS sfp-machine.h has an _FP_CHOOSENAN implementation which
emulates hardware semantics of not preserving signaling NaN payloads
for an operation with two NaN arguments (although that doesn't suffice
to avoid sNaN payload preservation in any case with just one NaN
argument).
However, those are only hardware semantics in the legacy NaN case; in
the NAN2008 case, the architecture documentation says hardware
preserves payloads in such cases. Furthermore, this implementation
assumes legacy NaN semantics, so in the NAN2008 case the
implementation actually has the effect of preserving sNaN payloads but
not preserving qNaN payloads, when both should be preserved.
This patch fixes the code just to copy from the first argument (at the
level of libgcc, it's not meaningful which argument is the first and
which is the second).
Tested for mips64-linux-gnu (soft float, NAN2008) with the glibc math/
tests.
* config/mips/sfp-machine.h (_FP_CHOOSENAN): Always preserve NaN
payload if [__mips_nan2008].
From-SVN: r244059
Also fix a stray changelog entry. Some of the regen here is due to
previous changes not being regenerated properly, in part due to the
missing configure dependencies.
* configure: Regenerate.
config/
* picflag.m4: Remove stray \xA0 in comment.
gcc/
* Makefile.in (aclocal_deps): Update and order as per aclocal.m4.
* configure: Regenerate.
* config.in: Regenerate.
libada/
* Makefile.in (configure_deps): Update and order as per
configure.ac sinclude.
* configure: Regenerate.
libgcc/
* Makefile.in (configure_deps): Update.
* configure: Regenerate.
libiberty/
* Makefile.in (configure_deps): Update.
* configure: Regenerate.
libitm/
* Makefile.in: Regenerate.
* testsuite/Makefile.in: Regenerate.
From-SVN: r244049
libgcc/
2016-12-12 George Spelvin <linux@sciencehorizons.net>
* config/avr/lib1funcs.S (__ashldi3): Use __tmp_reg__ to restore
R16 instead of push + pop.
(__ashrdi3, __lshrdi3): Same. And use __zero_reg__ for signs.
From-SVN: r243545
gcc/
2016-12-05 Cupertino Miranda <cmiranda@synopsys.com>
* config/arc/arc.h (STARTFILE_SPEC): Use default linux specs.
(ENDFILE_SPEC): Likewise.
libgcc/
2016-12-05 Cupertino Miranda <cmiranda@synopsys.com>
* config.host (arc*-*-linux-uclibc*): Use default extra
objects. Include linux-android header.
* config/arc/crti.S (_init): Declare symbol as function.
(_fini): Likewise.
From-SVN: r243245
PR gcc/74748
* libgcc/config/bfin/libgcc-glibc.ver, libgcc/config/bfin/t-linux:
use generic linker version information on Blackfin.
2016-11-27 Iain Sandoe <iain@codesourcery.com>
From-SVN: r242934
A/ Newer versions of ld64 check the min_version command, and newer versions of
the system assembler inserts this in response to "-mmacosx-version-min=" on
the assembler line. Unless one makes sensible versions, some object is bound
to conflict.
B/ Additionally, there's a difference in behaviour between "as" and "ld" when
presented with xx.yy.zz (ld truncates to xx.yy, as doesn't); net result is
that one needs to pass a truncated version to "as".
So (if the assembler supports minversion commands)
(a) provide a truncated minversion (as asm_macosx_version_min, which is a
driver-only var).
(b) pass this to "as"
(c) Update tests to determine 'HAVE_AS_MMACOSX_VERSION_MIN_OPTION'
(Rainer's patch)
(d) For some reason the testcases are "run" (it's not obvious they need to be,
they are checking compile-time issues)
- anyway, to preserve the status quo, I've left them as exec. However, the
minimum version that can be code-gened for is target-dependent (there are no
released x86 versions before 10.4, for example). To avoid conflicts where
the "as" is assuming some minimum, I've set the testversion to 10.5 (which
is supported by all the archs we have)
(e) We need to ensure that libgcc and crts are generated with a sufficiently
old minversion not to conflict.
gcc/
2016-11-27 Iain Sandoe <iain@codesourcery.com>
Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
PR target/67710
* config.in: Regenerate
* config/darwin-driver.c (darwin_driver_init): Emit a version string
for the assembler.
* config/darwin.h(ASM_MMACOSX_VERSION_MIN_SPEC): New, new tests.
* config/darwin.opt(asm_macosx_version_min): New.
* config/i386/darwin.h: Handle ASM_MMACOSX_VERSION_MIN_SPEC.
* configure: Regenerate
* configure.ac: Check for mmacosx-version-min handling.
gcc/testsuite/
2016-11-27 Iain Sandoe <iain@codesourcery.com>
Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
Dominique d'Humieres <dominiq@lps.ens.fr>
PR target/67710
* gcc.dg/darwin-minversion-1.c: Update min version check.
* gcc.dg/darwin-minversion-2.c: Likewise.
* gcc.dg/darwin-minversion-3.c: Likewise.
libgcc/
2016-11-27 Iain Sandoe <iain@codesourcery.com>
Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
PR target/67710
* config/t-darwin: Default builds to 10.5 codegen.
Co-Authored-By: Dominique d'Humieres <dominiq@lps.ens.fr>
Co-Authored-By: Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
From-SVN: r242898
libgcc/
* config/arm/fp16.c (struct format): New.
(binary32): New.
(__gnu_float2h_internal): New. Body moved from
__gnu_f2h_internal and generalize.
(_gnu_f2h_internal): Move body to function __gnu_float2h_internal.
Call it with binary32.
Co-Authored-By: Matthew Wahab <matthew.wahab@arm.com>
From-SVN: r242781
The __cpu_indicator_init and __cpu_model symbols are not safe to use
from shared libgcc_s.so from ifunc resolvers, so since gcc-6, only
the definitions from static libgcc.a are used, however the symbols
are kept in libgcc_s as well for backward compatibility (with
appropriate symbol version). On targets without such backward
compatibility concern add cpuinfo to the static library only (this
avoids running the ctor, reduces libgcc_s size and elf abi concerns
about the versioned symbols).
libgcc/
2016-11-11 Szabolcs Nagy <szabolcs.nagy@arm.com>
* config.host (i[3456]86-*-musl*, x86_64-*-musl*): Use
i386/t-cpuinfo-static instead of i386/t-cpuinfo.
* config/i386/t-cpuinfo-static: New.
From-SVN: r242268
Define LIB2ADDEH_XTENSA_UNWIND_DW2_FDE to unwind-dw2-fde.c in
xtensa/t-elf and to unwind-dw2-fde-dip.c in xtensa/t-linux and use
LIB2ADDEH_XTENSA_UNWIND_DW2_FDE in LIB2ADDEH definition.
This fixes build for elf target with windowed xtensa core that currently
breaks with the following error message:
unwind-dw2-fde-dip.c:36:40: fatal error: elf.h: No such file or directory
2016-10-18 Max Filippov <jcmvbkbc@gmail.com>
libgcc/
* config/xtensa/t-elf (LIB2ADDEH_XTENSA_UNWIND_DW2_FDE): New
definition.
* config/xtensa/t-linux (LIB2ADDEH_XTENSA_UNWIND_DW2_FDE): New
definition.
* config/xtensa/t-windowed (LIB2ADDEH): Use
LIB2ADDEH_XTENSA_UNWIND_DW2_FDE defined by either xtensa/t-elf
or xtensa/t-linux.
From-SVN: r241313
Use new FPU instruction sequences documented in the ISA book to
implement __divsf3, __divdf3, __recipsf2, __recipdf2, __rsqrtsf2,
__rsqrtdf2 and __ieee754_sqrtf and __ieee754_sqrt.
2016-10-18 Ding-Kai Chen <dkchen@cadence.com>
libgcc/
* config/xtensa/ieee754-df.S (__recipdf2, __rsqrtdf2,
__ieee754_sqrt): New functions.
(__divdf3): Add implementation with new FPU instructions under
#if XCHAL_HAVE_DFP_DIV.
* config/xtensa/ieee754-sf.S (__recipsf2, __rsqrtsf2,
__ieee754_sqrtf): New functions.
(__divsf3): Add implementation with new FPU instructions under
#if XCHAL_HAVE_FP_DIV.
* config/xtensa/t-xtensa (LIB1ASMFUNCS): Add _sqrtf, _recipsf2
_rsqrtsf2, _sqrt, _recipdf2 and _rsqrtdf2.
From-SVN: r241312
Bug 77586, and previously
<https://gcc.gnu.org/ml/gcc-bugs/2016-08/msg03233.html>, reports
ia64-elf failing to build because of float128_type_node being NULL,
but being used by the back end for __float128.
The global float128_type_node is only available conditionally, if
target hooks indicate TFmode is not only available as a scalar mode
and of the right format, but also supported in libgcc. The back-end
support, however, expects the type always to be available for
__float128 even if the libgcc support is missing.
Although a target-specific node could be restored in the case where
libgcc support is missing, it seems better to address the missing
libgcc support. Thus, this patch enables TFmode soft-fp in libgcc
globally for all ia64 targets. Support for XFmode in libgcc (that is,
for libgcc2.c XFmode functions, not soft-fp) is also enabled for all
ia64 targets so that ia64 no longer needs to define the
TARGET_LIBGCC_FLOATING_MODE_SUPPORTED_P hook.
I've confirmed that ia64-elf builds cc1 with this patch and it passes
-fself-test. I have not otherwise tested the patch. It's plausible
that ia64-elf and ia64-freebsd might work as-is, but ia64-vms probably
needs further changes, by someone familiar with VMS shared libraries,
to implement an equivalent of ia64/t-softfp-compat in that case
(avoiding conflicts between __divtf3 from soft-fp and the old alias
for __divxf3).
PR target/77586
gcc:
* config/ia64/ia64.c (ia64_libgcc_floating_mode_supported_p)
(TARGET_LIBGCC_FLOATING_MODE_SUPPORTED_P): Remove.
* config/ia64/elf.h (IA64_NO_LIBGCC_TFMODE): Likewise.
* config/ia64/freebsd.h (IA64_NO_LIBGCC_TFMODE): Likewise.
* config/ia64/vms.h (IA64_NO_LIBGCC_XFMODE)
(IA64_NO_LIBGCC_TFMODE): Likewise.
libgcc:
* config.host (ia64*-*-elf*, ia64*-*-freebsd*, ia64-hp-*vms*): Use
soft-fp.
From-SVN: r240955
PR gcov-profile/7970
PR gcov-profile/16855
PR gcov-profile/44779
* g++.dg/gcov/pr16855.C: New test.
* coverage.c (build_gcov_exit_decl): New function.
(coverage_obj_init): Call the function and generate __gcov_exit
destructor.
* doc/gcov.texi: Document when __gcov_exit function is called.
* libgcov-driver.c (__gcov_init): Do not register a atexit
handler.
(__gcov_exit): Rename from gcov_exit.
* libgcov.h (__gcov_exit): Declare.
From-SVN: r240529
* configure.ac: Do not create links, only substitute the filenames.
* configure: Regenerate.
* Makefile.in: Assign the substitution results to variables.
(LIBGCC_LINKS): Define.
(enable-execute-stack.c): New rule.
(unwind.h): Likewise.
(md-unwind-support.h): Likewise.
(sfp-machine.h): Likewise.
(gthr-default.h): Likewise.
Add $(LIBGCC_LINKS) to the prerequisites of all object files and
unwind.h as prerequisite of install-unwind_h-forbuild.
From-SVN: r240312
PR libgcc/71744
* unwind-dw2-fde.c (ATOMIC_FDE_FAST_PATH): Define if __register_frame*
is not the primary registry and atomics are available.
(any_objects_registered): New variable.
(__register_frame_info_bases, __register_frame_info_table_bases):
Atomically store 1 to any_objects_registered after registering first
unwind info.
(_Unwind_Find_FDE): Return early if any_objects_registered is 0.
From-SVN: r240193
This patch arranges for half-precision complex multiply and divide
routines to be built if __LIBGCC_HAS_HF_MODE__. This will be true
if the target supports the _Float16 type.
libgcc/
PR target/63250
* Makefile.in (lib2funcs): Build _mulhc3 and _divhc3.
* libgcc2.h (LIBGCC_HAS_HF_MODE): Conditionally define.
(HFtype): Likewise.
(HCtype): Likewise.
(__divhc3): Likewise.
(__mulhc3): Likewise.
* libgcc2.c: Support _mulhc3 and _divhc3.
From-SVN: r240043
libgcc complex multiply is meant to eliminate excess
precision from certain internal values by forcing them to memory in
exactly those cases where the type has excess precision. But in
https://gcc.gnu.org/ml/gcc-patches/2014-09/msg01894.html I
accidentally inverted the logic so that values get forced to memory in
exactly the cases where it's not needed. (This is a pessimization in
the no-excess-precision case, in principle could lead to bad results
depending on code generation in the excess-precision case. Note: I do
not have a test demonstrating bad results.)
Bootstrapped with no regressions on x86_64-pc-linux-gnu. Code size
went down on x86_64 as expected; old sizes:
text data bss dec hex filename
887 0 0 887 377 _muldc3.o
810 0 0 810 32a _mulsc3.o
2032 0 0 2032 7f0 _multc3.o
983 0 0 983 3d7 _mulxc3.o
New sizes:
847 0 0 847 34f _muldc3.o
770 0 0 770 302 _mulsc3.o
2032 0 0 2032 7f0 _multc3.o
951 0 0 951 3b7 _mulxc3.o
PR libgcc/77519
* libgcc2.c (NOTRUNC): Invert settings.
From-SVN: r240033
In <https://gcc.gnu.org/ml/gcc-bugs/2016-08/msg03233.html>, Nick
reported i386-elf and ia64-elf failing to build because of
float128_type_node being NULL, but being used by the back end for
__float128.
The global float128_type_node is only available conditionally, if
target hooks indicate TFmode is not only available as a scalar mode
and of the right format, but also supported in libgcc. The back-end
support, however, expects the type always to be available for
__float128 even if the libgcc support is missing.
Although a target-specific node could be restored in the case where
libgcc support is missing, it seems better to address the missing
libgcc support. Thus, this patch enables TFmode soft-fp in libgcc
globally for all x86 targets - the only special cases needed being for
targets that use soft-fp for SFmode and DFmode, one of which already
had the support for TFmode as well (so I based the i[34567]86-*-rtems*
configuration on that present for i[34567]86-*-elfiamcu). The i386
implementation of TARGET_LIBGCC_FLOATING_MODE_SUPPORTED_P is then
removed as no longer needed.
I can provide such a patch for ia64 if useful, but am not in a
position to test it (and while I'm reasonably confident that enabling
this support would be right for ia64-elf and ia64-freebsd, I've no
real idea if enabling libgcc support for TFmode, with or without also
enabling it for XFmode, would be safe for ia64-vms).
Bootstrapped with no regressions on x86_64-pc-linux-gnu.
gcc:
* config/i386/i386.c (ix86_libgcc_floating_mode_supported_p)
(TARGET_LIBGCC_FLOATING_MODE_SUPPORTED_P): Remove.
* config/i386/i386elf.h (IX86_MAYBE_NO_LIBGCC_TFMODE): Likewise.
* config/i386/lynx.h (IX86_MAYBE_NO_LIBGCC_TFMODE): Likewise.
* config/i386/netbsd-elf.h (IX86_MAYBE_NO_LIBGCC_TFMODE):
Likewise.
* config/i386/netbsd64.h (IX86_MAYBE_NO_LIBGCC_TFMODE): Likewise.
* config/i386/nto.h (IX86_MAYBE_NO_LIBGCC_TFMODE): Likewise.
* config/i386/openbsd.h (IX86_MAYBE_NO_LIBGCC_TFMODE): Likewise.
* config/i386/rtemself.h (IX86_NO_LIBGCC_TFMODE): Likewise.
* config/i386/vxworks.h (IX86_MAYBE_NO_LIBGCC_TFMODE): Likewise.
libgcc:
* config.host (i[34567]86-*-* | x86_64-*-*): Enable TFmode soft-fp
where not already enabled.
From-SVN: r239775
* doc/gcov.texi: Change _gcov_dump to __gcov_dump and
_gcov_reset to __gcov_reset.
* doc/gcov-tool.texi: Fix typo.
* libgcov-util.c: Fix typo and GNU coding style.
From-SVN: r239307
* Makefile.in: Remove __gcov_indirect_call_profiler.
* libgcov-profiler.c (__gcov_indirect_call_profiler): Remove
function.
* libgcov.h: And the declaration of the function.
From-SVN: r239306
* gcc.dg/tree-prof/val-prof-8.c: New test.
* value-prof.c (dump_histogram_value): Swap pow2 and non-pow2
values.
* libgcov-profiler.c (__gcov_pow2_profiler): Consider 0 as not
power of two.
From-SVN: r239304
For Aurelien Jarno <aurelien@aurel32.net>
On ARM soft-float, the float to double conversion doesn't convert a sNaN
to qNaN as the IEEE Std 754 standard mandates:
"Under default exception handling, any operation signaling an invalid
operation exception and for which a floating-point result is to be
delivered shall deliver a quiet NaN."
Given the soft float ARM code ignores exceptions and always provides a
result, a float to double conversion of a signaling NaN should return a
quiet NaN. Fix this in extendsfdf2.
gcc/ChangeLog:
PR target/59833
* config/arm/ieee754-df.S (extendsfdf2): Convert sNaN to qNaN.
gcc/testsuite/ChangeLog:
* gcc.dg/pr59833.c: New testcase.
From-SVN: r238584
2016-07-11 Hale Wang <hale.wang@arm.com>
Andre Vieira <andre.simoesdiasvieira@arm.com>
* config/arm/lib1funcs.S: Add new wrapper.
Co-Authored-By: Andre Vieira <andre.simoesdiasvieira@arm.com>
From-SVN: r238215
2016-07-07 Thomas Preud'homme <thomas.preudhomme@arm.com>
gcc/
* config/arm/arm-arches.def (armv8-m.base): Define new architecture.
(armv8-m.main): Likewise.
(armv8-m.main+dsp): Likewise.
* config/arm/arm-protos.h (FL_FOR_ARCH8M_BASE): Define.
(FL_FOR_ARCH8M_MAIN): Likewise.
* config/arm/arm-tables.opt: Regenerate.
* config/arm/bpabi.h: Add armv8-m.base, armv8-m.main and
armv8-m.main+dsp to BE8_LINK_SPEC.
* config/arm/arm.h (TARGET_HAVE_LDACQ): Exclude ARMv8-M.
(enum base_architecture): Add BASE_ARCH_8M_BASE and BASE_ARCH_8M_MAIN.
* config/arm/arm.c (arm_arch_name): Increase size to work with ARMv8-M
Baseline and Mainline.
(arm_option_override_internal): Also disable arm_restrict_it when
!arm_arch_notm. Update comment for -munaligned-access to also cover
ARMv8-M Baseline.
(arm_file_start): Increase buffer size for printing architecture name.
* doc/invoke.texi: Document architectures armv8-m.base, armv8-m.main
and armv8-m.main+dsp.
(mno-unaligned-access): Clarify that this is disabled by default for
ARMv8-M Baseline architectures as well.
gcc/testsuite/
* lib/target-supports.exp: Generate add_options_for_arm_arch_FUNC and
check_effective_target_arm_arch_FUNC_multilib for ARMv8-M Baseline and
ARMv8-M Mainline architectures.
libgcc/
* config/arm/lib1funcs.S (__ARM_ARCH__): Define to 8 for ARMv8-M.
From-SVN: r238081
2016-07-07 Thomas Preud'homme <thomas.preudhomme@arm.com>
libgcc/
* config/arm/lib1funcs.S (HAVE_ARM_CLZ): Define for ARMv6* or later
and ARMv5t* rather than for a fixed list of architectures.
From-SVN: r238080
2016-07-07 Thomas Preud'homme <thomas.preudhomme@arm.com>
gcc/
* config/arm/elf.h: Use __ARM_ARCH_ISA_THUMB and __ARM_ARCH_ISA_ARM to
decide whether to prevent some libgcc routines being included for some
multilibs rather than __ARM_ARCH_6M__ and add comment to indicate the
link between this condition and the one in
libgcc/config/arm/lib1func.S.
gcc/testsuite/
* lib/target-supports.exp (check_effective_target_arm_cortex_m): Use
__ARM_ARCH_ISA_ARM to test for Cortex-M devices.
libgcc/
* config/arm/bpabi-v6m.S: Clarify what architectures is the
implementation suitable for.
* config/arm/lib1funcs.S (__prefer_thumb__): Define among other cases
for all Thumb-1 only targets.
(NOT_ISA_TARGET_32BIT): Define for Thumb-1 only targets.
(THUMB_LDIV0): Test for NOT_ISA_TARGET_32BIT rather than
__ARM_ARCH_6M__.
(EQUIV): Likewise.
(ARM_FUNC_ALIAS): Likewise.
(umodsi3): Add check to __ARM_ARCH_ISA_THUMB != 1 to guard the idiv
version.
(modsi3): Likewise.
(clzsi2): Test for NOT_ISA_TARGET_32BIT rather than __ARM_ARCH_6M__.
(clzdi2): Likewise.
(ctzsi2): Likewise.
(L_interwork_call_via_rX): Test for __ARM_ARCH_ISA_ARM rather than
__ARM_ARCH_6M__ in guard for checking whether it is defined.
(final includes): Test for NOT_ISA_TARGET_32BIT rather than
__ARM_ARCH_6M__ and add comment to indicate the connection between
this condition and the one in gcc/config/arm/elf.h.
* config/arm/libunwind.S: Test for __ARM_ARCH_ISA_THUMB and
__ARM_ARCH_ISA_ARM rather than __ARM_ARCH_6M__.
* config/arm/t-softfp: Likewise.
From-SVN: r238079
The last target to use this was i386-interix, so since that is gone we
don't need this anymore.
libgcc/ChangeLog:
2016-07-06 Trevor Saunders <tbsaunde+gcc@tbsaunde.org>
* libgcc2.c (SYMBOL__MAIN): Remove checks for
CTOR_LISTS_DEFINED_EXTERNALLY.
From-SVN: r238067
gcc/ChangeLog
* config/tilegx/linux.h: Do not include arch/icache.h
(CLEAR_INSN_CACHE): Provide inlined definition directly.
* config/tilepro/linux.h: Do not include arch/icache.h
(CLEAR_INSN_CACHE): Provide inlined definition directly.
libgcc/ChangeLog
* config/tilepro/atomic.h: Do not include arch/spr_def.h and
asm/unistd.h.
(SPR_CMPEXCH_VALUE): Define for tilegx.
(__NR_FAST_cmpxchg): Define for tilepro.
(__NR_FAST_atomic_update): Define for tilepro.
(__NR_FAST_cmpxchg64): Define for tilepro.
From-SVN: r237824
libgcc/
PR libgcc/70720
* config.host (moxie-*-rtems*): Merge this stanza with other moxie
targets so the same extra_parts are built. Also have tmake_file add
on to its value rather than override.
From-SVN: r236064
[gcc]
2016-04-11 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/70381
* config/rs6000/rs6000.c (rs6000_opt_masks): Disable using the
target attribute and pragma from changing the -mfloat128
and -mfloat128-hardware options.
* doc/extend.texi (Additional Floating Types): Document PowerPC
__float128 restrictions.
[libgcc]
2016-04-11 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/70381
* configure.ac (powerpc*-*-linux*): Rework tests to build
__float128 emulation routines to not depend on using #pragma GCC
target to enable -mfloat128.
* configure: Regnerate.
[gcc/testsuite]
2016-04-11 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/70381
* gcc.target/powerpc/float128-1.c: New tests to make sure the
__float128 emulator is built and runs.
* gcc.target/powerpc/float128-1.c: Likewise.
* lib/target-supports.exp (check_ppc_float128_sw_available):
Rework tests for __float128 software and hardware
availability. Fix exit condition to return 0 on success.
From-SVN: r234884
2016-03-22 Michael Meissner <meissner@linux.vnet.ibm.com>
PR libgcc/70363
* config/rs6000/extendkftf2-sw.c (__extendkftf2_sw): If libgcc was
built with an assembler that does not support ISA 3.0
instructions, rename __extendkftf2_sw to __extendkftf2.
From-SVN: r234408
2016-02-26 Paul E. Murphy <murphyp@linux.vnet.ibm.com>
Bill Schmidt <wschmidt@linux.vnet.ibm.com>
* config/rs6000/sfp-machine.h (_FP_DECL_EX): Declare _fpsr as a
union of u64 and double.
(FP_TRAPPING_EXCEPTIONS): Return a bitmask of trapping exceptions.
(FP_INIT_ROUNDMODE): Read the fpscr instead of writing a mystery
value.
(FP_ROUNDMODE): Update the usage of _fpscr.
Co-Authored-By: Bill Schmidt <wschmidt@linux.vnet.ibm.com>
From-SVN: r233756
gcc/
PR driver/68463
* config/gnu-user.h (CRTOFFLOADBEGIN): Define. Add crtoffloadbegin.o if
offloading is enabled and -fopenacc or -fopenmp is specified.
(CRTOFFLOADEND): Likewise.
(GNU_USER_TARGET_STARTFILE_SPEC): Add CRTOFFLOADBEGIN.
(GNU_USER_TARGET_ENDFILE_SPEC): Add CRTOFFLOADEND.
* lto-wrapper.c (offloadbegin, offloadend): Remove static vars.
(offload_objects_file_name): New static var.
(tool_cleanup): Remove offload_objects_file_name file.
(find_offloadbeginend): Replace with ...
(find_crtoffloadtable): ... this.
(run_gcc): Remove offload_argc and offload_argv.
Get offload_objects_file_name from -foffload-objects=... option.
Read names of object files with offload from this file, pass them to
compile_images_for_offload_targets. Don't call find_offloadbeginend and
don't pass offloadbegin and offloadend to the linker. Don't pass
offload non-LTO files to the linker, because now they're not claimed.
libgcc/
PR driver/68463
* Makefile.in (crtoffloadtable$(objext)): New rule.
* configure.ac (extra_parts): Add crtoffloadtable$(objext) if
enable_offload_targets is not empty.
* configure: Regenerate.
* offloadstuff.c: Move __OFFLOAD_TABLE__ from crtoffloadend to
crtoffloadtable.
libgomp/
PR driver/68463
* testsuite/libgomp.oacc-c-c++-common/parallel-dims-2.c: Remove.
lto-plugin/
PR driver/68463
* lto-plugin.c (struct plugin_offload_file): New.
(offload_files): Change type.
(offload_files_last, offload_files_last_obj): New.
(offload_files_last_lto): New.
(free_2): Adjust accordingly.
(all_symbols_read_handler): Don't add offload files to lto_arg_ptr.
Don't call free_1 for offload_files. Write names of object files with
offloading to the temporary file. Add new option to lto_arg_ptr.
(claim_file_handler): Don't claim file if it contains offload sections
without LTO sections. If it contains offload sections, add to the list.
From-SVN: r233712
Functions __muldf3_aux, __divdf3_aux, __mulsf3_aux and __divsf3_aux
don't start with leaf_entry, so they need explicit .literal_position,
otherwise libgcc build fails in the presence of --text-section-literals.
2016-02-17 Max Filippov <jcmvbkbc@gmail.com>
libgcc/
* config/xtensa/ieee754-df.S (__muldf3_aux, __divdf3_aux): Add
.literal_position before the function.
* config/xtensa/ieee754-sf.S (__mulsf3_aux, __divsf3_aux):
Likewise.
From-SVN: r233505
libgcc/ChangeLog:
* config.host: Use t-stack and t-stack-s390 for s390*-*-linux.
* config/s390/morestack.S: New file.
* config/s390/t-stack-s390: New file.
* generic-morestack.c (__splitstack_find): Add s390-specific code.
gcc/ChangeLog:
* common/config/s390/s390-common.c (s390_supports_split_stack):
New function.
(TARGET_SUPPORTS_SPLIT_STACK): New macro.
* config/s390/s390-protos.h: Add s390_expand_split_stack_prologue.
* config/s390/s390.c (struct machine_function): New field
split_stack_varargs_pointer.
(s390_register_info): Mark r12 as clobbered if it'll be used as temp
in s390_emit_prologue.
(s390_emit_prologue): Use r12 as temp if r1 is taken by split-stack
vararg pointer.
(morestack_ref): New global.
(SPLIT_STACK_AVAILABLE): New macro.
(s390_expand_split_stack_prologue): New function.
(s390_live_on_entry): New function.
(s390_va_start): Use split-stack vararg pointer if appropriate.
(s390_asm_file_end): Emit the split-stack note sections.
(TARGET_EXTRA_LIVE_ON_ENTRY): New macro.
* config/s390/s390.md (UNSPEC_STACK_CHECK): New unspec.
(UNSPECV_SPLIT_STACK_CALL): New unspec.
(UNSPECV_SPLIT_STACK_DATA): New unspec.
(split_stack_prologue): New expand.
(split_stack_space_check): New expand.
(split_stack_data): New insn.
(split_stack_call): New expand.
(split_stack_call_*): New insn.
(split_stack_cond_call): New expand.
(split_stack_cond_call_*): New insn.
From-SVN: r233421
2016-02-03 Andreas Tobler <andreast@gcc.gnu.org>
PR bootstrap/69611
* config/rs6000/sfp-machine.h: Guard __sfp_exceptions with
__FLOAT128__ to compile only for __float128 capable targets.
From-SVN: r233111
2016-01-21 Michael Meissner <meissner@linux.vnet.ibm.com>
Steven Munroe <munroesj@linux.vnet.ibm.com>
Tulio Magno Quites Machado Filho <tulioqm@br.ibm.com>
* config/rs6000/float128-sed: New files to convert TF names to KF
names for PowerPC IEEE 128-bit floating point support.
* config/rs6000/float128-sed-hw: Likewise.
* config/rs6000/float128-hw.c: New file for ISA 3.0 IEEE 128-bit
floating point hardware support.
* config/rs6000/float128-ifunc.c: New file to pick either IEEE
128-bit floating point software emulation or use ISA 3.0 hardware
support if it is available.
* config/rs6000/quad-float128.h: New file to support IEEE 128-bit
floating point.
* config/rs6000/extendkftf2-sw.c: New file, convert IEEE 128-bit
floating point to IBM extended double.
* config/rs6000/trunctfkf2-sw.c: New file, convert IBM extended
double to IEEE 128-bit floating point.
* config/rs6000/t-float128: New Makefile fragments to enable
building __float128 emulation support.
* config/rs6000/t-float128-hw: Likewise.
* config/rs6000/sfp-exceptions.c: New file to provide exception
support for IEEE 128-bit floating point.
* config/rs6000/floattikf.c: New files for converting between IEEE
128-bit floating point and signed/unsigned 128-bit integers.
* config/rs6000/fixunskfti.c: Likewise.
* config/rs6000/fixkfti.c: Likewise.
* config/rs6000/floatuntikf.c: Likewise.
* config/rs6000/sfp-machine.h (_FP_W_TYPE_SIZE): Use 64-bit types
when building on 64-bit systems, or when VSX is enabled.
(_FP_W_TYPE): Likewise.
(_FP_WS_TYPE): Likewise.
(_FP_I_TYPE): Likewise.
(TItype): Define on 64-bit systems.
(UTItype): Likewise.
(TI_BITS): Likewise.
(_FP_MUL_MEAT_D): Add support for using 64-bit types.
(_FP_MUL_MEAT_Q): Likewise.
(_FP_DIV_MEAT_D): Likewise.
(_FP_DIV_MEAT_Q): Likewise.
(_FP_NANFRAC_D): Likewise.
(_FP_NANFRAC_Q): Likewise.
(ISA_BIT): Add exception support if we are being compiled on a
machine with hardware floating point support to build the IEEE
128-bit emulation functions.
(FP_EX_INVALID): Likewise.
(FP_EX_OVERFLOW): Likewise.
(FP_EX_UNDERFLOW): Likewise.
(FP_EX_DIVZERO): Likewise.
(FP_EX_INEXACT): Likewise.
(FP_EX_ALL): Likewise.
(__sfp_handle_exceptions): Likewise.
(FP_HANDLE_EXCEPTIONS): Likewise.
(FP_RND_NEAREST): Likewise.
(FP_RND_ZERO): Likewise.
(FP_RND_PINF): Likewise.
(FP_RND_MINF): Likewise.
(FP_RND_MASK): Likewise.
(_FP_DECL_EX): Likewise.
(FP_INIT_ROUNDMODE): Likewise.
(FP_ROUNDMODE): Likewise.
* libgcc/config.host (powerpc*-*-linux*): If compiler can compile
VSX code, enable IEEE 128-bit floating point. If the compiler can
compile IEEE 128-bit floating point code with ISA 3.0 IEEE 128-bit
floating point hardware instructions and it supports declaring
functions with the ifunc attribute, enable ifunc functions to
switch between software and hardware support.
* configure.ac (powerpc*-*-linux*): Likewise.
* configure: Regenerate.
Co-Authored-By: Steven Munroe <munroesj@linux.vnet.ibm.com>
Co-Authored-By: Tulio Magno Quites Machado Filho <tulioqm@br.ibm.com>
From-SVN: r232685
* config/msp430/t-msp430 (lib2_mul_none.o): Only use the first
dependency as the source file to be compiled.
(lib2_mul_16bit.o, lib2hw_mul_16.o, lib2hw_mul_32.o)
(lib2hw_mul_f5.o): Likewise.
From-SVN: r232402
[gcc]
2016-01-13 Michael Meissner <meissner@linux.vnet.ibm.com>
* config/rs6000/rs6000-builtin.def (BU_FLOAT128_2): Add support
for pack/unpack functions for __ibm128.
(PACK_IF): Likewise.
(UNPACK_IF): Likewise.
* config/rs6000/rs6000.c (rs6000_builtin_mask_calculate): Add
support for __ibm128 pack/unpack functions.
(rs6000_invalid_builtin): Likewise.
(rs6000_init_builtins): Likewise.
(rs6000_opt_masks): Likewise.
* config/rs6000/rs6000.h (MASK_FLOAT128): Add short name.
(RS6000_BTM_FLOAT128): Add support for __ibm128 pack/unpack
functions
(RS6000_BTM_COMMON): Likewise.
* config/rs6000/rs6000.md (f128_vsx): New mode attribute.
(unpack<mode>): Use FMOVE128_FPR iterator instead of FMOVE128, to
disallow __builtin_{pack,unpack}_longdouble if long double is IEEE
128-bit floating point. Add support for the double values to be
in Altivec registers for TF/IF packing and unpacking, but restrict
TD packing sub-fields to be FPR registers. Don't allow overlapped
register support for packing. Allow pack inputs to be memory
locations. Don't build generator functions for unpack<mode>_dm
and unpack<mode>_nodm.
(unpack<mode>_dm): Likewise.
(unpack<mode>_nodm): Likewise.
(pack<mode>): Likewise.
* config/rs6000/rs6000-builtin.def (__builtin_pack_ibm128): Add
built-in functions to pack/unpack explicit __ibm128 values.
(__builtin_unpack_ibm128): Likewise.
* doc/extend.texi (PowerPC Built-in Functions): Document
__builtin_pack_ibm128 and __builtin_unpack_ibm128.
[libgcc]
2016-01-13 Michael Meissner <meissner@linux.vnet.ibm.com>
Steven Munroe <munroesj@linux.vnet.ibm.com>
Tulio Magno Quites Machado Filho <tulioqm@br.ibm.com>
* config/rs6000/sfp-exceptions.c: New file to provide exception
support for IEEE 128-bit floating point.
* config/rs6000/float128-hw.c: New file for ISA 3.0 IEEE 128-bit
floating point hardware support.
* config/rs6000/floattikf.c: New files for IEEE 128-bit floating
point conversions.
* config/rs6000/fixunskfti.c: Likewise.
* config/rs6000/fixkfti.c: Likewise.
* config/rs6000/floatuntikf.c: Likewise.
* config/rs6000/extendkftf2-sw.c: Likewise.
* config/rs6000/trunctfkf2-sw.c: Likewise.
* config/rs6000/float128-ifunc.c: New file to pick either IEEE
128-bit floating point software emulation or use ISA 3.0 hardware
support if it is available.
* config/rs6000/quad-float128.h: New file to support IEEE 128-bit
floating point.
* config/rs6000/t-float128: New Makefile fragments to enable
building __float128 emulation support.
* config/rs6000/t-float128-hw: Likewise.
* config/rs6000/float128-sed: New file to convert TF names to KF
names for PowerPC IEEE 128-bit floating point support.
* config/rs6000/sfp-machine.h (_FP_W_TYPE_SIZE): Use 64-bit types
when building on 64-bit systems, or when VSX is enabled.
(_FP_W_TYPE): Likewise.
(_FP_WS_TYPE): Likewise.
(_FP_I_TYPE): Likewise.
(TItype): Define on 64-bit systems.
(UTItype): Likewise.
(TI_BITS): Likewise.
(_FP_MUL_MEAT_D): Add support for using 64-bit types.
(_FP_MUL_MEAT_Q): Likewise.
(_FP_DIV_MEAT_D): Likewise.
(_FP_DIV_MEAT_Q): Likewise.
(_FP_NANFRAC_D): Likewise.
(_FP_NANFRAC_Q): Likewise.
(ISA_BIT): Add exception support if we are being compiled on a
machine with hardware floating point support to build the IEEE
128-bit emulation functions.
(FP_EX_INVALID): Likewise.
(FP_EX_OVERFLOW): Likewise.
(FP_EX_UNDERFLOW): Likewise.
(FP_EX_DIVZERO): Likewise.
(FP_EX_INEXACT): Likewise.
(FP_EX_ALL): Likewise.
(__sfp_handle_exceptions): Likewise.
(FP_HANDLE_EXCEPTIONS): Likewise.
(FP_RND_NEAREST): Likewise.
(FP_RND_ZERO): Likewise.
(FP_RND_PINF): Likewise.
(FP_RND_MINF): Likewise.
(FP_RND_MASK): Likewise.
(_FP_DECL_EX): Likewise.
(FP_INIT_ROUNDMODE): Likewise.
(FP_ROUNDMODE): Likewise.
* configure.ac (powerpc*-*-linux*): Check whether the PowerPC
compiler can do __float128.
* configure: Regenerate.
* libgcc/config.host (powerpc*-*-linux*): If compiler can compile
VSX code, enable IEEE 128-bit floating point.
From-SVN: r232346
* common/config/msp430/msp430-common.c (msp430_handle_option):
Pass both -mmcu and -mcpu on to the back end if they are both
defined.
* config/msp430/msp430.c (hwmult_name): New function.
(msp430_option_override): If an unrecognised MCU name is
detected only warn if the user has not provided suitable
-mhwmult and -mcpu options. Use msp430_warn_mcu to control
warning messages. Generate warnings about conflicts between
-mmcu and -mcpu and -mhwmult options.
If neither -mcpu nor -mmcu have been specified but -mhwmult=
f5series has the select the 430X isa.
(msp430_no_hwmult): If -mmcu has not been specified and
msp430_hwmult_type is AUTO then return true.
* config/msp430/msp430.h (EXTRA_SPEC_FUNCTIONS): Define.
(LIB_SPEC): Add hardware multiply library selection.
* config/msp430/t-msp430: Delete hardware multiply multilibs.
Add rule to build driver-msp430.o
* config/msp430/driver-msp430.c: New file.
* config/msp430/msp430.opt (warn-mcu): New option.
* doc/invoke.texi: Update description of -mhwmult=auto.
Document -mwarn-mcu option.
tests * gcc.target/msp430/msp_abi_div_funcs.c: New test.
* gcc.target/msp430/mul_main.h: New test support file.
* gcc.target/msp430/mul_none.c: New test.
* gcc.target/msp430/mul_16bit.c: New test.
* gcc.target/msp430/mul_32bit.c: New test.
* gcc.target/msp430/mul_f5.c: New test.
libgcc * config/msp430/mpy.c (__mulhi3): Use a faster algorithm.
Allow for the second argument being negative.
* config.host (extra_parts): Define for MSP430. Create separate
libraries for each of the hardware multiply formats.
* config/msp430/lib2hw_mul.S: Build only the multiply routines
that are needed.
* config/msp430/lib2mul.c: Likewise.
* config/msp430/t-msp430 (LIB2ADD): Remove lib2hw_mul.S.
Add rules to build hardware multiply libraries.
* config/msp430/lib2divSI.c: (__mspabi_divlu): Alias for
__mspabi_divul function.
(__mspabi_divllu): New stub function.
From-SVN: r231286
PR libgcc/66883
* config/epiphany/udivsi3-float.c: Fix CONCISE test, and comment typo.
N.B., this is not active code, just documenting a previous approach for this
function in C.
From-SVN: r229236
* config/rl78/divmodqi.S: Return 0x00 by default for div by 0.
* config/rl78/divmodsi.S: Update return register to r8.
* config/rl78/divmodhi.S: Update return register to r8,r9.
Branch to main_loop_done_himode to pop registers before return.
From-SVN: r228926
libgcc/
* config/ft32/crti-hw.S: Use __PMSIZE to allow configurable
memory layout. Deal correctly with BSS region larger than 32K.
Handle a watchdog reset like a power-on reset. Clean up unused
code.
From-SVN: r227986
2015-09-15 Max Filippov <jcmvbkbc@gmail.com>
gcc/
* config/xtensa/xtensa.h (DWARF_ALT_FRAME_RETURN_COLUMN): New
definition.
(DWARF_FRAME_REGISTERS): Reserve space for one extra register in
call0 ABI.
libgcc/
* config/xtensa/linux-unwind.h (xtensa_fallback_frame_state):
Add support for call0 ABI.
From-SVN: r227809
Returning context->cfa in _Unwind_GetCFA makes CFA point one stack frame
higher than what was actually used by code at context->ra. This results
in invalid CFA value in signal frames and premature unwinding completion
in forced unwinding used by uClibc NPTL thread cancellation.
Returning context->sp from _Unwind_GetCFA makes all CFA values valid and
matching code that used them.
2015-08-18 Max Filippov <jcmvbkbc@gmail.com>
libgcc/
* config/xtensa/unwind-dw2-xtensa.c (_Unwind_GetCFA): Return
context->sp instead of context->cfa.
From-SVN: r226964
This allows having exception cleanup code in binaries that don't
register their unwind tables.
2015-08-18 Max Filippov <jcmvbkbc@gmail.com>
libgcc/
* config/xtensa/t-windowed (LIB2ADDEH): Replace unwind-dw2-fde
with unwind-dw2-fde-dip.
From-SVN: r226963
Spilling windowed registers in userspace is much easier, more portable,
less error-prone and equally effective as in kernel. Now that register
spilling syscall is considered obsolete in the xtensa linux kernel
replace it with CALL12 followed by series of ENTRY in libgcc.
2015-08-18 Max Filippov <jcmvbkbc@gmail.com>
libgcc/
* config/xtensa/lib2funcs.S (__xtensa_libgcc_window_spill): Use
CALL12 followed by series of ENTRY to spill windowed registers.
(__xtensa_nonlocal_goto): Call __xtensa_libgcc_window_spill
instead of making linux spill syscall.
From-SVN: r226962
Make up to 3.80 (documented as minimal permitted version) doesn't
support "else if...".
2015-07-17 Jan Beulich <jbeulich@suse.com>
* config/t-softfp: Split up "else ifneq".
From-SVN: r225920
Patch in the bottom adds support of IA MCU psABI to libgcc (enables
soft-fp) and libdecnumber (enables it for IA MCU).
config/
* dfp.m4 (enable_decimal_float): Also set to yes for
i?86*-*-elfiamcu target.
gcc/
* configure: Regenerated.
libdecnumber/
* configure: Regenerated.
libgcc/
* config.host: Support i[34567]86-*-elfiamcu target.
* config/t-softfp-sfdftf: New file.
* config/i386/32/t-iamcu: Likewise.
* configure: Regenerated.
From-SVN: r225198
* Makefile.in (real_host_noncanonical): New variable.
(libsubdir): Use it.
* configure.ac (real_host_noncanonical): Compute. Remove special
case for intelmicemul.
* configure: Regenerate.
From-SVN: r222585
On behalf of szabolcs.nagy@arm.com
2015-04-22 Gregor Richards <gregor.richards@uwaterloo.ca>
Szabolcs Nagy <szabolcs.nagy@arm.com>
* unwind-dw2-fde-dip.c (USE_PT_GNU_EH_FRAME): Define it on
Linux if target provides dl_iterate_phdr.
Co-Authored-By: Szabolcs Nagy <szabolcs.nagy@arm.com>
From-SVN: r222328
We shouldn't call external function, __cpu_indicator_init, while an object
is being relocated since its .got.plt section hasn't been updated. It
works for non-PIE since no update on .got.plt section is required. This
patch creates libgcc.so as a linker script, hides __cpu_indicator_init
and __cpu_model in libgcc.so.1 from linker, forces linker to resolve
__cpu_indicator_init and __cpu_model to their hidden definitions in
libgcc.a while providing backward binary compatibility.
gcc/testsuite/
PR target/65612
* g++.dg/ext/mv18.C: New test.
* g++.dg/ext/mv19.C: Likewise.
* g++.dg/ext/mv20.C: Likewise.
* g++.dg/ext/mv21.C: Likewise.
* g++.dg/ext/mv22.C: Likewise.
* g++.dg/ext/mv23.C: Likewise.
libgcc/
PR target/65612
* config.host (tmake_file): Add t-slibgcc-libgcc for Linux/x86.
* config/i386/cpuinfo.c (__cpu_model): Initialize.
(__cpu_indicator_init@GCC_4.8.0): New.
(__cpu_model@GCC_4.8.0): Likewise.
* config/i386/t-linux (HOST_LIBGCC2_CFLAGS): Add
-DUSE_ELF_SYMVER.
From-SVN: r222178
* config/rl78/rl78-opts.h (enum rl78_mul_types): Add MUL_G14 and
MUL_UNINIT.
(enum rl78_cpu_type): New.
* config/rl78/rl78-virt.md (attr valloc): Add divhi and divsi.
(umulhi3_shift_virt): Remove m constraint from operand 1.
(umulqihi3_virt): Likewise.
* config/rl78/rl78.c (rl78_option_override): Add code to process
-mcpu and -mmul options.
(rl78_alloc_physical_registers): Add code to handle divhi and
divsi valloc attributes.
(set_origin): Likewise.
* config/rl78/rl78.h (RL78_MUL_G14): Define.
(TARGET_G10, TARGET_G13, TARGET_G14): Define.
(TARGET_CPU_CPP_BUILTINS): Define __RL78_MUL_xxx__ and
__RL78_Gxx__.
(ASM_SPEC): Pass -mcpu on to assembler.
* config/rl78/rl78.md (mulqi3): Add a clobber of AX.
(mulqi3_rl78): Likewise.
(mulhi3_g13): Likewise.
(mulhi3): Generate the G13 or G14 versions of the insn directly.
(mulsi3): Likewise.
(mulhi3_g14): Add clobbers of AX and BC.
(mulsi3_g14): Likewise.
(mulsi3_g13): Likewise.
(udivmodhi4, udivmodhi4_g14, udivmodsi4): New patterns.
(udivmodsi4_g14, udivmodsi4_g13): New patterns.
* config/rl78/rl78.opt (mmul): Initialise value to
RL78_MUL_UNINIT.
(mcpu): New option.
(m13, m14, mrl78): New option aliases.
* config/rl78/t-rl78 (MULTILIB_OPTIONS): Add mg13 and mg14.
(MULTILIB_DIRNAMES): Add g13 and g14.
* doc/invoke.texi: Document -mcpu and -mmul options.
* config/rl78/divmodhi.S: Add G14 and G13 versions of the __divhi3
and __modhi3 functions.
* config/rl78/divmodso.S: Add G14 and G13 versions of the
__divsi3, __udivsi3, __modsi3 and __umodsi3 functions.
From-SVN: r222142
2015-04-15 Chen Gang <gang.chen.5i5j@gmail.com>
* gthr-single.h (__GTHREAD_MUTEX_INIT_FUNCTION): Use empty
do-while loop as macro body to avoid warnings.
From-SVN: r222127
PR target/65351
config/
* mh-darwin: Only apply -mdynamic-no-pic for m32 Darwin when the compiler in
use supports -mno-dynamic-no-pic.
* picflag.m4: Only append -mno-dynamic-no-pic for Darwin when -mdynamic-no-pic
is present in CFLAGS.
libiberty/
* configure: Regenerate.
libada/
* configure: Regenerate.
libgcc/
* configure: Regenerate.
gcc/
* configure: Regenerate.
Co-Authored-By: Iain Sandoe <iain@codesourcery.com>
From-SVN: r221967
call0 is an ABI that doesn't use register windows.
2015-03-03 Max Filippov <jcmvbkbc@gmail.com>
gcc/
* config/xtensa/constraints.md ("a" constraint): Include stack
pointer in case of call0 ABI.
("q" constraint): Make empty in case of call0 ABI.
("D" constraint): Include stack pointer in case of call0 ABI.
* config/xtensa/xtensa-protos.h (xtensa_set_return_address,
xtensa_expand_epilogue, xtensa_regno_to_class): Add new function
prototypes.
* config/xtensa/xtensa.c (xtensa_callee_save_size): New
variable.
(xtensa_regno_to_class): Make it a local variable in the
function xtensa_regno_to_class.
(xtensa_function_epilogue, TARGET_ASM_FUNCTION_EPILOGUE): Remove
macro, function prototype and implementation.
(reg_nonleaf_alloc_order): Make it a local variable in the
function order_regs_for_local_alloc.
(xtensa_conditional_register_usage): New function.
(TARGET_CONDITIONAL_REGISTER_USAGE): Define macro.
(xtensa_valid_move): Allow direct moves to stack pointer
register in call0 ABI.
(xtensa_setup_frame_addresses): Only spill register windows in
windowed ABI.
(xtensa_emit_call): Emit call(x)8 or call(x)0 in windowed and
call0 ABI respectively.
(xtensa_function_arg_1): Only mark a7 register for copying in
windowed ABI.
(xtensa_call_save_reg): New function.
(compute_frame_size): Add space for callee saved register
storage to the frame size in call0 ABI.
(xtensa_expand_prologue): Generate code to set up stack frame
and save callee-saved registers in call0 ABI.
(xtensa_expand_epilogue): New function.
(xtensa_set_return_address): New function.
(xtensa_return_addr): Calculate return address in call0 ABI.
(xtensa_builtin_saveregs): Only mark a7 register for copying and
emit copying code in windowed ABI.
(order_regs_for_local_alloc): Add preferred register allocation
order for non-leaf function in call0 ABI.
(xtensa_static_chain): Add atatic chain passing for call0 ABI.
(xtensa_asm_trampoline_template): Add trampoline generation for
call0 ABI.
(xtensa_trampoline_init): Add trampoline initialization for
call0 ABI.
(xtensa_conditional_register_usage, xtensa_regno_to_class): New
functions.
* config/xtensa/xtensa.h (TARGET_WINDOWED_ABI): New macro.
(TARGET_CPU_CPP_BUILTINS): Add built-in define for call0 ABI.
(CALL_USED_REGISTERS): Modify to encode both windowed and call0
ABI call-used registers.
(HARD_FRAME_POINTER_REGNUM): Add frame pointer for call0 ABI.
(INCOMING_REGNO, OUTGOING_REGNO): Use argument unchanged in
call0 ABI.
(REG_CLASS_CONTENTS): Include all registers into the preferred
reload registers set, adjust the set in the
xtensa_conditional_register_usage.
(xtensa_regno_to_class): Drop variable declaration.
(REGNO_REG_CLASS): Redefine to use xtensa_regno_to_class
function.
(WINDOW_SIZE): Define as 8 or 0 for windowed and call0 ABI
respectively.
(FUNCTION_PROFILER): Add _mcount call for call0 ABI.
(TRAMPOLINE_SIZE): Define trampoline size for call0 ABI.
(RETURN_ADDR_IN_PREVIOUS_FRAME): Define to 0 in call0 ABI.
(ASM_OUTPUT_POOL_PROLOGUE): Always generate literal pool
location in call0 ABI.
(EH_RETURN_STACKADJ_RTX): New definition, use a10 for passing
stack adjustment size when handling exception.
(CRT_CALL_STATIC_FUNCTION): Add definition for call0 ABI.
* config/xtensa/xtensa.md (A9_REG, UNSPECV_BLOCKAGE): New
definitions.
("return" pattern): Generate ret.n/ret in call0 ABI.
("epilogue" pattern): Expand epilogue.
("nonlocal_goto" pattern): Use default in call0 ABI.
("eh_return" pattern): Move implementation to eh_set_a0_windowed,
emit eh_set_a0_* depending on ABI.
("eh_set_a0_windowed" pattern): Former eh_return pattern.
("eh_set_a0_call0", "blockage"): New patterns.
libgcc/
* config/xtensa/lib2funcs.S (__xtensa_libgcc_window_spill,
__xtensa_nonlocal_goto): Don't compile for call0 ABI.
(__xtensa_sync_caches): Only use entry and retw in windowed ABI,
use ret in call0 ABI.
* config/xtensa/t-windowed: New file.
* libgcc/config/xtensa/t-xtensa (LIB2ADDEH): Move to t-windowed.
* libgcc/configure: Regenerated.
* libgcc/configure.ac: Check if xtensa target is configured for
windowed ABI and thus needs to use custom unwind code.
From-SVN: r221158
PR target/65038
* config.in: Regenerated.
* configure: Likewise.
* configure.ac (AC_HEADER_STDC): Added explicit.
(AC_CHECK_HEADERS): Check for default headers plus
for ftw.h header.
* libgcov-util.c (gcov_read_profile_dir): Disable use
of ftw-function, if header is not found.
(ftw_read_file): Likewise.
From-SVN: r221059
When building GCC against a proper newlib sysroot, the libgcc build will
include more than what's built in the -Dinhibit_libc configuration used when
building newlib as part of the GCC build process. See the inhibit_libc logic
in gcc/configure.ac.
To avoid...
ptxas _gcov_indirect_call_topn_profiler.o, line 101; error : Type or alignment of argument does not match formal parameter 'ptr'
ptxas _gcov_indirect_call_topn_profiler.o, line 101; error : Call has wrong number of parameters
ptxas _gcov_indirect_call_topn_profiler.o, line 101; error : Type or alignment of argument does not match formal parameter 'size'
ptxas fatal : Ptx assembly aborted due to errors
nvptx-as: ptxas returned 255 exit status
make[2]: *** [_gcov_indirect_call_topn_profiler.o] Error 1
..., "dumb down" the libgcc build:
libgcc/
PR target/65181
* config/nvptx/t-nvptx (INHIBIT_LIBC_CFLAGS): Define to
-Dinhibit_libc.
From-SVN: r220915
2015-02-17 Sandra Loosemore <sandra@codesourcery.com>
libgcc/
* config/arm/bpabi.S (test_div_by_zero): Make label names
consistent between thumb2 and arm mode cases. Separate the
signed comparison on the high word of the numerator from the
unsigned comparison on the low word.
* config/arm/bpabi-v6m.S (test_div_by_zero): Similarly separate
signed comparison.
gcc/testsuite/
* gcc.target/arm/divzero.c: New test case.
From-SVN: r220765
* config/nvptx/realloc.c: Include <stddef.h> instead of <stdlib.h>
and <string.h>.
(__nvptx_realloc): Call __builtin_memcpy instead of memcpy.
From-SVN: r220764
* config/rl78/fpmath-sf.S (__rl78_int_pack_a_r8): Fix edge case
rounding up the fraction.
* config/rl78/rl78.c (rl78_note_reg_set): Note the use of REGs
inside a MEM.
From-SVN: r220410
* config/pa/linux-atomic.c (__kernel_cmpxchg2): Change declaration of
oldval and newval to const void *. Fix typo.
(FETCH_AND_OP_2): Use __atomic_load_n to load value.
(FETCH_AND_OP_WORD): Likewise.
(OP_AND_FETCH_WORD): Likewise.
(COMPARE_AND_SWAP_2): Likewise.
(__sync_val_compare_and_swap_4): Likewise.
(__sync_lock_test_and_set_4): Likewise.
(SYNC_LOCK_RELEASE_2): Likewise.
Remove support for long long atomic operations.
From-SVN: r220307
* gcc/config/i386/cygwin.h (STARTFILE_SPEC): Add vtv_start.o,
if -fvtable-verify=preinit/std is used.
* gcc/config/i386/mingw-w64.h (STARTFILE_SPEC): Likewise.
* gcc/config/i386/mingw32.h (STARTFILE_SPEC): Likewise.
* gcc/config/i386/cygwin.h (ENDFILE_SPEC): Add vtv_end.o,
if -fvtable-verify=preinit/std is used.
* gcc/config/i386/mingw32.h (ENDFILE_SPEC): Likewise.
* gcc/config/i386/cygwin.h (LIB_SPEC): Pass -lvtv and -lpsapi,
if -fvtable-verify=preinit/std is used.
* gcc/config/i386/mingw-w64.h (LIB_SPEC): Likewise.
* gcc/config/i386/mingw32.h (LIB_SPEC): Likewise.
* gcc/cp/vtable-class-hierarchy.c (vtv_generate_init_routine): Add
check for not TARGET_PECOFF at the VTV_PREINIT_PRIORITY checks.
* gcc/varasm.c (assemble_variable): Add code to properly set the comdat
section and name for the .vtable_map_vars section in case the
target is PE or COFF.
* libgcc/Makefile.in: Move rules to build vtv_*.o out of the check
for CUSTOM_CRTSTUFF.
* libgcc/config.host (i[34567]86-*-cygwin*, x86_64-*-cygwin*, i[34567]86-*-mingw*)
(x86_64-*-mingw*): Only add vtv_*.o to extra_parts if enable_vtable_verify.
* libstdc++-v3/acinclude.m4: Define VTV_CYGMIN.
* libstdc++-v3/configure: Regenerate.
* libstdc++-v3/libsupc++/Makefile.am: Add vtv_sources only to
libsupc___la_SOURCES and libsupc__convenience_la_SOURCES if VTV_CYGMIN is
not set.
* libstdc++-v3/libsupc++/Makefile.in: Regenerated.
* libstdc++-v3/libsupc++/vtv_stubs.cc: Add none weak declaration of every
function for Cygwin and MinGW.
* libstdc++-v3/src/Makefile.am: Add libvtv.la to toolexeclib_LTLIBRARIES,
if VTV_CYGMIN is set. Define libvtv_la_SOURCES, libvtv_la_LDFLAGS,
libvtv_la_AM_CXXFLAGS and libvtv_la_LINK if VTV_CYGMIN is set.
* libstdc++-v3/src/Makefile.in: Regenerate.
* libvtv/Makefile.am : Add libvtv.la to toolexeclib_LTLIBRARIES, if VTV_CYGMIN
is set. Define libvtv_la_LIBADD, libvtv_la_LDFLAGS, libvtv_stubs_la_LDFLAGS
and libvtv_stubs_la_SOURCES if VTV_CYGMIN is set. Add obstac.c to
libvtv_la_SOURCES if VTV_CYGMIN is set.
* libvtv/Makefile.in : Regenerate.
* libvtv/aclocal.m4 : Regenerate.
* libvtv/configure : Regenerate.
* libvtv/configure.ac : Add ACX_LT_HOST_FLAGS. Define VTV_CYGMIN.
* libvtv/configure.tgt : (x86_64-*-cygwin*, i?86-*-cygwin*, x86_64-*-mingw*)
(i?86-*-mingw*): Add to supported targets.
* libvtv/vtv_fail.cc : Skip inclusion of execinfo.h on Cygwin and MinGW.
(log_error_message): Skip calls to backtrace and backtrace_symbols_fd on Cygwin
and MinGW.
* libvtv/vtv_malloc.cc : Include windows.h and skip sys/mman.h inclusion on
Cygwin and MinGW. Add sysconf port on Cygwin and MinGW.
(obstack_chunk_alloc): Exchange call to mmap with call to VirtualAlloc on Cygwin
and MinGW.
(__vtv_malloc_init): Exchange call to sysconf with call to port of sysconf on
Cygwin and MinGW.
* libvtv/vtv_malloc.h : Declare mprotect and define PROT_READ and PROT_WRITE on
Cygwin and MinGW.
* libvtv/map.h : Include stdint.h on MinGW.
* libvtv/rts.cc : Include windows.h, winternl.h and psapi.h, skip include of
execinfo.h, sys/mman.h and link.h on Cygwin and MinGW.
Add port of __fortify_fail on Cygwin and MinGW.
Change ElfW (Addr) to uintptr_t on Cygwin and MinGW.
(read_section_offset_and_length): Add port for Cygwin and MinGW
(iterate_modules): New function.
(vtv_unprotect_vtable_vars): Use iterate_modules instead of dl_iterate_phdr on
Cygwin and MinGW.
(vtv_protect_vtable_vars): Likewise.
(count_all_pages): Likewise.
(dl_iterate_phdr_count_pages): Don't build on Cygwin and MinGW.
* libvtv/utils.cc : Include windows.h and skip execinfo.h inclusion on
Cygwin and MinGW.
(__vtv_open_log): Exchange call to getuid and getpid with GetCurrentProcessId and
adjust call to snprintf accordingly on Cygwin and MinGW.
Adjust calls to mkdir on MinGW.
Adjust call to open on Cygwin and MinGW.
(__vtv_add_to_log): Adjust call to snprintf on Cygwin and MinGW.
(__vtv_log_verification_failure): Don't generate a backtrace on Cygwin and MinGW.
From-SVN: r220232
* config/rl78/cmpsi2.S: Use function start and end macros.
(__gcc_bcmp): New function.
* config/rl78/lshrsi3.S: Use function start and end macros.
* config/rl78/mulsi3.S: Add support for G10.
(__mulqi3): New function for G10.
* config/rl78/signbit.S: Use function start and end macros.
* config/rl78/t-rl78 (LIB2ADD): Add bit-count.S, fpbit-sf.S and
fpmath-sf.S.
(LIB2FUNCS_EXCLUDE): Define.
(LIB2FUNCS_ST): Define.
* config/rl78/trampoline.S: Use function start and end macros.
* config/rl78/vregs.h (START_FUNC): New macro.
(START_ANOTHER_FUNC): New macro.
(END_FUNC): New macro.
(END_ANOTHER_FUNC): New macro.
* config/rl78/bit-count.S: New file. Contains assembler
implementations of the bit counting functions: ___clzhi2,
__clzsi2, ctzhi2, ctzsi2, ffshi2, ffssi2, __partityhi2,
__paritysi2, __popcounthi2 and __popcountsi2.
* config/rl78/fpbit-sf.S: New file. Contains assembler
implementationas of the math functions: __negsf2, __cmpsf2,
__eqsf2, __nesf2, __lesf2, __ltsf2, __gesf2, gtsf2, __unordsf2,
__fixsfsi, __fixunssfsi, __floatsisf and __floatunssisf.
* config/rl78/fpmath-sf.S: New file. Contains assembler
implementations of the math functions: __subsf3, __addsf3,
__mulsf3 and __divsf3
From-SVN: r220162
2015-01-20 Chung-Lin Tang <cltang@codesourcery.com>
gcc/
* config/nios2/nios2.c (nios2_asm_file_end): Implement
TARGET_ASM_FILE_END hook for adding .note.GNU-stack section when
needed.
(TARGET_ASM_FILE_END): Define.
libgcc/
* config/nios2/linux-unwind.h (nios2_fallback_frame_state):
Update rt_sigframe format and address for current Nios II
Linux conventions.
From-SVN: r219898
libgcc/
* config/sh/crt.h: New.
* config/sh/crti.S: Use GLOBAL macro from crt.h for _init and _fini
symbols.
* config/sh/crt1.S: Likewise.
From-SVN: r218807
2014-11-27 Tony Wang <tony.wang@arm.com>
libgcc/
* config/arm/lib1funcs.S (FUNC_START): Add conditional section
redefine for macro L_arm_muldivsf3 and L_arm_muldivdf3.
(SYM_END, ARM_SYM_START): Add macros used to expose function Symbols.
From-SVN: r218124
* config/pa/linux-atomic.c (__kernel_cmpxchg2): New.
(FETCH_AND_OP_2): New. Use for subword and double word operations.
(OP_AND_FETCH_2): Likewise.
(COMPARE_AND_SWAP_2): Likewise.
(SYNC_LOCK_TEST_AND_SET_2): Likewise.
(SYNC_LOCK_RELEASE_2): Likewise.
(SUBWORD_SYNC_OP): Remove.
(SUBWORD_VAL_CAS): Likewise.
(SUBWORD_BOOL_CAS): Likewise.
(FETCH_AND_OP_WORD): Update.
Consistently use signed types.
Co-Authored-By: John David Anglin <danglin@gcc.gnu.org>
From-SVN: r217956
* configure: Regenerate.
* configure.ac (--enable-as-accelerator-for)
(--enable-offload-targets): New configure options.
gcc/
* Makefile.in (real_target_noncanonical, accel_dir_suffix)
(enable_as_accelerator): New variables substituted by configure.
(libsubdir, libexecsubdir, unlibsubdir): Tweak for the possibility of
being configured as an offload compiler.
(DRIVER_DEFINES): Pass new defines DEFAULT_REAL_TARGET_MACHINE and
ACCEL_DIR_SUFFIX.
(install-cpp, install-common, install_driver, install-gcc-ar): Do not
install for the offload compiler.
* config.in: Regenerate.
* configure: Regenerate.
* configure.ac (real_target_noncanonical, accel_dir_suffix)
(enable_as_accelerator): Compute new variables.
(ACCEL_COMPILER): Define if the compiler is built as the accel compiler.
(OFFLOAD_TARGETS): List of target names suitable for offloading.
(ENABLE_OFFLOADING): Define if list of offload targets is not empty.
gcc/cp/
* Make-lang.in (c++.install-common): Do not install for the offload
compiler.
gcc/doc/
* install.texi (Options specification): Document
--enable-as-accelerator-for and --enable-offload-targets.
gcc/fortran/
* Make-lang.in (fortran.install-common): Do not install for the offload
compiler.
libgcc/
* Makefile.in (crtoffloadbegin$(objext)): New rule.
(crtoffloadend$(objext)): Likewise.
* configure: Regenerate.
* configure.ac (accel_dir_suffix): Compute new variable.
(extra_parts): Add crtoffloadbegin.o and crtoffloadend.o
if enable_offload_targets is not empty.
* offloadstuff.c: New file.
libgomp/
* config.h.in: Regenerate.
* configure: Regenerate.
* configure.ac: Check for libdl, required for plugin support.
(PLUGIN_SUPPORT): Define if plugins are supported.
(enable_offload_targets): Support Intel MIC targets.
(OFFLOAD_TARGETS): List of target names suitable for offloading.
lto-plugin/
* Makefile.am (libexecsubdir): Tweak for the possibility of being
configured for offload compiler.
(accel_dir_suffix, real_target_noncanonical): New variables substituted
by configure.
* Makefile.in: Regenerate.
* configure: Regenerate.
* configure.ac (accel_dir_suffix, real_target_noncanonical): Compute new
variables.
Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com>
Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com>
Co-Authored-By: Thomas Schwinge <thomas@codesourcery.com>
From-SVN: r217485
Continuing preparations for implementing
TARGET_ATOMIC_ASSIGN_EXPAND_FENV for powerpc*-*-linux* soft-float and
e500, this patch makes soft-fp symbols used for those targets into
compat symbols when building with glibc >= 2.19, so that they are only
in shared libgcc for existing binaries requiring them, not in static
libgcc and not available for new links using shared libgcc. Instead,
new links will get the symbols from libc, which has exported all of
them since 2.19. (Actually all the symbols were exported from glibc
since 2.4, but some of them were exported by glibc as compat symbols
only - because of a confusion between deliberately present soft-fp
symbols and old accidental reexports of libgcc functions from glibc
2.0 - until 2.19.)
This allows user floating-point arithmetic to interoperate properly
with the state handled by <fenv.h> functions, whether software state
(for soft-float; TLS variables that don't form a public part of
glibc's ABI, so can only be accessed directly by functions within
glibc) or hardware state (for e500 - the copies of the soft-fp
functions in glibc being built to interoperate with the hardware state
whereas those in libgcc aren't). Previously only glibc's own
functions, and those operations done in hardware on e500, properly
worked with that state, not direct floating-point arithmetic
operations that were implemented in software.
The intended next step is the actual TARGET_ATOMIC_ASSIGN_EXPAND_FENV
implementation.
The test of glibc >= 2.19 uses the same --with-glibc-version configure
option as in the gcc/ directory (but differently implemented; in gcc/
the fallback is to examine headers to find the version, while in
libgcc/ we can use compile for the target and so use AC_COMPUTE_INT).
The TARGET_ATOMIC_ASSIGN_EXPAND_FENV implementation will also only do
anything for glibc >= 2.19, as it will depend on generating calls to
functions __atomic_feholdexcept __atomic_feclearexcept
__atomic_feupdateenv that were added in 2.19 for that purpose (even
for e500, inline code is not readily possible because of the need to
make prctl syscalls from the implementation of these functions).
In order to make symbols compat symbols, the soft-fp files need
wrapping with generated wrappers including asm .symver directives,
which need to name the symbol version in question. This is extracted
by an awk script from an intermediate stage of generating the .map
file for linking libgcc (that .map itself depends on the objects that
go into the library, so can't be used for this purpose as that would
mean a circular dependency); the extraction is not fully general
regarding the features available in .map generation, but suffices for
the present purpose.
It would make sense for hardfp.c symbols to be compat symbols as well
(in the cases where hardfp.c gets used, the functions in question
should not be used for new links), but this isn't required for the
present purpose, which is only concerned with ensuring that where
functions that should be affected by rounding modes or exceptions get
used, those functions are actually affected by those rounding modes or
exceptions.
Tested with no regressions with cross to powerpc-linux-gnu
(soft-float); c11-atomic-exec-5.c moves from UNSUPPORTED to FAIL, as
expected, now that floating-point arithmetic in user programs uses the
same state as <fenv.h> functions, so the fenv_exceptions test passes,
but TARGET_ATOMIC_ASSIGN_EXPAND_FENV isn't yet implemented. (For
e500, c11-atomic-exec-5.c was already FAILing, as enough operations
worked with the hardware state for the fenv_exceptions effective
target test to pass.) Also verified that the exported symbols and
versions are unchanged, with the expected symbols becoming compat
symbols at the same versions, and that with --with-glibc-version=2.18
the symbols remain normal rather than compat symbols.
* Makefile.in (libgcc.map.in): New target.
(libgcc.map): Use libgcc.map.in.
* config/t-softfp (softfp_compat): New variable to be set by
users.
[$(softfp_compat) = y] (softfp_map_dep, softfp_set_symver): New
variables.
[$(softfp_compat) = y] (softfp_file_list): Use files in the build
directory.
[$(softfp_compat) = y] ($(softfp_file_list)): Generate wrappers
that use compat symbols and disable all code unless [SHARED].
* config/t-softfp-compat: New file.
* find-symver.awk: New file.
* configure.ac (--with-glibc-version): New configure option.
(ppc_fp_compat): New variable set for powerpc*-*-linux*.
* configure: Regenerate.
* config.host (powerpc*-*-linux*): Use ${ppc_fp_compat} for
soft-float and e500.
From-SVN: r216942
Continuing the cleanups of libgcc soft-fp configuration for
powerpc*-*-linux* in preparation for implementing
TARGET_ATOMIC_ASSIGN_EXPAND_FENV for soft-float and e500, this patch
optimizes the choice of which functions to build for the e500 cases.
For e500v2, use of hardfp is generally right, except that calls to
__unordsf2 and __unorddf2 are actually generated by GCC from
__builtin_isunordered and so they need to be implemented with soft-fp
to avoid recursively calling themselves. For e500v1, hardfp is right
for SFmode (except for __unordsf2) but soft-fp for DFmode (and when
using soft-fp, as usual it's best for the conversions between DFmode
and integers all to come directly from soft-fp rather than some coming
from libgcc2.c). Thus, new variables hardfp_exclusions and
softfp_extras are added that configurations using t-hardfp and
t-softfp can use to achieve the desired effect of selectively mixing
the two sources of functions.
Tested with no regressions for crosses to powerpc-linux-gnuspe (both
e500v1 and e500v2); also checked that the same set of symbols and
versions is exported from shared libgcc before and after the patch.
* config/t-hardfp (hardfp_exclusions): Document new variable for
user to define.
(hardfp_func_list): Exclude functions from $(hardfp_exclusions).
* config/t-softfp (softfp_extras): Document new variable for user
to define.
(softfp_func_list): Add functions from $(softfp_extras).
* config/rs6000/t-e500v1-fp, config/rs6000/t-e500v2-fp: New files.
* config.host (powerpc*-*-linux*): For e500v1, use
rs6000/t-e500v1-fp and t-hardfp; do not use t-softfp-sfdf and
t-softfp-excl. For e500v2, use t-hardfp-sfdf, rs6000/t-e500v2-fp
and t-hardfp; do not use t-softfp-sfdf and t-softfp-excl.
From-SVN: r216835
* config/pa/linux-unwind.h (pa32_read_access_ok): New function.
(pa32_fallback_frame_state): Use pa32_read_access_ok to check if
memory read accesses are ok.
From-SVN: r216716
Continuing the cleanups of libgcc soft-fp configuration for
powerpc*-*-linux* in preparation for implementing
TARGET_ATOMIC_ASSIGN_EXPAND_FENV for soft-float and e500, this patch
optimizes the choice of which functions to build for the 32-bit
classic hard-float and soft-float cases. (e500 will be dealt with in
a separate patch which will need to add new features to t-hardfp and
t-softfp; this patch keeps the status quo for e500.)
For hard-float, while the functions in question are part of the libgcc
ABI there is no need for them to contain software floating point code:
no newly built code should use them, and if anything does use them
it's most efficient (space and speed) for them to pass straight
through to floating-point hardware instructions; this case is made to
use t-hardfp to achieve that. For soft-float, direct use of soft-fp
functions for operations involving DImode or unsigned integers is more
efficient than using the libgcc2.c versions of those operations to
convert to operations on other types (which then end up calling
soft-fp functions for those other types, possibly more than once);
this case is thus stopped from using t-softfp-excl. (A future patch
will stop the e500 cases from using t-softfp-excl as well.)
Tested with no regressions for crosses to powerpc-linux-gnu (soft
float and classic hard float); also checked that the same set of
symbols and versions is exported from shared libgcc before and after
the patch.
* configure.ac (ppc_fp_type): Set variable on powerpc*-*-linux*.
* configure: Regenerate.
* config.host (powerpc*-*-linux*): Use $ppc_fp_type to determine
additions to tmake_file. Use t-hardfp-sfdf and t-hardfp instead
of soft-fp for 32-bit classic hard float. Do not use
t-softfp-excl for soft float.
From-SVN: r216687
When I added support for using soft-fp in libgcc
<https://gcc.gnu.org/ml/gcc-patches/2006-03/msg00689.html>, libgcc
configuration was still done in the gcc/ directory, meaning that the
variables set in makefile fragments could not depend on the multilib
being built. Thus, building the soft-fp code for powerpc64-linux-gnu
was disabled in the same way as had been done with fp-bit: the code
was built, but with #ifndef __powerpc64__ wrappers around it so that
the resulting objects were empty.
Now that libgcc configuration is done in the toplevel libgcc
directory, such uses of softfp_wrap_start / softfp_wrap_end are better
replaced by configure-time conditionals that determine whether to use
soft-fp for a given multilib. This patch does so for
powerpc*-*-linux*. The same would appear to apply to
powerpc*-*-freebsd* (using rs6000/t-freebsd64), but I have not made
any changes there. t-ppc64-fp is also used by AIX targets, but they
don't use soft-fp anyway so the changes are of no consequence to them.
The same principle of replacing softfp_wrap_start / softfp_wrap_end
with configure-time conditionals also applies to
softfp_exclude_libgcc2, which was intended for cases where soft-fp is
being used on hard-float multilibs and so it is desirable on those
multilibs for a few functions to come from libgcc2.c rather than
soft-fp (but the soft-fp versions would be more efficient on
soft-float multilibs). Now we have hardfp.c and t-hardfp, those are
better to use in that case, to minimize the size of the bulk of the
functions that are only present for ABI compatibility and should never
be called by newly compiled code.
I intend followup patches to switch 32-bit hard-float multilibs to use
t-hardfp as far as possible (for all non-libgcc2.c operations for
classic hard float; for all except __unord* for e500v2; for all SFmode
operations except __unordsf2 for e500v1). After that will come making
the soft-fp operations, in the remaining cases for which they are
built because they are actually needed for code compiled by current
GCC, into compat symbols when building for glibc 2.19 or later, so
that the glibc versions (with exception and rounding mode support) get
used instead (2.19 or later is needed for all the functions to be
exported from glibc as non-compat symbols). In turn, that is required
before implementing TARGET_ATOMIC_ASSIGN_EXPAND_FENV for soft-float
and e500, as that can only be properly effective when GCC-compiled
code is actually interoperating correctly with the exception and
rounding mode state used by <fenv.h> functions.
Tested with no regressions with cross to powerpc64-linux-gnu (in
addition, verified that stripped libgcc_s.so.1 is identical before and
after the patch).
* config.host (powerpc*-*-linux*): Only use soft-fp for 32-bit
configurations.
* config/rs6000/t-ppc64-fp (softfp_wrap_start, softfp_wrap_end):
Remove variables.
From-SVN: r216564
gcc:
2014-10-21 Joern Rennecke <joern.rennecke@embecosm.com>
Vidya Praveen <vidya.praveen@atmel.com>
Praveen Kumar Kaushik <Praveen_Kumar.Kaushik@atmel.com>
Senthil Kumar Selvaraj <Senthil_Kumar.Selvaraj@atmel.com>
Pitchumani Sivanupandi <Pitchumani.S@atmel.com>
* config/avr/avr-c.c (avr_cpu_cpp_builtins): Don't define
__MEMX for avrtiny.
* config/avr/avr.c (avr_insert_attributes): Reject __memx for avrtiny.
(avr_nonconst_pointer_addrspace): Likewise.
* config/avr/avr.h (AVR_HAVE_LPM): Define.
Added AVRTINY architecture to avr target.
* config/avr/avr-arch.h (avr_arch): Added AVRTINY architecture.
(base_arch_s): member added for AVRTINY architecture.
* config/avr/avr.c: Added TINY_ADIW, TINY_SBIW macros as AVRTINY
alternate for adiw/sbiw instructions. Added AVR_TMP_REGNO and
AVR_ZERO_REGNO macros for tmp and zero registers. Replaced TMP_REGNO
and ZERO_REGNO occurrences by AVR_TMP_REGNO and AVR_ZERO_REGNO
respectively. LAST_CALLEE_SAVED_REG macro added for the last register
in callee saved register list.
(avr_option_override): CCP address updated for AVRTINY.
(avr_init_expanders): tmp and zero rtx initialized as per arch.
Reset avr_have_dimode if AVRTINY.
(sequent_regs_live): Use LAST_CALLEE_SAVED_REG instead magic number.
(emit_push_sfr): Use AVR_TMP_REGNO for tmp register number.
(avr_prologue_setup_frame): Don't minimize prologue if AVRTINY.
Use LAST_CALLEE_SAVED_REG to refer last callee saved register.
(expand_epilogue): Likewise.
(avr_print_operand): Print CCP address in case of AVRTINY also.
<TBD>bad address
(function_arg_regno_p): Check different register list for arguments
if AVRTINY.
(init_cumulative_args): Check for AVRTINY to update number of argument
registers.
(tiny_valid_direct_memory_access_range): New function. Return false if
direct memory access range is not in accepted range for AVRTINY.
(avr_out_movqi_r_mr_reg_disp_tiny): New function to handle register
indirect load (with displacement) for AVRTINY.
(out_movqi_r_mr): Updated instruction length for AVRTINY. Call
avr_out_movqi_r_mr_reg_disp_tiny for load from reg+displacement.
(avr_out_movhi_r_mr_reg_no_disp_tiny): New function to handle register
indirect load (no displacement) for AVRTINY.
(avr_out_movhi_r_mr_reg_disp_tiny): New function to handle register
indirect load (with displacement) for AVRTINY.
(avr_out_movhi_r_mr_pre_dec_tiny): New function to handle register
indirect load for pre-decrement address.
(out_movhi_r_mr): In case of AVRTINY, call tiny register indirect load
functions. Update instruction length for AVRTINY.
(avr_out_movsi_r_mr_reg_no_disp_tiny): New function. Likewise, for
SImode.
(avr_out_movsi_r_mr_reg_disp_tiny): New function. Likewise, for SImode.
(out_movsi_r_mr): Likewise, for SImode.
(avr_out_movsi_mr_r_reg_no_disp_tiny): New function to handle register
indirect store (no displacement) for AVRTINY.
(avr_out_movsi_mr_r_reg_disp_tiny): New function to handle register
indirect store (with displacement) for AVRTINY.
(out_movsi_mr_r): Emit out insn for IO address store. Update store
instruction's size for AVRTINY. For AVRTINY, call tiny SImode indirect
store functions.
(avr_out_load_psi_reg_no_disp_tiny): New function to handle register
indirect load (no displacement) for PSImode in AVRTINY.
(avr_out_load_psi_reg_disp_tiny): New function to handle register
indirect load (with displacement) for PSImode in AVRTINY.
(avr_out_load_psi): Call PSImode register indirect load functions for
AVRTINY. Update instruction length for AVRTINY.
(avr_out_store_psi_reg_no_disp_tiny): New function to handle register
indirect store (no displacement) for PSImode in AVRTINY.
(avr_out_store_psi_reg_disp_tiny): New function to handle register
indirect store (with displacement) for PSImode in AVRTINY.
(avr_out_store_psi): Update instruction length for AVRTINY. Call tiny
register indirect store functions for AVRTINY.
(avr_out_movqi_mr_r_reg_disp_tiny): New function to handle QImode
register indirect store (with displacement) for AVRTINY.
(out_movqi_mr_r): Update instruction length for AVRTINY. Call tiny
register indirect store function for QImode in AVRTINY.
(avr_out_movhi_mr_r_xmega): Update instruction length for AVRTINY.
(avr_out_movhi_mr_r_reg_no_disp_tiny): New function to handle register
indirect store (no displacement) for HImode in AVRTINY.
(avr_out_movhi_mr_r_reg_disp_tiny): New function to handle register
indirect store (with displacement) for HImode in AVRTINY.
(avr_out_movhi_mr_r_post_inc_tiny): New function to handle register
indirect store for post-increment address in HImode.
(out_movhi_mr_r): Update instruction length for AVRTINY. Call tiny
register indirect store function for HImode in AVRTINY.
(avr_out_compare): Use TINY_SBIW/ TINY_ADIW in place of sbiw/adiw
in case of AVRTINY.
(order_regs_for_local_alloc): Updated register allocation order for
AVRTINY.
(avr_conditional_register_usage): New function. It is a target hook
(TARGET_CONDITIONAL_REGISTER_USAGE) function which updates fixed, call
used registers list and register allocation order for AVRTINY.
(avr_return_in_memory): Update return value size for AVRTINY.
* config/avr/avr-c.c (avr_cpu_cpp_builtins): Added builtin macros
for AVRTINY arch and tiny program memory base address.
* config/avr/avr-devices.c (avr_arch_types): Added AVRTINY arch.
(avr_texinfo): Added description for AVRTINY arch.
* config/avr/avr.h: Added macro to identify AVRTINY arch. Updated
STATIC_CHAIN_REGNUM for AVRTINY.
* config/avr/avr-mcus.def: Added AVRTINY arch devices.
* config/avr/avr.md: Added constants for tmp/ zero registers in
AVRTINY. Attributes for AVRTINY added.
(mov<mode>): Move src/ dest address to register if it is not in AVRTINY
memory access range.
(mov<mode>_insn): Avoid QImode direct load for AVRTINY if address not
in AVRTINY memory access range.
(*mov<mode>): Likewise for HImode and SImode.
(*movsf): Likewise for SFmode.
(delay_cycles_2): Updated instructions to be emitted as AVRTINY does
not have sbiw.
* config/avr/avr-protos.h: Added function prototype for
tiny_valid_direct_memory_access_range.
* config/avr/avr-tables.opt: Regenerate.
* gcc/config/avr/t-multilib: Regenerate.
* doc/avr-mmcu.texi: Regenerate.
gcc/testsuite:
2014-10-21 Joern Rennecke <joern.rennecke@embecosm.com>
* gcc.target/avr/tiny-memx.c: New test.
* gcc.target/avr/tiny-caller-save.c: New test.
libgcc:
2014-10-21 Joern Rennecke <joern.rennecke@embecosm.com>
Vidya Praveen <vidya.praveen@atmel.com>
Praveen Kumar Kaushik <Praveen_Kumar.Kaushik@atmel.com>
Senthil Kumar Selvaraj <Senthil_Kumar.Selvaraj@atmel.com>
Pitchumani Sivanupandi <Pitchumani.S@atmel.com>
* config/avr/lib1funcs.S (__do_global_dtors): Go back to descending
order.
Updated library functions for AVRTINY arch.
* config/avr/lib1funcs.S: Updated zero/tmp regs for AVRTINY.
Replaced occurrences of r0/r1 with tmp/zero reg macros.
Added wsubi/ wadi macros that expands conditionally as sbiw/ adiw
or AVRTINY equivalent. Replaced occurrences of sbiw/adiw with
wsubi/wadi macors.
(__mulsi3_helper): Update stack, preserve callee saved regs and
argument from stack. Restore callee save registers.
(__mulpsi3): Likewise.
(__muldi3, __udivmodsi4, __divmodsi4, __negsi2, __umoddi3, __udivmod64,
__moddi3, __adddi3, __adddi3_s8, __subdi3, __cmpdi2, __cmpdi2_s8,
__negdi2, __prologue_saves__, __epilogue_restores__): Excluded for
AVRTINY.
(__tablejump2__): Added lpm equivalent instructions for AVRTINY.
(__do_copy_data): Added new definition for AVRTINY.
(__do_clear_bss): Replace r17 by r18 to preserve zero reg for AVRTINY.
(__load_3, __load_4, __xload_1, __xload_2, __xload_3,
__xload_4, __movmemx_qi, __movmemx_hi): Excluded for AVRTINY.
* config/avr/lib1funcs-fixed.S: Replaced occurrences of r0/r1 with
tmp/zero reg macros. Replaced occurrences of sbiw/adiw with wsubi/wadi
macors.
* config/avr/t-avr (LIB1ASMFUNCS): Remove unsupported functions for
AVRTINY.
Fix broken long multiplication on tiny arch.
Co-Authored-By: Pitchumani Sivanupandi <pitchumani.s@atmel.com>
Co-Authored-By: Praveen Kumar Kaushik <Praveen_Kumar.Kaushik@atmel.com>
Co-Authored-By: Senthil Kumar Selvaraj <Senthil_Kumar.Selvaraj@atmel.com>
Co-Authored-By: Vidya Praveen <vidya.praveen@atmel.com>
From-SVN: r216525
This patch removes the target macro LIBGCC2_LONG_DOUBLE_TYPE_SIZE.
After recent changes, this macro was used in two ways in libgcc: to
determine the mode of long double in dfp-bit.h, and to determine
whether a particular mode has excess precision for use in complex
multiplication.
The former is concerned specifically with long double: it relates to
use of strtold for converting between decimal and binary floating
point. This is replaced by comparing __LDBL_MANT_DIG__ with the
appropriate __LIBGCC_*_MANT_DIG__ macro. The latter is replaced
__LIBGCC_*_EXCESS_PRECISION__ predefined macros.
Remarks:
* Comparing (__LDBL_MANT_DIG__ == __LIBGCC_XF_MANT_DIG__) is more
fragile than it looks; it's possible for XFmode to have 53-bit
mantissa (TARGET_96_ROUND_53_LONG_DOUBLE, on FreeBSD and
DragonFlyBSD 32-bit), in which case such a comparison would not
distinguish XFmode and DFmode as possible modes for long double.
Fortunately, no target supporting that form of XFmode also supports
long double = double (but if some target did, we'd need e.g. an
additional macro giving the exponent range of each mode).
Furthermore, this code doesn't actually get used for x86 (or any
other target with XFmode support), because x86 uses BID not DPD and
BID has its own conversion code (which handles conversions for both
XFmode and TFmode without needing to go via strtold). And FreeBSD
and DragonFlyBSD aren't among the targets with DFP support. So
while in principle this code is fragile and it's a deficiency that
it can't support both XFmode and TFmode at once (something that
can't be solved with the string conversion approach without libc
having TS 18661 functions such as strtof128), all these issues
should not be a problem in practice.
* If other cases of excess precision are supported in future, the code
for defining __LIBGCC_*_EXCESS_PRECISION__ may need updating.
Although the most likely such cases might not actually involve
excess precision for any mode used in libgcc - FLT_EVAL_METHOD being
32 to do _Float16 arithmetic on _Float32 should have the effect of
_Complex _Float16 arithmetic using __mulsc3 and __divsc3, rather
than currently nonexistent __mulhc3 and __divhc3 as in bug 63250 for
ARM.
* As has been noted in the context of simultaneous support for
__float128 and __ibm128 on Power, the semantics of macros such as
LONG_DOUBLE_TYPE_SIZE are problematic because they rely on a
poorly-defined precision value for floating-point modes (which seems
to be intended as the number of significant bits in the
representation, e.g. 80 for XFmode which may be either 12 or 16
bytes) uniquely identifying a mode (although defining an arbitrarily
different value for one of the modes you wish to distinguish may
work as a hack). It would be cleaner to have a target hook that
gives a machine mode directly for float, double and long double,
rather than going via these precision values. By eliminating all
use of these macros (FLOAT_TYPE_SIZE, DOUBLE_TYPE_SIZE,
LONG_DOUBLE_TYPE_SIZE) from code built for the target, this patch
facilitates such a conversion to a hook (which I suppose would take
some suitable enum as an argument to identify which of the three
types to return a mode for).
(The issue of multiple type support for DFP conversions would apply
in that Power case.
<https://gcc.gnu.org/ml/gcc-patches/2014-07/msg01084.html> doesn't
seem to touch on it, but it would seem reasonable to punt on it
initially as hard to fix. There would also be the issue of getting
functions such as __powikf2, __mulkc3, __divkc3 defined, but that's
rather easier to address.)
Bootstrapped with no regressions on x86_64-unknown-linux-gnu.
gcc:
* doc/tm.texi.in (LIBGCC2_LONG_DOUBLE_TYPE_SIZE): Remove.
* doc/tm.texi: Regenerate.
* system.h (LIBGCC2_LONG_DOUBLE_TYPE_SIZE): Poison.
* config/alpha/alpha.h (LIBGCC2_LONG_DOUBLE_TYPE_SIZE): Remove.
* config/i386/i386-interix.h (LIBGCC2_LONG_DOUBLE_TYPE_SIZE):
Remove.
* config/i386/i386.h (LIBGCC2_LONG_DOUBLE_TYPE_SIZE): Remove.
* config/i386/rtemself.h (LIBGCC2_LONG_DOUBLE_TYPE_SIZE): Remove.
* config/ia64/ia64.h (LIBGCC2_LONG_DOUBLE_TYPE_SIZE): Remove.
* config/m68k/m68k.h (LIBGCC2_LONG_DOUBLE_TYPE_SIZE): Remove.
* config/m68k/netbsd-elf.h (LIBGCC2_LONG_DOUBLE_TYPE_SIZE):
Remove.
* config/mips/mips.h (LIBGCC2_LONG_DOUBLE_TYPE_SIZE): Remove.
* config/mips/n32-elf.h (LIBGCC2_LONG_DOUBLE_TYPE_SIZE): Remove.
* config/msp430/msp430.h (LIBGCC2_LONG_DOUBLE_TYPE_SIZE): Remove.
* config/rl78/rl78.h (LIBGCC2_LONG_DOUBLE_TYPE_SIZE): Remove.
* config/rs6000/rs6000.h (LIBGCC2_LONG_DOUBLE_TYPE_SIZE): Remove.
* config/rx/rx.h (LIBGCC2_LONG_DOUBLE_TYPE_SIZE): Remove.
* config/s390/s390.h (LIBGCC2_LONG_DOUBLE_TYPE_SIZE): Remove.
* config/sparc/freebsd.h (LIBGCC2_LONG_DOUBLE_TYPE_SIZE): Remove.
* config/sparc/linux.h (LIBGCC2_LONG_DOUBLE_TYPE_SIZE): Remove.
* config/sparc/linux64.h (LIBGCC2_LONG_DOUBLE_TYPE_SIZE): Remove.
* config/sparc/netbsd-elf.h (LIBGCC2_LONG_DOUBLE_TYPE_SIZE):
Remove.
gcc/c-family:
* c-cppbuiltin.c (c_cpp_builtins): Define
__LIBGCC_*_EXCESS_PRECISION__ macros for supported floating-point
modes.
libgcc:
* dfp-bit.h (LIBGCC2_LONG_DOUBLE_TYPE_SIZE): Remove.
(__LIBGCC_XF_MANT_DIG__): Define if not already defined.
(LONG_DOUBLE_HAS_XF_MODE): Define in terms of
__LIBGCC_XF_MANT_DIG__.
(__LIBGCC_TF_MANT_DIG__): Define if not already defined.
(LONG_DOUBLE_HAS_TF_MODE): Define in terms of
__LIBGCC_TF_MANT_DIG__.
* libgcc2.c (NOTRUNC): Define in terms of
__LIBGCC_*_EXCESS_PRECISION__, not LIBGCC2_LONG_DOUBLE_TYPE_SIZE.
* libgcc2.h (LIBGCC2_LONG_DOUBLE_TYPE_SIZE): Remove.
From-SVN: r215491
This patch removes the (undocumented) LIBGCC2_TF_CEXT target macro,
replacing it by -fbuilding-libgcc predefines (and thereby gets rid of
another LIBGCC2_LONG_DOUBLE_TYPE_SIZE conditional, though some more
patches are needed before that target macro can be eliminated). This
macro indicated the suffix used on __builtin_huge_val,
__builtin_copysign, __builtin_fabs built-in function names to produce
the names for a given floating-point mode.
Predefines are added for all floating-point modes supported for
libgcc, not just TFmode. These are fully accurate for modes
corresponding to float, double and long double. For other modes, the
suffix for *constants* is determined by the targetm.c.mode_for_suffix
hook (the limit to two possible suffixes 'w' and 'q' being hardcoded
in various places). This is in fact the suffix for built-in functions
as well where such functions exist.
* For i386, the *q functions always exist (whether or not TFmode is
used for long double). The *w functions never exist (but this
doesn't matter for libgcc, since no i386 configuration treats XFmode
as a supported scalar mode if long double is TFmode; if __float80
were to be supported for 64-bit Android, properly such functions
ought to be added).
* For ia64, the *q functions exist for non-HP-UX (under HP-UX, long
double is TFmode, so they aren't needed). The *w functions never
exist. This is an issue for this libgcc code for the XFmode complex
functions in libgcc on HP-UX; as I understand it, right now those
will accidentally be using TFmode versions of those three functions,
so involving unnecessary conversions, while the sanity check on CEXT
accidentally passes because all it tests is the sizes of the types.
Because of the lack of 'w' functions, the patch uses 'l' when the
constant suffix is 'w', matching what the existing libgcc code would
do for IA64 HP-UX in that case.
Ideally there would be generic code to create such built-in functions
for all supported floating-point types. That may be something to
consider if support for TS 18661-3 (standard bindings for IEEE
754-2008, defining names such as _Float128, and function names such as
copysignf128) is added in future.
Bootstrapped with no regressions on x86_64-unknown-linux-gnu.
gcc:
* system.h (LIBGCC2_TF_CEXT): Poison.
* config/i386/cygming.h (LIBGCC2_TF_CEXT): Remove.
* config/i386/darwin.h (LIBGCC2_TF_CEXT): Likewise.
* config/i386/dragonfly.h (LIBGCC2_TF_CEXT): Likewise.
* config/i386/freebsd.h (LIBGCC2_TF_CEXT): Likewise.
* config/i386/gnu-user-common.h (LIBGCC2_TF_CEXT): Likewise.
* config/i386/openbsdelf.h (LIBGCC2_TF_CEXT): Likewise.
* config/i386/sol2.h (LIBGCC2_TF_CEXT): Likewise.
* config/ia64/ia64.h (LIBGCC2_TF_CEXT): Likewise.
* config/ia64/linux.h (LIBGCC2_TF_CEXT): Likewise.
gcc/c-family:
* c-cppbuiltin.c (c_cpp_builtins): Define __LIBGCC_*_FUNC_EXT__
for supported floating-point modes.
libgcc:
* libgcc2.c (CEXT): Define using __LIBGCC_*_FUNC_EXT__.
From-SVN: r215368
The i386 sfp-machine.h defines FP_TRAPPING_EXCEPTIONS in a way that is
always wrong: it treats a set bit as indicating the exception is
trapping, when actually a set bit (both for 387 and SSE floating
point) indicates it is masked, and a clear bit indicates it is
trapping. This patch fixes this bug.
Bootstrapped with no regressions on x86_64-unknown-linux-gnu.
libgcc:
* config/i386/sfp-machine.h (FP_TRAPPING_EXCEPTIONS): Treat clear
bits not set bits as indicating trapping exceptions.
gcc/testsuite:
* gcc.dg/torture/float128-exact-underflow.c: New test.
From-SVN: r215347
This patch removes the LIBGCC2_HAS_{SF,DF,XF,TF}_MODE target macros,
replacing them by predefines with -fbuilding-libgcc, together with a
target hook that can influence those predefines when needed.
The new default is that a floating-point mode is supported in libgcc
if (a) it passes the scalar_mode_supported_p hook (otherwise it's not
plausible for it to be supported in libgcc) and (b) it's one of those
four modes (since those are the modes for which libgcc hardcodes the
possibility of support). The target hook can override the default
choice (in either direction) for modes that pass
scalar_mode_supported_p (although overriding in the direction of
returning true when the default would return false only makes sense if
all relevant functions are specially defined in libgcc for that
particular target).
The previous default settings depended on various settings such as
LIBGCC2_LONG_DOUBLE_TYPE_SIZE, as well as targets defining the above
target macros if the default wasn't correct.
The default scalar_mode_supported_p only declares a floating-point
mode to be supported if it matches one of float / double / long
double. This means that in most cases where a mode is only supported
conditionally in libgcc (TFmode only supported if it's the mode of
long double, most commonly), the default gets things right. Overrides
were needed in the following cases:
* SFmode would always have been supported in libgcc (the condition was
BITS_PER_UNIT == 8, true for all current targets), but pdp11
defaults to 64-bit float, and in that case SFmode would fail
scalar_mode_supported_p. I don't know if libgcc actually built for
pdp11 (and the port may well no longer be being used), but this
patch adds a scalar_mode_supported_p hook to it to ensure SFmode is
treated as supported.
* Certain i386 and ia64 targets need the new hook to match the
existing cases for when XFmode or TFmode support is present in
libgcc. For i386, the hook can always declare XFmode to be
supported - the cases where it's not are the cases where long double
is TFmode, in which case XFmode fails scalar_mode_supported_p[*] -
but TFmode support needs to be conditional. (And of the targets not
defining LIBGCC2_HAS_TF_MODE before this patch, some defined
LONG_DOUBLE_TYPE_SIZE to 64, so ensuring LIBGCC2_HAS_TF_MODE would
always be false, while others did not define it, so allowing it to
be true in the -mlong-double-128 case. This patch matches that
logic, although I suspect all the latter targets would have been
broken if you tried to enable -mlong-double-128 by default, for lack
of the soft-fp TFmode support in libgcc, which is separately
configured.)
[*] I don't know if it's deliberate not to support __float80 at all
with -mlong-double-128.
In order to implement the default version of the new hook,
insn-modes.h was made to contain macros such as HAVE_TFmode for each
machine mode, so the default hook can contain conditionals on whether
XFmode and TFmode exist (to match the hardcoding of a list of modes in
libgcc). This is also used in fortran/trans-types.c; previously it
had a conditional on defined(LIBGCC2_HAS_TF_MODE) (a bit dubious,
since it ignored the value of the macro), which is replaced by testing
defined(HAVE_TFmode), in conjunction with requiring
targetm.libgcc_floating_mode_supported_p.
(Fortran is testing something stronger than that hook: not only is
libgcc support required, but also libm or equivalent. Thus, it has a
test for ENABLE_LIBQUADMATH_SUPPORT in the case that the mode is
TFmode and that's not the same as any of the three standard types.
The old and new tests are intended to accept exactly the same set of
modes for all targets.)
Apart from the four target macros eliminated by this patch, it gets us
closer to eliminating LIBGCC2_LONG_DOUBLE_TYPE_SIZE as well, though a
few more places using that macro need changing first.
Bootstrapped with no regressions on x86_64-unknown-linux-gnu; also
built cc1 for crosses to ia64-elf and pdp11-none as a minimal test of
changes for those targets.
gcc:
* target.def (libgcc_floating_mode_supported_p): New hook.
* targhooks.c (default_libgcc_floating_mode_supported_p): New
function.
* targhooks.h (default_libgcc_floating_mode_supported_p): Declare.
* doc/tm.texi.in (LIBGCC2_HAS_DF_MODE, LIBGCC2_HAS_XF_MODE)
(LIBGCC2_HAS_TF_MODE): Remove.
(TARGET_LIBGCC_FLOATING_MODE_SUPPORTED_P): New @hook.
* doc/tm.texi: Regenerate.
* genmodes.c (emit_insn_modes_h): Define HAVE_%smode for each
machine mode.
* system.h (LIBGCC2_HAS_SF_MODE, LIBGCC2_HAS_DF_MODE)
(LIBGCC2_HAS_XF_MODE, LIBGCC2_HAS_TF_MODE): Poison.
* config/i386/cygming.h (LIBGCC2_HAS_TF_MODE): Remove.
* config/i386/darwin.h (LIBGCC2_HAS_TF_MODE): Remove.
* config/i386/djgpp.h (IX86_MAYBE_NO_LIBGCC_TFMODE): Define.
* config/i386/dragonfly.h (LIBGCC2_HAS_TF_MODE): Remove.
* config/i386/freebsd.h (LIBGCC2_HAS_TF_MODE): Remove.
* config/i386/gnu-user-common.h (LIBGCC2_HAS_TF_MODE): Remove.
* config/i386/i386-interix.h (IX86_NO_LIBGCC_TFMODE): Define.
* config/i386/i386.c (ix86_libgcc_floating_mode_supported_p): New
function.
(TARGET_LIBGCC_FLOATING_MODE_SUPPORTED_P): Define.
* config/i386/i386elf.h (IX86_MAYBE_NO_LIBGCC_TFMODE): Define.
* config/i386/lynx.h (IX86_MAYBE_NO_LIBGCC_TFMODE): Define.
* config/i386/netbsd-elf.h (IX86_MAYBE_NO_LIBGCC_TFMODE): Define.
* config/i386/netbsd64.h (IX86_MAYBE_NO_LIBGCC_TFMODE): Define.
* config/i386/nto.h (IX86_MAYBE_NO_LIBGCC_TFMODE): Define.
* config/i386/openbsd.h (IX86_MAYBE_NO_LIBGCC_TFMODE): Define.
* config/i386/openbsdelf.h (LIBGCC2_HAS_TF_MODE): Remove.
* config/i386/rtemself.h (IX86_NO_LIBGCC_TFMODE): Define.
* config/i386/sol2.h (LIBGCC2_HAS_TF_MODE): Remove.
* config/i386/vx-common.h (IX86_MAYBE_NO_LIBGCC_TFMODE): Define.
* config/ia64/elf.h (IA64_NO_LIBGCC_TFMODE): Define.
* config/ia64/freebsd.h (IA64_NO_LIBGCC_TFMODE): Define.
* config/ia64/hpux.h (LIBGCC2_HAS_XF_MODE, LIBGCC2_HAS_TF_MODE):
Remove.
* config/ia64/ia64.c (TARGET_LIBGCC_FLOATING_MODE_SUPPORTED_P):
New macro.
(ia64_libgcc_floating_mode_supported_p): New function.
* config/ia64/linux.h (LIBGCC2_HAS_TF_MODE): Remove.
* config/ia64/vms.h (IA64_NO_LIBGCC_XFMODE)
(IA64_NO_LIBGCC_TFMODE): Define.
* config/msp430/msp430.h (LIBGCC2_HAS_DF_MODE): Remove.
* config/pdp11/pdp11.c (TARGET_SCALAR_MODE_SUPPORTED_P): New
macro.
(pdp11_scalar_mode_supported_p): New function.
* config/rl78/rl78.h (LIBGCC2_HAS_DF_MODE): Remove.
* config/rx/rx.h (LIBGCC2_HAS_DF_MODE): Remove.
gcc/c-family:
* c-cppbuiltin.c (c_cpp_builtins): Define __LIBGCC_HAS_%s_MODE__
macros for floating-point modes.
gcc/fortran:
* trans-types.c (gfc_init_kinds): Check
targetm.libgcc_floating_mode_supported_p for floating-point
modes. Check HAVE_TFmode instead of LIBGCC2_HAS_TF_MODE.
libgcc:
* libgcc2.h (LIBGCC2_HAS_SF_MODE): Define using
__LIBGCC_HAS_SF_MODE__.
(LIBGCC2_HAS_DF_MODE): Define using __LIBGCC_HAS_DF_MODE__.
(LIBGCC2_HAS_XF_MODE): Define using __LIBGCC_HAS_XF_MODE__.
(LIBGCC2_HAS_TF_MODE): Define using __LIBGCC_HAS_TF_MODE__.
* config/libbid/bid_gcc_intrinsics.h
(LIBGCC2_LONG_DOUBLE_TYPE_SIZE): Do not define.
(LIBGCC2_HAS_XF_MODE): Define using __LIBGCC_HAS_XF_MODE__.
(LIBGCC2_HAS_TF_MODE): Define using __LIBGCC_HAS_TF_MODE__.
* fixed-bit.h (LIBGCC2_LONG_DOUBLE_TYPE_SIZE): Do not define.
(LIBGCC2_HAS_SF_MODE): Define using __LIBGCC_HAS_SF_MODE__.
(LIBGCC2_HAS_DF_MODE): Define using __LIBGCC_HAS_DF_MODE__.
From-SVN: r215215
gcc/
PR target/63223
* config/avr/avr.md (*tablejump.3byte-pc): New insn.
(*tablejump): Restrict to !AVR_HAVE_EIJMP_EICALL. Add void clobber.
(casesi): Expand to *tablejump.3byte-pc if AVR_HAVE_EIJMP_EICALL.
libgcc/
PR target/63223
* config/avr/libgcc.S (__tablejump2__): Rewrite to use RAMPZ, ELPM
and R24 as needed. Make work for all devices and .text locations.
(__do_global_ctors, __do_global_dtors): Use word addresses.
(__tablejump__, __tablejump_elpm__): Remove functions.
* t-avr (LIB1ASMFUNCS): Remove _tablejump, _tablejump_elpm.
Add _tablejump2.
(XICALL, XIJMP): New macros.
From-SVN: r215152
Uros Bizjak