Currently only matches targets where _GLIBCXX_USE_RANDOM_TR1 is defined,
which means /dev/random and /dev/urandom are usable.
* testsuite/25_algorithms/make_heap/complexity.cc: Require effective
target for std::random_device.
* testsuite/26_numerics/random/random_device/cons/default.cc:
Likewise.
* testsuite/experimental/algorithm/sample-2.cc: Likewise.
* testsuite/experimental/algorithm/shuffle.cc: Likewise.
* testsuite/experimental/random/randint.cc: Likewise.
* testsuite/lib/libstdc++.exp
(check_effective_target_random_device): New proc.
From-SVN: r262415
2018-07-04 Jonathan Wakely <jwakely@redhat.com>
Jakub Jelinek <jakub@redhat.com>
* include/std/bit (__rotl, __rotr): Fix for non-power of two sizes.
Co-Authored-By: Jakub Jelinek <jakub@redhat.com>
From-SVN: r262414
The intrinsic doesn't check for allowed conversions between scalar
types, so restore the std::is_constructible check.
Also make some trivial whitespace changes.
PR libstdc++/86398
* include/std/type_traits (is_trivially_constructible): Check
is_constructible before __is_trivially_constructible.
* testsuite/20_util/is_trivially_constructible/value.cc: Add more
tests, including negative cases.
* testsuite/20_util/make_signed/requirements/typedefs_neg.cc: Use
zero for dg-error lineno.
* testsuite/20_util/make_unsigned/requirements/typedefs_neg.cc:
Likewise.
From-SVN: r262379
* gcc.dg/tree-ssa/ssa-dom-thread-7.c: Adjust test because aarch64
has a slightly different IL that provides more threading
opportunities.
From-SVN: r262377
2018-07-04 Denys Vlasenko <dvlasenk@redhat.com>
Martin Liska <mliska@suse.cz>
PR middle-end/66240
PR target/45996
PR c/84100
* common.opt: Rename align options with 'str_' prefix.
* common/config/i386/i386-common.c (set_malign_value): New
function.
(ix86_handle_option): Use it to set -falign-* options/
* config/aarch64/aarch64-protos.h (struct tune_params): Change
type from int to string.
* config/aarch64/aarch64.c: Update default values from int
to string.
* config/alpha/alpha.c (alpha_override_options_after_change):
Likewise.
* config/arm/arm.c (arm_override_options_after_change_1): Likewise.
* config/i386/dragonfly.h (ASM_OUTPUT_MAX_SKIP_ALIGN): Print
max skip conditionally.
* config/i386/freebsd.h (SUBALIGN_LOG): New.
(ASM_OUTPUT_MAX_SKIP_ALIGN): Print
max skip conditionally.
* config/i386/gas.h (ASM_OUTPUT_MAX_SKIP_ALIGN): Print
max skip conditionally.
* config/i386/gnu-user.h (SUBALIGN_LOG): New.
(ASM_OUTPUT_MAX_SKIP_ALIGN): Print
max skip conditionally.
* config/i386/i386.c (struct ptt): Change type from int to
string.
(ix86_default_align): Set default values.
* config/i386/i386.h (ASM_OUTPUT_MAX_SKIP_PAD): Print
max skip conditionally.
* config/i386/iamcu.h (SUBALIGN_LOG): New.
(ASM_OUTPUT_MAX_SKIP_ALIGN):
* config/i386/lynx.h (ASM_OUTPUT_MAX_SKIP_ALIGN):
* config/i386/netbsd-elf.h (ASM_OUTPUT_MAX_SKIP_ALIGN): Print
max skip conditionally.
* config/i386/openbsdelf.h (SUBALIGN_LOG): New.
(ASM_OUTPUT_MAX_SKIP_ALIGN) Print max skip conditionally.:
* config/i386/x86-64.h (SUBALIGN_LOG): New.
(ASM_OUTPUT_MAX_SKIP_ALIGN): Print
max skip conditionally.
(ASM_OUTPUT_MAX_SKIP_PAD): Likewise.
* config/ia64/ia64.c (ia64_option_override): Set default values
for alignment options.
* config/m68k/m68k.c: Handle new str_align_* options.
* config/mips/mips.c (mips_set_compression_mode): Change
type of constants.
(mips_option_override): Set default values for options.
* config/powerpcspe/powerpcspe.c (rs6000_option_override_internal):
Likewise.
* config/rs6000/rs6000.c (rs6000_option_override_internal):
Likewise.
* config/rx/rx.c (rx_option_override): Likewise.
* config/rx/rx.h (JUMP_ALIGN): Use align_jumps_log.
(LABEL_ALIGN): Use align_labels_log.
(LOOP_ALIGN): Use align_loops_align.
* config/s390/s390.c (s390_asm_output_function_label): Use new
macros.
* config/sh/sh.c (sh_override_options_after_change):
Change type of constants.
* config/spu/spu.c (spu_sched_init): Likewise.
* config/sparc/sparc.c (sparc_option_override): Set default
values for options.
* config/visium/visium.c (visium_option_override): Likewise.
* config/visium/visium.h (ASM_OUTPUT_MAX_SKIP_ALIGN): Do not
emit p2align format with last argument if it's not needed.
* doc/invoke.texi: Document extended format of -falign-*.
* final.c: Use align_labels alignment.
* flags.h (struct target_flag_state): Change type to use
align_flags.
(struct align_flags_tuple): New.
(struct align_flags): Likewise.
(align_loops_log): Redefine macro to use new types.
(align_loops_max_skip): Redefine macro to use new types.
(align_jumps_log): Redefine macro to use new types.
(align_jumps_max_skip): Redefine macro to use new types.
(align_labels_log): Redefine macro to use new types.
(align_labels_max_skip): Redefine macro to use new types.
(align_functions_log): Redefine macro to use new types.
(align_loops): Redefine macro to use new types.
(align_jumps): Redefine macro to use new types.
(align_labels): Redefine macro to use new types.
(align_functions): Redefine macro to use new types.
(align_functions_max_skip): Redefine macro to use new types.
(align_loops_value): New macro.
(align_jumps_value): New macro.
(align_labels_value): New macro.
(align_functions_value): New macro.
* function.c (invoke_set_current_function_hook): Propagate
alignment values from flags to global variables default in
topleev.h.
* ipa-icf.c (sem_function::equals_wpa): Use
cl_optimization_option_eq instead of memcmp.
* lto-streamer.h (cl_optimization_stream_out): Support streaming
of string types.
(cl_optimization_stream_in): Likewise.
* optc-save-gen.awk: Support strings in cl_optimization.
* opth-gen.awk: Likewise.
* opts.c (finish_options): Remove error checking of invalid
value ranges.
(MAX_CODE_ALIGN): Remove.
(MAX_CODE_ALIGN_VALUE): Likewise.
(parse_and_check_align_values): New function.
(check_alignment_argument): Likewise.
(common_handle_option): Use check_alignment_argument.
* opts.h (parse_and_check_align_values): Declare.
* toplev.c (init_alignments): Remove.
(read_log_maxskip): New.
(parse_N_M): Likewise.
(parse_alignment_opts): Likewise.
(backend_init_target): Remove usage of init_alignments.
* toplev.h (parse_alignment_opts): Declare.
* tree-streamer-in.c (streamer_read_tree_bitfields): Add new
argument.
* tree-streamer-out.c (streamer_write_tree_bitfields): Likewise.
* tree.c (cl_option_hasher::equal): New.
* varasm.c: Use new global macros.
2018-07-04 Martin Liska <mliska@suse.cz>
PR middle-end/66240
PR target/45996
PR c/84100
* lto.c (compare_tree_sccs_1): Use cl_optimization_option_eq
instead of memcmp.
2018-07-04 Martin Liska <mliska@suse.cz>
PR middle-end/66240
PR target/45996
PR c/84100
* gcc.dg/pr84100.c (foo):
* gcc.target/i386/falign-functions-2.c: New test.
* gcc.target/i386/falign-functions.c: New test.
From-SVN: r262375
2018-07-04 Martin Liska <mliska@suse.cz>
Jonathan Wakely <jwakely@redhat.com>
* coverage.c: Use correct type.
* doc/invoke.texi: Language correction.
Co-Authored-By: Jonathan Wakely <jwakely@redhat.com>
From-SVN: r262373
2018-07-04 Richard Sandiford <richard.sandiford@arm.com>
gcc/testsuite/
* gcc.dg/vect/bb-slp-over-widen-1.c: Fix name of dump file for
final scan test.
* gcc.dg/vect/bb-slp-over-widen-2.c: Likewise.
From-SVN: r262371
On x86, swapcontext may return via indirect branch when shadow stack
is enabled. To support code instrumentation of control-flow transfers
with -fcf-protection, add indirect_return function attribute to inform
compiler that a function may return via indirect branch.
Note: Unlike setjmp, swapcontext only returns once. Mark it return
twice will unnecessarily disable compiler optimization as shown in
the testcase here.
gcc/
PR target/85620
* config/i386/i386.c (rest_of_insert_endbranch): Also generate
ENDBRANCH for non-tail call which may return via indirect branch.
* doc/extend.texi: Document indirect_return attribute.
gcc/testsuite/
PR target/85620
* gcc.target/i386/pr85620-1.c: New test.
* gcc.target/i386/pr85620-2.c: Likewise.
* gcc.target/i386/pr85620-3.c: Likewise.
* gcc.target/i386/pr85620-4.c: Likewise.
From-SVN: r262370
* config/h8300/h8300.md (ors code_iterator): New.
(bsetqi_msx, bnotqi_msx patterns and splitters): Consolidate into
a single pattern and single splitter.
(bsethi_msx, bnothi_msx patterns): Consolidate into a single pattern.
(iorqi3_1, xorqi3_1): Likewise.
(iorqi3, xorqi3 expanders): Similarly.
From-SVN: r262366
* config/h8300/h8300.md (movmd_internal_normal): Consolidated with
(movmd_internal) into a single pattern using the P mode iterator.
(movmd splitters): Similarly.
(stpcpy_internal_normal, stpcpy_internal): Similarly for thes patterns.
(movsd splitters): Similarly.
From-SVN: r262365
P0553R2 is not in the C++2a working draft yet, but is likely to be
approved soon. Neither proposal supports std::byte but this adds
overloads of each function for std::byte, assuming that will also get
added.
* include/Makefile.am: Add new header.
* include/Makefile.in: Regenerate.
* include/precompiled/stdc++.h: Include new header.
* include/std/bit: New header.
(__rotl, __rotr, __countl_zero, __countl_one, __countr_zero)
(__countr_one, __popcount, __ispow2, __ceil2, __floor2, __log2p1):
Define for C++14.
[!__STRICT_ANSI__] (rotl, rotr, countl_zero, countl_one, countr_zero)
(countr_one, popcount): Define for C++2a. Also overload for std::byte.
(ispow2, ceil2, floor2, log2p1): Define for C++2a.
[!__STRICT_ANSI__] (ispow2, ceil2, floor2, log2p1): Overload for
std::byte.
* testsuite/26_numerics/bit/bit.pow.two/ceil2.cc: New.
* testsuite/26_numerics/bit/bit.pow.two/floor2.cc: New.
* testsuite/26_numerics/bit/bit.pow.two/ispow2.cc: New.
* testsuite/26_numerics/bit/bit.pow.two/log2p1.cc: New.
* testsuite/26_numerics/bit/bitops.rot/rotl.cc: New.
* testsuite/26_numerics/bit/bitops.rot/rotr.cc: New.
* testsuite/26_numerics/bit/bitops.count/countl_one.cc: New.
* testsuite/26_numerics/bit/bitops.count/countl_zero.cc: New.
* testsuite/26_numerics/bit/bitops.count/countr_one.cc: New.
* testsuite/26_numerics/bit/bitops.count/countr_zero.cc: New.
From-SVN: r262360
* config/h8300/h8300.c (h8300_insn_length_from_table): Consolidate
ADDB, ADDW and ADDL into a single ADD attribute which selects the
right table based on the size of the operand.
* config/h8300/h8300.md (length_table): Corresponding changes. All
references to "addb", "addw" and "addl" changed to "add".
(btst patterns): Merge two variants into a single pattern.
(tstqi, tsthi): Likewise.
(addhi3_incdec, addsi3_incdec): Likewise.
(subhi3_h8300hs, subsi3_h8300hs): Likewise.
(mulhi3, mulsi3): Likewise.
(udivhi3, udivsi3): Likewise.
(divhi3, divsi3): Likewise.
(andorqi3, andorhi3, andorsi3): Likewise.
From-SVN: r262357
This patch adds AArch64 patterns for the new AVG_FLOOR/CEIL operations.
AVG_FLOOR is [SU]HADD and AVG_CEIL is [SU]RHADD.
2018-07-03 Richard Sandiford <richard.sandiford@arm.com>
gcc/
PR tree-optimization/85694
* config/aarch64/iterators.md (HADD, RHADD): New int iterators.
(u): Handle UNSPEC_SHADD, UNSPEC_UHADD, UNSPEC_SRHADD and
UNSPEC_URHADD.
* config/aarch64/aarch64-simd.md (<u>avg<mode>3_floor)
(<u>avg<mode>3_ceil): New patterns.
gcc/testsuite/
PR tree-optimization/85694
* lib/target-supports.exp (check_effective_target_vect_avg_qi):
Return true for AArch64 without SVE.
* gcc.target/aarch64/vect_hadd_1.h: New file.
* gcc.target/aarch64/vect_shadd_1.c: New test.
* gcc.target/aarch64/vect_srhadd_1.c: Likewise.
* gcc.target/aarch64/vect_uhadd_1.c: Likewise.
* gcc.target/aarch64/vect_urhadd_1.c: Likewise.
From-SVN: r262347
The PR85694 series added a vectype argument to append_pattern_def_seq.
This patch makes more callers use it.
2018-07-03 Richard Sandiford <richard.sandiford@arm.com>
gcc/
* tree-vect-patterns.c (vect_recog_rotate_pattern)
(vect_recog_vector_vector_shift_pattern, vect_recog_divmod_pattern)
(vect_recog_mixed_size_cond_pattern, adjust_bool_pattern_cast)
(adjust_bool_pattern, vect_recog_bool_pattern): Pass the vector
type to append_pattern_def_seq instead of creating a stmt_vec_info
directly.
(build_mask_conversion): Likewise. Remove vinfo argument.
(vect_add_conversion_to_patterm): Likewise, renaming to...
(vect_add_conversion_to_pattern): ...this.
(vect_recog_mask_conversion_pattern): Update call to
build_mask_conversion. Pass the vector type to
append_pattern_def_seq here too.
(vect_recog_gather_scatter_pattern): Update call to
vect_add_conversion_to_pattern.
From-SVN: r262338
Various recognisers set PATTERN_DEF_SEQ to null before adding
statements to it, but it should always be null at that point anyway.
This patch asserts for that in vect_pattern_recog_1 and removes
the redundant code.
2018-07-03 Richard Sandiford <richard.sandiford@arm.com>
gcc/
* tree-vect-patterns.c (new_pattern_def_seq): Delete.
(vect_recog_dot_prod_pattern, vect_recog_sad_pattern)
(vect_recog_widen_op_pattern, vect_recog_over_widening_pattern)
(vect_recog_rotate_pattern, vect_synth_mult_by_constant): Don't set
STMT_VINFO_PATTERN_DEF_SEQ to null here.
(vect_recog_pow_pattern, vect_recog_vector_vector_shift_pattern)
(vect_recog_mixed_size_cond_pattern, vect_recog_bool_pattern): Use
append_pattern_def_seq instead of new_pattern_def_seq.
(vect_recog_divmod_pattern): Do both of the above.
(vect_pattern_recog_1): Assert that STMT_VINO_PATTERN_DEF_SEQ
is null.
From-SVN: r262337
The PR85694 series removed the only cases in which a pattern recogniser
could attach patterns to more than one statement. I think it would be
better to avoid adding any new instances of that, since it interferes
with the normal matching order.
This patch therefore switches the interface back to passing a single
statement instead of a vector. It also gets rid of the clearing of
STMT_VINFO_RELATED_STMT on failure, since no recognisers use it now.
2018-07-03 Richard Sandiford <richard.sandiford@arm.com>
gcc/
* tree-vect-patterns.c (vect_recog_dot_prod_pattern):
(vect_recog_sad_pattern, vect_recog_widen_op_pattern)
(vect_recog_widen_mult_pattern, vect_recog_pow_pattern):
(vect_recog_widen_sum_pattern, vect_recog_over_widening_pattern)
(vect_recog_average_pattern, vect_recog_cast_forwprop_pattern)
(vect_recog_widen_shift_pattern, vect_recog_rotate_pattern)
(vect_recog_vector_vector_shift_pattern, vect_synth_mult_by_constant)
(vect_recog_mult_pattern, vect_recog_divmod_pattern)
(vect_recog_mixed_size_cond_pattern, vect_recog_bool_pattern)
(vect_recog_mask_conversion_pattern): Replace vec<gimple *>
parameter with a single stmt_vec_info.
(vect_recog_func_ptr): Likewise.
(vect_recog_gather_scatter_pattern): Likewise, folding in...
(vect_try_gather_scatter_pattern): ...this.
(vect_pattern_recog_1): Remove stmts_to_replace and just pass
the stmt_vec_info of the statement to be matched. Don't clear
STMT_VINFO_RELATED_STMT.
(vect_pattern_recog): Update call accordingly.
From-SVN: r262336
This patch adds detection of average instructions:
a = (((wide) b + (wide) c) >> 1);
--> a = (wide) .AVG_FLOOR (b, c);
a = (((wide) b + (wide) c + 1) >> 1);
--> a = (wide) .AVG_CEIL (b, c);
in cases where users of "a" need only the low half of the result,
making the cast to (wide) redundant. The heavy lifting was done by
earlier patches.
This showed up another problem in vectorizable_call: if the call is a
pattern definition statement rather than the main pattern statement,
the type of vectorised call might be different from the type of the
original statement.
2018-07-03 Richard Sandiford <richard.sandiford@arm.com>
gcc/
PR tree-optimization/85694
* doc/md.texi (avgM3_floor, uavgM3_floor, avgM3_ceil)
(uavgM3_ceil): Document new optabs.
* doc/sourcebuild.texi (vect_avg_qi): Document new target selector.
* internal-fn.def (IFN_AVG_FLOOR, IFN_AVG_CEIL): New internal
functions.
* optabs.def (savg_floor_optab, uavg_floor_optab, savg_ceil_optab)
(savg_ceil_optab): New optabs.
* tree-vect-patterns.c (vect_recog_average_pattern): New function.
(vect_vect_recog_func_ptrs): Add it.
* tree-vect-stmts.c (vectorizable_call): Get the type of the zero
constant directly from the associated lhs.
gcc/testsuite/
PR tree-optimization/85694
* lib/target-supports.exp (check_effective_target_vect_avg_qi): New
proc.
* gcc.dg/vect/vect-avg-1.c: New test.
* gcc.dg/vect/vect-avg-2.c: Likewise.
* gcc.dg/vect/vect-avg-3.c: Likewise.
* gcc.dg/vect/vect-avg-4.c: Likewise.
* gcc.dg/vect/vect-avg-5.c: Likewise.
* gcc.dg/vect/vect-avg-6.c: Likewise.
* gcc.dg/vect/vect-avg-7.c: Likewise.
* gcc.dg/vect/vect-avg-8.c: Likewise.
* gcc.dg/vect/vect-avg-9.c: Likewise.
* gcc.dg/vect/vect-avg-10.c: Likewise.
* gcc.dg/vect/vect-avg-11.c: Likewise.
* gcc.dg/vect/vect-avg-12.c: Likewise.
* gcc.dg/vect/vect-avg-13.c: Likewise.
* gcc.dg/vect/vect-avg-14.c: Likewise.
From-SVN: r262335
The main over-widening patch can introduce quite a few extra casts,
and in many cases those casts simply "tap into" an intermediate
point in an existing extension. E.g. if we have:
unsigned char a;
int ax = (int) a;
and a later operation using ax is shortened to "unsigned short",
we would need:
unsigned short ax' = (unsigned short) a;
The a->ax extension requires one set of unpacks to get to unsigned
short and another set of unpacks to get to int. The first set are
then duplicated for ax'. If both ax and ax' are needed, the a->ax'
extension would end up counting twice during cost calculations.
This patch rewrites the original:
int ax = (int) a;
into a pattern:
unsigned short ax' = (unsigned short) a;
int ax = (int) ax';
so that each extension only counts once.
2018-07-03 Richard Sandiford <richard.sandiford@arm.com>
gcc/
* tree-vect-patterns.c (vect_split_statement): New function.
(vect_convert_input): Use it to try to split an existing cast.
gcc/testsuite/
* gcc.dg/vect/vect-over-widen-5.c: Test that the extensions
get split into two for use by the over-widening pattern.
* gcc.dg/vect/vect-over-widen-6.c: Likewise.
* gcc.dg/vect/vect-over-widen-7.c: Likewise.
* gcc.dg/vect/vect-over-widen-8.c: Likewise.
* gcc.dg/vect/vect-over-widen-9.c: Likewise.
* gcc.dg/vect/vect-over-widen-10.c: Likewise.
* gcc.dg/vect/vect-over-widen-11.c: Likewise.
* gcc.dg/vect/vect-over-widen-12.c: Likewise.
* gcc.dg/vect/vect-over-widen-13.c: Likewise.
* gcc.dg/vect/vect-over-widen-14.c: Likewise.
* gcc.dg/vect/vect-over-widen-15.c: Likewise.
* gcc.dg/vect/vect-over-widen-16.c: Likewise.
* gcc.dg/vect/vect-over-widen-22.c: New test.
From-SVN: r262334
This patch is the main part of PR85694. The aim is to recognise at least:
signed char *a, *b, *c;
...
for (int i = 0; i < 2048; i++)
c[i] = (a[i] + b[i]) >> 1;
as an over-widening pattern, since the addition and shift can be done
on shorts rather than ints. However, it ended up being a lot more
general than that.
The current over-widening pattern detection is limited to a few simple
cases: logical ops with immediate second operands, and shifts by a
constant. These cases are enough for common pixel-format conversion
and can be detected in a peephole way.
The loop above requires two generalisations of the current code: support
for addition as well as logical ops, and support for non-constant second
operands. These are harder to detect in the same peephole way, so the
patch tries to take a more global approach.
The idea is to get information about the minimum operation width
in two ways:
(1) by using the range information attached to the SSA_NAMEs
(effectively a forward walk, since the range info is
context-independent).
(2) by back-propagating the number of output bits required by
users of the result.
As explained in the comments, there's a balance to be struck between
narrowing an individual operation and fitting in with the surrounding
code. The approach is pretty conservative: if we could narrow an
operation to N bits without changing its semantics, it's OK to do that if:
- no operations later in the chain require more than N bits; or
- all internally-defined inputs are extended from N bits or fewer,
and at least one of them is single-use.
See the comments for the rationale.
I didn't bother adding STMT_VINFO_* wrappers for the new fields
since the code seemed more readable without.
2018-06-20 Richard Sandiford <richard.sandiford@arm.com>
gcc/
* poly-int.h (print_hex): New function.
* dumpfile.h (dump_dec, dump_hex): Declare.
* dumpfile.c (dump_dec, dump_hex): New poly_wide_int functions.
* tree-vectorizer.h (_stmt_vec_info): Add min_output_precision,
min_input_precision, operation_precision and operation_sign.
* tree-vect-patterns.c (vect_get_range_info): New function.
(vect_same_loop_or_bb_p, vect_single_imm_use)
(vect_operation_fits_smaller_type): Delete.
(vect_look_through_possible_promotion): Add an optional
single_use_p parameter.
(vect_recog_over_widening_pattern): Rewrite to use new
stmt_vec_info infomration. Handle one operation at a time.
(vect_recog_cast_forwprop_pattern, vect_narrowable_type_p)
(vect_truncatable_operation_p, vect_set_operation_type)
(vect_set_min_input_precision): New functions.
(vect_determine_min_output_precision_1): Likewise.
(vect_determine_min_output_precision): Likewise.
(vect_determine_precisions_from_range): Likewise.
(vect_determine_precisions_from_users): Likewise.
(vect_determine_stmt_precisions, vect_determine_precisions): Likewise.
(vect_vect_recog_func_ptrs): Put over_widening first.
Add cast_forwprop.
(vect_pattern_recog): Call vect_determine_precisions.
gcc/testsuite/
* gcc.dg/vect/vect-widen-mult-u8-u32.c: Check specifically for a
widen_mult pattern.
* gcc.dg/vect/vect-over-widen-1.c: Update the scan tests for new
over-widening messages.
* gcc.dg/vect/vect-over-widen-1-big-array.c: Likewise.
* gcc.dg/vect/vect-over-widen-2.c: Likewise.
* gcc.dg/vect/vect-over-widen-2-big-array.c: Likewise.
* gcc.dg/vect/vect-over-widen-3.c: Likewise.
* gcc.dg/vect/vect-over-widen-3-big-array.c: Likewise.
* gcc.dg/vect/vect-over-widen-4.c: Likewise.
* gcc.dg/vect/vect-over-widen-4-big-array.c: Likewise.
* gcc.dg/vect/bb-slp-over-widen-1.c: New test.
* gcc.dg/vect/bb-slp-over-widen-2.c: Likewise.
* gcc.dg/vect/vect-over-widen-5.c: Likewise.
* gcc.dg/vect/vect-over-widen-6.c: Likewise.
* gcc.dg/vect/vect-over-widen-7.c: Likewise.
* gcc.dg/vect/vect-over-widen-8.c: Likewise.
* gcc.dg/vect/vect-over-widen-9.c: Likewise.
* gcc.dg/vect/vect-over-widen-10.c: Likewise.
* gcc.dg/vect/vect-over-widen-11.c: Likewise.
* gcc.dg/vect/vect-over-widen-12.c: Likewise.
* gcc.dg/vect/vect-over-widen-13.c: Likewise.
* gcc.dg/vect/vect-over-widen-14.c: Likewise.
* gcc.dg/vect/vect-over-widen-15.c: Likewise.
* gcc.dg/vect/vect-over-widen-16.c: Likewise.
* gcc.dg/vect/vect-over-widen-17.c: Likewise.
* gcc.dg/vect/vect-over-widen-18.c: Likewise.
* gcc.dg/vect/vect-over-widen-19.c: Likewise.
* gcc.dg/vect/vect-over-widen-20.c: Likewise.
* gcc.dg/vect/vect-over-widen-21.c: Likewise.
From-SVN: r262333
r262275 allowed pattern matching on pattern statements. Testing for
SVE on more benchmarks showed a case where this interacted badly
with 14/n.
The new over-widening detection could narrow a COND_EXPR A to another
COND_EXPR B, which mixed_size_cond could then match. This was working
as expected. However, we left B (now dead) in the pattern definition
sequence with a non-null PATTERN_DEF_SEQ. mask_conversion also
matched B, and unlike most recognisers, didn't clear PATTERN_DEF_SEQ
before adding statements to it. This meant that the statements
created by mixed_size_cond appeared in two supposedy separate
sequences, causing much confusion.
This patch removes pattern statements that are replaced by further
pattern statements. As a belt-and-braces fix, it also nullifies
PATTERN_DEF_SEQ on failure, in the same way Richard B. did recently
for RELATED_STMT.
I have patches to clean up the PATTERN_DEF_SEQ handling, but they
only apply after the complete PR85694 sequence, whereas this needs
to go in before 14/n.
2018-07-03 Richard Sandiford <richard.sandiford@arm.com>
gcc/
* tree-vect-patterns.c (vect_mark_pattern_stmts): Remove pattern
statements that have been replaced by further pattern statements.
(vect_pattern_recog_1): Clear STMT_VINFO_PATTERN_DEF_SEQ on failure.
gcc/testsuite/
* gcc.dg/vect/vect-mixed-size-cond-1.c: New test.
From-SVN: r262332
