[gcc]
2016-12-07 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/72717
* config/rs6000/rs6000.c (rs6000_expand_vector_init): If the
V2DImode elements are SUBREG's convert the result into DImode
rather than failing in emit_move_insn.
[gcc/testsuite]
2016-12-07 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/72717
* gcc.target/powerpc/pr72717.c: New test.
From-SVN: r243418
PR c++/78692
* cgraph.c (cgraph_edge::redirect_call_stmt_to_callee): Set lhs
var to lhs of new_stmt right before noreturn handling rather than to
lhs of e->call_stmt early.
* g++.dg/torture/pr78692.C: New test.
From-SVN: r243377
gcc/ChangeLog:
* read-md.c (rtx_reader::require_char): New method.
(require_char_ws): Convert from function to...
(rtx_reader::require_char_ws): ...method.
(rtx_reader::require_word_ws): New method.
* read-md.h (rtx_reader::require_char): New method decl.
(require_char_ws): Remove global decl in favor of...
(rtx_reader::require_char_ws): ...new method decl.
(rtx_reader::require_word_ws): New method decl.
(rtx_reader::peek_char): New method decl.
From-SVN: r243376
2016-12-07 Thomas Preud'homme <thomas.preudhomme@arm.com>
gcc/
PR rtl-optimization/78617
* lra-remat.c (do_remat): Initialize live_hard_regs from live in
registers, also setting hard registers mapped to pseudo registers.
gcc/testsuite/
PR rtl-optimization/78617
* gcc.c-torture/execute/pr78617.c: New test.
From-SVN: r243374
Move this part of "expand"'s initialization of crtl into its own
method so that it can used by the RTL frontend when postprocessing
RTL dumps.
gcc/ChangeLog:
* cfgexpand.c (pass_expand::execute): Move stack initializations
to rtl_data::init_stack_alignment and call it.
* emit-rtl.c (rtl_data::init_stack_alignment): New method.
* emit-rtl.h (rtl_data::init_stack_alignment): New method.
From-SVN: r243371
2016-12-07 Carl Love <cel@us.ibm.com>
* gcc.target/powerpc/builtins-3.c: Move built-in tests for P8 and
P9 to their own test file. This allows precise constraints on the
effective target and compile options.
* gcc.target/powerpc/builtins-3-p8.c: New file for the vector
compare P8 built-in tests.
* gcc.target/powerpc/builtins-3-p9.c: New file for the vector
compare P9 built-in tests.
From-SVN: r243370
GCC caches the whether a function is a leaf in crtl->is_leaf. Using this
in the backend is best as leaf_function_p may not work correctly (eg. while
emitting prolog or epilog code). There are many reads of crtl->is_leaf
before it is initialized. Many targets do in targetm.frame_pointer_required
(eg. arm, aarch64, i386, mips, sparc), which is called before register
allocation by ira_setup_eliminable_regset and sched_init.
Additionally, SHRINK_WRAPPING_ENABLED calls targetm.have_simple_return,
which evaluates the condition of the simple_return instruction. On ARM
this results in a call to use_simple_return_p which requires crtl->is_leaf
to be set correctly.
To fix this, initialize crtl->is_leaf in ira_setup_eliminable_regset and
early on in ira. A bootstrap did not find any uninitialized reads of
crtl->is_leaf on Thumb-2. A follow-up patch will remove incorrect uses
of leaf_function_p from the ARM backend.
gcc/
* gcc/ira.c (ira_setup_eliminable_regset): Initialize crtl->is_leaf.
(ira): Move initialization of crtl->is_leaf earlier.
From-SVN: r243347
Improve TI mode address offsets - these may either use LDP of 64-bit or
LDR of 128-bit, so we need to use the correct intersection of offsets.
When splitting a large offset into base and offset, use a signed 9-bit
unscaled offset.
Remove the Ump constraint on movti and movtf instructions as this blocks
the reload optimizer from merging address CSEs (is this supposed to work
only on 'm' constraints?). The result is improved codesize, especially
wrf and gamess in SPEC2006.
gcc/
* config/aarch64/aarch64.md (movti_aarch64): Change Ump to m.
(movtf_aarch64): Likewise.
* config/aarch64/aarch64.c (aarch64_classify_address):
Use correct intersection of offsets.
(aarch64_legitimize_address_displacement): Use 9-bit signed offsets.
(aarch64_legitimize_address): Use 9-bit signed offsets for TI/TF mode.
Use 7-bit signed scaled mode for modes > 16 bytes.
From-SVN: r243346
2016-12-07 Martin Jambor <mjambor@suse.cz>
PR c++/78589
* error.c (dump_decl): Use dump_function_name to dump
!DECL_LANG_SPECIFIC function decls with no or self-referencing
abstract origin.
From-SVN: r243344
* gcc-interface/decl.c (gnat_to_gnu_entity): When they are global,
consider ___XR GNAT encodings variables for renamings as static so
they have a location in the debug info.
From-SVN: r243341
* gcc-interface/decl.c (gnat_to_gnu_entity) <E_Variable>: Translate
System.Address into ptr_type_node for every foreign convention.
(gnat_to_gnu_subprog_type): Likewise for result and parameter types.
(gnat_to_gnu_param): Do not do it here for GCC builtins.
(intrin_return_compatible_p): Likewise.
From-SVN: r243340
* gcc-interface/decl.c (gnat_to_gnu_entity) <E_Enumeration_Subtype>:
Also call finish_character_type on Character subtypes.
* gcc-interface/utils.c (finish_character_type): Deal with subtypes.
From-SVN: r243336
In r243317 I accidentally introduced an assumption in a selftest
in i386.c that Pmode == DImode. This patch conditionalizes the
overzealous string comparison to avoid breaking the build on
32-bit i386.c targets.
gcc/ChangeLog:
PR bootstrap/78705
* config/i386/i386.c (selftest::ix86_test_dumping_memory_blockage):
Conditionalize the string comparison on Pmode == DImode.
From-SVN: r243332
PR tree-optimization/67955
* tree-ssa-alias.c (same_addr_size_stores_p): New function.
(stmt_kills_ref_p): Use it.
PR tree-optimization/67955
* gcc.dg/tree-ssa/dse-points-to.c: New test.
From-SVN: r243325
Add a new flag on the Var_expression class that indicates
whether the var reference appears in an "lvalue" context
(for example, on the LHS of an assignment stmt) or an
"rvalue" context (for example, as an argument of a call).
Add a traversal pass that visits assignment stmt LHS subtrees
so as to mark things prior to backend gen. Select the right
context value in other places where Backend::var_expression is
called.
Reviewed-on: https://go-review.googlesource.com/33990
* go-gcc.cc (Gcc_backend::var_expression): Add Varexpr_context
parameter.
From-SVN: r243321
[gcc]
2016-12-06 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/78658
* config/rs6000/rs6000.md (zero_extendqi<mode>2): Use ^ instead of
?* constraints for the ISA 3.0 patterns, so the register allocator
is more likely to allocate QImode/HImode to vector registers for
conversion to floating point unless a reload is needed.
(zero_extendhi<mode>2): Likewise.
(float<QHI:mode><FP_ISA3:mode>2_internal): Properly deal with the
first alternative which is converting QImode/HImode to floating
point and the QImode/HImode value is in a vector register, and
does not allocate the second pseudo register. Remove zero
extending into traditional floating point registers, since the
instruction used only works on traditional altivec registers.
(floatuns<QHI:mode><FP_ISA3:mode>2_internal): Likewise.
[gcc/testsuite]
2016-12-06 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/78658
* gcc.target/powerpc/pr78658.c: New test.
From-SVN: r243320
gcc/ChangeLog:
* config/i386/i386.c: Include print-rtl.h.
(selftest::ix86_test_dumping_memory_blockage): New function.
(selftest::ix86_run_selftests): Call it.
* print-rtl-function.c (print_rtx_function): Create an
rtx_reuse_manager and use it.
* print-rtl.c: Include "rtl-iter.h".
(rtx_writer::rtx_writer): Add reuse_manager param.
(rtx_reuse_manager::rtx_reuse_manager): New ctor.
(uses_rtx_reuse_p): New function.
(rtx_reuse_manager::preprocess): New function.
(rtx_reuse_manager::has_reuse_id): New function.
(rtx_reuse_manager::seen_def_p): New function.
(rtx_reuse_manager::set_seen_def): New function.
(rtx_writer::print_rtx): If "in_rtx" has a reuse ID, print it as a
prefix the first time in_rtx is seen, and print reuse_rtx
subsequently.
(print_inline_rtx): Supply NULL for new reuse_manager param.
(debug_rtx): Likewise.
(print_rtl): Likewise.
(print_rtl_single): Likewise.
(rtx_writer::print_rtl_single_with_indent): Likewise.
* print-rtl.h: Include bitmap.h when building for host.
(rtx_writer::rtx_writer): Add reuse_manager param.
(rtx_writer::m_rtx_reuse_manager): New field.
(class rtx_reuse_manager): New class.
* rtl-tests.c (selftest::assert_rtl_dump_eq): Add reuse_manager
param and use it when constructing rtx_writer.
(selftest::test_dumping_rtx_reuse): New function.
(selftest::rtl_tests_c_tests): Call it.
* selftest-rtl.h (class rtx_reuse_manager): New forward decl.
(selftest::assert_rtl_dump_eq): Add reuse_manager param.
(ASSERT_RTL_DUMP_EQ): Supply NULL for reuse_manager param.
(ASSERT_RTL_DUMP_EQ_WITH_REUSE): New macro.
From-SVN: r243317
Added #ifdef case for when void* is 16 bits so it compiles in AVR
target.
2016-12-06 Felipe Magno de Almeida <felipe@expertisesolutions.com.br>
* src/c++11/cow-stdexcept.cc: Add special case for 16 bit pointers.
From-SVN: r243310
Enable libstdc++ compilation in AVR targets with AVR-Libc. Most
floating point math functions are already defined in AVR-Libc, so
defines are in place to avoid multiple definition of these functions.
2016-12-06 Felipe Magno de Almeida <felipe@expertisesolutions.com.br>
* crossconfig.m4: Add avr target for cross-compilation.
* configure: Regenerate.
From-SVN: r243309
* config/arm/arm-cores.def (cortex-m23, cortex-m33): Move into
alphabetical order with respect to other ARMv8 processors.
* config/arm/arm-tables.opt: Regenerate.
* config/arm/arm-tune.md: Likewise.
From-SVN: r243306
* python/libstdcxx/v6/printers.py (StdVariantPrinter): Update for new
data member name.
* testsuite/libstdc++-prettyprinters/cxx17.cc: Remove redundant test.
From-SVN: r243304
Constrain optional's __constexpr_addressof in its return type
and use a constexpr addressof for optional, if available.
* include/experimental/optional (__constexpr_addressof):
Constrain in the return type instead of in a template parameter.
(_Has_addressof_mem)
(_Has_addressof_free, _Has_addressof, __constexpr_addressof):
Guard with #ifndef __cpp_lib_addressof_constexpr.
(operator->()): Use std::__addressof if it's constexpr.
From-SVN: r243298
