2011-11-16 01:21:28 +01:00
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/*
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* Copyright 2003-2011 NetLogic Microsystems, Inc. (NetLogic). All rights
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* reserved.
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*
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* This software is available to you under a choice of one of two
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* licenses. You may choose to be licensed under the terms of the GNU
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* General Public License (GPL) Version 2, available from the file
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* COPYING in the main directory of this source tree, or the NetLogic
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* license below:
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY NETLOGIC ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
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* BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
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* OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
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* IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <linux/kernel.h>
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2013-06-10 08:41:00 +02:00
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#include <linux/of_fdt.h>
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2011-11-16 01:21:28 +01:00
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2013-05-21 16:59:19 +02:00
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#include <asm/idle.h>
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2011-11-16 01:21:28 +01:00
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#include <asm/reboot.h>
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#include <asm/time.h>
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#include <asm/bootinfo.h>
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#include <asm/netlogic/haldefs.h>
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#include <asm/netlogic/common.h>
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#include <asm/netlogic/xlp-hal/iomap.h>
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#include <asm/netlogic/xlp-hal/xlp.h>
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#include <asm/netlogic/xlp-hal/sys.h>
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2012-10-31 13:01:39 +01:00
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uint64_t nlm_io_base;
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struct nlm_soc_info nlm_nodes[NLM_NR_NODES];
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2012-10-31 13:01:37 +01:00
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cpumask_t nlm_cpumask = CPU_MASK_CPU0;
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2012-10-31 13:01:39 +01:00
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unsigned int nlm_threads_per_core;
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2013-12-21 12:22:26 +01:00
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unsigned int xlp_cores_per_node;
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2011-11-16 01:21:29 +01:00
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2011-11-16 01:21:28 +01:00
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static void nlm_linux_exit(void)
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{
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2012-10-31 13:01:39 +01:00
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uint64_t sysbase = nlm_get_node(0)->sysbase;
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2013-12-21 12:22:23 +01:00
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if (cpu_is_xlp9xx())
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nlm_write_sys_reg(sysbase, SYS_9XX_CHIP_RESET, 1);
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else
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nlm_write_sys_reg(sysbase, SYS_CHIP_RESET, 1);
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2011-11-16 01:21:28 +01:00
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for ( ; ; )
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cpu_wait();
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}
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2013-06-10 08:41:08 +02:00
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static void nlm_fixup_mem(void)
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{
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const int pref_backup = 512;
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int i;
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for (i = 0; i < boot_mem_map.nr_map; i++) {
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if (boot_mem_map.map[i].type != BOOT_MEM_RAM)
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continue;
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boot_mem_map.map[i].size -= pref_backup;
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}
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}
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2013-08-21 16:01:29 +02:00
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static void __init xlp_init_mem_from_bars(void)
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{
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uint64_t map[16];
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int i, n;
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n = xlp_get_dram_map(-1, map); /* -1: info for all nodes */
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for (i = 0; i < n; i += 2) {
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/* exclude 0x1000_0000-0x2000_0000, u-boot device */
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if (map[i] <= 0x10000000 && map[i+1] > 0x10000000)
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map[i+1] = 0x10000000;
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if (map[i] > 0x10000000 && map[i] < 0x20000000)
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map[i] = 0x20000000;
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add_memory_region(map[i], map[i+1] - map[i], BOOT_MEM_RAM);
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}
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}
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2011-11-16 01:21:28 +01:00
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void __init plat_mem_setup(void)
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{
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2014-01-14 12:39:15 +01:00
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#ifdef CONFIG_SMP
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nlm_wakeup_secondary_cpus();
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/* update TLB size after waking up threads */
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current_cpu_data.tlbsize = ((read_c0_config6() >> 16) & 0xffff) + 1;
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register_smp_ops(&nlm_smp_ops);
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#endif
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2011-11-16 01:21:28 +01:00
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_machine_restart = (void (*)(char *))nlm_linux_exit;
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_machine_halt = nlm_linux_exit;
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pm_power_off = nlm_linux_exit;
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2012-10-31 13:01:32 +01:00
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2013-06-10 08:41:00 +02:00
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/* memory and bootargs from DT */
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2013-11-04 13:21:54 +01:00
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xlp_early_init_devtree();
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2013-08-21 16:01:29 +02:00
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if (boot_mem_map.nr_map == 0) {
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pr_info("Using DRAM BARs for memory map.\n");
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xlp_init_mem_from_bars();
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}
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/* Calculate and setup wired entries for mapped kernel */
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2013-06-10 08:41:08 +02:00
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nlm_fixup_mem();
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2011-11-16 01:21:28 +01:00
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}
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const char *get_system_type(void)
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{
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2013-08-11 11:13:54 +02:00
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switch (read_c0_prid() & 0xff00) {
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2013-12-21 12:22:20 +01:00
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case PRID_IMP_NETLOGIC_XLP9XX:
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2013-08-11 11:13:54 +02:00
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case PRID_IMP_NETLOGIC_XLP2XX:
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return "Broadcom XLPII Series";
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default:
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return "Netlogic XLP Series";
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}
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2011-11-16 01:21:28 +01:00
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}
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void __init prom_free_prom_memory(void)
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{
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/* Nothing yet */
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}
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void xlp_mmu_init(void)
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{
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2013-08-11 11:13:54 +02:00
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u32 conf4;
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if (cpu_is_xlpii()) {
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/* XLPII series has extended pagesize in config 4 */
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conf4 = read_c0_config4() & ~0x1f00u;
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write_c0_config4(conf4 | ((PAGE_SHIFT - 10) / 2 << 8));
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} else {
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/* enable extended TLB and Large Fixed TLB */
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write_c0_config6(read_c0_config6() | 0x24);
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/* set page mask of extended Fixed TLB in config7 */
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write_c0_config7(PM_DEFAULT_MASK >>
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(13 + (ffz(PM_DEFAULT_MASK >> 13) / 2)));
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}
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2011-11-16 01:21:28 +01:00
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}
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2012-10-31 13:01:42 +01:00
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void nlm_percpu_init(int hwcpuid)
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{
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}
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2011-11-16 01:21:28 +01:00
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void __init prom_init(void)
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{
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2013-06-10 08:41:02 +02:00
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void *reset_vec;
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2012-10-31 13:01:39 +01:00
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nlm_io_base = CKSEG1ADDR(XLP_DEFAULT_IO_BASE);
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2013-12-21 12:22:26 +01:00
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if (cpu_is_xlp9xx())
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xlp_cores_per_node = 32;
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else
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xlp_cores_per_node = 8;
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2013-06-10 08:41:02 +02:00
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nlm_init_boot_cpu();
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2011-11-16 01:21:28 +01:00
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xlp_mmu_init();
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2012-10-31 13:01:39 +01:00
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nlm_node_init(0);
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2013-06-10 08:41:00 +02:00
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xlp_dt_init((void *)(long)fw_arg0);
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2012-10-31 13:01:32 +01:00
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2013-06-10 08:41:02 +02:00
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/* Update reset entry point with CPU init code */
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reset_vec = (void *)CKSEG1ADDR(RESET_VEC_PHYS);
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2013-06-10 08:41:04 +02:00
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memset(reset_vec, 0, RESET_VEC_SIZE);
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2013-06-10 08:41:02 +02:00
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memcpy(reset_vec, (void *)nlm_reset_entry,
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(nlm_reset_entry_end - nlm_reset_entry));
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2011-11-16 01:21:28 +01:00
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#ifdef CONFIG_SMP
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2012-10-31 13:01:37 +01:00
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cpumask_setall(&nlm_cpumask);
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2011-11-16 01:21:28 +01:00
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#endif
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}
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