Commit Graph

234195 Commits

Author SHA1 Message Date
Guenter Roeck 3382a918da hwmon: (w83627ehf) Store rpm instead of raw fan speed data
Since the fan speed value can be above 0xff, we can no longer use
that value to determine if the fan speed reading is valid. This
makes it difficult to manipulate the stored fan speed register value.

If we store rpm instead of the fan speed register value, we do not
need to correct it if the fan divisor value is changed, and the above
mentioned problem no longer exists.

Signed-off-by: Guenter Roeck <guenter.roeck@ericsson.com>
Acked-by: Ian Dobson <i.dobson@planet-ian.com>
2011-03-14 22:39:18 -07:00
Guenter Roeck 26bc440e3f hwmon: (w83627ehf) Use 16 bit fan count registers if supported
Some of the chips supported by this driver have 13 bit or 16 bit fan count
registers. This patch improves support for those registers, specifically for
NCT6775F. With the changes in this patch, fan speed is reported correctly even
if the fan divider is set to a low value, which results in a fan speed reading
above 0xff.

With this patch, the width of fan count registers is no longer used to determine
if the chip has fan divider register(s) or not. A dedicated flag is used instead
to determine if this is the case.

Signed-off-by: Guenter Roeck <guenter.roeck@ericsson.com>
Acked-by: Ian Dobson <i.dobson@planet-ian.com>
2011-03-14 22:39:18 -07:00
Guenter Roeck ec3e5a1644 hwmon: (w83627ehf) Add support for Nuvoton NCT6775F and NCT6776F
This patch adds support for NCT6775F and NCT6776F to the w83627ehf driver.

Signed-off-by: Guenter Roeck <guenter.roeck@ericsson.com>
Tested-by: Ian Dobson <i.dobson@planet-ian.com> (NCT6776F)
Tested-by: Zachary Marzec <zmarzec@gmail.com> (ASUS P8P67 PRO/NCT6776F)
Acked-by: Ian Dobson <i.dobson@planet-ian.com>
2011-03-14 22:39:17 -07:00
Guenter Roeck b84bb51862 hwmon: (w83627ehf) Permit enabling SmartFan IV mode if configured at startup
If SmartFan IV mode was configured at startup, it should be possible
to re-enable it later on.

Signed-off-by: Guenter Roeck <guenter.roeck@ericsson.com>
Acked-by: Ian Dobson <i.dobson@planet-ian.com>
2011-03-14 22:39:16 -07:00
Guenter Roeck 279af1a91a hwmon: (w83627ehf) Convert register arrays to 16 bit, and convert access to pointers
For newer chips, several registers are banked and thus need to be 16 bit.
Also, register addresses change.

To prepare for those chips, convert affected register arrays to 16 bit,
and change access to those registers to array pointers in struct w83627ehf_data.

Signed-off-by: Guenter Roeck <guenter.roeck@ericsson.com>
Acked-by: Ian Dobson <i.dobson@planet-ian.com>
2011-03-14 22:39:16 -07:00
Guenter Roeck 96d1eac97b hwmon: (w83627ehf) Remove references to datasheets which no longer exist
Signed-off-by: Guenter Roeck <guenter.roeck@ericsson.com>
Acked-by: Ian Dobson <i.dobson@planet-ian.com>
2011-03-14 22:39:15 -07:00
Guenter Roeck d36cf32c9a hwmon: (w83627ehf) Improve support for W83667HG-B
Add support for 4th temperature sensor on W83677HG-B.
Display temperature labels on W83677HG-B to report temperature sources.

Signed-off-by: Guenter Roeck <guenter.roeck@ericsson.com>
Acked-by: Ian Dobson <i.dobson@planet-ian.com>
2011-03-14 22:39:14 -07:00
Guenter Roeck 83cc8985b8 hwmon: (w83627ehf) Optimize multi-bank register access
Assume that each register is banked, and set the bank for each access.
Cache the bank number so it only needs to be set if it changes.

Signed-off-by: Guenter Roeck <guenter.roeck@ericsson.com>
Acked-by: Ian Dobson <i.dobson@planet-ian.com>
2011-03-14 22:39:14 -07:00
Guenter Roeck e7e1ca6ef4 hwmon: (w83627ehf) Fixed most checkpatch warnings and errors
This cleanup fixes most of the checkpatch warnings and errors in the w83627ehf
driver. Remaining warnings and errors are left untouched on purpose to avoid
making the code less readable.

Signed-off-by: Guenter Roeck <guenter.roeck@ericsson.com>
Acked-by: Ian Dobson <i.dobson@planet-ian.com>
2011-03-14 22:39:13 -07:00
Guenter Roeck bce26c58df hwmon: (w83627ehf) Unify temperature register access, and use strict string conversions
This patch unifies temperature register access, and replaces simple_strtoXXX
with strict_strtoXXX throughout the driver.

Signed-off-by: Guenter Roeck <guenter.roeck@ericsson.com>
Acked-by: Ian Dobson <i.dobson@planet-ian.com>
2011-03-14 22:39:13 -07:00
Guenter Roeck 2d2e148a23 hwmon: Add tachometer pulses per fan revolution to sysfs ABI
Some fan control chips support a configuration register to set the number of
tachometer pulses per fan revolution. Add an ABI attribute to support this
configuration register.

Signed-off-by: Guenter Roeck <guenter.roeck@ericsson.com>
Acked-by: Jean Delvare <khali@linux-fr.org>
2011-03-14 22:39:12 -07:00
per.dalen@appeartv.com de7790155f hwmon: Add support for LTC4151
LTC4151 is High Voltage I2C Current and Voltage Monitor from Linear
Technology.

Signed-off-by: Per Dalen <per.dalen@appeartv.com>
Signed-off-by: Guenter Roeck <guenter.roeck@ericsson.com>
2011-03-14 22:39:11 -07:00
Guenter Roeck 9f6ad1ce64 hwmon: (pmbus) Fix LINEAR16 data format
LINEAR16 data format is unsigned, not signed. Impact is that affected
attributes report negative values in the upper half of the supported
value range.

Signed-off-by: Guenter Roeck <guenter.roeck@ericsson.com>
2011-03-14 22:39:11 -07:00
Guenter Roeck 8677011a5d hwmon: (pmbus) Continuously update temperature limit registers
PMBus only has one set of limit registers for up to three temperature sensors.
Thus, changing a limit for one of the temperature sensors affects limits for
other temperature sensors in the same page (and potentially multiple pages
depending on the chip implementation). To handle this situation, re-read all
temperature limit registers when updating sensor data. This way, all affected
temperature limits are updated whenever the limit for a single sensor is
changed.

Signed-off-by: Guenter Roeck <guenter.roeck@ericsson.com>
2011-03-14 22:39:10 -07:00
Guenter Roeck b49547a5df hwmon: (pmbus) Improve support for paged temperature sensors
Assumption so far was that PMBus devices would support TEMP2 and TEMP3 registers
only on page 0, and that only the TEMP1 register would be used/supported
on other pages.

Turns out that is not correct. UCD92xx devices support TEMP1 and TEMP2 on
page 0, and TEMP2 on other pages. So it is necessary to change the core code
such that it does not make a page based assumptions about temperature register
support.

Signed-off-by: Guenter Roeck <guenter.roeck@ericsson.com>
2011-03-14 22:39:09 -07:00
Guenter Roeck 954df6763c hwmon: (pmbus) Improve support for paged fans
So far, it seemed like fans would either all be in page 0, or that
there would be one page per fan.

Turns out this was a wrong assumption. There is at least one PMBus
fan controller which supports three pages with four fans each.
Update code to handle this situation.

Reported-by: Greg Schnorr <gschnorr@cisco.com>
Tested-by: Greg Schnorr <gschnorr@cisco.com>
Signed-off-by: Guenter Roeck <guenter.roeck@ericsson.com>
Acked-by: Greg Schnorr <gschnorr@cisco.com>
2011-03-14 22:39:09 -07:00
Guenter Roeck 83274c68a3 hwmon: (pmbus) More stringent checking of VOUT_MODE register
Some PMBus chips do not support the VOUT_MODE register. To make matters worse,
such chips may not return an error when reading the register either, but instead
return 0xff.

Check if the register exists using pmbus_check_byte_register() before reading
its value. In addition, validate the returned value and ignore it if it is 0xff
(which is invalid).

Reported-by: Greg Schnorr <gschnorr@cisco.com>
Tested-by: Greg Schnorr <gschnorr@cisco.com>
Signed-off-by: Guenter Roeck <guenter.roeck@ericsson.com>
Acked-by: Greg Schnorr <gschnorr@cisco.com>
2011-03-14 22:39:08 -07:00
Guenter Roeck a3eeb45353 hwmon: (pmbus) Add support for Maxim MAX34440/MAX34441
Signed-off-by: Guenter Roeck <guenter.roeck@ericsson.com>
Acked-by: Jonathan Cameron <jic23@cam.ac.uk>
2011-03-14 22:39:07 -07:00
Guenter Roeck dcb7d0668b hwmon: (pmbus) Add support for Maxim MAX16064
Signed-off-by: Guenter Roeck <guenter.roeck@ericsson.com>
Acked-by: Jonathan Cameron <jic23@cam.ac.uk>
2011-03-14 22:39:07 -07:00
Guenter Roeck 8ea3238ba1 hwmon: (pmbus) Add support for Maxim MAX8688
Signed-off-by: Guenter Roeck <guenter.roeck@ericsson.com>
Acked-by: Jonathan Cameron <jic23@cam.ac.uk>
2011-03-14 22:39:06 -07:00
Guenter Roeck 44f5a408ba hwmon: PMBus driver documentation
Signed-off-by: Guenter Roeck <guenter.roeck@ericsson.com>
Acked-by: Jonathan Cameron <jic23@cam.ac.uk>
2011-03-14 22:38:58 -07:00
Guenter Roeck 442aba7872 hwmon: PMBus device driver
This driver adds support for hardware monitoring features of various PMBus
devices.

Signed-off-by: Guenter Roeck <guenter.roeck@ericsson.com>
Acked-by: Jonathan Cameron <jic23@cam.ac.uk>
2011-03-14 22:36:26 -07:00
Guenter Roeck 06923f8442 hwmon: (lm85) Add support for EMC6D103S
EMC6D103S is similar to EMC6D103, only it does not support registers 62[5:7],
6D[0:7], and 6E[0:7]. Register respective sysfs attributes and update affected
registers for all other chips only.

Signed-off-by: Guenter Roeck <guenter.roeck@ericsson.com>
Acked-by: Jean Delvare <khali@linux-fr.org>
2011-03-14 22:36:25 -07:00
Guenter Roeck 4f8ab430fa hwmon: (lm85) Do not update hysteresis and temp_auto_off if auto_temp_min is changed
So far, the driver updates temp_auto_hyst and temp_auto_off if temp_auto_min changes.
This may cause problems if temp_auto_off was not configured before configuring
temp_auto_min, because one of the variables used (off_desired) is not initialized
in this case.

To simplify the code, and for consistency with other drivers, no longer update the delta
between "min" and "off" until the user sets the "off" value again.

Signed-off-by: Guenter Roeck <guenter.roeck@ericsson.com>
Acked-by: Jean Delvare <khali@linux-fr.org>
2011-03-14 22:36:25 -07:00
Guenter Roeck bc6db2b5ce hwmon: (lm85) Use function to remove sysfs attribute files
Signed-off-by: Guenter Roeck <guenter.roeck@ericsson.com>
Acked-by: Jean Delvare <khali@linux-fr.org>
2011-03-14 22:36:25 -07:00
Guenter Roeck de24880586 hwmon: (lm85) Use boolean to determine if VID5 is configured
ADT7463 and ADT7468 optionally support VID5 instead of the standard +12V
measurement input. Use a boolean to identify the chip configuration instead of
hardcoding it several times.

Signed-off-by: Guenter Roeck <guenter.roeck@ericsson.com>
Acked-by: Jean Delvare <khali@linux-fr.org>
2011-03-14 22:36:25 -07:00
Guenter Roeck 502b5a0199 hwmon: Add support for Lineage Compact Power Line PEM devices
This patch adds support for hardware monitoring of Lineage Compact Power Line
Power Entry Modules.

Reviewed-by: Tom Grennan <tom.grennan@ericsson.com>
Signed-off-by: Guenter Roeck <guenter.roeck@ericsson.com>
2011-03-14 22:36:25 -07:00
Mark Brown 4e9be65059 hwmon: (lis3lv02d) Convert SPI to dev_pm_ops
There is a move to deprecate bus-specific PM operations and move to
using dev_pm_ops instead in order to reduce the amount of boilerplate
code in buses and facilitiate updates to the PM core. Do this move for
the lis3lv02d SPI driver.

Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Guenter Roeck <guenter.roeck@ericsson.com>
2011-03-14 22:36:25 -07:00
stigge@antcom.de 177f3b920c hwmon: (max6639) Set reasonable default PWM frequency
This patch initializes register CONFIG3 to a reasonable default PWM frequency
of 25kHz, to prevent audible sound in fan.

Signed-off-by: Roland Stigge <stigge@antcom.de>
Signed-off-by: Guenter Roeck <guenter.roeck@ericsson.com>
2011-03-14 22:36:25 -07:00
stigge@antcom.de a5b79d62f2 hwmon: Driver for Maxim MAX6639
2-Channel Temperature Monitor with Dual PWM Fan-Speed Controller

Signed-off-by: Roland Stigge <stigge@antcom.de>
Signed-off-by: Guenter Roeck <guenter.roeck@ericsson.com>
2011-03-14 22:36:24 -07:00
Linus Torvalds 521cb40b0c Linux 2.6.38 2011-03-14 18:20:32 -07:00
Linus Torvalds 59766edc79 Merge branch 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/dhowells/linux-2.6-mn10300
* 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/dhowells/linux-2.6-mn10300:
  MN10300: atomic_read() should ensure it emits a load
  MN10300: The SMP_ICACHE_INV_FLUSH_RANGE IPI command does not exist
  MN10300: Proper use of macros get_user() in the case of incremented pointers
2011-03-14 15:20:39 -07:00
Linus Torvalds 2990821d0e Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/upstream-linus
* 'upstream' of git://git.linux-mips.org/pub/scm/upstream-linus: (26 commits)
  MIPS: Alchemy: Fix reset for MTX-1 and XXS1500
  MIPS: MTX-1: Make au1000_eth probe all PHY addresses
  MIPS: Jz4740: Add HAVE_CLK
  MIPS: Move idle task creation to work queue
  MIPS, Perf-events: Use unsigned delta for right shift in event update
  MIPS, Perf-events: Work with the new callchain interface
  MIPS, Perf-events: Fix event check in validate_event()
  MIPS, Perf-events: Work with the new PMU interface
  MIPS, Perf-events: Work with irq_work
  MIPS: Fix always CONFIG_LOONGSON_UART_BASE=y
  MIPS: Loongson: Fix potentially wrong string handling
  MIPS: Fix GCC-4.6 'set but not used' warning in arch/mips/mm/init.c
  MIPS: Fix GCC-4.6 'set but not used' warning in ieee754int.h
  MIPS: Remove unused code from arch/mips/kernel/syscall.c
  MIPS: Fix GCC-4.6 'set but not used' warning in signal*.c
  MIPS: MSP: Fix MSP71xx bpci interrupt handler return value
  MIPS: Select R4K timer lib for all MSP platforms
  MIPS: Loongson: Remove ad-hoc cmdline default
  MIPS: Clear the correct flag in sysmips(MIPS_FIXADE, ...).
  MIPS: Add an unreachable return statement to satisfy buggy GCCs.
  ...
2011-03-14 15:20:12 -07:00
Linus Torvalds 869c34f520 Merge branch 'x86-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip
* 'x86-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:
  x86: ce4100: Set pci ops via callback instead of module init
  x86/mm: Fix pgd_lock deadlock
  x86/mm: Handle mm_fault_error() in kernel space
  x86: Don't check for BIOS corruption in first 64K when there's no need to
2011-03-14 15:19:09 -07:00
Linus Torvalds 52d3c03675 Revert "oom: oom_kill_process: fix the child_points logic"
This reverts the parent commit.  I hate doing that, but it's generating
some discussion ("half of it is right"), and since I am planning on
doing the 2.6.38 release later today we can punt it to stable if
required. Let's not rock the boat right now.

Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2011-03-14 15:17:07 -07:00
Oleg Nesterov dc1b83ab08 oom: oom_kill_process: fix the child_points logic
oom_kill_process() starts with victim_points == 0.  This means that
(most likely) any child has more points and can be killed erroneously.

Also, "children has a different mm" doesn't match the reality, we should
check child->mm != t->mm.  This check is not exactly correct if t->mm ==
NULL but this doesn't really matter, oom_kill_task() will kill them
anyway.

Note: "Kill all processes sharing p->mm" in oom_kill_task() is wrong
too.

Signed-off-by: Oleg Nesterov <oleg@redhat.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2011-03-14 13:38:35 -07:00
Florian Fainelli 9ced975711 MIPS: Alchemy: Fix reset for MTX-1 and XXS1500
Since commit 32fd6901 (MIPS: Alchemy: get rid of common/reset.c)
Alchemy-based boards use their own reset function. For MTX-1 and XXS1500,
the reset function pokes at the BCSR.SYSTEM_RESET register, but this does
not work. According to Bruno Randolf, this was not tested when written.

Previously, the generic au1000_restart() routine called the board specific
reset function, which for MTX-1 and XXS1500 did not work, but finally made
a jump to the reset vector, which really triggers a system restart. Fix
reboot for both targets by jumping to the reset vector.

Signed-off-by: Florian Fainelli <florian@openwrt.org>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2093/
Acked-by: Bruno Randolf <br1@einfach.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-03-14 21:07:28 +01:00
Florian Fainelli bf3a1eb859 MIPS: MTX-1: Make au1000_eth probe all PHY addresses
When au1000_eth probes the MII bus for PHY address, if we do not set
au1000_eth platform data's phy_search_highest_address, the MII probing
logic will exit early and will assume a valid PHY is found at address 0.
For MTX-1, the PHY is at address 31, and without this patch, the link
detection/speed/duplex would not work correctly.

CC: stable@kernel.org
Signed-off-by: Florian Fainelli <florian@openwrt.org>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2111/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-03-14 21:07:27 +01:00
Maurus Cuelenaere ab5330eb26 MIPS: Jz4740: Add HAVE_CLK
Jz4740 supports the clock framework but doesn't have HAVE_CLK defined,
so define it!

Signed-off-by: Maurus Cuelenaere <mcuelenaere@gmail.com>
To: linux-mips@linux-mips.org
To: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/2112/
Acked-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-03-14 21:07:27 +01:00
Maksim Rayskiy 6667deb69e MIPS: Move idle task creation to work queue
To avoid forking usermode thread when creating an idle task, move fork_idle
to a work queue.

If kernel starts with maxcpus= option which does not bring all available
cpus online at boot time, idle tasks for offline cpus are not created. If
later offline cpus are hotplugged through sysfs, __cpu_up is called in
the context of the user task, and fork_idle copies its non-zero mm
pointer.  This causes BUG() in per_cpu_trap_init.

This also avoids issues with resource limits of the CPU writing to sysfs,
containers, maybe others.

Signed-off-by: Maksim Rayskiy <mrayskiy@broadcom.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2070/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-03-14 21:07:27 +01:00
Deng-Cheng Zhu ba9786f324 MIPS, Perf-events: Use unsigned delta for right shift in event update
Leverage the commit for ARM by Will Deacon:

- 446a5a8b1e
    ARM: 6205/1: perf: ensure counter delta is treated as unsigned

    Hardware performance counters on ARM are 32-bits wide but atomic64_t
    variables are used to represent counter data in the hw_perf_event structure.

    The armpmu_event_update function right-shifts a signed 64-bit delta variable
    and adds the result to the event count. This can lead to shifting in sign-bits
    if the MSB of the 32-bit counter value is set. This results in perf output
    such as:

     Performance counter stats for 'sleep 20':

     18446744073460670464  cycles             <-- 0xFFFFFFFFF12A6000
            7783773  instructions             #      0.000 IPC
                465  context-switches
                161  page-faults
            1172393  branches

       20.154242147  seconds time elapsed

    This patch ensures that the delta value is treated as unsigned so that the
    right shift sets the upper bits to zero.

Acked-by: Will Deacon <will.deacon@arm.com>
Acked-by: David Daney <ddaney@caviumnetworks.com>
Signed-off-by: Deng-Cheng Zhu <dengcheng.zhu@gmail.com>
To: a.p.zijlstra@chello.nl
To: fweisbec@gmail.com
To: will.deacon@arm.com
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Cc: wuzhangjin@gmail.com
Cc: paulus@samba.org
Cc: mingo@elte.hu
Cc: acme@redhat.com
Cc: matt@console-pimps.org
Cc: sshtylyov@mvista.com
Patchwork: http://patchwork.linux-mips.org/patch/2015/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-03-14 21:07:27 +01:00
Deng-Cheng Zhu 98f92f2f9e MIPS, Perf-events: Work with the new callchain interface
This is the MIPS part of the following commits by Frederic Weisbecker:

- f72c1a931e
    perf: Factorize callchain context handling

    Store the kernel and user contexts from the generic layer instead
    of archs, this gathers some repetitive code.

- 56962b4449
    perf: Generalize some arch callchain code

    - Most archs use one callchain buffer per cpu, except x86 that needs
      to deal with NMIs. Provide a default perf_callchain_buffer()
      implementation that x86 overrides.

    - Centralize all the kernel/user regs handling and invoke new arch
      handlers from there: perf_callchain_user() / perf_callchain_kernel()
      That avoid all the user_mode(), current->mm checks and so...

    - Invert some parameters in perf_callchain_*() helpers: entry to the
      left, regs to the right, following the traditional (dst, src).

- 70791ce9ba
    perf: Generalize callchain_store()

    callchain_store() is the same on every archs, inline it in
    perf_event.h and rename it to perf_callchain_store() to avoid
    any collision.

    This removes repetitive code.

- c1a65932fd
    perf: Drop unappropriate tests on arch callchains

    Drop the TASK_RUNNING test on user tasks for callchains as
    this check doesn't seem to make any sense.

    Also remove the tests for !current that is not supposed to
    happen and current->pid as this should be handled at the
    generic level, with exclude_idle attribute.

Reported-by: Wu Zhangjin <wuzhangjin@gmail.com>
Acked-by: Frederic Weisbecker <fweisbec@gmail.com>
Acked-by: David Daney <ddaney@caviumnetworks.com>
Signed-off-by: Deng-Cheng Zhu <dengcheng.zhu@gmail.com>
To: a.p.zijlstra@chello.nl
To: will.deacon@arm.com
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Cc: paulus@samba.org
Cc: mingo@elte.hu
Cc: acme@redhat.com
Cc: dengcheng.zhu@gmail.com
Cc: matt@console-pimps.org
Cc: sshtylyov@mvista.com
Patchwork: http://patchwork.linux-mips.org/patch/2014/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-03-14 21:07:27 +01:00
Deng-Cheng Zhu c049b6a5f2 MIPS, Perf-events: Fix event check in validate_event()
Ignore events that are in off/error state or belong to a different PMU.

This patch originates from the following commit for ARM by Will Deacon:

- 65b4711ff5
    ARM: 6352/1: perf: fix event validation

    The validate_event function in the ARM perf events backend has the
    following problems:

    1.) Events that are disabled count towards the cost.
    2.) Events associated with other PMUs [for example, software events or
        breakpoints] do not count towards the cost, but do fail validation,
        causing the group to fail.

    This patch changes validate_event so that it ignores events in the
    PERF_EVENT_STATE_OFF state or that are scheduled for other PMUs.

Acked-by: Will Deacon <will.deacon@arm.com>
Acked-by: David Daney <ddaney@caviumnetworks.com>
Signed-off-by: Deng-Cheng Zhu <dengcheng.zhu@gmail.com>
To: a.p.zijlstra@chello.nl
To: fweisbec@gmail.com
To: will.deacon@arm.com
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Cc: wuzhangjin@gmail.com
Cc: paulus@samba.org
Cc: mingo@elte.hu
Cc: acme@redhat.com
Cc: dengcheng.zhu@gmail.com
Cc: matt@console-pimps.org
Cc: sshtylyov@mvista.com
Cc: ddaney@caviumnetworks.com
Patchwork: http://patchwork.linux-mips.org/patch/2013/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-03-14 21:07:27 +01:00
Deng-Cheng Zhu 404ff63840 MIPS, Perf-events: Work with the new PMU interface
This is the MIPS part of the following commits by Peter Zijlstra:

- a4eaf7f146
    perf: Rework the PMU methods

    Replace pmu::{enable,disable,start,stop,unthrottle} with
    pmu::{add,del,start,stop}, all of which take a flags argument.

    The new interface extends the capability to stop a counter while
    keeping it scheduled on the PMU. We replace the throttled state with
    the generic stopped state.

    This also allows us to efficiently stop/start counters over certain
    code paths (like IRQ handlers).

    It also allows scheduling a counter without it starting, allowing for
    a generic frozen state (useful for rotating stopped counters).

    The stopped state is implemented in two different ways, depending on
    how the architecture implemented the throttled state:

     1) We disable the counter:
        a) the pmu has per-counter enable bits, we flip that
        b) we program a NOP event, preserving the counter state

     2) We store the counter state and ignore all read/overflow events

For MIPSXX, the stopped state is implemented in the way of 1.b as above.

- 33696fc0d1
    perf: Per PMU disable

    Changes perf_disable() into perf_pmu_disable().

- 24cd7f54a0
    perf: Reduce perf_disable() usage

    Since the current perf_disable() usage is only an optimization,
    remove it for now. This eases the removal of the __weak
    hw_perf_enable() interface.

- b0a873ebbf
    perf: Register PMU implementations

    Simple registration interface for struct pmu, this provides the
    infrastructure for removing all the weak functions.

- 51b0fe3954
    perf: Deconstify struct pmu

    sed -ie 's/const struct pmu\>/struct pmu/g' `git grep -l "const struct pmu\>"`

Reported-by: Wu Zhangjin <wuzhangjin@gmail.com>
Acked-by: David Daney <ddaney@caviumnetworks.com>
Signed-off-by: Deng-Cheng Zhu <dengcheng.zhu@gmail.com>
To: a.p.zijlstra@chello.nl
To: fweisbec@gmail.com
To: will.deacon@arm.com
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Cc: wuzhangjin@gmail.com
Cc: paulus@samba.org
Cc: mingo@elte.hu
Cc: acme@redhat.com
Cc: dengcheng.zhu@gmail.com
Cc: matt@console-pimps.org
Cc: sshtylyov@mvista.com
Cc: ddaney@caviumnetworks.com
Patchwork: http://patchwork.linux-mips.org/patch/2012/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-03-14 21:07:26 +01:00
Deng-Cheng Zhu 91f017372a MIPS, Perf-events: Work with irq_work
This is the MIPS part of the following commit by Peter Zijlstra:

- e360adbe29
    irq_work: Add generic hardirq context callbacks

    Provide a mechanism that allows running code in IRQ context. It is
    most useful for NMI code that needs to interact with the rest of the
    system -- like wakeup a task to drain buffers.

    Perf currently has such a mechanism, so extract that and provide it as
    a generic feature, independent of perf so that others may also
    benefit.

    The IRQ context callback is generated through self-IPIs where
    possible, or on architectures like powerpc the decrementer (the
    built-in timer facility) is set to generate an interrupt immediately.

    Architectures that don't have anything like this get to do with a
    callback from the timer tick. These architectures can call
    irq_work_run() at the tail of any IRQ handlers that might enqueue such
    work (like the perf IRQ handler) to avoid undue latencies in
    processing the work.

For MIPSXX, we need to call irq_work_run() at the tail of the perf IRQ
handler as described above.

Reported-by: Wu Zhangjin <wuzhangjin@gmail.com>
Acked-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Acked-by: David Daney <ddaney@caviumnetworks.com>
Signed-off-by: Deng-Cheng Zhu <dengcheng.zhu@gmail.com>
To: fweisbec@gmail.com
To: will.deacon@arm.com
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Cc: paulus@samba.org
Cc: mingo@elte.hu
Cc: acme@redhat.com
Cc: matt@console-pimps.org
Cc: sshtylyov@mvista.com,
Patchwork: http://patchwork.linux-mips.org/patch/2011/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-03-14 21:07:26 +01:00
Yoichi Yuasa efe8dc556c MIPS: Fix always CONFIG_LOONGSON_UART_BASE=y
Signed-off-by: Yoichi Yuasa <yuasa@linux-mips.org>
Cc: linux-mips <linux-mips@linux-mips.org>
Patchwork: https://patchwork.linux-mips.org/patch/2055/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-03-14 21:07:26 +01:00
Stefan Weil 994fed2dd2 MIPS: Loongson: Fix potentially wrong string handling
This error was reported by cppcheck:
arch/mips/loongson/common/machtype.c:56: error: Dangerous usage of 'str' (strncpy doesn't always 0-terminate it)

If strncpy copied MACHTYPE_LEN bytes, the destination string str
was not terminated.

The patch adds one more byte to str and makes sure that this byte is
always 0.

Signed-off-by: Stefan Weil <weil@mail.berlios.de>
Cc: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: Arnaud Patard <apatard@mandriva.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/2053/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-03-14 21:07:26 +01:00
David Daney d3ce0e98b7 MIPS: Fix GCC-4.6 'set but not used' warning in arch/mips/mm/init.c
Under some combinations of CONFIG_*, lastpfn in page_is_ram is 'set
but not used'.  Mark it as __maybe_unused to quiet the warning/error.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2033/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-03-14 21:07:26 +01:00
David Daney 91b51f3008 MIPS: Fix GCC-4.6 'set but not used' warning in ieee754int.h
GCC-4.6 can find more unused code than previous versions could.

In the case of arch/mips/math-emu/ieee754int.h, the COMPXSP and
COMPXDP macros are used in several places, but a couple of them leave
xs unused.  The easiest thing to do is mark it as __maybe_unused to
quiet the warning.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2032/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-03-14 21:07:26 +01:00
David Daney 7a6e4ca1ee MIPS: Remove unused code from arch/mips/kernel/syscall.c
The variable arg3 in _sys_sysmips() is unused.  Remove it.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2034/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-03-14 21:07:26 +01:00