- remove all uses of btfixup header
- remove the btfixup header
- remove the btfixup code
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
Use sparc_config to hold the last two function pointers. There was no
point generating dedicated _ops structures only for these.
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
I ended up renaming set_cpu_int to send_ipi to
be consistent all way around.
send_ipi was moved to the *_smp.c files so
we could call the relevant method direct,
without any _ops indirection.
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
This is the last non-trivial user of btfixup.
Like sparc64, use a special patch section to resolve the various
implementations of how to read the current CPU's ID when we don't
have current_thread_info()->cpu necessarily available.
Signed-off-by: David S. Miller <davem@davemloft.net>
Tested-by: Sam Ravnborg <sam@ravnborg.org>
This eliminated most of the remaining users of btfixup.
There are some complications because of the special cases we
have for sun4d, leon, and some flavors of viking.
It was found that there are no cases where a flush_page_for_dma
method was not hooked up to something, so the "noflush" iommu
methods were removed.
Add some documentation to the viking_sun4d_smp_ops to describe exactly
the hardware bug which causes us to need special TLB flushing on
sun4d.
Signed-off-by: David S. Miller <davem@davemloft.net>
This set of changes displays one major danger of btfixup, interface
signatures are not always type checked fully. As seen here the iounit
variant of the map_dma_area routine had an incorrect type for one of
it's arguments.
It turns out to be harmless in this case, but just imagine trying to
debug something involving this kind of problem. No thanks.
Signed-off-by: David S. Miller <davem@davemloft.net>
These were used on sun4c during floppy data transfers since on that
chip we had to lock the cpu mappings into the TLB because we cannot
take a TLB miss during the assembler floppy interrupt handler that
does the data transfer.
That is no longer necessary since we've removed sun4c support, thus
this stuff can disappear completely.
Signed-off-by: David S. Miller <davem@davemloft.net>
The magic Swift SRMMU code in question has not been enabled for
something on the order of a decade, and it as well as it's comment
is there in the history in case we ever need it again.
Therefore all implementations are NOPs and we can kill this stuff
off.
Signed-off-by: David S. Miller <davem@davemloft.net>
We always have this instruction available, so no need to use
btfixup for it any more.
This also eradicates the whole of atomic_32.S and thus the
__atomic_begin and __atomic_end symbols completely.
Signed-off-by: David S. Miller <davem@davemloft.net>
And we can certainly get rid of the const function attributes, there
is no way that's needed any longer and no other arch uses this kind
of annotation here.
Signed-off-by: David S. Miller <davem@davemloft.net>
It is commented out using #ifdef 0 / #endif,
and has been so for a long time.
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
That lets us also get rid of the run-time initialization of
protection_map[] and all the ugly module workarounds for
PAGE_KERNEL and PAGE_SHARED to deal with the fact that we
can't do btfixups for modular code.
Signed-off-by: David S. Miller <davem@davemloft.net>
Also we can remove BTFIXUPCALL_SWAPO0G0 as that is no longer
used.
This was rather amusing, we were setting the btfixup vectors
based upon cpu type but all to the same exact generic srmmu
routines.
Furthermore, we were inconsistently marking the fixup as
either BTFIXUPCALL_SWAPO0G0 or BTFIXUPCALL_NORM.
What a mess, glad we could untangle this stuff.
Signed-off-by: David S. Miller <davem@davemloft.net>
It is a noop for srmmu - so use a define as sparc64 does.
And drop all sparc callers - no need to confuse our-self
be calling a noop function.
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
This revealed that the implementation of switch_mm
had a bogus extra argument.
No harm as said argument was never used - but confusing.
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
Small cleanup to improve readability.
Dropped one test for sparc_cpu_model -
we already know that only sun4m support floppy.
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
Fix following warning:
arch/sparc/include/asm/floppy_32.h:342:5: warning: 'op' may be used uninitialized in this function
The warning are legitimite and we can end up using op uninitialized.
This fixes build with my gcc on UP.
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
We know this is not a sun4/sun4c - as we checked earlier.
So no need to repeat the check.
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
It was present only to support the sun4, sun4c boxes which
do not have the "compatible" property in the root-node
of the device tree.
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
We already sorted out if we are a sun4/sun4c and halted.
So no need to check the prom version as we know this is
a v2 or v3 as sun4m, sun4d etc. does not use a v1 prom.
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
I left some around, like the ones in the openprom headers, since
we need to think about which pieces of those datastructures and
code we can completely toss now.
Signed-off-by: David S. Miller <davem@davemloft.net>
All the remaining references are trivially removed since we've
just eliminated the final reference to sparc_cpu_model from
assembler code in commit b7d96ce189
("sparc32: Remove sparc_cpu_model read from floppy interrupt handler.")
Signed-off-by: David S. Miller <davem@davemloft.net>
Since we no longer test the cpu model value, no need to load
it into a register any more.
It just gets overwritten in the next instruction anyways. :-)
Signed-off-by: David S. Miller <davem@davemloft.net>
The non-SMP sun4m NMI handler was still accessing SUN4C registers.
Fix that and share the sun4m NMI trap code between SMP and non-SMP
cases.
Signed-off-by: David S. Miller <davem@davemloft.net>
Sam Ravnborg
David S. Miller