Commit Graph

930 Commits

Author SHA1 Message Date
Linus Torvalds 0efacbbaee ARC updates for 4.7-rc1
- Support for EZChip (now Mellanox) NPS-400 Network processor based on ARC700
     http://www.mellanox.com/related-docs/prod_npu/PB_NPS-400.pdf
 - NPS interrupt controller and clocksource drivers
 - ARC timers probed off DT
 - ARC iqrchips switching to linear domain (upgrade from legacy domains)
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJXPVjYAAoJEGnX8d3iisJeMJQP/2fBHUqCVjxYMaU0XSy/rFiu
 XItBxYfDHw+pXILgwZ1XPy0CNUxNhGmIG+0Scy+Uw9bDa64Eulked6QVsLlosOky
 2rbmDAZf2/fnwFhASg9eY2Xm5B2jFvStzmTkOgAkGko5cCwF7WWZJhLiziSICvK/
 l7I5yr0SSpn9xGbazeIxyqw16e4QuY+uCKXF12AoGOi+efpe1L7vrbu9WKELWQfJ
 NreZjxC16je944POnE4hw4F11Tg+uvhgQAAlmFCUswIZwtnTjttrmMyflop86H3S
 cItT1UV/ps24lD2ZZVIlI6Gdc/iKB0FSq7XTpTOAVI/ku5x2tWGmRb8aM5pxmCkX
 r44dXW89P9JFhthWKS79FwXgwxIMMN3CniO+g4YnrpI23iu6O+kXGoQejwsE1NZ0
 99+gXcUvEL1E5GZ7JfAdIvU741Y+y06fgXBs8Z+BGKzUNN5bI3PtuPeVNQwC38J7
 lY8UegRW/elmiNiOilz+QZ5sGX/QVnN68UQNkBYHZRom/3vpzcMMZpTu5xgw5XqQ
 CnCd0lD0tWICyiq6BXeNACBgQ6RX+KY9EECpVt05CTw5IxZQyGMAJwNqIuLw3Id3
 j42IiJ3PHH1yS+TeWOYf2mEvXj8vyiQK6fssy6xZ0bPqRKaEqwAKeDEW2St9N9B4
 0PhS1VwvL5RXsZx79/6e
 =pnAx
 -----END PGP SIGNATURE-----

Merge tag 'arc-4.7-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc

Pull ARC updates from Vineet Gupta:
 "We have a relatively big changeset for ARC for 4.7.

  The highlight is support for EZChip (now Mellanox) NPS-400 network
  processor, a 400-Gb throughput C-programmable packet processor based
  on ARC700 cores from Synopsys. See

        http://www.mellanox.com/related-docs/prod_npu/PB_NPS-400.pdf

  Also present are irqchip and clocksource drivers for NPS as agreed
  with respective maintainers to go via ARC tree due to an soc header
  dependency.  I have the needed ACKs from Jason, Marc, Daniel.  You
  might run into a trivial merge conflict in drivers/irqchip/*

  This EZChip platform support required some deep changes in ARC
  architecture code and also opportunity to cleanup past sins (legacy
  irq domains, missing irq domain lookup, hard coded timer irqs...)

  Summary:

   - Support for EZChip (now Mellanox) NPS-400 Network processor based
     on ARC700

   - NPS interrupt controller and clocksource drivers

   - ARC timers probed off DT

   - ARC iqrchips switching to linear domain (upgrade from legacy
     domains)"

* tag 'arc-4.7-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc: (37 commits)
  arc: axs103_smp: Fix CPU frequency to 100MHz for dual-core
  arc: axs10x: Add DT bindings for I2S PLL Clock
  ARC: pae: STRICT_MM_TYPECHECKS was broken
  ARC: Add eznps platform to Kconfig and Makefile
  ARC: [plat-eznps] Use dedicated COMMAND_LINE_SIZE
  ARC: [plat-eznps] Use dedicated cpu_relax()
  ARC: [plat-eznps] Use dedicated identity auxiliary register.
  ARC: [plat-eznps] Use dedicated SMP barriers
  ARC: [plat-eznps] Use dedicated atomic/bitops/cmpxchg
  ARC: [plat-eznps] Use dedicated user stack top
  ARC: [plat-eznps] Add eznps platform
  ARC: [plat-eznps] Add eznps board defconfig and dts
  ARC: Mark secondary cpu online only after all HW setup is done
  ARC: rwlock: disable interrupts in !LLSC variant
  ARC: Make vmalloc size configurable
  ARC: clean out UAPI byteorder.h clean off Kconfig symbol
  irqchip: add nps Internal and external irqchips
  clocksource: Add NPS400 timers driver
  soc: Support for EZchip SoC
  Documentation: Add EZchip vendor to binding list
  ...
2016-05-19 09:46:18 -07:00
Linus Torvalds 91e8d0cbc9 Merge branch 'timers-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull timer updates from Thomas Gleixner:
 "A rather small set of patches from the timer departement:

   - Some more y2038 work
   - Yet another new clocksource driver
   - The usual set of small fixes, cleanups and enhancements"

* 'timers-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  clocksource/drivers/tegra: Remove unused suspend/resume code
  clockevents/driversi/mps2: add MPS2 Timer driver
  dt-bindings: document the MPS2 timer bindings
  clocksource/drivers/mtk_timer: Add __init attribute
  clockevents/drivers/dw_apb_timer: Implement ->set_state_oneshot_stopped()
  time: Introduce do_sys_settimeofday64()
  security: Introduce security_settime64()
  clocksource: Add missing include of of.h.
2016-05-17 09:49:28 -07:00
Noam Camus a53224577e clocksource: Add NPS400 timers driver
Add internal tick generator which is shared by all cores.
Each cluster of cores view it through dedicated address.
This is used for SMP system where all CPUs synced by same
clock source.

Signed-off-by: Noam Camus <noamc@ezchip.com>
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: John Stultz <john.stultz@linaro.org>
Acked-by: Vineet Gupta <vgupta@synopsys.com>
Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2016-05-09 09:32:31 +05:30
Thierry Reding 9999c5fc01 clocksource/drivers/tegra: Remove unused suspend/resume code
The tegra_timer_suspend() and tegra_timer_resume() functions are never
used, so they can be removed.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2016-04-28 15:09:08 +02:00
Vladimir Murzin 0302637f18 clockevents/driversi/mps2: add MPS2 Timer driver
MPS2 platform has simple 32 bits general purpose countdown timers.

The driver uses the first detected timer as a clocksource and the rest
of the timers as a clockevent

Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2016-04-28 15:09:06 +02:00
Julia Lawall d98eddf849 clocksource/drivers/mtk_timer: Add __init attribute
Add __init attribute on a function that is only called from other __init
functions and that is not inlined, at least with gcc version 4.8.4 on an
x86 machine with allyesconfig.  Currently, the function is put in the
.text.unlikely segment.  Declaring it as __init will cause it to be put in
the .init.text and to disappear after initialization.

The result of objdump -x on the function before the change is as follows:

0000000000000000 l     F .text.unlikely 000000000000006f mtk_timer_setup.isra.4

And after the change it is as follows:

0000000000000000 l     F .init.text	000000000000006a mtk_timer_setup.isra.4

Done with the help of Coccinelle.  The semantic patch checks for local
static non-init functions that are called from an __init function and are
not called from any other function.

Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: Matthias Brugger <matthias.bgg@gmail.com>
2016-04-28 15:09:04 +02:00
Jisheng Zhang 457353260d clockevents/drivers/dw_apb_timer: Implement ->set_state_oneshot_stopped()
The dw_apb_timer only "supports PERIODIC mode and their drivers emulate
ONESHOT over that" as described in commit 8fff52fd50 ("clockevents:
Introduce CLOCK_EVT_STATE_ONESHOT_STOPPED state").

Inspired by Viresh, I think the dw_apb_timer also needs to implement
the set_state_oneshot_stopped() which is called by the clkevt core,
when the next event is required at an expiry time of 'KTIME_MAX'. This
normally happens with NO_HZ_{IDLE|FULL} in both LOWRES/HIGHRES modes.

This patch makes the clockevent device to stop on such an event, to
avoid spurious interrupts, as explained by the above commit.

Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by: Viresh Kumar <viresh.kumar@linaro.org>
2016-04-28 15:09:03 +02:00
Linus Torvalds 82b23cb94b Merge branches 'perf-urgent-for-linus', 'smp-urgent-for-linus' and 'timers-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull perf, cpu hotplug and timer fixes from Ingo Molnar:
 "perf:
   - A single tooling fix for a user-triggerable segfault.

  CPU hotplug:
   - Fix a CPU hotplug corner case regression, introduced by the recent
     hotplug rework

  timers:
   - Fix a boot hang in the ARM based Tango SoC clocksource driver"

* 'perf-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  perf intel-pt: Fix segfault tracing transactions

* 'smp-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  cpu/hotplug: Fix rollback during error-out in __cpu_disable()

* 'timers-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  clocksource/drivers/tango-xtal: Fix boot hang due to incorrect test
2016-04-23 11:45:52 -07:00
Daniel Lezcano 16eeed7e55 clocksource/drivers/tango-xtal: Fix boot hang due to incorrect test
Commit 0881841f7e introduced a regression by inverting a test check
after calling clocksource_mmio_init(). That results on the system to
hang at boot time.

Fix it by inverting the test again.

Fixes: 0881841f7e ("Replace code by clocksource_mmio_init")
Reported-by: Marc Gonzalez <marc_gonzalez@sigmadesigns.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2016-04-22 09:22:37 +02:00
Linus Torvalds 44d1b6dd3a Merge branch 'timers-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull timer fix from Thomas Gleixner:
 "A single fix to the pistachio clocksource driver using the proper
  signedness in the error print format"

* 'timers-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  clocksource/drivers/pistachio: Correct output format of PTR_ERR()
2016-03-24 10:32:42 -07:00
Vladimir Zapolskiy b7c8b4aac6 clocksource/drivers/pistachio: Correct output format of PTR_ERR()
Use signed integer output in the pr_err() string format, here PTR_ERR() value
is negative and it should be reported in human readable way.

Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Cc: Jisheng Zhang <jszhang@marvell.com>
Cc: Ezequiel Garcia <ezequiel.garcia@imgtec.com>
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Link: http://lkml.kernel.org/r/1458603727-4446-1-git-send-email-vz@mleia.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2016-03-23 12:30:40 +01:00
Linus Torvalds 10dc374766 One of the largest releases for KVM... Hardly any generic improvement,
but lots of architecture-specific changes.
 
 * ARM:
 - VHE support so that we can run the kernel at EL2 on ARMv8.1 systems
 - PMU support for guests
 - 32bit world switch rewritten in C
 - various optimizations to the vgic save/restore code.
 
 * PPC:
 - enabled KVM-VFIO integration ("VFIO device")
 - optimizations to speed up IPIs between vcpus
 - in-kernel handling of IOMMU hypercalls
 - support for dynamic DMA windows (DDW).
 
 * s390:
 - provide the floating point registers via sync regs;
 - separated instruction vs. data accesses
 - dirty log improvements for huge guests
 - bugfixes and documentation improvements.
 
 * x86:
 - Hyper-V VMBus hypercall userspace exit
 - alternative implementation of lowest-priority interrupts using vector
 hashing (for better VT-d posted interrupt support)
 - fixed guest debugging with nested virtualizations
 - improved interrupt tracking in the in-kernel IOAPIC
 - generic infrastructure for tracking writes to guest memory---currently
 its only use is to speedup the legacy shadow paging (pre-EPT) case, but
 in the future it will be used for virtual GPUs as well
 - much cleanup (LAPIC, kvmclock, MMU, PIT), including ubsan fixes.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v2.0.22 (GNU/Linux)
 
 iQEcBAABAgAGBQJW5r3BAAoJEL/70l94x66D2pMH/jTSWWwdTUJMctrDjPVzKzG0
 yOzHW5vSLFoFlwEOY2VpslnXzn5TUVmCAfrdmFNmQcSw6hGb3K/xA/ZX/KLwWhyb
 oZpr123ycahga+3q/ht/dFUBCCyWeIVMdsLSFwpobEBzPL0pMgc9joLgdUC6UpWX
 tmN0LoCAeS7spC4TTiTTpw3gZ/L+aB0B6CXhOMjldb9q/2CsgaGyoVvKA199nk9o
 Ngu7ImDt7l/x1VJX4/6E/17VHuwqAdUrrnbqerB/2oJ5ixsZsHMGzxQ3sHCmvyJx
 WG5L00ubB1oAJAs9fBg58Y/MdiWX99XqFhdEfxq4foZEiQuCyxygVvq3JwZTxII=
 =OUZZ
 -----END PGP SIGNATURE-----

Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm

Pull KVM updates from Paolo Bonzini:
 "One of the largest releases for KVM...  Hardly any generic
  changes, but lots of architecture-specific updates.

  ARM:
   - VHE support so that we can run the kernel at EL2 on ARMv8.1 systems
   - PMU support for guests
   - 32bit world switch rewritten in C
   - various optimizations to the vgic save/restore code.

  PPC:
   - enabled KVM-VFIO integration ("VFIO device")
   - optimizations to speed up IPIs between vcpus
   - in-kernel handling of IOMMU hypercalls
   - support for dynamic DMA windows (DDW).

  s390:
   - provide the floating point registers via sync regs;
   - separated instruction vs.  data accesses
   - dirty log improvements for huge guests
   - bugfixes and documentation improvements.

  x86:
   - Hyper-V VMBus hypercall userspace exit
   - alternative implementation of lowest-priority interrupts using
     vector hashing (for better VT-d posted interrupt support)
   - fixed guest debugging with nested virtualizations
   - improved interrupt tracking in the in-kernel IOAPIC
   - generic infrastructure for tracking writes to guest
     memory - currently its only use is to speedup the legacy shadow
     paging (pre-EPT) case, but in the future it will be used for
     virtual GPUs as well
   - much cleanup (LAPIC, kvmclock, MMU, PIT), including ubsan fixes"

* tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm: (217 commits)
  KVM: x86: remove eager_fpu field of struct kvm_vcpu_arch
  KVM: x86: disable MPX if host did not enable MPX XSAVE features
  arm64: KVM: vgic-v3: Only wipe LRs on vcpu exit
  arm64: KVM: vgic-v3: Reset LRs at boot time
  arm64: KVM: vgic-v3: Do not save an LR known to be empty
  arm64: KVM: vgic-v3: Save maintenance interrupt state only if required
  arm64: KVM: vgic-v3: Avoid accessing ICH registers
  KVM: arm/arm64: vgic-v2: Make GICD_SGIR quicker to hit
  KVM: arm/arm64: vgic-v2: Only wipe LRs on vcpu exit
  KVM: arm/arm64: vgic-v2: Reset LRs at boot time
  KVM: arm/arm64: vgic-v2: Do not save an LR known to be empty
  KVM: arm/arm64: vgic-v2: Move GICH_ELRSR saving to its own function
  KVM: arm/arm64: vgic-v2: Save maintenance interrupt state only if required
  KVM: arm/arm64: vgic-v2: Avoid accessing GICH registers
  KVM: s390: allocate only one DMA page per VM
  KVM: s390: enable STFLE interpretation only if enabled for the guest
  KVM: s390: wake up when the VCPU cpu timer expires
  KVM: s390: step the VCPU timer while in enabled wait
  KVM: s390: protect VCPU cpu timer with a seqcount
  KVM: s390: step VCPU cpu timer during kvm_run ioctl
  ...
2016-03-16 09:55:35 -07:00
Linus Torvalds 8a284c062e Merge branch 'timers-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull timer updates from Thomas Gleixner:
 "The timer department delivers this time:

   - Support for cross clock domain timestamps in the core code plus a
     first user.  That allows more precise timestamping for PTP and
     later for audio and other peripherals.

     The ptp/e1000e patches have been acked by the relevant maintainers
     and are carried in the timer tree to avoid merge ordering issues.

   - Support for unregistering the current clocksource watchdog.  That
     lifts a limitation for switching clocksources which has been there
     from day 1

   - The usual pile of fixes and updates to the core and the drivers.
     Nothing outstanding and exciting"

* 'timers-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (26 commits)
  time/timekeeping: Work around false positive GCC warning
  e1000e: Adds hardware supported cross timestamp on e1000e nic
  ptp: Add PTP_SYS_OFFSET_PRECISE for driver crosstimestamping
  x86/tsc: Always Running Timer (ART) correlated clocksource
  hrtimer: Revert CLOCK_MONOTONIC_RAW support
  time: Add history to cross timestamp interface supporting slower devices
  time: Add driver cross timestamp interface for higher precision time synchronization
  time: Remove duplicated code in ktime_get_raw_and_real()
  time: Add timekeeping snapshot code capturing system time and counter
  time: Add cycles to nanoseconds translation
  jiffies: Use CLOCKSOURCE_MASK instead of constant
  clocksource: Introduce clocksource_freq2mult()
  clockevents/drivers/exynos_mct: Implement ->set_state_oneshot_stopped()
  clockevents/drivers/arm_global_timer: Implement ->set_state_oneshot_stopped()
  clockevents/drivers/arm_arch_timer: Implement ->set_state_oneshot_stopped()
  clocksource/drivers/arm_global_timer: Register delay timer
  clocksource/drivers/lpc32xx: Support timer-based ARM delay
  clocksource/drivers/lpc32xx: Support periodic mode
  clocksource/drivers/lpc32xx: Don't use the prescaler counter for clockevents
  clocksource/drivers/rockchip: Add err handle for rk_timer_init
  ...
2016-03-15 12:13:56 -07:00
Marc Zyngier f81f03fa23 arm64: Allow the arch timer to use the HYP timer
With the ARMv8.1 VHE, the kernel can run in HYP mode, and thus
use the HYP timer instead of the normal guest timer in a mostly
transparent way, except for the interrupt line.

This patch reworks the arch timer code to allow the selection of
the HYP PPI, possibly falling back to the guest timer if not
available.

Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2016-02-29 18:34:16 +00:00
Viresh Kumar 07f101d33d clockevents/drivers/exynos_mct: Implement ->set_state_oneshot_stopped()
set_state_oneshot_stopped() is called by the clkevt core, when the next
event is required at an expiry time of 'KTIME_MAX'. This normally
happens with NO_HZ_{IDLE|FULL} in both LOWRES/HIGHRES modes.

This patch makes the clockevent device to stop on such an event, to
avoid spurious interrupts, as explained by: commit 8fff52fd50
("clockevents: Introduce CLOCK_EVT_STATE_ONESHOT_STOPPED state").

Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2016-02-25 14:34:08 +01:00
Viresh Kumar 3effa3ceea clockevents/drivers/arm_global_timer: Implement ->set_state_oneshot_stopped()
set_state_oneshot_stopped() is called by the clkevt core, when the next
event is required at an expiry time of 'KTIME_MAX'. This normally
happens with NO_HZ_{IDLE|FULL} in both LOWRES/HIGHRES modes.

This patch makes the clockevent device to stop on such an event, to
avoid spurious interrupts, as explained by: commit 8fff52fd50
("clockevents: Introduce CLOCK_EVT_STATE_ONESHOT_STOPPED state").

Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2016-02-25 14:34:06 +01:00
Viresh Kumar cf8c5009ee clockevents/drivers/arm_arch_timer: Implement ->set_state_oneshot_stopped()
set_state_oneshot_stopped() is called by the clkevt core, when the next
event is required at an expiry time of 'KTIME_MAX'. This normally
happens with NO_HZ_{IDLE|FULL} in both LOWRES/HIGHRES modes.

This patch makes the clockevent device to stop on such an event, to
avoid spurious interrupts, as explained by: commit 8fff52fd50
("clockevents: Introduce CLOCK_EVT_STATE_ONESHOT_STOPPED state").

Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2016-02-25 14:34:05 +01:00
Rabin Vincent bbaa067027 clocksource/drivers/arm_global_timer: Register delay timer
Provide a delay timer using the lower 32-bits of the global timer so
that we can use that instead of having to calibrating delays.

Signed-off-by: Rabin Vincent <rabin.vincent@axis.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2016-02-25 14:34:04 +01:00
Ezequiel Garcia 1b18fd2023 clocksource/drivers/lpc32xx: Support timer-based ARM delay
This commit implements the ARM timer-based delay timer for the
LPC32xx, LPC18xx, LPC43xx family of SoCs.

Also, add a dependency to restrict compiling this driver for
the ARM architecture.

Signed-off-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by: Joachim Eastwood <manabian@gmail.com>
Tested-by: Joachim Eastwood <manabian@gmail.com>
2016-02-25 14:33:58 +01:00
Ezequiel Garcia 32f32d982f clocksource/drivers/lpc32xx: Support periodic mode
This commit adds the support for periodic mode. This is done by not
setting the MR0S (Stop on TnMR0) bit on MCR, thus allowing
interrupts to be periodically generated on MR0 matches.

In order to do this, move the initial configuration that is specific to
the one-shot mode to set_state_oneshot().

Signed-off-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by: Joachim Eastwood <manabian@gmail.com>
Tested-by: Joachim Eastwood <manabian@gmail.com>
2016-02-25 14:30:20 +01:00
Ezequiel Garcia 751db1a6ea clocksource/drivers/lpc32xx: Don't use the prescaler counter for clockevents
This commit switches the clockevents one-shot current implementation
to avoid using the prescaler counter. The clockevents timer currently
uses MR0=1, PR=ticks; and after this commit is uses MR0=ticks, PR=0.

While using the prescaler with PR=1 works fine in one-shot mode,
it seems it doesn't work as expected in periodic mode.

By using the only match channel register (MR0) for the timer we make
the periodic mode introduction easier, and consistent with one-shot mode.

Signed-off-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by: Joachim Eastwood <manabian@gmail.com>
Tested-by: Joachim Eastwood <manabian@gmail.com>
2016-02-25 14:30:19 +01:00
Shawn Lin 522ed95c26 clocksource/drivers/rockchip: Add err handle for rk_timer_init
Currently rockchip_timer doesn't do some basic cleanup work when
failing to init the timer. Let's add err handle routine to deal
with all the err cases.

Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2016-02-25 14:30:17 +01:00
Robin Murphy e392d603f6 clocksource/drivers/arm_arch_timer: Enable and verify MMIO access
So far, we have been blindly assuming that having access to a
memory-mapped timer frame implies that the individual elements of that
frame frame are already enabled. Whilst it's the firmware's job to give
us non-secure access to frames in the first place, we should not rely
on implementations always being generous enough to also configure CNTACR
for those non-secure frames (e.g. [1]).

Explicitly enable feature-level access per-frame, and verify that the
access we want is really implemented before trying to make use of it.

[1]:https://github.com/ARM-software/tf-issues/issues/170

Acked-by: Mark Rutland <mark.rutland@arm.com>
Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
Tested-by: Stephen Boyd <sboyd@codeaurora.org>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2016-02-25 14:30:15 +01:00
Linus Torvalds dc799d0179 Merge branch 'timers-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull timer fixes from Thomas Gleixner:
 "The timer departement delivers:

   - a regression fix for the NTP code along with a proper selftest
   - prevent a spurious timer interrupt in the NOHZ lowres code
   - a fix for user space interfaces returning the remaining time on
     architectures with CONFIG_TIME_LOW_RES=y
   - a few patches to fix COMPILE_TEST fallout"

* 'timers-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  tick/nohz: Set the correct expiry when switching to nohz/lowres mode
  clocksource: Fix dependencies for archs w/o HAS_IOMEM
  clocksource: Select CLKSRC_MMIO where needed
  tick/sched: Hide unused oneshot timer code
  kselftests: timers: Add adjtimex SETOFFSET validity tests
  ntp: Fix ADJ_SETOFFSET being used w/ ADJ_NANO
  itimers: Handle relative timers with CONFIG_TIME_LOW_RES proper
  posix-timers: Handle relative timers with CONFIG_TIME_LOW_RES proper
  timerfd: Handle relative timers with CONFIG_TIME_LOW_RES proper
  hrtimer: Handle remaining time proper for TIME_LOW_RES
  clockevents/tcb_clksrc: Prevent disabling an already disabled clock
2016-01-31 15:49:06 -08:00
Richard Weinberger d7023e62c5 clocksource: Fix dependencies for archs w/o HAS_IOMEM
Not every arch has io memory.
So, unbreak the build by fixing the dependencies.

Signed-off-by: Richard Weinberger <richard@nod.at>
Cc: user-mode-linux-devel@lists.sourceforge.net
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Link: http://lkml.kernel.org/r/1453760661-1444-21-git-send-email-richard@nod.at
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2016-01-26 16:26:07 +01:00
Arnd Bergmann 2be6d9bfef clocksource: Select CLKSRC_MMIO where needed
The Tegra clocksource implementation uses the clocksource_mmio helper
functions, but currently can be configured without them, which fails:

drivers/clocksource/built-in.o: In function `tegra20_init_timer':
:(.init.text+0xac): undefined reference to `clocksource_mmio_init'
:(.init.text+0x140): undefined reference to `clocksource_mmio_readl_up'

The same problem exists for Digicolor:

drivers/clocksource/built-in.o: In function `digicolor_timer_init':
:(.init.text+0xfa): undefined reference to `clocksource_mmio_init'
:(.init.text+0x14c): undefined reference to `clocksource_mmio_readl_down'

I've inspected the Kconfig file to look for other cases that I have not
yet run into, and added an explicit 'select' to each one to ensure we
can successfully link the drivers.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Cc: linux-arm-kernel@lists.infradead.org
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Link: http://lkml.kernel.org/r/1453737776-1960372-1-git-send-email-arnd@arndb.de
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2016-01-26 16:26:07 +01:00
Linus Torvalds 5083c54264 ARM: SoC cleanups for v4.5
A smallish number of general cleanup commits this release cycle. Some
 of these are minor tweaks:
 
 - shmobile change of binding for their GIC (using arm,pl390 now)
 - ARCH_RENESAS introduction
 - Misc other renesas updates
 
 There's also a couple of treewide commits from Masahiro Yamada cleaning up
 const/__initconst for SMP operation structs and a switch to using "depends
 on" instead of if-constructs on most of the Kconfig platform targets.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJWnrTOAAoJEIwa5zzehBx3khsQAKCH1YZfI6AcY0+4z2Kmn/vK
 7M86Fnmfa13ju+Iub5YuVsVFVAZ/TGTEVWoiUBMEb73IO0D5Jdl97BhJqV8Kv9Uy
 jz6PZGXDMJjjkts6N0ehYyu+8WbRvxtVbMNqVD/CO6CH1096UVnxgRz9uTmgJ9Z7
 81EDJH4QPPg/zZR/GNV/STf4FKjlcAAN7Vo+5+m12RIptZXXkbGSL3Y6NZAyFlVB
 JNK5jFcabhD08DsCKa4YzbuubiQO5qiXdoxX+u/OyQWjupxM9YE5gAcna9o4V3FY
 Y6KnCPcy0XHCkIYk26MITXghr7UFLq9LdD2+s5Ab4HP1XZukw4TUUKd3gwCjCY2h
 8RPIfvM7cJmiU3flY56A076Pg+Y35gfMQr+VDe2gMzWtrgCONWma+tHj2JSnNBkv
 4I615hysQ46rzgsbpnI/yOQoXTlQH0qsNPjOlsXuRIlC4feNaw2FPTtT4dqEIXjE
 l7/LeHuu3217/yp2w37OrtMue4C9UZCHVSnHiV6hJgjdS+9UNRWAXMUAqWApSOam
 5MPdZ/93+66gSrCdJG1KUhcw4F9MGawLAe4A41Eq7gWDbiJVDcZhRczK+Q79MNKo
 KvoLWAED+85qS5Z8k/1Ko9NNnl4c4kNR8fAKqD5qcEes7WGLIO1F2/RfC1zMmJfk
 kHYcwx4sBVPsBHDsAiPN
 =pQaP
 -----END PGP SIGNATURE-----

Merge tag 'armsoc-cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC cleanups from Olof Johansson:
 "A smallish number of general cleanup commits this release cycle.  Some
  of these are minor tweaks:

   - shmobile change of binding for their GIC (using arm,pl390 now)
   - ARCH_RENESAS introduction
   - Misc other renesas updates

  There's also a couple of treewide commits from Masahiro Yamada
  cleaning up const/__initconst for SMP operation structs and a switch
  to using "depends on" instead of if-constructs on most of the Kconfig
  platform targets"

* tag 'armsoc-cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
  staging: board: armadillo800eva: Use "arm,pl390"
  staging: board: kzm9d: Use "arm,pl390"
  ARM: shmobile: r8a7778 dtsi: Use "arm,pl390" for GIC
  ARM: shmobile: emev2 dtsi: Use "arm,pl390" for GIC
  ARM: shmobile: r8a7740 dtsi: Use "arm,pl390" for GIC
  ARM: shmobile: r7s72100 dtsi: Use "arm,pl390" for GIC
  ARM: use "depends on" for SoC configs instead of "if" after prompt
  ARM/clocksource: use automatic DT probing for ux500 PRCMU
  ARM: use const and __initconst for smp_operations
  ARM: hisi: do not export smp_operations structures
  ARM: mvebu: remove unused mach/gpio.h
  ARM: shmobile: Remove legacy mach/irqs.h
  ARM: shmobile: Introduce ARCH_RENESAS
  MAINTAINERS: Remove link to oss.renesas.com which is closed
2016-01-20 17:55:20 -08:00
Alexandre Belloni f02b4b72d1 clockevents/tcb_clksrc: Prevent disabling an already disabled clock
clockevents_exchange_device is calling clockevents_shutdown() on the new
clockenvents device but it may have never been enabled in the first place.
This results in the tcb clock being disabled without being enabled first:

------------[ cut here ]------------
WARNING: CPU: 0 PID: 1 at drivers/clk/clk.c:680 clk_disable+0x28/0x34()
Modules linked in:
CPU: 0 PID: 1 Comm: swapper Not tainted 4.4.0+ #6
Hardware name: Atmel AT91SAM9
[<c000f2b8>] (unwind_backtrace) from [<c000d01c>] (show_stack+0x10/0x14)
[<c000d01c>] (show_stack) from [<c00172f0>] (warn_slowpath_common+0x78/0xa0)
[<c00172f0>] (warn_slowpath_common) from [<c00173a8>] (warn_slowpath_null+0x18/0x20)
[<c00173a8>] (warn_slowpath_null) from [<c0361528>] (clk_disable+0x28/0x34)
[<c0361528>] (clk_disable) from [<c034d560>] (tc_shutdown+0x38/0x4c)
[<c034d560>] (tc_shutdown) from [<c0059ad4>] (clockevents_switch_state+0x38/0x6c)
[<c0059ad4>] (clockevents_switch_state) from [<c0059b18>] (clockevents_shutdown+0x10/0x24)
[<c0059b18>] (clockevents_shutdown) from [<c005a458>] (tick_check_new_device+0x84/0xac)
[<c005a458>] (tick_check_new_device) from [<c0059660>] (clockevents_register_device+0x7c/0x108)
[<c0059660>] (clockevents_register_device) from [<c06b5a68>] (tcb_clksrc_init+0x390/0x3e8)
[<c06b5a68>] (tcb_clksrc_init) from [<c00097cc>] (do_one_initcall+0x114/0x1d4)
[<c00097cc>] (do_one_initcall) from [<c069bd54>] (kernel_init_freeable+0xfc/0x1b8)
[<c069bd54>] (kernel_init_freeable) from [<c04c3818>] (kernel_init+0x8/0xe0)
[<c04c3818>] (kernel_init) from [<c000a410>] (ret_from_fork+0x14/0x24)
---[ end trace 0000000000000001 ]---

Check what state we were in before trying to disable the clock.

Fixes: cf4541c101 ("clockevents/drivers/tcb_clksrc: Migrate to new 'set-state' interface")
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Boris Brezillon <boris.brezillon@free-electrons.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: stable@vger.kernel.org
Link: http://lkml.kernel.org/r/1452854061-30370-1-git-send-email-alexandre.belloni@free-electrons.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2016-01-15 11:40:44 +01:00
Thomas Gleixner 1f16f116b0 Merge branches 'clockevents/4.4-fixes' and 'clockevents/4.5-fixes' of http://git.linaro.org/people/daniel.lezcano/linux into timers/urgent
Pull in fixes from Daniel Lezcano:

 - Fix the vt8500 timer leading to a system lock up when dealing with too
   small delta (Roman Volkov)

 - Select the CLKSRC_MMIO when the fsl_ftm_timer is enabled with COMPILE_TEST
   (Daniel Lezcano)

 - Prevent to compile timers using the 'iomem' API when the architecture has
   not HAS_IOMEM set (Richard Weinberger)
2016-01-12 11:01:12 +01:00
Roman Volkov f9eccf2461 clocksource/drivers/vt8500: Increase the minimum delta
The vt8500 clocksource driver declares itself as capable to handle the
minimum delay of 4 cycles by passing the value into
clockevents_config_and_register(). The vt8500_timer_set_next_event()
requires the passed cycles value to be at least 16. The impact is that
userspace hangs in nanosleep() calls with small delay intervals.

This problem is reproducible in Linux 4.2 starting from:
c6eb3f70d4 ('hrtimer: Get rid of hrtimer softirq')

From Russell King, more detailed explanation:

"It's a speciality of the StrongARM/PXA hardware. It takes a certain
number of OSCR cycles for the value written to hit the compare registers.
So, if a very small delta is written (eg, the compare register is written
with a value of OSCR + 1), the OSCR will have incremented past this value
before it hits the underlying hardware. The result is, that you end up
waiting a very long time for the OSCR to wrap before the event fires.

So, we introduce a check in set_next_event() to detect this and return
-ETIME if the calculated delta is too small, which causes the generic
clockevents code to retry after adding the min_delta specified in
clockevents_config_and_register() to the current time value.

min_delta must be sufficient that we don't re-trip the -ETIME check - if
we do, we will return -ETIME, forward the next event time, try to set it,
return -ETIME again, and basically lock the system up. So, min_delta
must be larger than the check inside set_next_event(). A factor of two
was chosen to ensure that this situation would never occur.

The PXA code worked on PXA systems for years, and I'd suggest no one
changes this mechanism without access to a wide range of PXA systems,
otherwise they're risking breakage."

Cc: stable@vger.kernel.org
Cc: Russell King <linux@arm.linux.org.uk>
Acked-by: Alexey Charkov <alchark@gmail.com>
Signed-off-by: Roman Volkov <rvolkov@v1ros.org>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2016-01-11 22:49:07 +01:00
Daniel Lezcano 03724ac3d4 clocksource/drivers/fsl_ftm_timer: Fix CLKSRC_MMIO dependency
Select CLKSRC_MMIO when FSL_FTM_TIMER is enabled. Otherwise it fails to
compile on i386 with COMPILE_TEST=y.

"
on i386:
when CLKSRC_MMIO is not enabled:

drivers/built-in.o: In function `ftm_timer_init':
fsl_ftm_timer.c:(.init.text+0x6842): undefined reference to `clocksource_mmio_readl_up'
fsl_ftm_timer.c:(.init.text+0x6855): undefined reference to `clocksource_mmio_init'
"

Reported-by: Randy Dunlap <rdunlap@infradead.org>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2016-01-11 18:45:26 +01:00
Richard Weinberger 863ee05072 clocksource/drivers: Fix dependencies for !HAS_IOMEM archs
Not every arch has io memory.

So, unbreak the build by fixing the dependencies.

Signed-off-by: Richard Weinberger <richard@nod.at>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2016-01-11 18:45:12 +01:00
Andy Shevchenko 01414888ea clocksource/drivers/acpi_pm: Convert to pr_* macros
Like it's already done in one place in the driver, convert the rest to use pr_*
macros instead of printk(KERN_LEVEL) calls.

While here, join strings to be one string for one line to make grep on them
easier.

There is no functional change.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Link: http://lkml.kernel.org/r/1451310085-113182-1-git-send-email-andriy.shevchenko@linux.intel.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2015-12-29 12:52:57 +01:00
Yoshinori Sato d33f250af4 clocksource/drivers/h8300: Use ioread / iowrite
Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2015-12-16 17:20:13 +01:00
Yoshinori Sato 6f2b611db2 clocksource/drivers/h8300: Initializer cleanup.
Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2015-12-16 11:33:35 +01:00
Yoshinori Sato f37632d1e9 clocksource/drivers/h8300: Simplify delta handling
Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2015-12-16 11:33:33 +01:00
Yoshinori Sato 2f445e0aa0 clocksource/drivers/h8300: Fix timer not overflow case
Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2015-12-16 11:33:31 +01:00
Yoshinori Sato 2a0ff87774 clocksource/drivers/h8300: Change to overflow interrupt
Counter overflow detection use for overflow interrupt

Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2015-12-16 11:33:22 +01:00
Vladimir Zapolskiy d662ed2043 clocksource/drivers/lpc32: Correct pr_err() output format
If by some reason timerclk is not available, both clockevent and
clocksource initializations correctly exit, but output of errno to
kernel log buffer may be confusing:

  lpc32xx_clk_init: failed to map system control block registers
  lpc32xx_clocksource_init: clock get failed (4294966779)
  lpc32xx_clockevent_init: clock get failed (4294966779)

Use signed integer output in the correspondent pr_err() string formats:

  lpc32xx_clocksource_init: clock get failed (-517)
  lpc32xx_clockevent_init: clock get failed (-517)

Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2015-12-16 09:59:41 +01:00
Grygorii Strashko 9c9ae5ffee clocksource/drivers/arm_global_timer: Fix suspend resume
Now the System stall is observed on TI AM437x based board (am437x-gp-evm)
during resuming from System suspend when ARM Global timer is selected as
clocksource device (CPUIdle not enabled) - SysRq are working, but nothing
else.

The reason of stall is that ARM Global timer loses its contexts during
System suspend:
   GT_CONTROL.TIMER_ENABLE = 0 (unbanked)
   GT_COUNTERx = 0

Hence, update ARM Global timer driver to reflect above behaviour
- re-enable ARM Global timer on resume (GT_CONTROL.TIMER_ENABLE = 1)
  if not enabled.

CC: Arnd Bergmann <arnd@arndb.de>
Cc: John Stultz <john.stultz@linaro.org>
Cc: Felipe Balbi <balbi@ti.com>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Reviewed-by: Santosh Shilimkar <ssantosh@kernel.org>
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2015-12-16 09:58:47 +01:00
Jisheng Zhang 272a25a247 clocksource/drivers/pistachio: Fix wrong calculated clocksource read value
Let's assume the counter value is 0xf0000000, the pistachio clocksource
read cycles function should return ~0x0fffffff but actually it returns
0xffffffff0fffffff.

That occurs because:

	~(cycle_t)value is different from (cycle_t)~value.

unsigned long val = ~(unsigned long)0xf0000000;
40049a:       48 b8 ff ff ff 0f ff    movabs $0xffffffff0fffffff,%rax

unsigned long val = (unsigned long)~0xf0000000;
40049a:       48 c7 45 f8 ff ff ff    movq   $0xfffffff,-0x8(%rbp)

We fix this issue by calculating bitwise-not counter, then cast to
cycle_t.

Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2015-12-16 09:45:10 +01:00
Jisheng Zhang 08e4b44852 clockevents/drivers/arm_global_timer: Use writel_relaxed in gt_compare_set
Use the relaxed version to improve performance. we measured time of
4096 rounds of gt_compare_set() spent on Marvell BG2Q:

before the patch: 3690648ns on average
after the patch: 1083023ns on average

improved by 70%!

Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2015-12-16 09:44:23 +01:00
Jisheng Zhang 520ddad4e5 clocksource/drivers/dw_apb_timer: Inline apbt_readl and apbt_writel
It seems gcc can automatically inline apbt_writel() for us, but
apbt_real isn't inlined. This patch makes them inline to get a trivial
performance improvement: 4096 rounds of __apbt_read_clocksource() call
spend time on Marvell BG4CT platform:

 before the patch 1275240ns on average
 after the patch 1263240ns on average

so we get 1% performance improvement.

Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2015-12-15 21:41:28 +01:00
Jisheng Zhang 39d3611f2d clocksource/drivers/dw_apb_timer: Use {readl|writel}_relaxed in critical path
It's safe to use the relaxed version. From another side, the relaxed io
accessor macros are available on all architectures now, so we can use
the relaxed versions to get a trivial system performance improvement,
we measured time the following functions spent on Marvell BG4CT:

4096 rounds of __apbt_read_clocksource() call:

before the patch: 1263240ns on average
after the patch: 1250080ns on average
improved by 1%

4096 rounds of apbt_eoi() call:

before the patch: 1290960ns on average
after the patch: 1248240ns on average

4096 rounds of apbt_next_event() call:

before the patch: 3333660ns on average
after the patch: 1322040ns on average

improved by 60%!

Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2015-12-15 21:41:28 +01:00
Jisheng Zhang 9f4165dc4e clocksource/drivers/dw_apb_timer: Fix apbt_readl return types
On Marvell BG4CT platform, we observed the __apbt_read_clocksource()
return wrong value: Let's assume the APBTMR_N_CURRENT_VALUE value is
0xf0000000, we got 0xffffffff0fffffff, but it should be 0xfffffff.

This issue should be common on all 64bit platforms. We fix the issue
by letting aptb_readl() return u32. apbt_writel() is also updated
to write u32 val rather than unsigned long.

Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2015-12-15 20:44:54 +01:00
Daniel Lezcano 0881841f7e clocksource/drivers/tango-xtal: Replace code by clocksource_mmio_init
The current code to initialize, register and read the clocksource is
already factored out in mmio.c via the clocksource_mmio_init function.

Factor out the code with the clocksource_mmio_init function.

Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2015-12-15 10:12:17 +01:00
Daniel Lezcano 46e7c3c6e5 clocksource/drivers/h8300: Increase the compilation test coverage
Add the COMPILE_TEST option so the drivers can be compiled on different
architecture with the 'allyesconfig' kernel configuration.

Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2015-12-15 10:12:16 +01:00
Daniel Lezcano 751605152b h8300: Rename ctlr_out/in[bwl] to raw_read/write[bwl]
For the sake of consistency, let rename all ctrl_out/in calls to the write/read
calls so we have the same API consistent with the other architectures hence
open the door for the increasing of the test compilation coverage.

The unsigned long coercive cast is removed because all variables are set to
the right type "void __iomem *".

Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2015-12-15 10:12:03 +01:00
Daniel Lezcano 97a23beb8d clocksource/drivers/h8300_timer8: Separate the Kconfig option from the arch
The current Kconfig option is the H8300 arch option. In order to comply to the
current rule, let's create a specific option for the timer8 and select it
from the arch's Kconfig.

Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2015-12-15 09:43:59 +01:00
Daniel Lezcano 157dfadef8 clocksource/drivers/timer_sun5i: Replace code by clocksource_mmio_init
The current code to initialize, register and read the clocksource is
already factored out in mmio.c via the clocksource_mmio_init function.

The only difference is the readl vs readl_relaxed.

Factor out the code with the clocksource_mmio_init function.

Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-12-15 09:42:30 +01:00