Commit Graph

522 Commits

Author SHA1 Message Date
Arnd Bergmann 3be1812ea3 Merge branch 'tegra/cleanup' into next/soc
This is a dependency for the tegra/soc branch.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2013-04-09 16:31:43 +02:00
Arnd Bergmann 71f6424023 Merge branch 'mxs/cleanup' into next/multiplatform
This is a dependency for mxs/multiplatform

Signed-off-by: Arnd Bergmann <arnd@arndb.de>

Conflicts:
	drivers/clocksource/Makefile
2013-04-09 16:02:14 +02:00
Arnd Bergmann 9bc128e16b Merge tag 'ux500-multiplatform-asoc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into next/multiplatform
From Linus Walleij <linus.walleij@linaro.org>:

Ux500 multiplatform support.  This tag builds upon the MFD-specific base
tag "ux500-multiplatform-mfd". This removes all <mach/*> dependencies
and makes the ux500 fully multi-platform.

* tag 'ux500-multiplatform-asoc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson:
  ARM: ux500: build hotplug.o for ARMv7-a
  ARM: ux500: move to multiplatform
  ARM: ux500: make remaining headers local
  ARM: ux500: make irqs.h local to platform
  ARM: ux500: get rid of <mach/[hardware|db8500-regs].h>
  staging: ste_rmi4: kill platform_data hack
  ARM: ux500: move mach/msp.h to <linux/platform_data/*>
  clk: ux500: pass clock base adresses in init call
  ARM: ux500: make debug macro stand-alone
  ARM: ux500: move debugmacro to debug includes
  ARM: ux500: split out prcmu initialization
  mfd: db8500-prcmu: drop unused includes
  ARM: ux500: move PM-related PRCMU functions to machine
  mfd: db8500-prcmu: get base address from resource
  mfd: prcmu: pass a base and size with the early initcall

Conflicts:
	arch/arm/Kconfig

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2013-04-09 16:01:52 +02:00
Arnd Bergmann 835f9c38bb Linux 3.9-rc3
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Merge tag 'v3.9-rc3' into next/multiplatform

Linux 3.9-rc3

Conflicts:
	arch/arm/Kconfig
	arch/arm/mach-spear/spear3xx.c
	arch/arm/plat-spear/Kconfig

This is a dependency for ux500/multiplatform

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2013-04-09 16:01:23 +02:00
Arnd Bergmann 92202876a3 The mxs cleanup for 3.10:
* Clean up timer code and move it into drivers/clocksource
 * Clean up icoll code and move it into drivers/irqchip
 * Clean up clock code to not include <mach/*> headers
 * Clean up rtc-stmp3xxx, mxs-lradc and mxs-saif to not include <mach/*>
   headers
 * Clean up mach-mxs code to get it prepared for multiplatform support
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Merge tag 'mxs-cleanup-3.10' of git://git.linaro.org/people/shawnguo/linux-2.6 into next/cleanup

From Shawn Guo <shawn.guo@linaro.org>:

The mxs cleanup for 3.10:

* Clean up timer code and move it into drivers/clocksource
* Clean up icoll code and move it into drivers/irqchip
* Clean up clock code to not include <mach/*> headers
* Clean up rtc-stmp3xxx, mxs-lradc and mxs-saif to not include <mach/*>
  headers
* Clean up mach-mxs code to get it prepared for multiplatform support

* tag 'mxs-cleanup-3.10' of git://git.linaro.org/people/shawnguo/linux-2.6: (26 commits)
  clocksource: mxs_timer: Add semicolon at end of line
  ARM: mxs: remove unused headers
  ARM: mxs: merge imx23 and imx28 into one machine_desc
  ARM: mxs: remove common.h
  ARM: mxs: move mxs_get_ocotp() into mach-mxs.c
  ARM: mxs: remove mm.c
  ARM: mxs: use debug_ll_io_init for low-level debug
  ARM: mxs: get ocotp base address from device tree
  ARM: mxs: remove system.c
  ARM: mxs: get reset address from device tree
  ARM: mxs: remove empty hardware.h
  ASoC: mxs-saif: remove mach header inclusion
  iio: mxs-lradc: remove unneeded mach header inclusion
  rtc: stmp3xxx: use stmp_reset_block() instead
  clk: mxs: remove the use of mach level IO accessor
  clk: mxs: get base address from device tree
  ARM: mxs: remove unneeded mach-types.h inclusion
  ARM: mxs: move icoll driver into drivers/irqchip
  ARM: mxs: call stmp_reset_block() in icoll
  ARM: mxs: get icoll base address from device tree
  ...

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2013-04-09 15:29:52 +02:00
Arnd Bergmann 44c0d23775 Linux 3.9-rc5
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Merge tag 'v3.9-rc5' into next/cleanup

This is a dependency for the mxs/cleanup branch.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2013-04-09 15:29:43 +02:00
Arnd Bergmann 5be8f63688 Merge branch 'tegra/fixes' into next/cleanup
This is a dependency for tegra/cleanups

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2013-04-09 15:26:51 +02:00
Arnd Bergmann 6abb057679 ARM: tegra: minor fixes
This branch contains a variety of small build and run-time fixes that
 weren't important enough for 3.9.
 
 * Enable CPU errata WARs in secondary reset handler as a preparation
   for multi-platform support, and a related fix.
 * Don't touch DBLGAR in reset/resume handlers, so enable the code to
   run on A15 cores.
 * Minor build fixes.
 * A fix to the Tegra clock driver.
 * Some error-handling fixes.
 
 This branch is based on the previous fixes-for-mmc pull request.
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Merge tag 'tegra-for-3.10-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra into next/fixes-non-critical

From Stephen Warren <swarren@wwwdotorg.org>:

ARM: tegra: minor fixes

This branch contains a variety of small build and run-time fixes that
weren't important enough for 3.9.

* Enable CPU errata WARs in secondary reset handler as a preparation
  for multi-platform support, and a related fix.
* Don't touch DBLGAR in reset/resume handlers, so enable the code to
  run on A15 cores.
* Minor build fixes.
* A fix to the Tegra clock driver.
* Some error-handling fixes.

This branch is based on the previous fixes-for-mmc pull request.

* tag 'tegra-for-3.10-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra:
  ARM: tegra: powergate: Don't error out if new state == old state
  ARM: tegra: Export tegra_powergate_sequence_power_up()
  memory: tegra30: Fix build error w/o PM
  ARM: tegra: fix ignored return value of regulator_enable
  ARM: tegra: fix the logical detection of power on sequence of warm boot CPUs
  ARM: tegra: Fix unchecked return value
  ARM: tegra: don't unlock MMIO access to DBGLAR
  clk: tegra: No 7.1 super clk dividers on Tegra20
  ARM: tegra: remove save/restore of CPU diag register
  ARM: tegra: add CPU errata WARs to Tegra reset handler
  ARM: dts: tegra: fix the activate polarity of cd-gpio in mmc host

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2013-04-09 15:10:50 +02:00
Axel Lin 4cb24e68a5 clk: mvebu: Fix valid value range checking for cpu_freq_select
cpu_freq_select is used as array subscript, thus the valid value range
is 0 ... ARRAY_SIZE() - 1.

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
[mturquette@linaro.org: fixed up trivial merge issues]
2013-04-08 22:26:36 -07:00
Ulf Hansson a68de8e4ab clk: Fixup locking issues for clk_set_parent
Updating the clock tree topology must be protected with the spinlock
when doing clk_set_parent, otherwise we can not handle the migration
of the enable_count in a safe manner.

While issuing the .set_parent callback to make the clk-hw perform the
switch to the new parent, we can not hold the spinlock since it is must
be allowed to be slow path. This complicates error handling, but is still
possible to achieve.

Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Cc: Rajagopal Venkat <rajagopal.venkat@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-04-08 18:19:40 -07:00
Ulf Hansson 031dcc9bd4 clk: Fixup errorhandling for clk_set_parent
Fixup the broken feature of allowing reparent of a clk to the
orhpan list and vice verse. When operating on a single-parent
clk, the .set_parent callback for the clk hw is optional to
implement, but for a multi-parent clk it is mandatory.

Moreover improve the errorhandling by verifying the prerequisites
before triggering clk notifiers. This will prevent unnecessary
rollback with ABORT_RATE_CHANGE.

Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Cc: Rajagopal Venkat <rajagopal.venkat@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-04-08 18:19:32 -07:00
Ulf Hansson b33d212f49 clk: Restructure code for __clk_reparent
Split __clk_reparent into three pieces, one for doing the actual
reparent for updating the clock tree topology, one for the
COMMON_CLK_DEBUG code and one for doing the rate recalculation.

This patch also makes it possible to hold the spinlock over the
update of the clock tree topology, which could not be done before
when both debugfs updates and clock rate updates was done within
the same function.

Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Cc: Rajagopal Venkat <rajagopal.venkat@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-04-08 18:19:15 -07:00
Kukjin Kim da821eb7d4 Merge commit 'v3.9-rc5' into next/clk-exynos
Conflicts:
	arch/arm/boot/dts/exynos4.dtsi
	arch/arm/boot/dts/exynos5440.dtsi
2013-04-09 01:10:13 +09:00
Arnd Bergmann 8bd2bcf320 Non critical omap fixes for v3.10 merge window. A big chunk
of these fixes are needed to support omap5 es2 version that includes
 PM features while the earlier version es1 did not.
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Merge tag 'omap-for-v3.10/fixes-non-critical-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/fixes-non-critical

From Tony Lindgren <tony@atomide.com>:

Non critical omap fixes for v3.10 merge window. A big chunk
of these fixes are needed to support omap5 es2 version that includes
PM features while the earlier version es1 did not.

* tag 'omap-for-v3.10/fixes-non-critical-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  ARM: OMAP2+: fix typo "CONFIG_BRIDGE_DVFS"
  ARM: OMAP1: remove "config MACH_OMAP_HTCWIZARD"
  ARM: OMAP: dpll: enable bypass clock only when attempting dpll bypass
  ARM: OMAP2+: powerdomain: avoid testing whether an unsigned char is less than 0
  ARM: OMAP2+: hwmod: Remove unused _HWMOD_WAKEUP_ENABLED flag
  ARM: OMAP2+: am335x: Change the wdt1 func clk src to per_32k clk
  ARM: OMAP2+: AM33xx: hwmod: Add missing sysc definition to wdt1 entry

Contains an update to 3.9-rc5

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2013-04-08 18:00:45 +02:00
Tushar Behera 688f7d8c9f clk: exynos5250: Fix divider values for sclk_mmc{0,1,2,3}
In legacy setup, sclk_mmc{0,1,2,3} used PRE_RATIO bit-field (8-bit wide)
instead of RATIO bit-field (4-bit wide) for dividing clock rate.

With current common clock setup, we are using RATIO bit-field which
is creating FIFO read errors while accessing eMMC. Changing over to
use PRE_RATIO bit-field fixes this issue.

dwmmc_exynos 12200000.dwmmc0: data FIFO error (status=00008020)
mmcblk0: error -5 transferring data, sector 1, nr 7, cmd response 0x900, card status 0x0
end_request: I/O error, dev mmcblk0, sector 1

Signed-off-by: Tushar Behera <tushar.behera@linaro.org>
CC: Thomas Abraham <thomas.abraham@linaro.org>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-04-08 23:43:55 +09:00
Sylwester Nawrocki cdbf618ab8 clk: exynos4: export clocks required for fimc-is
This patch adds clock indexes for ACLK_DIV0, ACLK_DIV1,
ACLK_400_MCUISP, ACLK_MCUISP_DIV0, ACLK_MCUISP_DIV1,
DIVACLK_400_MCUISP and DIVACLK_200 so these clocks are
available to the consumers (Exynos4x12 FIMC-IS subsystem).
While at it, indentation of the mux clocks table is
corrected.

Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-04-08 23:43:54 +09:00
Sachin Kamat 6cec90826e clk: samsung: Fix compilation error
Fixes the below compilation error during non-dt build.
drivers/clk/samsung/clk.c: In function 'samsung_clk_of_register_fixed_ext':
drivers/clk/samsung/clk.c:252:2: error: implicit declaration of function 'for_each_matching_node_and_match' [-Werror=implicit-function-declaration]
drivers/clk/samsung/clk.c:252:60: error: expected ';' before '{' token

Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-04-08 23:43:12 +09:00
Linus Walleij 174e779662 ARM: ux500: get rid of <mach/[hardware|db8500-regs].h>
This removes <mach/hardware.h> and <mach/db8500-regs.h>
from the Ux500, merging them into the local include
"db8500-regs.h" in mach-ux500. There is some impact
outside the ux500 machine, but most of it is dealt with
in earlier patches.

Contains portions of a clean-up patch from Arnd Bergmann.

Cc: Samuel Ortiz <sameo@linux.intel.com>
Cc: Ulf Hansson <ulf.hansson@linaro.org>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-04-08 13:59:28 +02:00
Linus Walleij 9b819060d3 clk: ux500: pass clock base adresses in init call
The ux500 clock driver was including <mach/db8500-regs.h>
which will not work when building for multiplatform support
since <mach/*> is going away.

Pass the base adresses in the init call instead.

Cc: Ulf Hansson <ulf.hansson@linaro.org>
Cc: Mike Turquette <mturquette@linaro.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Ulf Hansson <ulf.hansson@linaro.org>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-04-08 13:59:19 +02:00
Stephen Warren 964ea47572 clk: tegra: fix enum tegra114_clk to match binding
A gap exists in the binding's clock ID definitions. Fix the clock driver
to be consistent. This allows pclk to be looked up through device tree
and prevents:

ERROR: could not get clock /pmc:pclk(0)

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-04-04 17:17:14 -06:00
Peter De Schrijver c604283f52 clk: tegra: Remove forced clk_enable of uartd
The UART driver enables the console uart clock, so we don't need to do that
anymore in this file.

Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-04-04 17:17:14 -06:00
Peter De Schrijver 27aa99dc0e clk: tegra: devicetree match for nvidia,tegra114-car
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-04-04 17:17:13 -06:00
Peter De Schrijver 2cb5efefd6 clk: tegra: Implement clocks for Tegra114
Implement clocks for Tegra114.

Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-04-04 17:17:12 -06:00
Peter De Schrijver fdcccbd804 clk: tegra: Workaround for Tegra114 MSENC problem
Workaround a hardware bug in MSENC during clock enable.

Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-04-04 16:10:59 -06:00
Peter De Schrijver a26a029893 clk: tegra: Add flags to tegra_clk_periph()
We will need some tegra peripheral clocks with the CLK_IGNORE_UNUSED flag,
most notably mselect, which is a bridge between AXI and most peripherals.

Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-04-04 16:10:56 -06:00
Peter De Schrijver c1d1939c51 clk: tegra: Add new fields and PLL types for Tegra114
Tegra114 introduces new PLL types. This requires new clocktypes as well
as some new fields in the pll structure.

Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-04-04 16:10:52 -06:00
Peter De Schrijver 3e72771e21 clk: tegra: move from a lock bit idx to a lock mask
PLLC2 and PLLC3 on Tegra114 have separate phaselock and frequencylock bits.
So switch to a lock mask to be able to test both at the same time.

Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-04-04 16:10:49 -06:00
Peter De Schrijver 0b6525acd1 clk: tegra: Add PLL post divider table
Some PLLs in Tegra114 don't use a power of 2 mapping for the post divider.
Introduce a table based approach and switch PLLU to it.

Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-04-04 16:10:45 -06:00
Peter De Schrijver 7ba28813b4 clk: tegra: introduce TEGRA_PLL_HAS_LOCK_ENABLE
Tegra114 PLLC2 and PLLC3 don't have a lock enable bit. The lock bits are
always functional.

Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-04-04 16:10:42 -06:00
Peter De Schrijver dd93587be8 clk: tegra: Add TEGRA_PLL_BYPASS flag
Not all PLLs in Tegra114 have a bypass bit. Adapt the common code to only use
this bit when available.

Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-04-04 16:10:38 -06:00
Peter De Schrijver dba4072a4a clk: tegra: Refactor PLL programming code
Refactor the PLL programming code to make it useable by the new PLL types
introduced by Tegra114.

The following changes were done:

* Split programming the PLL into updating m,n,p and updating cpcon
* Move locking from _update_pll_cpcon() to clk_pll_set_rate()
* Introduce _get_pll_mnp() helper
* Move check for identical m,n,p values to clk_pll_set_rate()
* struct tegra_clk_pll_freq_table will always contain the values as defined
  by the hardware.
* Simplify the arguments to clk_pll_wait_for_lock()
* Split _tegra_clk_register_pll()

Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-04-04 16:10:33 -06:00
Peter De Schrijver 6a676fa0af clk: tegra: provide dummy cpu car ops
tegra_boot_secondary() relies on some of the car ops. This means having an
uninitialized tegra_cpu_car_ops will lead to an early boot panic.
Providing a dummy struct avoids this and makes adding Tegra114 clock support
in a bisectable way a lot easier.

Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-04-04 16:10:12 -06:00
Stephen Warren 441f199a37 clk: tegra: defer application of init table
The Tegra clock driver is initialized during the ARM machine descriptor's
.init_irq() hook. It can't be initialized earlier, since dynamic memory
usage is required. It can't be initialized later, since the .init_timer()
hook needs the clocks initialized. However, at this time, udelay()
doesn't work.

The Tegra clock initialization table may enable some PLLs. Enabling a PLL
may require usage of udelay(). Hence, this can't happen right when the
clock driver is initialized.

To solve this, separate the clock driver initialization from the clock
table processing, so they can execute at separate times.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-04-04 16:09:05 -06:00
Prashant Gaikwad 82ce742140 clk: tegra: Fix cdev1 and cdev2 IDs
Correct IDs for cdev1 and cdev2 are 94 and 93 respectively.

Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
[swarren: split into separate driver and device-tree patches]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-04-04 16:08:46 -06:00
Thierry Reding ce910686f8 clk: tegra: Make gr2d and gr3d clocks children of pll_c
By default these clocks are children of pll_m, but in downstream kernels
they are reparented to pll_c. While at it, decrease their frequencies to
300 MHz because the defaults aren't in the specified range.

gr2d can reportedly run at much higher frequencies, but 300 MHz works
and is a more conservative default.

Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Acked-by: Mike Turquette <mturquette@linaro.org>
Acked-By: Peter De Schrijver <pdeschrijver@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-04-04 16:08:34 -06:00
Thierry Reding 4dd59cdd35 clk: tegra: Export peripheral reset functions
The tegra_periph_reset_assert() and tegra_periph_reset_deassert()
functions can be used by drivers to reset peripherals. In order to allow
such drivers to be built as modules, export the functions.

Note that this restores the status quo as the functions were exported
before the move to the drivers/clk tree.

Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-04-04 16:08:31 -06:00
Yen Lin 5a88b0d10f clk: tegra: Fix periph_clk_to_bit macro
The parameter name should be "gate", not "periph".  This worked, however,
because it happens that everywhere periph_clk_to_bit is called, "gate" was
in the local scope.

Signed-off-by: Yen Lin <yelin@nvidia.com>
Signed-off-by: Andrew Chew <achew@nvidia.com>
Reviewed-by: Thierry Reding <thierry.reding@avionic-design.de>
Reviewed-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Acked-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-04-04 16:08:27 -06:00
Stephen Warren 43089433b0 Merge remote-tracking branch 'linaro_mturquette_linux/clk-for-3.10' into for-3.10/clk 2013-04-04 16:08:13 -06:00
Stephen Warren 8aa15d82df Merge branch 'for-3.10/soc' into for-3.10/clk 2013-04-04 16:08:06 -06:00
Emilio López 918d7f6f68 clk: sunxi: drop an unnecesary kmalloc
clk_register will copy this information, so we can just use a normal
array and do one less dynamic allocation.

Signed-off-by: Emilio López <emilio@elopez.com.ar>
Reviewed-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-04-04 13:53:02 -07:00
Emilio López 5a4fe9b55d clk: sunxi: drop CLK_IGNORE_UNUSED
This flag was in place to prevent important clocks from getting gated
while they had no users. Now that the UART driver supports clocks
properly, we can drop this.

Signed-off-by: Emilio López <emilio@elopez.com.ar>
Reviewed-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-04-04 13:52:50 -07:00
Emilio López 13569a709a clk: sunxi: Add support for AXI, AHB, APB0 and APB1 gates
This patchset adds DT support for all the AXI, AHB, APB0 and APB1
gates present on sunxi SoCs.

Signed-off-by: Emilio López <emilio@elopez.com.ar>
Reviewed-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-04-04 13:51:35 -07:00
Leela Krishna Amudala 17d4caccef clk: exynos5250: register display block gate clocks to common clock framework
Add gate clocks for fimd, mie, dsim, dp, mixer and hdmi.
Register it to common clock framework.

Signed-off-by: Leela Krishna Amudala <l.krishna@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-04-04 15:51:23 +09:00
Tomasz Figa 6b5756e8bd clk: exynos4: Add support for SoC-specific register save list
This patch extends suspend/resume support for SoC-specific registers to
handle differences in register sets on particular SoCs.

Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Reviewed-by: Thomas Abraham <thomas.abraham@linaro.org>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-04-04 15:51:22 +09:00
Tomasz Figa fb948f74ce clk: exynos4: Add missing registers to suspend save list
This patch adds missing clock control registers to the list of registers
that should be saved across system suspend.

Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Reviewed-by: Thomas Abraham <thomas.abraham@linaro.org>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-04-04 15:51:22 +09:00
Tomasz Figa b950622bdd clk: exynos4: Remove E4X12 prefix from SRC_DMC register
This register is present on all Exynos4 SoCs and so the prefix is
misleading.

Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Reviewed-by: Thomas Abraham <thomas.abraham@linaro.org>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-04-04 15:51:22 +09:00
Tomasz Figa 1f1f326763 clk: exynos4: Add E4210 prefix to GATE_IP_PERIR register
This definition is specific for Exynos4210 (which has another location
than the same register on Exynos4x12 SoCs) and so needs appropriate
prefix.

Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Reviewed-by: Thomas Abraham <thomas.abraham@linaro.org>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-04-04 15:51:16 +09:00
Tomasz Figa 7406ee7c2a clk: exynos4: Add E4210 prefix to LCD1 clock registers
This patch adds E4210 prefix to all registers related to LCD1 clock
domain, because they are present only on Exynos4210.

Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Reviewed-by: Thomas Abraham <thomas.abraham@linaro.org>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-04-04 15:51:16 +09:00
Tomasz Figa 0f1fce908e clk: exynos4: Remove SoC-specific registers from save list
Current clock save list is shared for all Exynos4 SoCs, so it must
contain only registers present in all supported SoCs, because accessing
unavailable registers might have undefined effect.

This patch removes registers specific for particular SoCs from shared
save list, as they should be supported by separate SoC-specific lists.

Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Reviewed-by: Thomas Abraham <thomas.abraham@linaro.org>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-04-04 15:51:16 +09:00
Tomasz Figa 017ab64bdb clk: exynos4: Use SRC_MASK_PERIL{0,1} definitions
There are definitions of SRC_MASK_PERIL0 and SRC_MASK_PERIL1 registers,
but they are not used for clock definitions. This patch modifies related
clock definitions to use defined macros instead of numeric offsets.

Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Reviewed-by: Thomas Abraham <thomas.abraham@linaro.org>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-04-04 15:51:15 +09:00
Tomasz Figa 6d7190f846 clk: exynos4: Define {E,V}PLL registers
This patch adds preprocessor definitions of EPLL and VPLL registers and
replaces all occurences of offsets of related registers with new
definitions.

Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Reviewed-by: Thomas Abraham <thomas.abraham@linaro.org>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-04-04 15:51:15 +09:00
Tomasz Figa 8e79561c41 clk: exynos4: Add missing mout_sata on Exynos4210
This patch adds missing mout_sata that is a parent of div_sata clock.

Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Reviewed-by: Thomas Abraham <thomas.abraham@linaro.org>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-04-04 15:51:15 +09:00
Andrzej Hajda 1554701528 clk: exynos4: Add missing CMU_TOP and ISP clocks
The patch adds missing clocks to TOP and ISP clock domains.
It also adds clock gates for ISP sub-blocks.

Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Reviewed-by: Thomas Abraham <thomas.abraham@linaro.org>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-04-04 15:51:15 +09:00
Tomasz Figa 8e1ce8393e clk: exynos4: Add G3D clocks
This patch adds clocks needed for G3D block present on Exynos 4 SoCs.

Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Reviewed-by: Thomas Abraham <thomas.abraham@linaro.org>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-04-04 15:51:15 +09:00
Sylwester Nawrocki 1e25810bbb clk: exynos4: Add camera related clock definitions
This patch adds several gate and mux clocks related to camera and ISP
blocks.

Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Reviewed-by: Thomas Abraham <thomas.abraham@linaro.org>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-04-04 15:51:14 +09:00
Tomasz Figa fba79e32a7 clk: exynos4: Export mout_core clock of Exynos4210
This patch enables clock lookup registration for mout_core clock used in
Exynos4210 cpufreq driver.

Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Reviewed-by: Thomas Abraham <thomas.abraham@linaro.org>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-04-04 15:51:14 +09:00
Tomasz Figa a8b5a39ecb clk: samsung: Remove unimplemented ops for pll
Unimplemented clock operations should be simply omitted instead of returning
error values.

This patch removes unimplemented PLL operations to fix problems caused
by returning error code in round_rate callback.

Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Reviewed-by: Thomas Abraham <thomas.abraham@linaro.org>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-04-04 15:51:09 +09:00
Lukasz Majewski e77ba804c1 clk: exynos4: Export clocks used by exynos cpufreq drivers
This patch exports clocks used by Exynos cpufreq drivers to allow lookup
using device tree. (Support to cpufreq drivers will be added in further
patches.)

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Reviewed-by: Thomas Abraham <thomas.abraham@linaro.org>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-04-04 15:51:09 +09:00
Tomasz Figa 7bc1d2da0a clk: exynos4: Move dac and mixer to Exynos4210-specific clocks
The sclk_dac and sclk_mixer clocks are not present on Exynos4x12.

Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Reviewed-by: Thomas Abraham <thomas.abraham@linaro.org>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-04-04 15:51:09 +09:00
Tomasz Figa 6976d27415 clk: exynos4: Export sclk_pcm0
This clock is used by PCM interface 0.

Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Reviewed-by: Thomas Abraham <thomas.abraham@linaro.org>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-04-04 15:51:08 +09:00
Tomasz Figa 69aff2fd1d clk: exynos4: Add missing sclk_audio0 clock
This clock is a parent of mout_spdif and sclk_pcm0.

Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Reviewed-by: Thomas Abraham <thomas.abraham@linaro.org>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-04-04 15:51:08 +09:00
Tomasz Figa 4c3cc72cc7 clk: exynos4: Add missing mout_mipihsi clock
This patch adds missing output of mux MIPIHSI which is needed for
div_mipihsi clock.

Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Reviewed-by: Thomas Abraham <thomas.abraham@linaro.org>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-04-04 15:51:08 +09:00
Tomasz Figa 74f7f8ba50 clk: exynos4: Use mout_mpll_user_* on Exynos4x12
Many clock muxes of Exynos 4x12 uses mout_mpll_user_* clocks instead of
sclk_mpll as one of their parents.

This patch moves such clocks from common array into SoC-specific arrays
and adjusts their parent lists respectively.

Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Reviewed-by: Thomas Abraham <thomas.abraham@linaro.org>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-04-04 15:51:08 +09:00
Sylwester Nawrocki 36fc09722d clk: exynos4: Correct sclk_mfc clock definition
This clock must be exported to allow lookup using device tree.

Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Reviewed-by: Thomas Abraham <thomas.abraham@linaro.org>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-04-04 15:51:07 +09:00
Soren Brinkmann 056b205316 clk: divider: Introduce CLK_DIVIDER_ALLOW_ZERO flag
Dividers which have CLK_DIVIDER_ONE_BASED set have a redundant state,
being a divider value of zero. Some hardware implementations allow a
zero divider which simply doesn't alter the frequency. I.e. it acts like
a divide by one or bypassing the divider.
This flag is used to handle such HW in the clk-divider model.

Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-04-03 12:56:30 -07:00
Jean-Francois Moine f640c0fad6 clk: mvebu: Use common of_clk_init() function
The use common of_clk_init() function simplifies the clock initialization
and adds handling of the DT "fixed-clock".

Signed-off-by: Jean-Francois Moine <moinejf@free.fr>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
[mturquette@linaro.org: fixed $SUBJECT to reflect correct file path]
2013-04-03 12:55:31 -07:00
Mike Turquette 533ddeb1e8 clk: allow reentrant calls into the clk framework
Reentrancy into the clock framework is necessary for clock operations
that result in nested calls to the clk api.  A common example is a clock
that is prepared via an i2c transaction, such as a clock inside of a
discrete audio chip or a power management IC.  The i2c subsystem itself
will use the clk api resulting in a deadlock:

clk_prepare(audio_clk)
	i2c_transfer(..)
		clk_prepare(i2c_controller_clk)

The ability to reenter the clock framework prevents this deadlock.

Other use cases exist such as allowing .set_rate callbacks to call
clk_set_parent to achieve the best rate, or to save power in certain
configurations.  Yet another example is performing pinctrl operations
from a clk_ops callback.  Calls into the pinctrl subsystem may call
clk_{un}prepare on an unrelated clock.  Allowing for nested calls to
reenter the clock framework enables both of these use cases.

Reentrancy is implemented by two global pointers that track the owner
currently holding a global lock.  One pointer tracks the owner during
sleepable, mutex-protected operations and the other one tracks the owner
during non-interruptible, spinlock-protected operations.

When the clk framework is entered we try to hold the global lock.  If it
is held we compare the current task against the current owner; a match
implies a nested call and we reenter.  If the values do not match then
we block on the lock until it is released.

Signed-off-by: Mike Turquette <mturquette@linaro.org>
Cc: Rajagopal Venkat <rajagopal.venkat@linaro.org>
Cc: David Brown <davidb@codeaurora.org>
Tested-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
2013-04-02 10:23:41 -07:00
Mike Turquette eab89f690e clk: abstract locking out into helper functions
Create locking helpers for the global mutex and global spinlock.  The
definitions of these helpers will be expanded upon in the next patch
which introduces reentrancy into the locking scheme.

Signed-off-by: Mike Turquette <mturquette@linaro.org>
Cc: Rajagopal Venkat <rajagopal.venkat@linaro.org>
Cc: David Brown <davidb@codeaurora.org>
Tested-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
2013-04-02 10:23:08 -07:00
Thierry Reding 0f1bc12e9e clk: tegra: Allow PLLE training to succeed
Under some circumstances the PLLE needs to be retrained, in which case
access to the PMC registers is required. Fix this by passing a pointer
to the PMC registers instead of NULL when registering the PLLE clock.

Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Acked-By: Peter De Schrijver <pdeschrijver@nvidia.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-04-01 11:44:38 -07:00
Shawn Guo 0c672aae28 clk: mxs: remove the use of mach level IO accessor
It removes the use of mach level IO accessor __mxs_setl/clrl, and hence
removes mach header inclusion from clock driver.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Mike Turquette <mturquette@linaro.org>
2013-04-01 16:30:04 +08:00
Shawn Guo 38d6590f0f clk: mxs: get base address from device tree
Instead of using the static definitions, get clkctrl and digctl base
addresses with mapping from device tree.

Use macro on variable is not nice, but it's done here to save huge
pointless diff stat.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Mike Turquette <mturquette@linaro.org>
2013-04-01 16:30:04 +08:00
Shawn Guo 2efb950465 ARM: mxs: look up timrot clock from device tree
Change call clk_get_sys() to of_clk_get() to look up timrot clock from
device tree, so that the clk_register_clkdev() call for timrot can be
saved in clock driver.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-01 16:30:02 +08:00
Shawn Guo 633ef4c7d1 ARM: mxs: use CLKSRC_OF helper to initialize timer
Select CLKSRC_OF and use clocksource_of_init() to initialize timer, so
that the call to mxs_timer_init() in clock driver can be removed.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-01 16:30:01 +08:00
Stephen Warren e4bcda2834 ARM: tegra: move <mach/powergate.h> to <linux/tegra-powergate.h>
This is required so that code such as Tegra's PCIe and clock drivers
can still access this header file once Tegra is converted to
multiplatform, and <mach/> no longer exists.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-03-29 18:10:22 -06:00
Heiko Stuebner 5e2e0195ec clk: samsung: add infrastructure to add separate aliases
The current code adds aliases, if necessary, directly when adding
the clock, limiting the number of possible aliases to one.

Some platforms need more than one alias, like the hsmmc pclocks on
s3c2416 which need a "hsmmc" and "mmc_busclk.0" alias for the s3c-
sdhci driver.

Therefore add the possibility to separately add clock aliases for
previously created clocks.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-03-28 14:46:33 +09:00
Heiko Stuebner 6e92bf5a01 clk: samsung: always allocate the clk_table
This is needed to allow looking up previous created clocks when
adding separate aliases to them.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-03-28 14:46:26 +09:00
Heiko Stueber 2466196d3e clk: samsung: fix pm init on non-dt platforms
The clock_init function checked for a dt node, returning immediately
for non-dt machines. This let to the suspend init never being reached
on those non-DT machines.

So fix this by moving the pm init code above the check.

Signed-off-by: Heiko Stueber <heiko@sntech.de>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-03-28 14:46:18 +09:00
Heiko Stuebner 798ed613f5 clk: samsung: register clk_div_tables for divider clocks
On some Samsung platforms divider clocks only use specific divider
combinations like the armdiv on s3c2443 and s3c2416. For these
usecases the generic divider clock already provides the option of
providing a lookup table mapping register values to divider values.

Therefore add a new field to samsung_div_clock and if filled with a
table, use clk_register_divider_table instead of clk_register_divider
to register a divider clock

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Thomas Abraham <thomas.abraham@linaro.org>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-03-28 14:46:03 +09:00
Michal Simek 43c4120c06 clk: zynq: Add missing zynq clk header
Include zynq clk header where init function is declared.

It removes this sparse warning:
drivers/clk/clk-zynq.c:373:13: warning: symbol
'xilinx_zynq_clocks_init' was not declared. Should it be static?

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-03-27 08:44:07 -07:00
Emilio López e3276998da clk: sunxi: rename compatible strings
During the introduction of the Allwinner SoC platforms, sunxi was
initially meant as a generic name for all the variants of the Allwinner
SoC.

It was ok at the time of the support of only the A10 and A13 that
look pretty much the same; but it's beginning to be troublesome with
the future addition of the Allwinner A31 (sun6i) that is quite
different, and would introduce some weird logic, where sunxi would
actually mean in some case sun4i and sun5i but without sun6i...

Moreover, it makes the compatible strings naming scheme not consistent
with other architectures, where usually for this kind of compability, we
just use the oldest SoC name that has this IP, so let's do just this.

Signed-off-by: Emilio López <emilio@elopez.com.ar>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-03-27 08:35:35 -07:00
Emilio López e874a66977 clk: arm: sunxi: Add a new clock driver for sunxi SOCs
This commit implements the base CPU clocks for sunxi devices. It has
been tested using a slightly modified cpufreq driver from the
linux-sunxi 3.0 tree.

Additionally, document the new bindings introduced by this patch.

Idling:
    / # cat /sys/kernel/debug/clk/clk_summary
       clock                        enable_cnt  prepare_cnt  rate
    ---------------------------------------------------------------------
     osc32k                         0           0            32768
     osc24M_fixed                   0           0            24000000
        osc24M                      0           0            24000000
           apb1_mux                 0           0            24000000
              apb1                  0           0            24000000
           pll1                     0           0            60000000
              cpu                   0           0            60000000
                 axi                0           0            60000000
                    ahb             0           0            60000000
                       apb0         0           0            30000000
     dummy                          0           0            0

After "yes >/dev/null &":
    / # cat /sys/kernel/debug/clk/clk_summary
       clock                        enable_cnt  prepare_cnt  rate
    ---------------------------------------------------------------------
     osc32k                         0           0            32768
     osc24M_fixed                   0           0            24000000
        osc24M                      0           0            24000000
           apb1_mux                 0           0            24000000
              apb1                  0           0            24000000
           pll1                     0           0            1008000000
              cpu                   0           0            1008000000
                 axi                0           0            336000000
                    ahb             0           0            168000000
                       apb0         0           0            84000000
     dummy                          0           0            0

Signed-off-by: Emilio López <emilio@elopez.com.ar>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-03-27 08:35:34 -07:00
Maxime Coquelin b548916851 clk: ux500: Fix prcmu clocks registration
In clk_reg_prcmu(), clk->hw.init field is assigned with a
reference local to clk_reg_prcmu() function.

This patch replaces references to clk->hw.init with calls
to __clk_get_name when called after clock registration.

This patch applies on top of v3.9-rc4.

Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
Acked-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
[mturquette@linaro.org: resolved trivial merge issues]
2013-03-27 08:35:33 -07:00
Prashant Gaikwad ece70094f6 clk: Add composite clock type
Not all clocks are required to be decomposed into basic clock
types but at the same time want to use the functionality
provided by these basic clock types instead of duplicating.

For example, Tegra SoC has ~100 clocks which can be decomposed
into Mux -> Div -> Gate clock types making the clock count to
~300. Also, parent change operation can not be performed on gate
clock which forces to use mux clock in driver if want to change
the parent.

Instead aggregate the basic clock types functionality into one
clock and just use this clock for all operations. This clock
type re-uses the functionality of basic clock types and not
limited to basic clock types but any hardware-specific
implementation.

Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-03-26 12:51:48 -07:00
Thomas Abraham f2585b1cce clk: exynos5440: register clocks using common clock framework
The Exynos5440 clocks are statically listed and registered using the
Samsung specific common clock helper functions.

Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-03-25 18:17:05 +09:00
Thomas Abraham 6e3ad26816 clk: exynos5250: register clocks using common clock framework
The Exynos5250 clocks are statically listed and registered using the
Samsung specific common clock helper functions. Both device tree based
clock lookup and clkdev based clock lookups are supported.

Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-03-25 18:16:56 +09:00
Thomas Abraham e062b57177 clk: exynos4: register clocks using common clock framework
The Exynos4 clocks are statically listed and registered using the
Samsung specific common clock helper functions. Both device tree
based clock lookup and clkdev based clock lookups are supported.

Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Tested-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Tested-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-03-25 18:16:47 +09:00
Thomas Abraham 1c4c5fe0b7 clk: samsung: add pll clock registration helper functions
There are several types of pll clocks used in Samsung SoC's and these
pll clocks can be represented as Samsung specific pll clock types and
registered with the common clock framework. Add support for pll35xx,
pll36xx, pll45xx, pll46xx and pll2550x clock types and helper functions
to register them.

Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Tested-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Tested-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-03-25 18:16:37 +09:00
Thomas Abraham 721c42a351 clk: samsung: add common clock framework helper functions for Samsung platforms
All Samsung platforms include different types of clock including
fixed-rate, mux, divider and gate clock types. There are typically
hundreds of such clocks on each of the Samsung platforms. To enable
Samsung platforms to register these clocks using the common clock
framework, a bunch of utility functions are introduced here which
simplify the clock registration process. The clocks are usually
statically instantiated and registered with common clock framework.

Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Tested-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Tested-by: Tomasz Figa <t.figa@samsung.com>
Tested-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-03-25 18:16:09 +09:00
Peter De Schrijver ce4f3313b0 clk: add table lookup to mux
Add a table lookup feature to the mux clock. Also allow arbitrary masks
instead of the width. This will be used by some clocks on Tegra114. Also
adapt the tegra periph clk because it uses struct clk_mux directly.

Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-03-22 15:18:18 -07:00
Sachin Kamat 5fda6858a4 clk: Fix incorrect return type in clk.c
Return type of function clk_propagate_rate_change is a pointer.
But 0 was being returned. Change it to NULL.
Silences the following warning:
drivers/clk/clk.c:977:24: warning: Using plain integer as NULL pointer

Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Reviewed-by: Pankaj Jangra <jangra.pankaj9@gmail.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-03-22 15:18:18 -07:00
Wei Yongjun f15ea6cbc8 clk: prima2: fix return value check in sirfsoc_of_clk_init()
In case of error, the function clk_get() returns ERR_PTR()
not NULL. The NULL test in the return value check should
be replaced with IS_ERR().

Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
Acked-by: Barry Song <21cnbao@gmail.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
[mturquette@linaro.org: added missing parenthesis to fix compile break]
2013-03-22 15:16:31 -07:00
Rafael J. Wysocki f58b082aed ACPI / scan: Add special handler for Intel Lynxpoint LPSS devices
Devices on the Intel Lynxpoint Low Power Subsystem (LPSS) have some
common features that aren't shared with any other platform devices,
including the clock and LTR (Latency Tolerance Reporting) registers.
It is better to handle those features in common code than to bother
device drivers with doing that (I/O functionality-wise the LPSS
devices are generally compatible with other devices that don't
have those special registers and may be handled by the same drivers).

The clock registers of the LPSS devices are now taken care of by
the special clk-x86-lpss driver, but the MMIO mappings used for
accessing those registers can also be used for accessing the LTR
registers on those devices (LTR support for the Lynxpoint LPSS is
going to be added by a subsequent patch).  Thus it is convenient
to add a special ACPI scan handler for the Lynxpoint LPSS devices
that will create the MMIO mappings for accessing the clock (and
LTR in the future) registers and will register the LPSS devices'
clocks, so the clk-x86-lpss driver will only need to take care of
the main Lynxpoint LPSS clock.

Introduce a special ACPI scan handler for Intel Lynxpoint LPSS
devices as described above.  This also reduces overhead related to
browsing the ACPI namespace in search of the LPSS devices before the
registration of their clocks, removes some LPSS-specific (and
somewhat ugly) code from acpi_platform.c and shrinks the overall code
size slightly.

Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
2013-03-21 22:44:38 +01:00
Vipul Kumar Samar 0498172417 clk:SPEAr1340: Correct parent clock configuration
This patch corrects wrongly configured parent clock for following
devices:

   * Video enc/decoder
   * Video ip
   * Pin control
   * ACP
   * camx

Signed-off-by: Vipul Kumar Samar <vipulkumar.samar@st.com>
Reviewed-by: Shiraz Hashim <shiraz.hashim@st.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-03-21 14:36:55 -07:00
Masanari Iida 07f4225889 treewide: Fix typos in printk
Correct spelling typo in various drivers.

Signed-off-by: Masanari Iida <standby24x7@gmail.com>
Signed-off-by: Jiri Kosina <jkosina@suse.cz>
2013-03-20 16:26:32 +01:00
Lars-Peter Clausen 0e646c52cf clk: Add axi-clkgen driver
This driver adds support for the AXI clkgen pcore to the common clock framework.
The AXI clkgen pcore is a AXI front-end to the MMCM_ADV frequency synthesizer
commonly found in Xilinx FPGAs.

The AXI clkgen pcore is used in Analog Devices' reference designs targeting
Xilinx FPGAs.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-03-19 17:20:30 -07:00
Ulf Hansson 2850985f77 clk: ux500: Support is_prepared callback for clk-prcmu
To be able to gate unused prcmu clocks from the clk_disable_unused sequence,
clk-prcmu now implements the is_prepared callback.

Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-03-19 12:58:44 -07:00
Ulf Hansson 3cc8247f1d clk: Introduce optional unprepare_unused callback
An unprepare_unused callback is introduced due to the same reasons to
why the disable_unused callback was added.

During the clk_disable_unused sequence, those clk_hw that needs specific
treatment with regards to being unprepared, shall implement the
unprepare_unused callback.

Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-03-19 12:58:43 -07:00
Ulf Hansson 1c155b3dfe clk: Unprepare the unused prepared slow clocks at late init
The unused ungated fast clocks are already being disabled from
clk_disable_unused at late init. This patch extend this sequence
to the slow unused prepared clocks to be unprepared.

Unless the optional .is_prepared callback is implemented by a
clk_hw the clk_disable_unused sequence will not unprepare any
unused clocks, since it will fall back to use the software
prepare counter.

Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
[mturquette@linaro.org: fixed hlist accessors per b67bfe0d]
2013-03-19 12:58:42 -07:00
Ulf Hansson 3d6ee287a3 clk: Introduce optional is_prepared callback
To reflect whether a clk_hw is prepared the clk_hw may implement
the optional is_prepared callback. If not implemented we fall back
to use the software prepare counter.

Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-03-19 12:58:42 -07:00
Fabio Estevam 30ee400614 clk: mxs: Fix sparse warnings
Fix the following sparse warnings:

drivers/clk/mxs/clk.c:17:1: warning: symbol 'mxs_lock' was not declared. Should it be static?
drivers/clk/mxs/clk.c:19:5: warning: symbol 'mxs_clk_wait' was not declared. Should it be static?

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-03-19 12:58:41 -07:00
Arnd Bergmann d6d1053a8b clk: vt8500: Fix "fix device clock divisor calculations"
Patch 72480014b8 "Fix device clock divisor calculations" was apparently
rebased incorrectly before it got upstream, causing a build error.

Replacing the "prate" pointer with the local parent_rate is most
likely the correct solution.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Cc: Tony Prisk <linux@prisktech.co.nz>
Cc: Mike Turquette <mturquette@linaro.org>
2013-03-14 22:34:26 +01:00
Arnd Bergmann d9909ebe65 ARM: spear: make clock driver independent of headers
Device drivers should not access MMIO registers through hardcoded
platform specific address constants. Instead, we can pass the
MMIO token to the spear clock driver in the initialization routine
to contain that knowledge in the platform code itself.

Ideally, the clock driver would use of_iomap() or similar to
get the address, and that can be used later, but for now, this
is the minimal change.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
2013-03-12 17:39:58 +01:00
Peter De Schrijver bf161d2163 clk: tegra: No 7.1 super clk dividers on Tegra20
Unlike Tegra30, Tegra20 does not have a 7.1 divider for the CPU superclk.
Remove the clocks related to the divider.

Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-03-11 14:29:22 -06:00
Prashant Gaikwad 984b839337 clk: Tegra: Remove duplicate smp_twd clock
Remove duplicate smp_twd clocks as these clocks are accessed using
DT now.

Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2013-03-04 17:16:37 -08:00
Lee Jones 1e6b680140 clk: ux500: Provide an alias for the SMSC911x Ethernet chip
In the case of some of the ux500 platforms, an Ethernet chip is
placed on an extended bus which is traditionally used as a NAND
flash chip placeholder. The p3_pclk0 clock is used to control it,
so we are required to provide and easy way to access it from the
SMSC911x driver. We do this using an alias provided by this patch.

Acked-by: Mike Turquette <mturquette@linaro.org>
Acked-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-01 23:23:20 +01:00
Lee Jones 9ea49fff04 clk: ux500: Ensure the FMSC clock is obtainable
The FMSC clock is traditionally used for NAND flash devices when
used on the ux500 series platforms. This patch makes it searchable
during a clock-name search.

Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-01 23:23:19 +01:00
Sasha Levin b67bfe0d42 hlist: drop the node parameter from iterators
I'm not sure why, but the hlist for each entry iterators were conceived

        list_for_each_entry(pos, head, member)

The hlist ones were greedy and wanted an extra parameter:

        hlist_for_each_entry(tpos, pos, head, member)

Why did they need an extra pos parameter? I'm not quite sure. Not only
they don't really need it, it also prevents the iterator from looking
exactly like the list iterator, which is unfortunate.

Besides the semantic patch, there was some manual work required:

 - Fix up the actual hlist iterators in linux/list.h
 - Fix up the declaration of other iterators based on the hlist ones.
 - A very small amount of places were using the 'node' parameter, this
 was modified to use 'obj->member' instead.
 - Coccinelle didn't handle the hlist_for_each_entry_safe iterator
 properly, so those had to be fixed up manually.

The semantic patch which is mostly the work of Peter Senna Tschudin is here:

@@
iterator name hlist_for_each_entry, hlist_for_each_entry_continue, hlist_for_each_entry_from, hlist_for_each_entry_rcu, hlist_for_each_entry_rcu_bh, hlist_for_each_entry_continue_rcu_bh, for_each_busy_worker, ax25_uid_for_each, ax25_for_each, inet_bind_bucket_for_each, sctp_for_each_hentry, sk_for_each, sk_for_each_rcu, sk_for_each_from, sk_for_each_safe, sk_for_each_bound, hlist_for_each_entry_safe, hlist_for_each_entry_continue_rcu, nr_neigh_for_each, nr_neigh_for_each_safe, nr_node_for_each, nr_node_for_each_safe, for_each_gfn_indirect_valid_sp, for_each_gfn_sp, for_each_host;

type T;
expression a,c,d,e;
identifier b;
statement S;
@@

-T b;
    <+... when != b
(
hlist_for_each_entry(a,
- b,
c, d) S
|
hlist_for_each_entry_continue(a,
- b,
c) S
|
hlist_for_each_entry_from(a,
- b,
c) S
|
hlist_for_each_entry_rcu(a,
- b,
c, d) S
|
hlist_for_each_entry_rcu_bh(a,
- b,
c, d) S
|
hlist_for_each_entry_continue_rcu_bh(a,
- b,
c) S
|
for_each_busy_worker(a, c,
- b,
d) S
|
ax25_uid_for_each(a,
- b,
c) S
|
ax25_for_each(a,
- b,
c) S
|
inet_bind_bucket_for_each(a,
- b,
c) S
|
sctp_for_each_hentry(a,
- b,
c) S
|
sk_for_each(a,
- b,
c) S
|
sk_for_each_rcu(a,
- b,
c) S
|
sk_for_each_from
-(a, b)
+(a)
S
+ sk_for_each_from(a) S
|
sk_for_each_safe(a,
- b,
c, d) S
|
sk_for_each_bound(a,
- b,
c) S
|
hlist_for_each_entry_safe(a,
- b,
c, d, e) S
|
hlist_for_each_entry_continue_rcu(a,
- b,
c) S
|
nr_neigh_for_each(a,
- b,
c) S
|
nr_neigh_for_each_safe(a,
- b,
c, d) S
|
nr_node_for_each(a,
- b,
c) S
|
nr_node_for_each_safe(a,
- b,
c, d) S
|
- for_each_gfn_sp(a, c, d, b) S
+ for_each_gfn_sp(a, c, d) S
|
- for_each_gfn_indirect_valid_sp(a, c, d, b) S
+ for_each_gfn_indirect_valid_sp(a, c, d) S
|
for_each_host(a,
- b,
c) S
|
for_each_host_safe(a,
- b,
c, d) S
|
for_each_mesh_entry(a,
- b,
c, d) S
)
    ...+>

[akpm@linux-foundation.org: drop bogus change from net/ipv4/raw.c]
[akpm@linux-foundation.org: drop bogus hunk from net/ipv6/raw.c]
[akpm@linux-foundation.org: checkpatch fixes]
[akpm@linux-foundation.org: fix warnings]
[akpm@linux-foudnation.org: redo intrusive kvm changes]
Tested-by: Peter Senna Tschudin <peter.senna@gmail.com>
Acked-by: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
Signed-off-by: Sasha Levin <sasha.levin@oracle.com>
Cc: Wu Fengguang <fengguang.wu@intel.com>
Cc: Marcelo Tosatti <mtosatti@redhat.com>
Cc: Gleb Natapov <gleb@redhat.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2013-02-27 19:10:24 -08:00
Linus Torvalds a8f3740feb arm-soc: device tree conversions
These are device tree conversions for a number of platforms,
 with the intention of turning code from board files into
 device tree descriptions. Notable changes are:
 
 * davinci bindings for pinctrl, MTD, RTC, watchdog and i2c
 * nomadik bindings for all devices, removing the board files
 * bcm2835 bindings for mmc and i2c
 * tegra bindings for hdmi, keyboard, audio, as well as some updates
 * at91 bindings for hardware ecc and for devices on RM9200
 * mxs bindings for cfa100xx
 * sunxi support for Miniand Hackberry board
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Merge tag 'dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC device tree conversions from Arnd Bergmann:
 "These are device tree conversions for a number of platforms, with the
  intention of turning code from board files into device tree
  descriptions.  Notable changes are:

   - davinci bindings for pinctrl, MTD, RTC, watchdog and i2c

   - nomadik bindings for all devices, removing the board files

   - bcm2835 bindings for mmc and i2c

   - tegra bindings for hdmi, keyboard, audio, as well as some updates

   - at91 bindings for hardware ecc and for devices on RM9200

   - mxs bindings for cfa100xx

   - sunxi support for Miniand Hackberry board"

* tag 'dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (72 commits)
  Revert "sunxi: a10-cubieboard: Add user LEDs to the device tree"
  Revert "sunxi: a13-olinuxino: Add user LED to the device tree"
  clk: tegra: initialise parent of uart clocks
  ARM: tegra: remove clock-frequency properties from serial nodes
  clk: tegra: fix driver to match DT binding
  clk: tegra: local arrays should be static
  clk: tegra: Add missing spinlock for hclk and pclk
  clk: tegra: Implement locking for super clock
  clk: tegra: fix wrong clock index between se to sata_cold
  sunxi: a13-olinuxino: Add user LED to the device tree
  ARM: davinci: da850 DT: add support for machine reboot
  ARM: davinci: da850: add wdt DT node
  ARM: davinci: da850: add DT node for I2C0
  ARM: at91: at91sam9n12: add DT parameters to enable PMECC
  ARM: at91: at91sam9x5: add DT parameters to enable PMECC
  ARM: at91: add EMAC bindings to RM9200 DT
  ARM: at91: add SSC bindings to RM9200 DT
  ARM: at91: add MMC bindings to RM9200 DT
  ARM: at91: Animeo IP: enable watchdog support
  ARM: nomadik: fix OF compilation regression
  ...
2013-02-21 15:38:49 -08:00
Linus Torvalds bab588fcfb arm-soc: soc-specific updates
This is a larger set of new functionality for the existing SoC families,
 including:
 
 * vt8500 gains support for new CPU cores, notably the Cortex-A9 based wm8850
 * prima2 gains support for the "marco" SoC family, its SMP based cousin
 * tegra gains support for the new Tegra4 (Tegra114) family
 * socfpga now supports a newer version of the hardware including SMP
 * i.mx31 and bcm2835 are now using DT probing for their clocks
 * lots of updates for sh-mobile
 * OMAP updates for clocks, power management and USB
 * i.mx6q and tegra now support cpuidle
 * kirkwood now supports PCIe hot plugging
 * tegra clock support is updated
 * tegra USB PHY probing gets implemented diffently
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Merge tag 'soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC-specific updates from Arnd Bergmann:
 "This is a larger set of new functionality for the existing SoC
  families, including:

   - vt8500 gains support for new CPU cores, notably the Cortex-A9 based
     wm8850

   - prima2 gains support for the "marco" SoC family, its SMP based
     cousin

   - tegra gains support for the new Tegra4 (Tegra114) family

   - socfpga now supports a newer version of the hardware including SMP

   - i.mx31 and bcm2835 are now using DT probing for their clocks

   - lots of updates for sh-mobile

   - OMAP updates for clocks, power management and USB

   - i.mx6q and tegra now support cpuidle

   - kirkwood now supports PCIe hot plugging

   - tegra clock support is updated

   - tegra USB PHY probing gets implemented diffently"

* tag 'soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (148 commits)
  ARM: prima2: remove duplicate v7_invalidate_l1
  ARM: shmobile: r8a7779: Correct TMU clock support again
  ARM: prima2: fix __init section for cpu hotplug
  ARM: OMAP: Consolidate OMAP USB-HS platform data (part 3/3)
  ARM: OMAP: Consolidate OMAP USB-HS platform data (part 1/3)
  arm: socfpga: Add SMP support for actual socfpga harware
  arm: Add v7_invalidate_l1 to cache-v7.S
  arm: socfpga: Add entries to enable make dtbs socfpga
  arm: socfpga: Add new device tree source for actual socfpga HW
  ARM: tegra: sort Kconfig selects for Tegra114
  ARM: tegra: enable ARCH_REQUIRE_GPIOLIB for Tegra114
  ARM: tegra: Fix build error w/ ARCH_TEGRA_114_SOC w/o ARCH_TEGRA_3x_SOC
  ARM: tegra: Fix build error for gic update
  ARM: tegra: remove empty tegra_smp_init_cpus()
  ARM: shmobile: Register ARM architected timer
  ARM: MARCO: fix the build issue due to gic-vic-to-irqchip move
  ARM: shmobile: r8a7779: Correct TMU clock support
  ARM: mxs_defconfig: Select CONFIG_DEVTMPFS_MOUNT
  ARM: mxs: decrease mxs_clockevent_device.min_delta_ns to 2 clock cycles
  ARM: mxs: use apbx bus clock to drive the timers on timrotv2
  ...
2013-02-21 15:27:22 -08:00
Linus Torvalds 5ce7aba976 arm-soc: driver specific changes
* Updates to the ux500 cpufreq code
 * Moving the u300 DMA controller driver to drivers/dma
 * Moving versatile express drivers out of arch/arm for sharing with arch/arm64
 * Device tree bindings for the OMAP General Purpose Memory Controller
 
 There is a simple conflict in drivers/cpufreq/dbx500-cpufreq.c, because
 the mach/id.h header and the cpu_is_u8500_family() function in it are
 now gone.
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Merge tag 'drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC driver specific changes from Arnd Bergmann:

 - Updates to the ux500 cpufreq code

 - Moving the u300 DMA controller driver to drivers/dma

 - Moving versatile express drivers out of arch/arm for sharing with arch/arm64

 - Device tree bindings for the OMAP General Purpose Memory Controller

* tag 'drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (27 commits)
  ARM: OMAP2+: gpmc: Add device tree documentation for elm handle
  ARM: OMAP2+: gpmc: add DT bindings for OneNAND
  ARM: OMAP2+: gpmc-onenand: drop __init annotation
  mtd: omap-onenand: pass device_node in platform data
  ARM: OMAP2+: Prevent potential crash if GPMC probe fails
  ARM: OMAP2+: gpmc: Remove unneeded of_node_put()
  arm: Move sp810.h to include/linux/amba/
  ARM: OMAP: gpmc: add DT bindings for GPMC timings and NAND
  ARM: OMAP: gpmc: enable hwecc for AM33xx SoCs
  ARM: OMAP: gpmc-nand: drop __init annotation
  mtd: omap-nand: pass device_node in platform data
  ARM: OMAP: gpmc: don't create devices from initcall on DT
  dma: coh901318: cut down on platform data abstraction
  dma: coh901318: merge header files
  dma: coh901318: push definitions into driver
  dma: coh901318: push header down into the DMA subsystem
  dma: coh901318: skip hard-coded addresses
  dma: coh901318: remove hardcoded target addresses
  dma: coh901318: push platform data into driver
  dma: coh901318: create a proper platform data file
  ...
2013-02-21 15:12:18 -08:00
Linus Torvalds 8793422fd9 ACPI and power management updates for 3.9-rc1
- Rework of the ACPI namespace scanning code from Rafael J. Wysocki
   with contributions from Bjorn Helgaas, Jiang Liu, Mika Westerberg,
   Toshi Kani, and Yinghai Lu.
 
 - ACPI power resources handling and ACPI device PM update from
   Rafael J. Wysocki.
 
 - ACPICA update to version 20130117 from Bob Moore and Lv Zheng
   with contributions from Aaron Lu, Chao Guan, Jesper Juhl, and
   Tim Gardner.
 
 - Support for Intel Lynxpoint LPSS from Mika Westerberg.
 
 - cpuidle update from Len Brown including Intel Haswell support, C1
   state for intel_idle, removal of global pm_idle.
 
 - cpuidle fixes and cleanups from Daniel Lezcano.
 
 - cpufreq fixes and cleanups from Viresh Kumar and Fabio Baltieri
   with contributions from Stratos Karafotis and Rickard Andersson.
 
 - Intel P-states driver for Sandy Bridge processors from
   Dirk Brandewie.
 
 - cpufreq driver for Marvell Kirkwood SoCs from Andrew Lunn.
 
 - cpufreq fixes related to ordering issues between acpi-cpufreq and
   powernow-k8 from Borislav Petkov and Matthew Garrett.
 
 - cpufreq support for Calxeda Highbank processors from Mark Langsdorf
   and Rob Herring.
 
 - cpufreq driver for the Freescale i.MX6Q SoC and cpufreq-cpu0 update
   from Shawn Guo.
 
 - cpufreq Exynos fixes and cleanups from Jonghwan Choi, Sachin Kamat,
   and Inderpal Singh.
 
 - Support for "lightweight suspend" from Zhang Rui.
 
 - Removal of the deprecated power trace API from Paul Gortmaker.
 
 - Assorted updates from Andreas Fleig, Colin Ian King,
   Davidlohr Bueso, Joseph Salisbury, Kees Cook, Li Fei,
   Nishanth Menon, ShuoX Liu, Srinivas Pandruvada, Tejun Heo,
   Thomas Renninger, and Yasuaki Ishimatsu.
 
 /
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Merge tag 'pm+acpi-3.9-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm

Pull ACPI and power management updates from Rafael Wysocki:

 - Rework of the ACPI namespace scanning code from Rafael J.  Wysocki
   with contributions from Bjorn Helgaas, Jiang Liu, Mika Westerberg,
   Toshi Kani, and Yinghai Lu.

 - ACPI power resources handling and ACPI device PM update from Rafael
   J Wysocki.

 - ACPICA update to version 20130117 from Bob Moore and Lv Zheng with
   contributions from Aaron Lu, Chao Guan, Jesper Juhl, and Tim Gardner.

 - Support for Intel Lynxpoint LPSS from Mika Westerberg.

 - cpuidle update from Len Brown including Intel Haswell support, C1
   state for intel_idle, removal of global pm_idle.

 - cpuidle fixes and cleanups from Daniel Lezcano.

 - cpufreq fixes and cleanups from Viresh Kumar and Fabio Baltieri with
   contributions from Stratos Karafotis and Rickard Andersson.

 - Intel P-states driver for Sandy Bridge processors from Dirk
   Brandewie.

 - cpufreq driver for Marvell Kirkwood SoCs from Andrew Lunn.

 - cpufreq fixes related to ordering issues between acpi-cpufreq and
   powernow-k8 from Borislav Petkov and Matthew Garrett.

 - cpufreq support for Calxeda Highbank processors from Mark Langsdorf
   and Rob Herring.

 - cpufreq driver for the Freescale i.MX6Q SoC and cpufreq-cpu0 update
   from Shawn Guo.

 - cpufreq Exynos fixes and cleanups from Jonghwan Choi, Sachin Kamat,
   and Inderpal Singh.

 - Support for "lightweight suspend" from Zhang Rui.

 - Removal of the deprecated power trace API from Paul Gortmaker.

 - Assorted updates from Andreas Fleig, Colin Ian King, Davidlohr Bueso,
   Joseph Salisbury, Kees Cook, Li Fei, Nishanth Menon, ShuoX Liu,
   Srinivas Pandruvada, Tejun Heo, Thomas Renninger, and Yasuaki
   Ishimatsu.

* tag 'pm+acpi-3.9-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm: (267 commits)
  PM idle: remove global declaration of pm_idle
  unicore32 idle: delete stray pm_idle comment
  openrisc idle: delete pm_idle
  mn10300 idle: delete pm_idle
  microblaze idle: delete pm_idle
  m32r idle: delete pm_idle, and other dead idle code
  ia64 idle: delete pm_idle
  cris idle: delete idle and pm_idle
  ARM64 idle: delete pm_idle
  ARM idle: delete pm_idle
  blackfin idle: delete pm_idle
  sparc idle: rename pm_idle to sparc_idle
  sh idle: rename global pm_idle to static sh_idle
  x86 idle: rename global pm_idle to static x86_idle
  APM idle: register apm_cpu_idle via cpuidle
  cpufreq / intel_pstate: Add kernel command line option disable intel_pstate.
  cpufreq / intel_pstate: Change to disallow module build
  tools/power turbostat: display SMI count by default
  intel_idle: export both C1 and C1E
  ACPI / hotplug: Fix concurrency issues and memory leaks
  ...
2013-02-20 11:26:56 -08:00
Linus Torvalds 10b6339e93 The common clock framework changes for 3.9 are almost entirely fixes.
None are dire enough to be Cc'd to stable which may be interpreted to
 mean that users of the framework are reaching stability.  Lots of new
 adoption of this framework is via DeviceTree data and that comes through
 the respective architecture and platform trees instead of through the
 clk framework tree.  Two new features are improved debugfs output and an
 improvement to how DT clocks are initialized by reusing a common method.
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Merge tag 'clk-for-linus' of git://git.linaro.org/people/mturquette/linux

Pull clock framework update from Michael Turquette:
 "The common clock framework changes for 3.9 are almost entirely fixes.

  None are dire enough to be Cc'd to stable which may be interpreted to
  mean that users of the framework are reaching stability.  Lots of new
  adoption of this framework is via DeviceTree data and that comes
  through the respective architecture and platform trees instead of
  through the clk framework tree.

  Two new features are improved debugfs output and an improvement to how
  DT clocks are initialized by reusing a common method."

* tag 'clk-for-linus' of git://git.linaro.org/people/mturquette/linux: (25 commits)
  clk: sunxi: remove stale Makefile entry
  clk: vexpress: Use common of_clk_init() function
  clk: zynq: Use common of_clk_init() function
  clk: vt8500: Use common of_clk_init() function
  clk: highbank: Use common of_clk_init() function
  clk: sunxi: Use common of_clk_init() function
  clk: add common of_clk_init() function
  clk: Deduplicate exit code in clk_set_rate
  clk: beautify Makefile
  clk-divider: fix macros
  clk: prima2: enable dt-binding clkdev mapping
  clk: mxs: Index is always positive
  clk: max77686: Avoid double free at remove time
  clk: remove exported function from __init section
  clk: vt8500: Add support for WM8750/WM8850 PLL clocks
  clk: vt8500: Fix division-by-0 when requested rate=0
  clk: vt8500: Fix device clock divisor calculations
  clk: vt8500: Fix error in PLL calculations on non-exact match.
  clk: max77686: Remove unnecessary NULL checking for container_of()
  clk: JSON debugfs clock tree summary
  ...
2013-02-20 11:02:10 -08:00
Arnd Bergmann 89dfe564b5 ARM: tegra: common clock framework fixes
A number of small fixes are included to the new Tegra common clock
 driver. These are: Missing locking, definition of device tree clock IDs
 not matching the binding, a static cleanup, missing initialization of
 some UART clocks.
 
 This branch is based on Tegra's previous pull request tegra-for-3.9-dt.
 This dependency is caused by the one patch that edits the device tree.
 If this causes a problem, I can drop the final two patches in this pull
 request for now, and rebase it onto previous tegra-for-3.9-soc-ccf
 instead.
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Merge tag 'tegra-for-3.9-soc-ccf-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra into next/dt

ARM: tegra: common clock framework fixes

A number of small fixes are included to the new Tegra common clock
driver. These are: Missing locking, definition of device tree clock IDs
not matching the binding, a static cleanup, missing initialization of
some UART clocks.

This branch is based on Tegra's previous pull request tegra-for-3.9-dt.
This dependency is caused by the one patch that edits the device tree.
If this causes a problem, I can drop the final two patches in this pull
request for now, and rebase it onto previous tegra-for-3.9-soc-ccf
instead.

* tag 'tegra-for-3.9-soc-ccf-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra:
  clk: tegra: initialise parent of uart clocks
  ARM: tegra: remove clock-frequency properties from serial nodes
  clk: tegra: fix driver to match DT binding
  clk: tegra: local arrays should be static
  clk: tegra: Add missing spinlock for hclk and pclk
  clk: tegra: Implement locking for super clock
  clk: tegra: fix wrong clock index between se to sata_cold

(applied to next/dt branch rather than next/soc because of the
dependency)

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2013-02-19 22:38:51 +01:00
Rafael J. Wysocki 4419fbd4b4 Merge branch 'pm-cpufreq'
* pm-cpufreq: (55 commits)
  cpufreq / intel_pstate: Fix 32 bit build
  cpufreq: conservative: Fix typos in comments
  cpufreq: ondemand: Fix typos in comments
  cpufreq: exynos: simplify .init() for setting policy->cpus
  cpufreq: kirkwood: Add a cpufreq driver for Marvell Kirkwood SoCs
  cpufreq/x86: Add P-state driver for sandy bridge.
  cpufreq_stats: do not remove sysfs files if frequency table is not present
  cpufreq: Do not track governor name for scaling drivers with internal governors.
  cpufreq: Only call cpufreq_out_of_sync() for driver that implement cpufreq_driver.target()
  cpufreq: Retrieve current frequency from scaling drivers with internal governors
  cpufreq: Fix locking issues
  cpufreq: Create a macro for unlock_policy_rwsem{read,write}
  cpufreq: Remove unused HOTPLUG_CPU code
  cpufreq: governors: Fix WARN_ON() for multi-policy platforms
  cpufreq: ondemand: Replace down_differential tuner with adj_up_threshold
  cpufreq / stats: Get rid of CPUFREQ_STATDEVICE_ATTR
  cpufreq: Don't check cpu_online(policy->cpu)
  cpufreq: add imx6q-cpufreq driver
  cpufreq: Don't remove sysfs link for policy->cpu
  cpufreq: Remove unnecessary use of policy->shared_type
  ...
2013-02-15 13:59:07 +01:00
Arnd Bergmann fde8bc59c0 clk: sunxi: remove stale Makefile entry
Patch 85a18198 "clk: sunxi: Use common of_clk_init() function"
removed the clk-sunxi.c file but left the Makefile entry, which
causes a build error in multi_v7_defconfig:

make[4]: *** No rule to make target `drivers/clk/clk-sunxi.o', needed by `drivers/clk/built-in.o'.

The obvious fix is to remove the extraneous line from the
Makefile.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Cc: Prashant Gaikwad <pgaikwad@nvidia.com>
Cc: Maxime Ripard <maxime.ripard@anandra.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-02-14 20:51:58 -08:00
Laxman Dewangan 527fad1bc5 clk: tegra: initialise parent of uart clocks
Initialise the parent of UARTs to PLLP and disabling clock by
default.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-02-13 11:17:03 -07:00
Stephen Warren 0203d91247 clk: tegra: fix driver to match DT binding
enum tegra*_clk is intended to match the IDs listed in the Tegra clock
bindings. There are a few mismatches, which this patch fixes:

1) pll_s and cop were left out of the Tegra20 enum.

2) spdif_in and spdif_out were swapped relative to the Tegra30 binding.

3) i2cslow was misnamed as i2c_slow, and a duplicate i2cslow clock added
   to the Tegra30 enum.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Thierry Reding <thierry.reding@avionic-design.de>
Tested-by: Thierry Reding <thierry.reding@avionic-design.de>
2013-02-13 11:17:02 -07:00
Peter De Schrijver b4c154a339 clk: tegra: local arrays should be static
cclk_g_parents, cclk_lp_parents and sclk_parents are only accessed from within
clk-tegra30.c. Declare them static to avoid namespace polution.

Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
Reviewed-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-02-12 10:29:13 -07:00
Peter De Schrijver d076a206b2 clk: tegra: Add missing spinlock for hclk and pclk
The hclk and pclk clocks are controlled by the same register. Hence a lock is
required to avoid corruption.

Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
Reviewed-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-02-12 10:29:13 -07:00
Peter De Schrijver c64c65d494 clk: tegra: Implement locking for super clock
Although tegra_clk_register_super_mux() has a lock parameter, the lock is not
actually used by the code. Fixed with this patch.

Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
Reviewed-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-02-12 10:29:12 -07:00
Joseph Lo 22ca335f6d clk: tegra: fix wrong clock index between se to sata_cold
The index of se should be 127. And the previous clock index was 125. So
we need to set up the index for se to get the correct index between se
to sata_cold.

Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-02-12 10:29:12 -07:00
Rafael J. Wysocki 17b1639b30 Merge branch 'acpi-lpss'
* acpi-lpss:
  ACPI / platform: create LPSS clocks if Lynxpoint devices are found during scan
  clk: x86: add support for Lynxpoint LPSS clocks
  x86: add support for Intel Low Power Subsystem
  ACPI / platform: fix comment about the platform device name
  ACPI: add support for CSRT table
2013-02-11 13:21:27 +01:00
Olof Johansson 877cd95316 mxs soc changes for 3.9
- A couple of optimization on timer
  - Some updates on mxs_defconfig
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Merge tag 'mxs-soc-3.9' of git://git.linaro.org/people/shawnguo/linux-2.6 into next/soc

From Shawn Guo:
mxs soc changes for 3.9

 - A couple of optimization on timer
 - Some updates on mxs_defconfig

* tag 'mxs-soc-3.9' of git://git.linaro.org/people/shawnguo/linux-2.6:
  ARM: mxs_defconfig: Select CONFIG_DEVTMPFS_MOUNT
  ARM: mxs: decrease mxs_clockevent_device.min_delta_ns to 2 clock cycles
  ARM: mxs: use apbx bus clock to drive the timers on timrotv2
  ARM: mxs: Update mxs_defconfig
2013-02-09 18:27:28 -08:00
Andrew Lunn 2a4bd9f0db cpufreq: kirkwood: Add a cpufreq driver for Marvell Kirkwood SoCs
The Marvell Kirkwood SoCs have simple cpufreq support in hardware. The
CPU can either use the a high speed cpu clock, or the slower DDR
clock. Add a driver to swap between these two clock sources.

Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Acked-by: Jason Cooper <jason@lakedaemon.net>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2013-02-09 12:56:08 +01:00
Olof Johansson c8bfea3636 ARM: tegra: cpuidle enhancements
This pull request implements a new "LP2" cpuidle state for Tegra20,
 which makes use of the couple cpuidle feature.
 
 It is based on (most of) the previous pull request, with tag
 tegra-for-3.9-soc-usb.
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Merge tag 'tegra-for-3.9-soc-cpuidle' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra into next/soc

From Stephen Warren:
ARM: tegra: cpuidle enhancements

This pull request implements a new "LP2" cpuidle state for Tegra20,
which makes use of the couple cpuidle feature.

It is based on (most of) the previous pull request, with tag
tegra-for-3.9-soc-usb.

* tag 'tegra-for-3.9-soc-cpuidle' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra:
  ARM: tegra20: cpuidle: apply coupled cpuidle for powered-down mode
  ARM: tegra20: flowctrl: add support for cpu_suspend_enter/exit
  clk: tegra20: Implementing CPU low-power function for tegra_cpu_car_ops
  ARM: tegra20: cpuidle: add powered-down state for secondary CPU
  ARM: tegra: add pending SGI checking API

Signed-off-by: Olof Johansson <olof@lixom.net>
2013-02-05 12:46:18 -08:00
Olof Johansson bda6f8e6cd ARM: tegra: Common Clock Framework rework
Tegra already supports the common clock framework, but had issues:
 
 1) The clock driver was located in arch/arm/mach-tegra/ rather than
    drivers/clk/.
 
 2) A single "Tegra clock" type was implemented, rather than separate
    clock types for PLL, mux, divider, ... type in HW.
 
 3) Clock lookups by device drivers were still driven by device name
    and connection ID, rather than through device tree.
 
 This pull request solves all three issues. This required some DT changes
 to add clocks properties, and driver changes to request clocks more
 "correctly". Finally, this rework allows all AUXDATA to be removed from
 Tegra board files, and various duplicate clock lookup entries to be
 removed from the driver.
 
 This pull request is based on the previous pull request, with tag
 tegra-for-3.9-cleanup.
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Merge tag 'tegra-for-3.9-soc-ccf' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra into next/soc

From Stephen Warren:
ARM: tegra: Common Clock Framework rework

Tegra already supports the common clock framework, but had issues:

1) The clock driver was located in arch/arm/mach-tegra/ rather than
   drivers/clk/.

2) A single "Tegra clock" type was implemented, rather than separate
   clock types for PLL, mux, divider, ... type in HW.

3) Clock lookups by device drivers were still driven by device name
   and connection ID, rather than through device tree.

This pull request solves all three issues. This required some DT changes
to add clocks properties, and driver changes to request clocks more
"correctly". Finally, this rework allows all AUXDATA to be removed from
Tegra board files, and various duplicate clock lookup entries to be
removed from the driver.

This pull request is based on the previous pull request, with tag
tegra-for-3.9-cleanup.

* tag 'tegra-for-3.9-soc-ccf' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra: (31 commits)
  clk: tegra30: remove unused TEGRA_CLK_DUPLICATE()s
  clk: tegra20: remove unused TEGRA_CLK_DUPLICATE()s
  ARM: tegra30: remove auxdata
  ARM: tegra20: remove auxdata
  ASoC: tegra: remove auxdata
  staging: nvec: remove use of clk_get_sys
  ARM: tegra: paz00: add clock information to DT
  ARM: tegra: add clock properties to Tegra30 DT
  ARM: tegra: add clock properties to Tegra20 DT
  spi: tegra: do not use clock name to get clock
  ARM: tegra: remove legacy clock code
  ARM: tegra: migrate to new clock code
  clk: tegra: add clock support for Tegra30
  clk: tegra: add clock support for Tegra20
  clk: tegra: add Tegra specific clocks
  ARM: tegra: define Tegra30 CAR binding
  ARM: tegra: define Tegra20 CAR binding
  ARM: tegra: move tegra_cpu_car.h to linux/clk/tegra.h
  ARM: tegra: add function to read chipid
  ARM: tegra: fix compile error when disable CPU_IDLE
  ...

Signed-off-by: Olof Johansson <olof@lixom.net>

Conflicts:
	arch/arm/mach-tegra/board-dt-tegra20.c
	arch/arm/mach-tegra/board-dt-tegra30.c
	arch/arm/mach-tegra/common.c
	arch/arm/mach-tegra/platsmp.c
	drivers/clocksource/Makefile
2013-02-05 12:13:10 -08:00
Olof Johansson 469da62096 Linux 3.8-rc6
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Merge tag 'v3.8-rc6' into next/soc

Linux 3.8-rc6
2013-02-04 22:56:41 -08:00
Torben Hohn 2fb318ff75 ARM: mxs: use apbx bus clock to drive the timers on timrotv2
timer resolution of ~32us is pretty low.
v2 has 32bits resolution, so we have quite some headroom, and
can use the 24MHz clock.
v1 has only 16bits, so we only increase v2.

So we just exchange the timrot clock in imx28.
On imx23 we have timrotv1 and everything stays the same.

Signed-off-by: Torben Hohn <torbenh@linutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-02-05 11:19:46 +08:00
Mark Langsdorf b596470853 clk / highbank: Prevent glitches in non-bypass reset mode
The highbank clock will glitch with the current code if the
clock rate is reset without relocking the PLL. Program the PLL
correctly to prevent glitches.

Signed-off-by: Mark Langsdorf <mark.langsdorf@calxeda.com>
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2013-02-02 00:01:15 +01:00
Catalin Marinas da660b4a3b arm: Move sp810.h to include/linux/amba/
Since it is now used by code under drivers/clk/ it makes sense for this
file to be in a more generic location. This is required for building
vexpress support on arm64.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Pawel Moll <pawel.moll@arm.com>
Cc: Shiraz Hashim <shiraz.hashim@st.com>
Cc: Russell King <linux@arm.linux.org.uk>
Signed-off-by: Pawel Moll <pawel.moll@arm.com>
2013-01-30 15:55:45 +00:00
Joseph Lo 4a2e32794e clk: tegra20: Implementing CPU low-power function for tegra_cpu_car_ops
Implementing suspend, resume and rail_off_ready API for tegra_cpu_car_ops. These
functions were used for CPU powered-down state maintenance.

Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-28 11:20:38 -07:00
Prashant Gaikwad ef3ffe5a04 clk: tegra30: remove unused TEGRA_CLK_DUPLICATE()s
With device tree support added for Tegra clocks look up is done from
device tree, remove unused TEGRA_CLK_DUPLICATE()s.

Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-28 11:19:34 -07:00
Prashant Gaikwad e5dd263022 clk: tegra20: remove unused TEGRA_CLK_DUPLICATE()s
With device tree support added for Tegra clocks look up is done from
device tree, remove unused TEGRA_CLK_DUPLICATE()s.

Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-28 11:19:34 -07:00
Prashant Gaikwad 61fd290d21 ARM: tegra: migrate to new clock code
Migrate Tegra clock support to drivers/clk/tegra, this involves
moving:
1. definition of tegra_cpu_car_ops to clk.c
2. definition of reset functions to clk-peripheral.c
3. change parent of cpu clock.
4. Remove legacy clock initialization.
5. Initialize clocks using DT.
6. Remove all instance of mach/clk.h

Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
[swarren: use to_clk_periph_gate().]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-28 11:19:07 -07:00
Prashant Gaikwad b08e8c0ecc clk: tegra: add clock support for Tegra30
Add Tegra30 clock support based on common clock framework.

Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
[swarren: ensure all OF lookups return valid cookies i.e. an explicit
error pointer or valid pointer not NULL, adapt to renames in earlier
patches, fixed some checkpatch issues.]
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-28 11:19:07 -07:00
Prashant Gaikwad 37c26a9065 clk: tegra: add clock support for Tegra20
Add Tegra20 clock support based on common clock framework.

Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
[swarren: s/1GHz/100MHz/ in call to tegra_clk_plle() to fix PCIe,
implemented KBC clock, ensure all OF lookups return valid cookies i.e.
an explicit error pointer or valid pointer not NULL, adapt to renames
in earlier patches, fixed some checkpatch issues.]
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-28 11:19:07 -07:00
Prashant Gaikwad 8f8f484bf3 clk: tegra: add Tegra specific clocks
Add Tegra specific clocks, pll, pll_out, peripheral, frac_divider, super.

Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
[swarren: alloc sizeof(*foo) not sizeof(struct foo), add comments re:
storing pointers to stack variables, make a timeout loop more idiomatic,
use _clk_pll_disable() not clk_disable_pll() from _program_pll() to
avoid redundant lock operations, unified tegra_clk_periph() and
tegra_clk_periph_nodiv(), unified tegra_clk_pll{,e}, rename all clock
registration functions so they don't have the same name as the clock
structs, return -EINVAL from clk_plle_enable when matching table rate
not found, pass ops to _tegra_clk_register_pll rather than a bool.]
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-28 11:19:07 -07:00
Prashant Gaikwad 8ae5ac5607 clk: vexpress: Use common of_clk_init() function
Use common of_clk_init() function for clock initialization.

Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Tested-by: Pawel Moll <pawel.moll@arm.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-01-24 11:13:03 -08:00
Prashant Gaikwad 10290030d7 clk: zynq: Use common of_clk_init() function
Use common of_clk_init() function for clock initialization.

Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Reviewed-by: Josh Cartwright <josh.cartwright@ni.com>
Tested-by: Josh Cartwright <josh.cartwright@ni.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-01-24 11:12:58 -08:00
Prashant Gaikwad 5b6e0adb69 clk: vt8500: Use common of_clk_init() function
Use common of_clk_init() function for clock initialization.

Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Tested-by: Tony Prisk <linux@prisktech.co.nz>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
[mturquette@linaro.org: added entry for wm8750-pll-clock]

Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-01-24 11:12:52 -08:00
Prashant Gaikwad d34bcdeb43 clk: highbank: Use common of_clk_init() function
Use common of_clk_init() function for clocks initialization.

Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Tested-by: Rob Herring <rob.herring@calxeda.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-01-24 11:12:46 -08:00
Prashant Gaikwad 85a181986c clk: sunxi: Use common of_clk_init() function
Use common of_clk_init() function to initialize clocks.

Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Acked-by: Maxime Ripard <maxime.ripard@anandra.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-01-24 11:12:23 -08:00
Prashant Gaikwad f2f6c2556d clk: add common of_clk_init() function
Modify of_clk_init function so that it will determine which
driver to initialize based on device tree instead of each driver
registering to it.

Based on a similar patch for drivers/irqchip by Thomas Petazzoni and
drivers/clocksource by Stephen Warren.

Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Tested-by: Tony Prisk <linux@prisktech.co.nz>
Tested-by: Pawel Moll <pawel.moll@arm.com>
Tested-by: Rob Herring <rob.herring@calxeda.com>
Tested-by: Josh Cartwright <josh.cartwright@ni.com>
Reviewed-by: Josh Cartwright <josh.cartwright@ni.com>
Acked-by: Maxime Ripard <maxime.ripard@anandra.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
[mturquette@linaro.org: merge conflict from missing CLKSRC_OF_TABLES()]

Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-01-24 11:09:28 -08:00
Olof Johansson f6be19c8bc mvebu fixes for v3.8-rc5
- fix memory leak in mvebu/clk-cpu.c
  - use devm_ to correct/simplify error paths in mvsdio
  - add missing #interrupt-cells property in kirkwood
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Merge tag 'mvebu_fixes_for_v3.8-rc5' of git://git.infradead.org/users/jcooper/linux into fixes

From Jason Cooper:

mvebu fixes for v3.8-rc5
 - fix memory leak in mvebu/clk-cpu.c
 - use devm_ to correct/simplify error paths in mvsdio
 - add missing #interrupt-cells property in kirkwood

* tag 'mvebu_fixes_for_v3.8-rc5' of git://git.infradead.org/users/jcooper/linux:
  ARM: kirkwood: fix missing #interrupt-cells property
  mmc: mvsdio: use devm_ API to simplify/correct error paths.
  clk: mvebu/clk-cpu.c: fix memory leakage
2013-01-23 20:30:52 -08:00
Mika Westerberg 701190fd74 clk: x86: add support for Lynxpoint LPSS clocks
Intel Lynxpoint Low Power Subsystem hosts peripherals like UART, I2C and
SPI controllers. For most of these there is a configuration register that
allows software to enable and disable the functional clock. Disabling the
clock while the peripheral is not used saves power.

In order to take advantage of this we add a new clock gate of type
lpss_gate that just re-uses the ordinary clk_gate but in addition is able
to enumerate the base address register of the device using ACPI.

We then create a clock tree that models the Lynxpoint LPSS clocks using
these gates and fixed clocks so that we can pass clock rate to the drivers
as well.

Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Reviewed-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2013-01-23 21:14:22 +01:00
Cong Ding d6f620a457 clk: mvebu/clk-cpu.c: fix memory leakage
the variable cpuclk and clk_name should be properly freed when error happens.

Signed-off-by: Cong Ding <dinggnu@gmail.com>
Acked-by: Jason Cooper <jason@lakedaemon.net>
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-01-23 01:06:52 +00:00
Nestor Ovroy 4cfe54e579 clk: Deduplicate exit code in clk_set_rate
On non-out case 'return ret;' is equivalent to 'return 0;' as the ret
variable is initialized at 0 and never changed.

Signed-off-by: Nestor Ovroy <novroy@riseup.net>
2013-01-21 14:29:11 -08:00
Mike Turquette 135a829744 clk: beautify Makefile
The list of common clock types was getting a bit unmanageable.  This
patch puts only one file on each line and reorders the object files
alphabetically.  Also a newline is added to separate the sections.

Reported-by: Stephen Boyd <sboyd@codeaurora.org>
Cc: Prashant Gaikwad <pgaikwad@nvidia.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-01-18 13:06:31 -08:00
James Hogan 1a3cd18475 clk-divider: fix macros
The macro is_power_of_two() in clk-divider.c was defined as !(i & ~i)
which is always true.  Instead use is_power_of_2() from log2.h.

Also add brackets around the macro arguments in div_mask to avoid any
future operator precedence problems.

Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: Joe Perches <joe@perches.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
[mturquette@linaro.org: use log2.h per Joe Perches; update changelog]
2013-01-18 09:44:02 -08:00
Barry Song eb8b8f2e71 clk: prima2: enable dt-binding clkdev mapping
this patche deletes hard code that registers clkdev by things like:
clk_register_clkdev(clk, NULL, "b0030000.nand");
clk_register_clkdev(clk, NULL, "b0040000.audio");
clk_register_clkdev(clk, NULL, "b0080000.usp");
prima2 clock controller becomes a clock provider and  every dt node
just declares its clock sources by dt prop.

it also makes us easier to extend this driver to support both prima2
and marco as marco has different address mapping with prima2.

Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-01-18 09:44:01 -08:00
Fabio Estevam 38a8b096f8 clk: mxs: Index is always positive
Fix the following warnings when building with W=1 option:

drivers/clk/mxs/clk-imx23.c: In function 'mx23_clocks_init':
drivers/clk/mxs/clk-imx23.c:149:16: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
drivers/clk/mxs/clk-imx23.c:165:16: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
...

drivers/clk/mxs/clk-imx28.c: In function 'mx28_clocks_init':
drivers/clk/mxs/clk-imx28.c:227:16: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
drivers/clk/mxs/clk-imx28.c:244:16: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-01-15 16:16:27 -08:00
Laurent Pinchart f1ba28a1f0 clk: max77686: Avoid double free at remove time
The clk_lookup entry is dropped at remove time by a call to
clkdev_drop(). That function frees the entry, which is also freed by the
driver core as it has been allocated through devm_kzalloc(). This
results in a double free.

Use kzalloc() instead of devm_kzalloc() to fix this.

Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-01-15 16:16:26 -08:00
Denis Efremov e4eda8e065 clk: remove exported function from __init section
The symbol of_fixed_clk_setup is exported and annotated __init.
This looks like section mismatch.
Fix this by removing the __init annotation of of_fixed_clk_setup.

Signed-off-by: Denis Efremov <yefremov.denis@gmail.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-01-15 16:16:26 -08:00
Tony Prisk abb165a80b clk: vt8500: Add support for WM8750/WM8850 PLL clocks
This patch adds support for the new PLL module found in WM8750 and
WM8850 SoCs.

Signed-off-by: Tony Prisk <linux@prisktech.co.nz>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-01-15 16:16:25 -08:00
Tony Prisk 58eb5a6763 clk: vt8500: Fix division-by-0 when requested rate=0
A request to vt8500_dclk_(round_rate/set_rate) with rate=0 results
in a division-by-0 in the kernel.

Signed-off-by: Tony Prisk <linux@prisktech.co.nz>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-01-15 16:16:25 -08:00
Tony Prisk 72480014b8 clk: vt8500: Fix device clock divisor calculations
When calculating device clock divisor values in set_rate and
round_rate, we do a simple integer divide. If parent_rate / rate
has a fraction, this is dropped which results in the device clock
being set too high.

This patch corrects the problem by adding 1 to the calculated
divisor if the division would have had a decimal result.

Signed-off-by: Tony Prisk <linux@prisktech.co.nz>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-01-15 16:16:24 -08:00
Tony Prisk 35a5db55ab clk: vt8500: Fix error in PLL calculations on non-exact match.
When a PLL frequency calculation is performed and a non-exact match
is found the wrong multiplier and divisors are returned.

Signed-off-by: Tony Prisk <linux@prisktech.co.nz>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-01-15 16:16:23 -08:00
Axel Lin 3fe296cf5a clk: max77686: Remove unnecessary NULL checking for container_of()
container_of() never returns NULL, thus remove the NULL checking for it.
Also rename get_max77686_clk() to to_max77686_clk() for better readability.

Signed-off-by: Axel Lin <axel.lin@gmail.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-01-15 16:16:23 -08:00
Stephen Warren 526d239c30 clk: bcm2835: probe for fixed-clock in device tree
This will allow fixed-clocks to be registered in device tree, which in
turn will allow clock clients to look up their clocks in device tree.
The first driver to use this feature will be the bcm2835 SDHCI/MMC
driver. In the long run, it is likely these fixed clocks will be
replaced with an actual clock implementation which speaks to the
VideoCore processor, but this change should be transparent to clock
consumers.

Cc: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
2013-01-14 21:46:59 -07:00
Prashant Gaikwad bddca8944a clk: JSON debugfs clock tree summary
Clock information is dumped in JSON format which is easy
for machines to parse.

Each clock is represented as an object which has same name as
clock and following properties
	- enable_count
	- prepare_count
	- rate

Output is verified using online JSON editor.

Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-01-11 19:49:23 -08:00
Prashant Gaikwad 1af599df6b clk: human-readable debugfs clock tree summary
Adds debug file "clk_summary" in /sys/kernel/debug/clk dir.
It helps to view all the clock registered in human-readable format.

For example:
   clock                        enable_cnt  prepare_cnt  rate
---------------------------------------------------------------------
 i2s0_sync                      0           0            24000000
 spdif_in_sync                  0           0            24000000
    spdif_mux                   0           0            24000000
       spdif                    0           0            24000000
          spdif_doubler         0           0            48000000
             spdif_div          0           0            48000000
                spdif_2x        0           0            48000000
 clk_32k                        2           2            32768
    blink_override              1           1            32768
       blink                    1           1            32768
 clk_m                          2           2            12000000
    clk_out_3_mux               0           0            12000000
       clk_out_3                0           0            12000000
    pll_ref                     3           3            12000000
       pll_e_mux                0           0            12000000
          pll_e                 0           0            100000000
             cml0               0           0            100000000
             cml1               0           0            100000000
             pciex              0           0            100000000
       pll_d2                   0           0            1000000
          pll_d2_out0           0           0            500000
       pll_d                    0           0            1000000
          pll_d_out0            0           0            500000
             dsib_mux           0           0            500000
                dsib            0           0            500000
             dsia               0           0            500000

Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-01-11 19:46:32 -08:00
Axel Lin 9f58b9b9fe clk: max77686: Fix return value checking for devm_kzalloc
devm_kzalloc returns NULL on failure.

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-01-11 18:55:36 -08:00
Haojian Zhuang bab53301c3 clk: fixed-factor: round_rate should use do_div
clk->rate = parent->rate / div * mult

The formula is OK. But it may overflow while we do operate with
unsigned long. So use do_div instead.

Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
[mturquette@linaro.org: improved $SUBJECT]
2013-01-11 18:43:27 -08:00
Niels de Vos 4895084c87 clk: export __clk_get_name for re-use in imx-ipu-v3 and others
This fixes the following error when building for arm-imx:
> ERROR: "__clk_get_name" [drivers/staging/imx-drm/ipu-v3/imx-ipu-v3.ko] undefined!
> make[1]: *** [__modpost] Error 1
> make: *** [modules] Error 2

There are valid usecases to get the name of a clock, be it for debugging
purposes or to register a children of a clock like done in this IPU driver.
Therefore exporting __clk_get_name() and make it available for others makes
sense.

Reported-by: Peter Robinson <pbrobinson@gmail.com>
CC: Sascha Hauer <s.hauer@pengutronix.de>
CC: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Niels de Vos <ndevos@redhat.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
[mturquette@linaro.org: removal of inline made redundant by 65800b2]
2013-01-11 18:34:14 -08:00
Russ Dill 65800b2c40 clk: Don't mark shared helper functions as inline
The helper functions that access the opaque struct clk should
not be marked inline since they are contained in clk.c, but expected
to be used by other compilation units. This causes compile errors
under gcc-4.7

In file included from arch/arm/mach-omap2/clockdomain.c:25:0:
arch/arm/mach-omap2/clockdomain.c: In function ‘clkdm_clk_disable’:
include/linux/clk-provider.h:338:12: error: inlining failed in call to always_inline ‘__clk_get_enable_count’: function body not available
arch/arm/mach-omap2/clockdomain.c:1001:28: error: called from here
make[1]: *** [arch/arm/mach-omap2/clockdomain.o] Error 1
make: *** [arch/arm/mach-omap2] Error 2

Signed-off-by: Russ Dill <Russ.Dill@ti.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
[mturquette@linaro.org: removed fixes made redundant by commit 93532c8a]
[mturquette@linaro.org: improved $SUBJECT]
2013-01-11 16:32:41 -08:00
Linus Torvalds 974b33586b ARM: arm-soc fixes for 3.8-rc
People are back from the holiday breaks, and it shows. Here are a bunch of
 fixes for a number of platforms:
  - A couple of small fixes for Nomadik
  - A larger set of changes for kirkwood/mvebu
    - uart driver selection, dt clocks, gpio-poweroff fixups,
      a few __init annotation fixes and some error handling improvement
      in their xor dma driver.
  - i.MX had a couple of minor fixes (and a critical one for flexcan2
    clock setup)
  - MXS has a small board fix and a framebuffer bugfix
  - A set of fixes for Samsung Exynos, fixing default bootargs and some
    Exynos5440 clock issues
  - A set of OMAP changes including PM fixes and a few sparse warning
    fixups
 
 All in all a bit more positive code delta than we'd ideally want to see
 here, mostly from the OMAP PM changes, but nothing overly crazy.
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Merge tag 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC fixes from Olof Johansson:
 "People are back from the holiday breaks, and it shows.  Here are a
  bunch of fixes for a number of platforms:
   - A couple of small fixes for Nomadik
   - A larger set of changes for kirkwood/mvebu
     - uart driver selection, dt clocks, gpio-poweroff fixups, a few
       __init annotation fixes and some error handling improvement in
       their xor dma driver.
   - i.MX had a couple of minor fixes (and a critical one for flexcan2
     clock setup)
   - MXS has a small board fix and a framebuffer bugfix
   - A set of fixes for Samsung Exynos, fixing default bootargs and some
     Exynos5440 clock issues
   - A set of OMAP changes including PM fixes and a few sparse warning
     fixups

  All in all a bit more positive code delta than we'd ideally want to
  see here, mostly from the OMAP PM changes, but nothing overly crazy."

* tag 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (44 commits)
  ARM: clps711x: Fix bad merge of clockevents setup
  ARM: highbank: save and restore L2 cache and GIC on suspend
  ARM: highbank: add a power request clear
  ARM: highbank: fix secondary boot and hotplug
  ARM: highbank: fix typos with hignbank in power request functions
  ARM: dts: fix highbank cpu mpidr values
  ARM: dts: add device_type prop to cpu nodes on Calxeda platforms
  ARM: mx5: Fix MX53 flexcan2 clock
  ARM: OMAP2+: am33xx-hwmod: Fix wrongly terminated am33xx_usbss_mpu_irqs array
  pinctrl: mvebu: make pdma clock on dove mandatory
  ARM: Dove: Add pinctrl clock to DT
  dma: mv_xor: fix error handling for clocks
  dma: mv_xor: fix error handling of mv_xor_channel_add()
  arm: mvebu: Add missing ; for cpu node.
  arm: mvebu: Armada XP MV78230 has only three Ethernet interfaces
  arm: mvebu: Armada XP MV78230 has two cores, not one
  clk: mvebu: Remove inappropriate __init tagging
  ARM: Kirkwood: Use fixed-regulator instead of board gpio call
  ARM: Kirkwood: Fix missing sdio clock
  ARM: Kirkwood: Switch TWSI1 of 88f6282 to DT clock providers
  ...
2013-01-08 18:53:56 -08:00
Joshua Coombs 3810e63041 clk: mvebu: Remove inappropriate __init tagging
If the Orion WDT driver is built as a module, an opps occurs during
clk lookup when calling mvebu_clk_gating_get_src().  Remove the
inappropriate __init tag so the function is available for modules
after kernel init.

Signed-off-by: Joshua Coombs <josh.coombs@gmail.com>
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-01-06 17:53:13 +00:00
Greg Kroah-Hartman 0fe763c570 Drivers: misc: remove __dev* attributes.
CONFIG_HOTPLUG is going away as an option.  As a result, the __dev*
markings need to be removed.

This change removes the use of __devinit, __devexit_p, __devinitdata,
__devinitconst, and __devexit from these drivers.

Based on patches originally written by Bill Pemberton, but redone by me
in order to handle some of the coding style issues better, by hand.

Cc: Bill Pemberton <wfp5p@virginia.edu>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2013-01-03 15:57:16 -08:00
Linus Torvalds ca2a88f56a MTD pull for 3.8
- Various cleanups especially in NAND tests
  - Add support for NAND flash on BCMA bus
  - DT support for sh_flctl and denali NAND drivers
  - Kill obsolete/superceded drivers (fortunet, nomadik_nand)
  - Fix JFFS2 locking bug in ENOMEM failure path
  - New SPI flash chips, as usual
  - Support writing in 'reliable mode' for DiskOnChip G4
  - Debugfs support in nandsim
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Merge tag 'for-linus-20121219' of git://git.infradead.org/linux-mtd

Pull MTD updates from David Woodhouse:
 - Various cleanups especially in NAND tests
 - Add support for NAND flash on BCMA bus
 - DT support for sh_flctl and denali NAND drivers
 - Kill obsolete/superceded drivers (fortunet, nomadik_nand)
 - Fix JFFS2 locking bug in ENOMEM failure path
 - New SPI flash chips, as usual
 - Support writing in 'reliable mode' for DiskOnChip G4
 - Debugfs support in nandsim

* tag 'for-linus-20121219' of git://git.infradead.org/linux-mtd: (96 commits)
  mtd: nand: typo in nand_id_has_period() comments
  mtd: nand/gpio: use io{read,write}*_rep accessors
  mtd: block2mtd: throttle writes by calling balance_dirty_pages_ratelimited.
  mtd: nand: gpmi: reset BCH earlier, too, to avoid NAND startup problems
  mtd: nand/docg4: fix and improve read of factory bbt
  mtd: nand/docg4: reserve bb marker area in ecclayout
  mtd: nand/docg4: add support for writing in reliable mode
  mtd: mxc_nand: reorder part_probes to let cmdline override other sources
  mtd: mxc_nand: fix unbalanced clk_disable() in error path
  mtd: nandsim: Introduce debugfs infrastructure
  mtd: physmap_of: error checking to prevent a NULL pointer dereference
  mtg: docg3: potential divide by zero in doc_write_oob()
  mtd: bcm47xxnflash: writing support
  mtd: tests/read: initialize buffer for whole next page
  mtd: at91: atmel_nand: return bit flips for the PMECC read_page()
  mtd: fix recovery after failed write-buffer operation in cfi_cmdset_0002.c
  mtd: nand: onfi need to be probed in 8 bits mode
  mtd: nand: add NAND_BUSWIDTH_AUTO to autodetect bus width
  mtd: nand: print flash size during detection
  mted: nand_wait_ready timeout fix
  ...
2012-12-19 12:47:41 -08:00
Linus Torvalds c2714334b9 ARM: arm-soc: Updates for Marvell mvebu/kirkwood
This is a branch with updates for Marvell's mvebu/kirkwood platforms. They
 came in late-ish, and were heavily interdependent such that it didn't
 make sense to split them up across the cross-platform topic branches. So
 here they are (for the second release in a row) in a branch on their own.
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Merge tag 'mvebu' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC updates for Marvell mvebu/kirkwood from Olof Johansson:
 "This is a branch with updates for Marvell's mvebu/kirkwood platforms.
  They came in late-ish, and were heavily interdependent such that it
  didn't make sense to split them up across the cross-platform topic
  branches.  So here they are (for the second release in a row) in a
  branch on their own."

* tag 'mvebu' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (88 commits)
  arm: l2x0: add aurora related properties to OF binding
  arm: mvebu: add Aurora L2 Cache Controller to the DT
  arm: mvebu: add L2 cache support
  dma: mv_xor: fix error handling path
  dma: mv_xor: fix error checking of irq_of_parse_and_map()
  dma: mv_xor: use request_irq() instead of devm_request_irq()
  dma: mv_xor: clear the window override control registers
  arm: mvebu: fix address decoding armada_cfg_base() function
  ARM: mvebu: update defconfig with I2C and RTC support
  ARM: mvebu: Add SATA support for OpenBlocks AX3-4
  ARM: mvebu: Add support for the RTC in OpenBlocks AX3-4
  ARM: mvebu: Add support for I2C on OpenBlocks AX3-4
  ARM: mvebu: Add support for I2C controllers in Armada 370/XP
  arm: mvebu: Add hardware I/O Coherency support
  arm: plat-orion: Add coherency attribute when setup mbus target
  arm: dma mapping: Export a dma ops function arm_dma_set_mask
  arm: mvebu: Add SMP support for Armada XP
  arm: mm: Add support for PJ4B cpu and init routines
  arm: mvebu: Add IPI support via doorbells
  arm: mvebu: Add initial support for power managmement service unit
  ...
2012-12-14 14:54:26 -08:00
Linus Torvalds 0beb58783f ARM: arm-soc: Device-tree updates, take 2
This branch contains device-tree updates for the SPEAr platform.
 They had dependencies on earlier branches from this merge window,
 which is why they were broken out in a separate branch.
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Merge tag 'dt2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC device-tree updates, take 2, from Olof Johansson:
 "This branch contains device-tree updates for the SPEAr platform.  They
  had dependencies on earlier branches from this merge window, which is
  why they were broken out in a separate branch."

* tag 'dt2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
  ARM: SPEAr3xx: Shirq: Move shirq controller out of plat/
  ARM: SPEAr320: DT: Add SPEAr 320 HMI board support
  ARM: SPEAr3xx: DT: add shirq node for interrupt multiplexor
  ARM: SPEAr3xx: shirq: simplify and move the shared irq multiplexor to DT
  ARM: SPEAr1310: Fix AUXDATA for compact flash controller
  ARM: SPEAr13xx: Remove fields not required for ssp controller
  ARM: SPEAr1310: Move 1310 specific misc register into machine specific files
  ARM: SPEAr: DT: Update device nodes
  ARM: SPEAr: DT: add uart state to fix warning
  ARM: SPEAr: DT: Modify DT bindings for STMMAC
  ARM: SPEAr: DT: Fix existing DT support
  ARM: SPEAr: DT: Update partition info for MTD devices
  ARM: SPEAr: DT: Update pinctrl list
  ARM: SPEAr13xx: DT: Add spics gpio controller nodes
2012-12-14 14:42:53 -08:00
Linus Torvalds b8edf848e9 ARM: arm-soc: multiplatform conversion patches
Here are more patches in the progression towards multiplatform, sparse
 irq conversions in particular.
 
 Tegra has a handful of cleanups and general groundwork, but is
 not quite there yet on full enablement.
 
 Platforms that are enabled through this branch are VT8500 and Zynq. note
 that i.MX was converted in one of the earlier cleanup branches as
 well (before we started a separate topic for multiplatform). And both
 new platforms for this merge window, sunxi and bcm, were merged with
 multiplatform support enabled.
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Merge tag 'multiplatform' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC multiplatform conversion patches from Olof Johansson:
 "Here are more patches in the progression towards multiplatform, sparse
  irq conversions in particular.

  Tegra has a handful of cleanups and general groundwork, but is not
  quite there yet on full enablement.

  Platforms that are enabled through this branch are VT8500 and Zynq.
  Note that i.MX was converted in one of the earlier cleanup branches as
  well (before we started a separate topic for multiplatform).  And both
  new platforms for this merge window, sunxi and bcm, were merged with
  multiplatform support enabled."

Fix up conflicts mostly as per Olof.

* tag 'multiplatform' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (29 commits)
  ARM: zynq: Remove all unused mach headers
  ARM: zynq: add support for ARCH_MULTIPLATFORM
  ARM: zynq: make use of debug_ll_io_init()
  ARM: zynq: remove TTC early mapping
  ARM: tegra: move debug-macro.S to include/debug
  ARM: tegra: don't include iomap.h from debug-macro.S
  ARM: tegra: decouple uncompress.h and debug-macro.S
  ARM: tegra: simplify DEBUG_LL UART selection options
  ARM: tegra: select SPARSE_IRQ
  ARM: tegra: enhance timer.c to get IO address from device tree
  ARM: tegra: enhance timer.c to get IRQ info from device tree
  ARM: timer: fix checkpatch warnings
  ARM: tegra: add TWD to device tree
  ARM: tegra: define DT bindings for and instantiate RTC
  ARM: tegra: define DT bindings for and instantiate timer
  clocksource/mtu-nomadik: use apb_pclk
  clk: ux500: Register mtu apb_pclocks
  ARM: plat-nomadik: convert platforms to SPARSE_IRQ
  mfd/db8500-prcmu: use the irq_domain_add_simple()
  mfd/ab8500-core: use irq_domain_add_simple()
  ...
2012-12-13 10:57:16 -08:00
Linus Torvalds db5b0ae007 ARM: arm-soc: device tree conversions and enablement
Continued device tree conversion and enablement across a number of
 platforms; Kirkwood, tegra, i.MX, Exynos, zynq and a couple of other
 smaller series as well.
 
 ux500 has seen continued conversion for platforms. Several platforms have
 seen pinctrl-via-devicetree conversions for simpler multiplatform. Tegra
 is adding data for new devices/drivers, and Exynos has a bunch of new
 bindings and devices added as well.
 
 So, pretty much the same progression in the right direction as the last
 few releases.
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Merge tag 'dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC device tree conversions and enablement from Olof Johansson:
 "Continued device tree conversion and enablement across a number of
  platforms; Kirkwood, tegra, i.MX, Exynos, zynq and a couple of other
  smaller series as well.

  ux500 has seen continued conversion for platforms.  Several platforms
  have seen pinctrl-via-devicetree conversions for simpler
  multiplatform.  Tegra is adding data for new devices/drivers, and
  Exynos has a bunch of new bindings and devices added as well.

  So, pretty much the same progression in the right direction as the
  last few releases."

Fix up conflicts as per Olof.

* tag 'dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (185 commits)
  ARM: ux500: Rename dbx500 cpufreq code to be more generic
  ARM: dts: add missing ux500 device trees
  ARM: ux500: Stop registering the PCM driver from platform code
  ARM: ux500: Move board specific GPIO info out to subordinate DTS files
  ARM: ux500: Disable the MMCI gpio-regulator by default
  ARM: Kirkwood: remove kirkwood_ehci_init() from new boards
  ARM: Kirkwood: Add support LED of OpenBlocks A6
  ARM: Kirkwood: Convert to EHCI via DT for OpenBlocks A6
  ARM: kirkwood: Add NAND partiton map for OpenBlocks A6
  ARM: kirkwood: Add support second I2C bus and RTC on OpenBlocks A6
  ARM: kirkwood: Add support DT of second I2C bus
  ARM: kirkwood: Convert mplcec4 board to pinctrl
  ARM: Kirkwood: Convert km_kirkwood to pinctrl
  ARM: Kirkwood: support 98DX412x kirkwoods with pinctrl
  ARM: Kirkwood: Convert IX2-200 to pinctrl.
  ARM: Kirkwood: Convert lsxl boards to pinctrl.
  ARM: Kirkwood: Convert ib62x0 to pinctrl.
  ARM: Kirkwood: Convert GoFlex Net to pinctrl.
  ARM: Kirkwood: Convert dreamplug to pinctrl.
  ARM: Kirkwood: Convert dockstar to pinctrl.
  ...
2012-12-13 10:39:26 -08:00
Linus Torvalds d027db132b ARM: arm-soc: SoC updates for 3.8
This contains the bulk of new SoC development for this merge window.
 
 Two new platforms have been added, the sunxi platforms (Allwinner A1x
 SoCs) by Maxime Ripard, and a generic Broadcom platform for a new
 series of ARMv7 platforms from them, where the hope is that we can
 keep the platform code generic enough to have them all share one mach
 directory. The new Broadcom platform is contributed by Christian Daudt.
 
 Highbank has grown support for Calxeda's next generation of hardware,
 ECX-2000.
 
 clps711x has seen a lot of cleanup from Alexander Shiyan, and he's also
 taken on maintainership of the platform.
 
 Beyond this there has been a bunch of work from a number of people on
 converting more platforms to IRQ domains, pinctrl conversion, cleanup
 and general feature enablement across most of the active platforms.
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Merge tag 'soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC updates from Olof Johansson:
 "This contains the bulk of new SoC development for this merge window.

  Two new platforms have been added, the sunxi platforms (Allwinner A1x
  SoCs) by Maxime Ripard, and a generic Broadcom platform for a new
  series of ARMv7 platforms from them, where the hope is that we can
  keep the platform code generic enough to have them all share one mach
  directory.  The new Broadcom platform is contributed by Christian
  Daudt.

  Highbank has grown support for Calxeda's next generation of hardware,
  ECX-2000.

  clps711x has seen a lot of cleanup from Alexander Shiyan, and he's
  also taken on maintainership of the platform.

  Beyond this there has been a bunch of work from a number of people on
  converting more platforms to IRQ domains, pinctrl conversion, cleanup
  and general feature enablement across most of the active platforms."

Fix up trivial conflicts as per Olof.

* tag 'soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (174 commits)
  mfd: vexpress-sysreg: Remove LEDs code
  irqchip: irq-sunxi: Add terminating entry for sunxi_irq_dt_ids
  clocksource: sunxi_timer: Add terminating entry for sunxi_timer_dt_ids
  irq: versatile: delete dangling variable
  ARM: sunxi: add missing include for mdelay()
  ARM: EXYNOS: Avoid early use of of_machine_is_compatible()
  ARM: dts: add node for PL330 MDMA1 controller for exynos4
  ARM: EXYNOS: Add support for secondary CPU bring-up on Exynos4412
  ARM: EXYNOS: add UART3 to DEBUG_LL ports
  ARM: S3C24XX: Add clkdev entry for camif-upll clock
  ARM: SAMSUNG: Add s3c24xx/s3c64xx CAMIF GPIO setup helpers
  ARM: sunxi: Add missing sun4i.dtsi file
  pinctrl: samsung: Do not initialise statics to 0
  ARM i.MX6: remove gate_mask from pllv3
  ARM i.MX6: Fix ethernet PLL clocks
  ARM i.MX6: rename PLLs according to datasheet
  ARM i.MX6: Add pwm support
  ARM i.MX51: Add pwm support
  ARM i.MX53: Add pwm support
  ARM: mx5: Replace clk_register_clkdev with clock DT lookup
  ...
2012-12-12 12:05:15 -08:00
Linus Torvalds d01e4afdbb ARM: arm-soc: Cleanups on various subarchitectures
Cleanup patches for various ARM platforms and some of their associated
 drivers. There's also a branch in here that enables Freescale i.MX to be
 part of the multiplatform support -- the first "big" SoC that is moved
 over (more multiplatform work comes in a separate branch later during
 the merge window).
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Merge tag 'cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC cleanups on various subarchitectures from Olof Johansson:
 "Cleanup patches for various ARM platforms and some of their associated
  drivers.  There's also a branch in here that enables Freescale i.MX to
  be part of the multiplatform support -- the first "big" SoC that is
  moved over (more multiplatform work comes in a separate branch later
  during the merge window)."

Conflicts fixed as per Olof, including a silent semantic one in
arch/arm/mach-omap2/board-generic.c (omap_prcm_restart() was renamed to
omap3xxx_restart(), and a new user of the old name was added).

* tag 'cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (189 commits)
  ARM: omap: fix typo on timer cleanup
  ARM: EXYNOS: Remove unused regs-mem.h file
  ARM: EXYNOS: Remove unused non-dt support for dwmci controller
  ARM: Kirkwood: Use hw_pci.ops instead of hw_pci.scan
  ARM: OMAP3: cm-t3517: use GPTIMER for system clock
  ARM: OMAP2+: timer: remove CONFIG_OMAP_32K_TIMER
  ARM: SAMSUNG: use devm_ functions for ADC driver
  ARM: EXYNOS: no duplicate mask/unmask in eint0_15
  ARM: S3C24XX: SPI clock channel setup is fixed for S3C2443
  ARM: EXYNOS: Remove i2c0 resource information and setting of device names
  ARM: Kirkwood: checkpatch cleanups
  ARM: Kirkwood: Fix sparse warnings.
  ARM: Kirkwood: Remove unused includes
  ARM: kirkwood: cleanup lsxl board includes
  ARM: integrator: use BUG_ON where possible
  ARM: integrator: push down SC dependencies
  ARM: integrator: delete static UART1 mapping
  ARM: integrator: delete SC mapping on the CP
  ARM: integrator: remove static CP syscon mapping
  ARM: integrator: remove static AP syscon mapping
  ...
2012-12-12 11:51:39 -08:00
Linus Torvalds cff2f741b8 Driver core updates for 3.8-rc1
Here's the large driver core updates for 3.8-rc1.
 
 The biggest thing here is the various __dev* marking removals.  This is
 going to be a pain for the merge with different subsystem trees, I know,
 but all of the patches included here have been ACKed by their various
 subsystem maintainers, as they wanted them to go through here.
 
 If this is too much of a pain, I can pull all of them out of this tree
 and just send you one with the other fixes/updates and then, after
 3.8-rc1 is out, do the rest of the removals to ensure we catch them all,
 it's up to you.  The merges should all be trivial, and Stephen has been
 doing them all in linux-next for a few weeks now quite easily.
 
 Other than the __dev* marking removals, there's nothing major here, some
 firmware loading updates and other minor things in the driver core.
 
 All of these have (much to Stephen's annoyance), been in linux-next for
 a while.
 
 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Merge tag 'driver-core-3.8-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core

Pull driver core updates from Greg Kroah-Hartman:
 "Here's the large driver core updates for 3.8-rc1.

  The biggest thing here is the various __dev* marking removals.  This
  is going to be a pain for the merge with different subsystem trees, I
  know, but all of the patches included here have been ACKed by their
  various subsystem maintainers, as they wanted them to go through here.

  If this is too much of a pain, I can pull all of them out of this tree
  and just send you one with the other fixes/updates and then, after
  3.8-rc1 is out, do the rest of the removals to ensure we catch them
  all, it's up to you.  The merges should all be trivial, and Stephen
  has been doing them all in linux-next for a few weeks now quite
  easily.

  Other than the __dev* marking removals, there's nothing major here,
  some firmware loading updates and other minor things in the driver
  core.

  All of these have (much to Stephen's annoyance), been in linux-next
  for a while.

  Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>"

Fixed up trivial conflicts in drivers/gpio/gpio-{em,stmpe}.c due to gpio
update.

* tag 'driver-core-3.8-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core: (93 commits)
  modpost.c: Stop checking __dev* section mismatches
  init.h: Remove __dev* sections from the kernel
  acpi: remove use of __devinit
  PCI: Remove __dev* markings
  PCI: Always build setup-bus when PCI is enabled
  PCI: Move pci_uevent into pci-driver.c
  PCI: Remove CONFIG_HOTPLUG ifdefs
  unicore32/PCI: Remove CONFIG_HOTPLUG ifdefs
  sh/PCI: Remove CONFIG_HOTPLUG ifdefs
  powerpc/PCI: Remove CONFIG_HOTPLUG ifdefs
  mips/PCI: Remove CONFIG_HOTPLUG ifdefs
  microblaze/PCI: Remove CONFIG_HOTPLUG ifdefs
  dma: remove use of __devinit
  dma: remove use of __devexit_p
  firewire: remove use of __devinitdata
  firewire: remove use of __devinit
  leds: remove use of __devexit
  leds: remove use of __devinit
  leds: remove use of __devexit_p
  mmc: remove use of __devexit
  ...
2012-12-11 13:13:55 -08:00
Mike Turquette 7c045a55c9 clk: introduce optional disable_unused callback
Some gate clocks have special needs which must be handled during the
disable-unused clocks sequence.  These needs might be driven by software
due to the fact that we're disabling a clock outside of the normal
clk_disable path and a clk's enable_count will not be accurate.  On the
other hand a specific hardware programming sequence might need to be
followed for this corner case.

This change is needed for the upcoming OMAP port to the common clock
framework.  Specifically, it is undesirable to treat the disable-unused
path identically to the normal clk_disable path since other software
layers are involved.  In this case OMAP's clockdomain code throws WARNs
and bails early due to the clock's enable_count being set to zero.  A
custom callback mitigates this problem nicely.

Cc: Paul Walmsley <paul@pwsan.com>
Acked-by: Ulf Hansson <ulf.hansson@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-12-10 22:35:02 -08:00
Linus Walleij 2630b17b6e clk: ux500: fix bit error
This fixes a bit error in the U8500 clock implementation: the
unused p2_pclk12 registered at bit 12 in periphereral group 6
was defined as using bit 11 rather than bit 12.

When walking over and disabling the unused clocks in the tree
at late init time, p2_pclk12 was disabled, by effectively
clearing the but for p2_pclk11 instead of bit 12 as it should
have, thus disabling gpio block 6 and 7.

Reported-by: Lee Jones <lee.jones@linaro.org>
Acked-by: Ulf Hansson <ulf.hansson@linaro.org>
Cc: Philippe Begnic <philippe.begnic@st.com>
Cc: stable@kernel.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-12-04 10:33:53 -08:00
Olof Johansson 823c9faefc Merge branch 'next/cam-samsung' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/soc
From Kukjin Kim:
Just adding camif gpio setup and clkdev.

* 'next/cam-samsung' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
  ARM: S3C24XX: Add clkdev entry for camif-upll clock
  ARM: SAMSUNG: Add s3c24xx/s3c64xx CAMIF GPIO setup helpers
  + Linux 3.7-rc6

Conflicts due to the 3.7-rc6 sync: arch/arm/mach-highbank/system.c
include/linux/clk-provider.h, resolved as in other branches.

Signed-off-by: Olof Johansson <olof@lixom.net>
2012-11-30 09:27:57 -08:00
Bill Pemberton 1fc7ad5d39 clk: remove use of __devexit
CONFIG_HOTPLUG is going away as an option so __devexit is no
longer needed.

Signed-off-by: Bill Pemberton <wfp5p@virginia.edu>
Acked-by: Mike Turquette <mturquette@linaro.org>
Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2012-11-28 11:32:53 -08:00
Bill Pemberton 018ae93fbc clk: remove use of __devinit
CONFIG_HOTPLUG is going away as an option so __devinit is no longer
needed.

Signed-off-by: Bill Pemberton <wfp5p@virginia.edu>
Acked-by: Mike Turquette <mturquette@linaro.org>
Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2012-11-28 11:31:53 -08:00
Bill Pemberton f9cfa63051 clk: remove use of __devexit_p
CONFIG_HOTPLUG is going away as an option so __devexit_p is no longer
needed.

Signed-off-by: Bill Pemberton <wfp5p@virginia.edu>
Acked-by: Mike Turquette <mturquette@linaro.org>
Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2012-11-28 11:31:53 -08:00
Martin Fuzzey 1f61e5f143 clk: clock multiplexers may register out of order
When a clock, C is initialised any orphan clocks listing C as
a possible parent are reparented to it regardless of the
parent requested by the orphan's get_parent() operation.

This means that multiplexers registered before their parents
are reparented to the first parent subsequently declared,
regardless of the selection made by the hardware registers.

For example:
	static const char *sel[] = { "srcA", "srcB", "dummy", "srcC" };

	child = clk_register_mux(NULL, "child",  sel, ARRAY_SIZE(sel), ...);
	clk_register_fixed(NULL, "dummy", ...);
	clk_register_fixed(NULL, "srcA", ...);
	clk_register_fixed(NULL, "srcB", ...);
	clk_register_fixed(NULL, "srcC", ...);

Causes child's parent to always be "dummy".

To fix this, when an orphanned clock has a get_parent() operation,
only reparent to the clock indicated by get_parent().

Signed-off-by: Martin Fuzzey <mfuzzey@parkeon.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
[mturquette@linaro.org: improve $SUBJECT]
2012-11-26 11:14:45 -08:00
Ulf Hansson 45228ef322 clk: ux500: Initial support for abx500 clock driver
The abx500 clock driver is a platform driver which will be initialized
during arch init. The platform device shall be added from the ab-core
driver as a mfd child device to maintain correct boot sequence.

Depending on what ab version we use, different clock definitions will
be added.

Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-11-26 08:14:12 -08:00
Vipul Kumar Samar 07e812a0ae ARM: SPEAr1310: Move 1310 specific misc register into machine specific files
This patch moves some global macro definitions to the files where they are used.
Its a step towards removing spear.h completely later on.

Signed-off-by: Vipul Kumar Samar <vipulkumar.samar@st.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
2012-11-26 16:55:30 +05:30
Olof Johansson 0dfeada909 orion dt for v3.8
- ehci-orion dt binding
  - gpio-poweroff
  - use dt regulators
  - move mpp to DT/pinctrl
 
 Depends on:
 
  - orion/boards
 
     - merge conflicts
        - keep all 'select's in Kconfig
        - remove all #includes in board-*.c
 
  - pinctrl/devel up to:
 
     - 06763c7 pinctrl: mvebu: move to its own directory
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Merge tag 'orion_dt_for_3.8' of git://git.infradead.org/users/jcooper/linux into next/dt

From Jason Cooper:
orion dt for v3.8

 - ehci-orion dt binding
 - gpio-poweroff
 - use dt regulators
 - move mpp to DT/pinctrl

Depends on:

 - orion/boards

    - merge conflicts
       - keep all 'select's in Kconfig
       - remove all #includes in board-*.c

 - pinctrl/devel up to:

    - 06763c7 pinctrl: mvebu: move to its own directory

* tag 'orion_dt_for_3.8' of git://git.infradead.org/users/jcooper/linux: (211 commits)
  ARM: Kirkwood: remove kirkwood_ehci_init() from new boards
  ARM: Kirkwood: Add support LED of OpenBlocks A6
  ARM: Kirkwood: Convert to EHCI via DT for OpenBlocks A6
  ARM: kirkwood: Add NAND partiton map for OpenBlocks A6
  ARM: kirkwood: Add support second I2C bus and RTC on OpenBlocks A6
  ARM: kirkwood: Add support DT of second I2C bus
  ARM: kirkwood: Convert mplcec4 board to pinctrl
  ARM: Kirkwood: Convert km_kirkwood to pinctrl
  ARM: Kirkwood: support 98DX412x kirkwoods with pinctrl
  ARM: Kirkwood: Convert IX2-200 to pinctrl.
  ARM: Kirkwood: Convert lsxl boards to pinctrl.
  ARM: Kirkwood: Convert ib62x0 to pinctrl.
  ARM: Kirkwood: Convert GoFlex Net to pinctrl.
  ARM: Kirkwood: Convert dreamplug to pinctrl.
  ARM: Kirkwood: Convert dockstar to pinctrl.
  ARM: Kirkwood: Convert dnskw to pinctrl
  ARM: Kirkwood: Convert iConnect to pinctrl.
  ARM: Kirkwood: Convert TS219 to pinctrl.
  ARM: Kirkwood: Add DTSI files for pinctrl
  ARM: Kirkwood: Make use of mvebu pincltl and gpio drivers
  ...

Signed-off-by: Olof Johansson <olof@lixom.net>
2012-11-26 01:09:53 -08:00
Olof Johansson 0f9cb211ba Linux 3.7-rc7
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Merge tag 'v3.7-rc7' into next/cleanup

Merging in mainline back to next/cleanup since it has collected a few
conflicts between fixes going upstream and some of the cleanup patches.
Git doesn't auto-resolve some of them, and they're mostly noise so let's
take care of it locally.

Conflicts are in:
	arch/arm/mach-omap2/omap_hwmod_44xx_data.c
	arch/arm/plat-omap/i2c.c
	drivers/video/omap2/dss/dss.c

Signed-off-by: Olof Johansson <olof@lixom.net>
2012-11-25 21:34:34 -08:00
Olof Johansson 3f54db784a Merge branch 'zynq/multiplatform' of git://git.monstr.eu/linux-2.6-microblaze into next/multiplatform
From Michal Simek:

This branch depends on arm-soc devel/debug_ll_init branch because
we needed Rob's "ARM: implement debug_ll_io_init()"
(sha1: afaee03511ba8002b26a9c6b1fe7d6baf33eac86)
patch.

This branch also depends on zynq/dt branch because of previous major
zynq changes.
zynq/cleanup branch is subset of zynq/dt.

* 'zynq/multiplatform' of git://git.monstr.eu/linux-2.6-microblaze:
  ARM: zynq: Remove all unused mach headers
  ARM: zynq: add support for ARCH_MULTIPLATFORM
  ARM: zynq: make use of debug_ll_io_init()
  ARM: zynq: remove TTC early mapping
  ARM: zynq: add clk binding support to the ttc
  ARM: zynq: use zynq clk bindings
  clk: Add support for fundamental zynq clks
  ARM: zynq: dts: split up device tree
  ARM: zynq: Allow UART1 to be used as DEBUG_LL console.
  ARM: zynq: dts: add description of the second uart
  ARM: zynq: move arm-specific sys_timer out of ttc
  zynq: move static peripheral mappings
  zynq: remove use of CLKDEV_LOOKUP
  zynq: use pl310 device tree bindings
  zynq: use GIC device tree bindings

Add/add conflict in arch/arm/Kconfig.debug.

Signed-off-by: Olof Johansson <olof@lixom.net>
2012-11-21 11:49:45 -08:00
Vipul Kumar Samar b70e6d009a CLK: SPEAr: Remove unused dummy apb_pclk
Dummy clocks were added for ARM platforms, so that clk_get() for interface clk
doesn't fail for amba devices from amba_probe(). Because there is no amba device
for SPEAr that doesn't have a valid clock with dev_id for SPEAr, we don't need
these dummy clocks. Hence, remove them.

Signed-off-by: Vipul Kumar Samar <vipulkumar.samar@st.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-11-21 11:46:12 -08:00
Deepak Sikri 1b2d4ad585 CLK: SPEAr: Correct index scanning done for clock synths
The patch corrects the case when the rate table is being scanned for a
given frequency, and the search frequency is beyond the maximum
frequency indexed in the table.

By default, the system should be set at max frequency present in the
rate table. This patch correctly returns the corresponding index value.

Signed-off-by: Deepak Sikri <deepak.sikri@st.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-11-21 11:46:06 -08:00
Deepak Sikri ef0fd0a207 CLK: SPEAr: Update clock rate table
This patch updates the existing rate tables with new frequencies.

Signed-off-by: Deepak Sikri <deepak.sikri@st.com>
Signed-off-by: Vipul Kumar Samar <vipulkumar.samar@st.com>
Signed-off-by: Rajeev Kumar <rajeev-dlh.kumar@st.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-11-21 11:45:59 -08:00
Vipul Kumar Samar cd4b519aa5 CLK: SPEAr: Add missing clocks
This patch adds missing clocks: twd and macb.

Signed-off-by: Vipul Kumar Samar <vipulkumar.samar@st.com>
Signed-off-by: Deepak Sikri <deepak.sikri@st.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-11-21 11:45:52 -08:00
Vipul Kumar Samar 1249979242 CLK: SPEAr: Set CLK_SET_RATE_PARENT for few clocks
Flag CLK_SET_RATE_PARENT is required for a clock, where we want to
propagate clk_set_rate to its parent. This patch adds this to multiple clocks.

Signed-off-by: Vipul Kumar Samar <vipulkumar.samar@st.com>
Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com>
Signed-off-by: Rajeev Kumar <rajeev-dlh.kumar@st.com>
Signed-off-by: Vijay Kumar Mishra <vijay.kumar@st.com>
Signed-off-by: Vijay Kumar Mishra <vijay.kumar@st.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-11-21 11:45:45 -08:00
Shiraz Hashim 463f9e209c CLK: SPEAr13xx: fix parent names of multiple clocks
This patch fixes parent names of multiple clocks.

Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com>
Signed-off-by: Vipul Kumar Samar <vipulkumar.samar@st.com>
Signed-off-by: Rajeev Kumar <rajeev-dlh.kumar@st.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-11-21 11:45:36 -08:00
Shiraz Hashim e0b9c2109b CLK: SPEAr13xx: Fix mux clock names
This patch updates mux clock names of multiple clocks. It updates _clk with
_mclk to make it more readable.

Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com>
Signed-off-by: Rajeev Kumar <rajeev-dlh.kumar@st.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-11-21 11:45:30 -08:00
Rajeev Kumar df2449aba4 CLK: SPEAr: Fix dev_id & con_id for multiple clocks
dev_id & con_id names of multiple clocks are incorrect. This patch fixes these
names with the names that come via DT.

Signed-off-by: Rajeev Kumar <rajeev-dlh.kumar@st.com>
Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com>
Signed-off-by: Bhavna Yadav <bhavna.yadav@st.com>
Signed-off-by: Vipul Kumar Samar <vipulkumar.samar@st.com>
Signed-off-by: Deepak Sikri <deepak.sikri@st.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-11-21 11:45:19 -08:00
Linus Walleij 70ee657714 clk: move IM-PD1 clocks to drivers/clk
The ARM IM-PD1 add-on module has a few clock of its own, let's
move also these down to the drivers/clk/versatile driver dir
and get rid of any remaining oldschool Integrator clocks.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-11-21 11:02:44 -08:00
Linus Walleij 7a9ad671ac clk: make ICST driver handle the VCO registers
It turns out that all platforms using the ICST VCO are really
just touching two registers, and in the same way as well: one
register with the VCO configuration as such, and one lock register
that makes it possible to write to the VCO.

Factor this register read/write into the ICST driver so we can
reuse it in the IM-PD1 driver.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-11-21 11:02:20 -08:00
Linus Walleij 401301ccdf clk: add GPLv2 headers to the Versatile clock files
The GPLv2 headers were missing and the subsystem maintainer likes
them so put them in. I am the copyright holder, so explicitly
licensing these under the GPLv2.

Reported-by: Mike Turquette <mturquette@ti.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-11-21 11:02:00 -08:00
Olof Johansson 17bffc7843 Merge branch 'depends/clk' into next/soc
From Mike Turquette:
* depends/clk:
  clk: Common clocks implementation for Versatile Express
  clk: Versatile Express clock generators ("osc") driver
  CLK: clk-twl6040: Initial clock driver for OMAP4+ McPDM fclk clock
  clk: fix return value check in sirfsoc_of_clk_init()
  clk: fix return value check in of_fixed_clk_setup()
  clk: ux500: Update sdmmc clock to 100MHz for u8500
  clk: ux500: Support prcmu ape opp voltage clock
  mfd: dbx500: Export prmcu_request_ape_opp_100_voltage
  clk: Don't return negative numbers for unsigned values with !clk
  clk: Fix documentation typos
  clk: Document .is_enabled op
  clk: SPEAr: Vco-pll: Fix compilation warning
2012-11-21 02:13:11 -08:00