2015-09-07 11:39:30 +02:00
|
|
|
/*
|
|
|
|
* Copyright (c) 2013 Jean-Christophe Dubois <jcd@tribudubois.net>
|
|
|
|
*
|
|
|
|
* i.MX31 SOC emulation.
|
|
|
|
*
|
|
|
|
* Based on hw/arm/fsl-imx31.c
|
|
|
|
*
|
|
|
|
* This program is free software; you can redistribute it and/or modify it
|
|
|
|
* under the terms of the GNU General Public License as published by the
|
|
|
|
* Free Software Foundation; either version 2 of the License, or
|
|
|
|
* (at your option) any later version.
|
|
|
|
*
|
|
|
|
* This program is distributed in the hope that it will be useful, but WITHOUT
|
|
|
|
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
|
|
|
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
|
|
|
|
* for more details.
|
|
|
|
*
|
|
|
|
* You should have received a copy of the GNU General Public License along
|
|
|
|
* with this program; if not, see <http://www.gnu.org/licenses/>.
|
|
|
|
*/
|
|
|
|
|
2015-12-07 17:23:45 +01:00
|
|
|
#include "qemu/osdep.h"
|
include/qemu/osdep.h: Don't include qapi/error.h
Commit 57cb38b included qapi/error.h into qemu/osdep.h to get the
Error typedef. Since then, we've moved to include qemu/osdep.h
everywhere. Its file comment explains: "To avoid getting into
possible circular include dependencies, this file should not include
any other QEMU headers, with the exceptions of config-host.h,
compiler.h, os-posix.h and os-win32.h, all of which are doing a
similar job to this file and are under similar constraints."
qapi/error.h doesn't do a similar job, and it doesn't adhere to
similar constraints: it includes qapi-types.h. That's in excess of
100KiB of crap most .c files don't actually need.
Add the typedef to qemu/typedefs.h, and include that instead of
qapi/error.h. Include qapi/error.h in .c files that need it and don't
get it now. Include qapi-types.h in qom/object.h for uint16List.
Update scripts/clean-includes accordingly. Update it further to match
reality: replace config.h by config-target.h, add sysemu/os-posix.h,
sysemu/os-win32.h. Update the list of includes in the qemu/osdep.h
comment quoted above similarly.
This reduces the number of objects depending on qapi/error.h from "all
of them" to less than a third. Unfortunately, the number depending on
qapi-types.h shrinks only a little. More work is needed for that one.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
[Fix compilation without the spice devel packages. - Paolo]
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2016-03-14 09:01:28 +01:00
|
|
|
#include "qapi/error.h"
|
2016-01-19 21:51:44 +01:00
|
|
|
#include "qemu-common.h"
|
|
|
|
#include "cpu.h"
|
2015-09-07 11:39:30 +02:00
|
|
|
#include "hw/arm/fsl-imx31.h"
|
|
|
|
#include "sysemu/sysemu.h"
|
|
|
|
#include "exec/address-spaces.h"
|
|
|
|
#include "hw/boards.h"
|
2017-01-26 14:19:46 +01:00
|
|
|
#include "chardev/char.h"
|
2015-09-07 11:39:30 +02:00
|
|
|
|
|
|
|
static void fsl_imx31_init(Object *obj)
|
|
|
|
{
|
|
|
|
FslIMX31State *s = FSL_IMX31(obj);
|
|
|
|
int i;
|
|
|
|
|
|
|
|
object_initialize(&s->cpu, sizeof(s->cpu), "arm1136-" TYPE_ARM_CPU);
|
|
|
|
|
|
|
|
object_initialize(&s->avic, sizeof(s->avic), TYPE_IMX_AVIC);
|
|
|
|
qdev_set_parent_bus(DEVICE(&s->avic), sysbus_get_default());
|
|
|
|
|
2015-12-17 14:37:15 +01:00
|
|
|
object_initialize(&s->ccm, sizeof(s->ccm), TYPE_IMX31_CCM);
|
2015-09-07 11:39:30 +02:00
|
|
|
qdev_set_parent_bus(DEVICE(&s->ccm), sysbus_get_default());
|
|
|
|
|
|
|
|
for (i = 0; i < FSL_IMX31_NUM_UARTS; i++) {
|
|
|
|
object_initialize(&s->uart[i], sizeof(s->uart[i]), TYPE_IMX_SERIAL);
|
|
|
|
qdev_set_parent_bus(DEVICE(&s->uart[i]), sysbus_get_default());
|
|
|
|
}
|
|
|
|
|
2016-07-07 14:47:01 +02:00
|
|
|
object_initialize(&s->gpt, sizeof(s->gpt), TYPE_IMX31_GPT);
|
2015-09-07 11:39:30 +02:00
|
|
|
qdev_set_parent_bus(DEVICE(&s->gpt), sysbus_get_default());
|
|
|
|
|
|
|
|
for (i = 0; i < FSL_IMX31_NUM_EPITS; i++) {
|
|
|
|
object_initialize(&s->epit[i], sizeof(s->epit[i]), TYPE_IMX_EPIT);
|
|
|
|
qdev_set_parent_bus(DEVICE(&s->epit[i]), sysbus_get_default());
|
|
|
|
}
|
2015-09-07 11:39:31 +02:00
|
|
|
|
|
|
|
for (i = 0; i < FSL_IMX31_NUM_I2CS; i++) {
|
|
|
|
object_initialize(&s->i2c[i], sizeof(s->i2c[i]), TYPE_IMX_I2C);
|
|
|
|
qdev_set_parent_bus(DEVICE(&s->i2c[i]), sysbus_get_default());
|
|
|
|
}
|
2015-09-14 15:39:49 +02:00
|
|
|
|
|
|
|
for (i = 0; i < FSL_IMX31_NUM_GPIOS; i++) {
|
|
|
|
object_initialize(&s->gpio[i], sizeof(s->gpio[i]), TYPE_IMX_GPIO);
|
|
|
|
qdev_set_parent_bus(DEVICE(&s->gpio[i]), sysbus_get_default());
|
|
|
|
}
|
2015-09-07 11:39:30 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
static void fsl_imx31_realize(DeviceState *dev, Error **errp)
|
|
|
|
{
|
|
|
|
FslIMX31State *s = FSL_IMX31(dev);
|
|
|
|
uint16_t i;
|
|
|
|
Error *err = NULL;
|
|
|
|
|
|
|
|
object_property_set_bool(OBJECT(&s->cpu), true, "realized", &err);
|
|
|
|
if (err) {
|
|
|
|
error_propagate(errp, err);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
object_property_set_bool(OBJECT(&s->avic), true, "realized", &err);
|
|
|
|
if (err) {
|
|
|
|
error_propagate(errp, err);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
sysbus_mmio_map(SYS_BUS_DEVICE(&s->avic), 0, FSL_IMX31_AVIC_ADDR);
|
|
|
|
sysbus_connect_irq(SYS_BUS_DEVICE(&s->avic), 0,
|
|
|
|
qdev_get_gpio_in(DEVICE(&s->cpu), ARM_CPU_IRQ));
|
|
|
|
sysbus_connect_irq(SYS_BUS_DEVICE(&s->avic), 1,
|
|
|
|
qdev_get_gpio_in(DEVICE(&s->cpu), ARM_CPU_FIQ));
|
|
|
|
|
|
|
|
object_property_set_bool(OBJECT(&s->ccm), true, "realized", &err);
|
|
|
|
if (err) {
|
|
|
|
error_propagate(errp, err);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
sysbus_mmio_map(SYS_BUS_DEVICE(&s->ccm), 0, FSL_IMX31_CCM_ADDR);
|
|
|
|
|
|
|
|
/* Initialize all UARTS */
|
|
|
|
for (i = 0; i < FSL_IMX31_NUM_UARTS; i++) {
|
|
|
|
static const struct {
|
|
|
|
hwaddr addr;
|
|
|
|
unsigned int irq;
|
|
|
|
} serial_table[FSL_IMX31_NUM_UARTS] = {
|
|
|
|
{ FSL_IMX31_UART1_ADDR, FSL_IMX31_UART1_IRQ },
|
|
|
|
{ FSL_IMX31_UART2_ADDR, FSL_IMX31_UART2_IRQ },
|
|
|
|
};
|
|
|
|
|
|
|
|
if (i < MAX_SERIAL_PORTS) {
|
2016-12-07 14:20:22 +01:00
|
|
|
Chardev *chr;
|
2015-09-07 11:39:30 +02:00
|
|
|
|
|
|
|
chr = serial_hds[i];
|
|
|
|
|
|
|
|
if (!chr) {
|
|
|
|
char label[20];
|
|
|
|
snprintf(label, sizeof(label), "imx31.uart%d", i);
|
2016-10-22 11:52:46 +02:00
|
|
|
chr = qemu_chr_new(label, "null");
|
2015-09-07 11:39:30 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
qdev_prop_set_chr(DEVICE(&s->uart[i]), "chardev", chr);
|
|
|
|
}
|
|
|
|
|
|
|
|
object_property_set_bool(OBJECT(&s->uart[i]), true, "realized", &err);
|
|
|
|
if (err) {
|
|
|
|
error_propagate(errp, err);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
sysbus_mmio_map(SYS_BUS_DEVICE(&s->uart[i]), 0, serial_table[i].addr);
|
|
|
|
sysbus_connect_irq(SYS_BUS_DEVICE(&s->uart[i]), 0,
|
|
|
|
qdev_get_gpio_in(DEVICE(&s->avic),
|
|
|
|
serial_table[i].irq));
|
|
|
|
}
|
|
|
|
|
2015-12-17 14:37:15 +01:00
|
|
|
s->gpt.ccm = IMX_CCM(&s->ccm);
|
2015-09-07 11:39:30 +02:00
|
|
|
|
|
|
|
object_property_set_bool(OBJECT(&s->gpt), true, "realized", &err);
|
|
|
|
if (err) {
|
|
|
|
error_propagate(errp, err);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
sysbus_mmio_map(SYS_BUS_DEVICE(&s->gpt), 0, FSL_IMX31_GPT_ADDR);
|
|
|
|
sysbus_connect_irq(SYS_BUS_DEVICE(&s->gpt), 0,
|
|
|
|
qdev_get_gpio_in(DEVICE(&s->avic), FSL_IMX31_GPT_IRQ));
|
|
|
|
|
|
|
|
/* Initialize all EPIT timers */
|
|
|
|
for (i = 0; i < FSL_IMX31_NUM_EPITS; i++) {
|
|
|
|
static const struct {
|
|
|
|
hwaddr addr;
|
|
|
|
unsigned int irq;
|
|
|
|
} epit_table[FSL_IMX31_NUM_EPITS] = {
|
|
|
|
{ FSL_IMX31_EPIT1_ADDR, FSL_IMX31_EPIT1_IRQ },
|
|
|
|
{ FSL_IMX31_EPIT2_ADDR, FSL_IMX31_EPIT2_IRQ },
|
|
|
|
};
|
|
|
|
|
2015-12-17 14:37:15 +01:00
|
|
|
s->epit[i].ccm = IMX_CCM(&s->ccm);
|
2015-09-07 11:39:30 +02:00
|
|
|
|
|
|
|
object_property_set_bool(OBJECT(&s->epit[i]), true, "realized", &err);
|
|
|
|
if (err) {
|
|
|
|
error_propagate(errp, err);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
sysbus_mmio_map(SYS_BUS_DEVICE(&s->epit[i]), 0, epit_table[i].addr);
|
|
|
|
sysbus_connect_irq(SYS_BUS_DEVICE(&s->epit[i]), 0,
|
|
|
|
qdev_get_gpio_in(DEVICE(&s->avic),
|
|
|
|
epit_table[i].irq));
|
|
|
|
}
|
2015-09-07 11:39:31 +02:00
|
|
|
|
|
|
|
/* Initialize all I2C */
|
|
|
|
for (i = 0; i < FSL_IMX31_NUM_I2CS; i++) {
|
|
|
|
static const struct {
|
|
|
|
hwaddr addr;
|
|
|
|
unsigned int irq;
|
|
|
|
} i2c_table[FSL_IMX31_NUM_I2CS] = {
|
|
|
|
{ FSL_IMX31_I2C1_ADDR, FSL_IMX31_I2C1_IRQ },
|
|
|
|
{ FSL_IMX31_I2C2_ADDR, FSL_IMX31_I2C2_IRQ },
|
|
|
|
{ FSL_IMX31_I2C3_ADDR, FSL_IMX31_I2C3_IRQ }
|
|
|
|
};
|
|
|
|
|
|
|
|
/* Initialize the I2C */
|
|
|
|
object_property_set_bool(OBJECT(&s->i2c[i]), true, "realized", &err);
|
|
|
|
if (err) {
|
|
|
|
error_propagate(errp, err);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
/* Map I2C memory */
|
|
|
|
sysbus_mmio_map(SYS_BUS_DEVICE(&s->i2c[i]), 0, i2c_table[i].addr);
|
|
|
|
/* Connect I2C IRQ to PIC */
|
|
|
|
sysbus_connect_irq(SYS_BUS_DEVICE(&s->i2c[i]), 0,
|
|
|
|
qdev_get_gpio_in(DEVICE(&s->avic),
|
|
|
|
i2c_table[i].irq));
|
|
|
|
}
|
2015-09-14 15:39:49 +02:00
|
|
|
|
|
|
|
/* Initialize all GPIOs */
|
|
|
|
for (i = 0; i < FSL_IMX31_NUM_GPIOS; i++) {
|
|
|
|
static const struct {
|
|
|
|
hwaddr addr;
|
|
|
|
unsigned int irq;
|
|
|
|
} gpio_table[FSL_IMX31_NUM_GPIOS] = {
|
|
|
|
{ FSL_IMX31_GPIO1_ADDR, FSL_IMX31_GPIO1_IRQ },
|
|
|
|
{ FSL_IMX31_GPIO2_ADDR, FSL_IMX31_GPIO2_IRQ },
|
|
|
|
{ FSL_IMX31_GPIO3_ADDR, FSL_IMX31_GPIO3_IRQ }
|
|
|
|
};
|
|
|
|
|
|
|
|
object_property_set_bool(OBJECT(&s->gpio[i]), false, "has-edge-sel",
|
|
|
|
&error_abort);
|
|
|
|
object_property_set_bool(OBJECT(&s->gpio[i]), true, "realized", &err);
|
|
|
|
if (err) {
|
|
|
|
error_propagate(errp, err);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
sysbus_mmio_map(SYS_BUS_DEVICE(&s->gpio[i]), 0, gpio_table[i].addr);
|
|
|
|
/* Connect GPIO IRQ to PIC */
|
|
|
|
sysbus_connect_irq(SYS_BUS_DEVICE(&s->gpio[i]), 0,
|
|
|
|
qdev_get_gpio_in(DEVICE(&s->avic),
|
|
|
|
gpio_table[i].irq));
|
|
|
|
}
|
2015-09-07 11:39:30 +02:00
|
|
|
|
|
|
|
/* On a real system, the first 16k is a `secure boot rom' */
|
2017-07-24 18:56:12 +02:00
|
|
|
memory_region_init_rom(&s->secure_rom, NULL, "imx31.secure_rom",
|
2016-07-04 14:06:35 +02:00
|
|
|
FSL_IMX31_SECURE_ROM_SIZE, &err);
|
2015-09-07 11:39:30 +02:00
|
|
|
if (err) {
|
|
|
|
error_propagate(errp, err);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
memory_region_add_subregion(get_system_memory(), FSL_IMX31_SECURE_ROM_ADDR,
|
|
|
|
&s->secure_rom);
|
|
|
|
|
|
|
|
/* There is also a 16k ROM */
|
2017-07-24 18:56:12 +02:00
|
|
|
memory_region_init_rom(&s->rom, NULL, "imx31.rom",
|
2016-07-04 14:06:35 +02:00
|
|
|
FSL_IMX31_ROM_SIZE, &err);
|
2015-09-07 11:39:30 +02:00
|
|
|
if (err) {
|
|
|
|
error_propagate(errp, err);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
memory_region_add_subregion(get_system_memory(), FSL_IMX31_ROM_ADDR,
|
|
|
|
&s->rom);
|
|
|
|
|
|
|
|
/* initialize internal RAM (16 KB) */
|
2017-07-07 16:42:53 +02:00
|
|
|
memory_region_init_ram(&s->iram, NULL, "imx31.iram", FSL_IMX31_IRAM_SIZE,
|
2015-09-07 11:39:30 +02:00
|
|
|
&err);
|
|
|
|
if (err) {
|
|
|
|
error_propagate(errp, err);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
memory_region_add_subregion(get_system_memory(), FSL_IMX31_IRAM_ADDR,
|
|
|
|
&s->iram);
|
|
|
|
|
|
|
|
/* internal RAM (16 KB) is aliased over 256 MB - 16 KB */
|
|
|
|
memory_region_init_alias(&s->iram_alias, NULL, "imx31.iram_alias",
|
|
|
|
&s->iram, 0, FSL_IMX31_IRAM_ALIAS_SIZE);
|
|
|
|
memory_region_add_subregion(get_system_memory(), FSL_IMX31_IRAM_ALIAS_ADDR,
|
|
|
|
&s->iram_alias);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void fsl_imx31_class_init(ObjectClass *oc, void *data)
|
|
|
|
{
|
|
|
|
DeviceClass *dc = DEVICE_CLASS(oc);
|
|
|
|
|
|
|
|
dc->realize = fsl_imx31_realize;
|
qdev: Protect device-list-properties against broken devices
Several devices don't survive object_unref(object_new(T)): they crash
or hang during cleanup, or they leave dangling pointers behind.
This breaks at least device-list-properties, because
qmp_device_list_properties() needs to create a device to find its
properties. Broken in commit f4eb32b "qmp: show QOM properties in
device-list-properties", v2.1. Example reproducer:
$ qemu-system-aarch64 -nodefaults -display none -machine none -S -qmp stdio
{"QMP": {"version": {"qemu": {"micro": 50, "minor": 4, "major": 2}, "package": ""}, "capabilities": []}}
{ "execute": "qmp_capabilities" }
{"return": {}}
{ "execute": "device-list-properties", "arguments": { "typename": "pxa2xx-pcmcia" } }
qemu-system-aarch64: /home/armbru/work/qemu/memory.c:1307: memory_region_finalize: Assertion `((&mr->subregions)->tqh_first == ((void *)0))' failed.
Aborted (core dumped)
[Exit 134 (SIGABRT)]
Unfortunately, I can't fix the problems in these devices right now.
Instead, add DeviceClass member cannot_destroy_with_object_finalize_yet
to mark them:
* Hang during cleanup (didn't debug, so I can't say why):
"realview_pci", "versatile_pci".
* Dangling pointer in cpus: most CPUs, plus "allwinner-a10", "digic",
"fsl,imx25", "fsl,imx31", "xlnx,zynqmp", because they create such
CPUs
* Assert kvm_enabled(): "host-x86_64-cpu", host-i386-cpu",
"host-powerpc64-cpu", "host-embedded-powerpc-cpu",
"host-powerpc-cpu" (the powerpc ones can't currently reach the
assertion, because the CPUs are only registered when KVM is enabled,
but the assertion is arguably in the wrong place all the same)
Make qmp_device_list_properties() fail cleanly when the device is so
marked. This improves device-list-properties from "crashes, hangs or
leaves dangling pointers behind" to "fails". Not a complete fix, just
a better-than-nothing work-around. In the above reproducer,
device-list-properties now fails with "Can't list properties of device
'pxa2xx-pcmcia'".
This also protects -device FOO,help, which uses the same machinery
since commit ef52358 "qdev-monitor: include QOM properties in -device
FOO, help output", v2.2. Example reproducer:
$ qemu-system-aarch64 -machine none -device pxa2xx-pcmcia,help
Before:
qemu-system-aarch64: .../memory.c:1307: memory_region_finalize: Assertion `((&mr->subregions)->tqh_first == ((void *)0))' failed.
After:
Can't list properties of device 'pxa2xx-pcmcia'
Cc: "Andreas Färber" <afaerber@suse.de>
Cc: "Edgar E. Iglesias" <edgar.iglesias@gmail.com>
Cc: Alexander Graf <agraf@suse.de>
Cc: Anthony Green <green@moxielogic.com>
Cc: Aurelien Jarno <aurelien@aurel32.net>
Cc: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Cc: Blue Swirl <blauwirbel@gmail.com>
Cc: Eduardo Habkost <ehabkost@redhat.com>
Cc: Guan Xuetao <gxt@mprc.pku.edu.cn>
Cc: Jia Liu <proljc@gmail.com>
Cc: Leon Alrae <leon.alrae@imgtec.com>
Cc: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Cc: Max Filippov <jcmvbkbc@gmail.com>
Cc: Michael Walle <michael@walle.cc>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: Peter Maydell <peter.maydell@linaro.org>
Cc: Richard Henderson <rth@twiddle.net>
Cc: qemu-ppc@nongnu.org
Cc: qemu-stable@nongnu.org
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Eduardo Habkost <ehabkost@redhat.com>
Message-Id: <1443689999-12182-10-git-send-email-armbru@redhat.com>
2015-10-01 10:59:58 +02:00
|
|
|
|
2016-03-16 18:06:00 +01:00
|
|
|
dc->desc = "i.MX31 SOC";
|
2015-09-07 11:39:30 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
static const TypeInfo fsl_imx31_type_info = {
|
|
|
|
.name = TYPE_FSL_IMX31,
|
|
|
|
.parent = TYPE_DEVICE,
|
|
|
|
.instance_size = sizeof(FslIMX31State),
|
|
|
|
.instance_init = fsl_imx31_init,
|
|
|
|
.class_init = fsl_imx31_class_init,
|
|
|
|
};
|
|
|
|
|
|
|
|
static void fsl_imx31_register_types(void)
|
|
|
|
{
|
|
|
|
type_register_static(&fsl_imx31_type_info);
|
|
|
|
}
|
|
|
|
|
|
|
|
type_init(fsl_imx31_register_types)
|