2003-06-15 21:46:57 +02:00
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/*
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* dyngen defines for micro operation code
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*
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* Copyright (c) 2003 Fabrice Bellard
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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2009-07-16 22:47:01 +02:00
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* License along with this library; if not, see <http://www.gnu.org/licenses/>.
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2003-06-15 21:46:57 +02:00
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*/
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2003-11-23 18:05:30 +01:00
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#if !defined(__DYNGEN_EXEC_H__)
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#define __DYNGEN_EXEC_H__
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2010-10-13 20:54:26 +02:00
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#include "qemu-common.h"
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2004-01-04 18:44:08 +01:00
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2008-08-15 20:33:42 +02:00
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#ifdef __OpenBSD__
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#include <sys/types.h>
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#endif
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2003-06-15 21:46:57 +02:00
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2007-02-04 14:37:44 +01:00
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/* XXX: This may be wrong for 64-bit ILP32 hosts. */
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2009-10-01 23:12:16 +02:00
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typedef void * host_reg_t;
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2007-02-04 14:37:44 +01:00
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2007-05-09 01:30:44 +02:00
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#if defined(__i386__)
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2003-06-15 21:46:57 +02:00
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#define AREG0 "ebp"
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2007-05-09 01:30:44 +02:00
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#elif defined(__x86_64__)
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2007-02-10 19:21:04 +01:00
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#define AREG0 "r14"
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2009-01-14 19:39:49 +01:00
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#elif defined(_ARCH_PPC)
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2003-06-15 21:46:57 +02:00
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#define AREG0 "r27"
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2007-05-09 01:30:44 +02:00
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#elif defined(__arm__)
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2003-06-15 21:46:57 +02:00
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#define AREG0 "r7"
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2008-04-12 22:14:54 +02:00
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#elif defined(__hppa__)
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#define AREG0 "r17"
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2007-05-09 01:30:44 +02:00
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#elif defined(__mips__)
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2010-04-09 17:28:40 +02:00
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#define AREG0 "s0"
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2007-05-09 01:30:44 +02:00
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#elif defined(__sparc__)
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2009-07-27 16:12:40 +02:00
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#ifdef CONFIG_SOLARIS
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2006-06-14 19:32:25 +02:00
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#define AREG0 "g2"
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#else
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2006-07-18 23:23:34 +02:00
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#ifdef __sparc_v9__
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2008-07-26 19:19:35 +02:00
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#define AREG0 "g5"
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2006-07-18 23:23:34 +02:00
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#else
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2003-06-15 21:46:57 +02:00
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#define AREG0 "g6"
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2006-06-14 19:32:25 +02:00
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#endif
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2006-07-18 23:23:34 +02:00
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#endif
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2007-05-09 01:30:44 +02:00
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#elif defined(__s390__)
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2003-06-15 21:46:57 +02:00
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#define AREG0 "r10"
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2007-05-09 01:30:44 +02:00
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#elif defined(__alpha__)
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2003-06-15 21:46:57 +02:00
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/* Note $15 is the frame pointer, so anything in op-i386.c that would
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require a frame pointer, like alloca, would probably loose. */
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#define AREG0 "$15"
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2007-05-09 01:30:44 +02:00
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#elif defined(__mc68000)
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2003-08-11 00:14:22 +02:00
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#define AREG0 "%a5"
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2007-05-09 01:30:44 +02:00
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#elif defined(__ia64__)
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2005-04-08 00:20:31 +02:00
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#define AREG0 "r7"
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2007-05-09 01:30:44 +02:00
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#else
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#error unsupported CPU
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2003-06-15 21:46:57 +02:00
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#endif
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2011-07-13 14:44:15 +02:00
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register CPUState *env asm(AREG0);
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2003-06-15 21:46:57 +02:00
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#define xglue(x, y) x ## y
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#define glue(x, y) xglue(x, y)
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2003-07-11 17:17:41 +02:00
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#define stringify(s) tostring(s)
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#define tostring(s) #s
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2003-06-15 21:46:57 +02:00
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2008-05-25 02:36:06 +02:00
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/* The return address may point to the start of the next instruction.
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Subtracting one gets us the call instruction itself. */
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2009-12-05 12:44:23 +01:00
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#if defined(__s390__) && !defined(__s390x__)
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2008-05-25 02:36:06 +02:00
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# define GETPC() ((void*)(((unsigned long)__builtin_return_address(0) & 0x7fffffffUL) - 1))
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#elif defined(__arm__)
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/* Thumb return addresses have the low bit set, so we need to subtract two.
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This is still safe in ARM mode because instructions are 4 bytes. */
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# define GETPC() ((void *)((unsigned long)__builtin_return_address(0) - 2))
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#else
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# define GETPC() ((void *)((unsigned long)__builtin_return_address(0) - 1))
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#endif
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2003-11-23 18:05:30 +01:00
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#endif /* !defined(__DYNGEN_EXEC_H__) */
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