* Compat machines fix (Denis)
* Command line parsing fixes (Michal, Peter, Xiaoyao) * Cooperlake CPU model fixes (Xiaoyao) * i386 gdb fix (mkdolata) * IOEventHandler cleanup (Philippe) * icount fix (Pavel) * RR support for random number sources (Pavel) * Kconfig fixes (Philippe) -----BEGIN PGP SIGNATURE----- Version: GnuPG v2.0.22 (GNU/Linux) iQEcBAABAgAGBQJeFbG8AAoJEL/70l94x66DCpMIAKBwxBL+VegqI+ySKgmtIBQX LtU+ardEeZ37VfWfvuWzTFe+zQ0hsFpz/e0LHE7Ae+LVLMNWXixlmMrTIm+Xs762 hJzxBjhUhkdrMioVYTY16Kqap4Nqaxu70gDQ32Ve2sY6xYGxYLSaJooBOU5bXVgb HPspHFVpeP6ZshBd1n2LXsgURE6v3AjTwqcsPCkL/AESFdkdOsoHeXjyKWJG1oPy W7btzlUEqVsauZI8/PhhW/8hZUvUsJVHonYLTZTyy8aklU7aOILSyT2uPXFBVUVQ irkQjLtD4dWlogBKO4i/QHMuwV+Asa57WNPmqv3EcIWPUWmTY84H0g2AxRgcc2M= =48jx -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into staging * Compat machines fix (Denis) * Command line parsing fixes (Michal, Peter, Xiaoyao) * Cooperlake CPU model fixes (Xiaoyao) * i386 gdb fix (mkdolata) * IOEventHandler cleanup (Philippe) * icount fix (Pavel) * RR support for random number sources (Pavel) * Kconfig fixes (Philippe) # gpg: Signature made Wed 08 Jan 2020 10:41:00 GMT # gpg: using RSA key BFFBD25F78C7AE83 # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full] # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [full] # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1 # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83 * remotes/bonzini/tags/for-upstream: (38 commits) chardev: Use QEMUChrEvent enum in IOEventHandler typedef chardev: use QEMUChrEvent instead of int chardev/char: Explicit we ignore some QEMUChrEvent in IOEventHandler monitor/hmp: Explicit we ignore a QEMUChrEvent in IOEventHandler monitor/qmp: Explicit we ignore few QEMUChrEvent in IOEventHandler virtio-console: Explicit we ignore some QEMUChrEvent in IOEventHandler vhost-user-blk: Explicit we ignore few QEMUChrEvent in IOEventHandler vhost-user-net: Explicit we ignore few QEMUChrEvent in IOEventHandler vhost-user-crypto: Explicit we ignore some QEMUChrEvent in IOEventHandler ccid-card-passthru: Explicit we ignore QEMUChrEvent in IOEventHandler hw/usb/redirect: Explicit we ignore few QEMUChrEvent in IOEventHandler hw/usb/dev-serial: Explicit we ignore few QEMUChrEvent in IOEventHandler hw/char/terminal3270: Explicit ignored QEMUChrEvent in IOEventHandler hw/ipmi: Explicit we ignore some QEMUChrEvent in IOEventHandler hw/ipmi: Remove unnecessary declarations target/i386: Add missed features to Cooperlake CPU model target/i386: Add new bit definitions of MSR_IA32_ARCH_CAPABILITIES target/i386: Fix handling of k_gs_base register in 32-bit mode in gdbstub hw/rtc/mc146818: Add missing dependency on ISA Bus hw/nvram/Kconfig: Restrict CHRP NVRAM to machines using OpenBIOS or SLOF ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
commit
b952544fe8
|
@ -98,7 +98,7 @@ struct KVMState
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||||||
int kvm_shadow_mem;
|
int kvm_shadow_mem;
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bool kernel_irqchip_allowed;
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bool kernel_irqchip_allowed;
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bool kernel_irqchip_required;
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bool kernel_irqchip_required;
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bool kernel_irqchip_split;
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OnOffAuto kernel_irqchip_split;
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bool sync_mmu;
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bool sync_mmu;
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bool manual_dirty_log_protect;
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bool manual_dirty_log_protect;
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/* The man page (and posix) say ioctl numbers are signed int, but
|
/* The man page (and posix) say ioctl numbers are signed int, but
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@ -1783,6 +1783,7 @@ static void kvm_irqchip_create(KVMState *s)
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{
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{
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int ret;
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int ret;
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assert(s->kernel_irqchip_split != ON_OFF_AUTO_AUTO);
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if (kvm_check_extension(s, KVM_CAP_IRQCHIP)) {
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if (kvm_check_extension(s, KVM_CAP_IRQCHIP)) {
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;
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;
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} else if (kvm_check_extension(s, KVM_CAP_S390_IRQCHIP)) {
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} else if (kvm_check_extension(s, KVM_CAP_S390_IRQCHIP)) {
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@ -1799,7 +1800,7 @@ static void kvm_irqchip_create(KVMState *s)
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* in-kernel irqchip for us */
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* in-kernel irqchip for us */
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ret = kvm_arch_irqchip_create(s);
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ret = kvm_arch_irqchip_create(s);
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if (ret == 0) {
|
if (ret == 0) {
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if (s->kernel_irqchip_split) {
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if (s->kernel_irqchip_split == ON_OFF_AUTO_ON) {
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perror("Split IRQ chip mode not supported.");
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perror("Split IRQ chip mode not supported.");
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exit(1);
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exit(1);
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} else {
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} else {
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|
@ -2070,6 +2071,10 @@ static int kvm_init(MachineState *ms)
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goto err;
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goto err;
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}
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}
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|
if (s->kernel_irqchip_split == ON_OFF_AUTO_AUTO) {
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s->kernel_irqchip_split = mc->default_kernel_irqchip_split ? ON_OFF_AUTO_ON : ON_OFF_AUTO_OFF;
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}
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if (s->kernel_irqchip_allowed) {
|
if (s->kernel_irqchip_allowed) {
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kvm_irqchip_create(s);
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kvm_irqchip_create(s);
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}
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}
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@ -3005,17 +3010,17 @@ static void kvm_set_kernel_irqchip(Object *obj, Visitor *v,
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case ON_OFF_SPLIT_ON:
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case ON_OFF_SPLIT_ON:
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s->kernel_irqchip_allowed = true;
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s->kernel_irqchip_allowed = true;
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s->kernel_irqchip_required = true;
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s->kernel_irqchip_required = true;
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s->kernel_irqchip_split = false;
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s->kernel_irqchip_split = ON_OFF_AUTO_OFF;
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break;
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break;
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case ON_OFF_SPLIT_OFF:
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case ON_OFF_SPLIT_OFF:
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s->kernel_irqchip_allowed = false;
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s->kernel_irqchip_allowed = false;
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s->kernel_irqchip_required = false;
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s->kernel_irqchip_required = false;
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s->kernel_irqchip_split = false;
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s->kernel_irqchip_split = ON_OFF_AUTO_OFF;
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break;
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break;
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case ON_OFF_SPLIT_SPLIT:
|
case ON_OFF_SPLIT_SPLIT:
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s->kernel_irqchip_allowed = true;
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s->kernel_irqchip_allowed = true;
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s->kernel_irqchip_required = true;
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s->kernel_irqchip_required = true;
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s->kernel_irqchip_split = true;
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s->kernel_irqchip_split = ON_OFF_AUTO_ON;
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break;
|
break;
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default:
|
default:
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/* The value was checked in visit_type_OnOffSplit() above. If
|
/* The value was checked in visit_type_OnOffSplit() above. If
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|
@ -3038,7 +3043,7 @@ bool kvm_kernel_irqchip_required(void)
|
||||||
|
|
||||||
bool kvm_kernel_irqchip_split(void)
|
bool kvm_kernel_irqchip_split(void)
|
||||||
{
|
{
|
||||||
return kvm_state->kernel_irqchip_split;
|
return kvm_state->kernel_irqchip_split == ON_OFF_AUTO_ON;
|
||||||
}
|
}
|
||||||
|
|
||||||
static void kvm_accel_instance_init(Object *obj)
|
static void kvm_accel_instance_init(Object *obj)
|
||||||
|
@ -3046,6 +3051,8 @@ static void kvm_accel_instance_init(Object *obj)
|
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KVMState *s = KVM_STATE(obj);
|
KVMState *s = KVM_STATE(obj);
|
||||||
|
|
||||||
s->kvm_shadow_mem = -1;
|
s->kvm_shadow_mem = -1;
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||||||
|
s->kernel_irqchip_allowed = true;
|
||||||
|
s->kernel_irqchip_split = ON_OFF_AUTO_AUTO;
|
||||||
}
|
}
|
||||||
|
|
||||||
static void kvm_accel_class_init(ObjectClass *oc, void *data)
|
static void kvm_accel_class_init(ObjectClass *oc, void *data)
|
||||||
|
|
|
@ -152,7 +152,7 @@ cryptodev_vhost_claim_chardev(CryptoDevBackendVhostUser *s,
|
||||||
return chr;
|
return chr;
|
||||||
}
|
}
|
||||||
|
|
||||||
static void cryptodev_vhost_user_event(void *opaque, int event)
|
static void cryptodev_vhost_user_event(void *opaque, QEMUChrEvent event)
|
||||||
{
|
{
|
||||||
CryptoDevBackendVhostUser *s = opaque;
|
CryptoDevBackendVhostUser *s = opaque;
|
||||||
CryptoDevBackend *b = CRYPTODEV_BACKEND(s);
|
CryptoDevBackend *b = CRYPTODEV_BACKEND(s);
|
||||||
|
@ -171,6 +171,11 @@ static void cryptodev_vhost_user_event(void *opaque, int event)
|
||||||
b->ready = false;
|
b->ready = false;
|
||||||
cryptodev_vhost_user_stop(queues, s);
|
cryptodev_vhost_user_stop(queues, s);
|
||||||
break;
|
break;
|
||||||
|
case CHR_EVENT_BREAK:
|
||||||
|
case CHR_EVENT_MUX_IN:
|
||||||
|
case CHR_EVENT_MUX_OUT:
|
||||||
|
/* Ignore */
|
||||||
|
break;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
@ -117,7 +117,7 @@ static void mux_print_help(Chardev *chr)
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
static void mux_chr_send_event(MuxChardev *d, int mux_nr, int event)
|
static void mux_chr_send_event(MuxChardev *d, int mux_nr, QEMUChrEvent event)
|
||||||
{
|
{
|
||||||
CharBackend *be = d->backends[mux_nr];
|
CharBackend *be = d->backends[mux_nr];
|
||||||
|
|
||||||
|
@ -126,7 +126,7 @@ static void mux_chr_send_event(MuxChardev *d, int mux_nr, int event)
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
static void mux_chr_be_event(Chardev *chr, int event)
|
static void mux_chr_be_event(Chardev *chr, QEMUChrEvent event)
|
||||||
{
|
{
|
||||||
MuxChardev *d = MUX_CHARDEV(chr);
|
MuxChardev *d = MUX_CHARDEV(chr);
|
||||||
|
|
||||||
|
@ -232,7 +232,7 @@ static void mux_chr_read(void *opaque, const uint8_t *buf, int size)
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
void mux_chr_send_all_event(Chardev *chr, int event)
|
void mux_chr_send_all_event(Chardev *chr, QEMUChrEvent event)
|
||||||
{
|
{
|
||||||
MuxChardev *d = MUX_CHARDEV(chr);
|
MuxChardev *d = MUX_CHARDEV(chr);
|
||||||
int i;
|
int i;
|
||||||
|
@ -247,7 +247,7 @@ void mux_chr_send_all_event(Chardev *chr, int event)
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
static void mux_chr_event(void *opaque, int event)
|
static void mux_chr_event(void *opaque, QEMUChrEvent event)
|
||||||
{
|
{
|
||||||
mux_chr_send_all_event(CHARDEV(opaque), event);
|
mux_chr_send_all_event(CHARDEV(opaque), event);
|
||||||
}
|
}
|
||||||
|
|
|
@ -49,7 +49,7 @@ static Object *get_chardevs_root(void)
|
||||||
return container_get(object_get_root(), "/chardevs");
|
return container_get(object_get_root(), "/chardevs");
|
||||||
}
|
}
|
||||||
|
|
||||||
static void chr_be_event(Chardev *s, int event)
|
static void chr_be_event(Chardev *s, QEMUChrEvent event)
|
||||||
{
|
{
|
||||||
CharBackend *be = s->be;
|
CharBackend *be = s->be;
|
||||||
|
|
||||||
|
@ -60,7 +60,7 @@ static void chr_be_event(Chardev *s, int event)
|
||||||
be->chr_event(be->opaque, event);
|
be->chr_event(be->opaque, event);
|
||||||
}
|
}
|
||||||
|
|
||||||
void qemu_chr_be_event(Chardev *s, int event)
|
void qemu_chr_be_event(Chardev *s, QEMUChrEvent event)
|
||||||
{
|
{
|
||||||
/* Keep track if the char device is open */
|
/* Keep track if the char device is open */
|
||||||
switch (event) {
|
switch (event) {
|
||||||
|
@ -70,6 +70,11 @@ void qemu_chr_be_event(Chardev *s, int event)
|
||||||
case CHR_EVENT_CLOSED:
|
case CHR_EVENT_CLOSED:
|
||||||
s->be_open = 0;
|
s->be_open = 0;
|
||||||
break;
|
break;
|
||||||
|
case CHR_EVENT_BREAK:
|
||||||
|
case CHR_EVENT_MUX_IN:
|
||||||
|
case CHR_EVENT_MUX_OUT:
|
||||||
|
/* Ignore */
|
||||||
|
break;
|
||||||
}
|
}
|
||||||
|
|
||||||
CHARDEV_GET_CLASS(s)->chr_be_event(s, event);
|
CHARDEV_GET_CLASS(s)->chr_be_event(s, event);
|
||||||
|
|
4
cpus.c
4
cpus.c
|
@ -1316,6 +1316,10 @@ static int64_t tcg_get_icount_limit(void)
|
||||||
*/
|
*/
|
||||||
deadline = qemu_clock_deadline_ns_all(QEMU_CLOCK_VIRTUAL,
|
deadline = qemu_clock_deadline_ns_all(QEMU_CLOCK_VIRTUAL,
|
||||||
QEMU_TIMER_ATTR_ALL);
|
QEMU_TIMER_ATTR_ALL);
|
||||||
|
/* Check realtime timers, because they help with input processing */
|
||||||
|
deadline = qemu_soonest_timeout(deadline,
|
||||||
|
qemu_clock_deadline_ns_all(QEMU_CLOCK_REALTIME,
|
||||||
|
QEMU_TIMER_ATTR_ALL));
|
||||||
|
|
||||||
/* Maintain prior (possibly buggy) behaviour where if no deadline
|
/* Maintain prior (possibly buggy) behaviour where if no deadline
|
||||||
* was set (as there is no QEMU_CLOCK_VIRTUAL timer) or it is more than
|
* was set (as there is no QEMU_CLOCK_VIRTUAL timer) or it is more than
|
||||||
|
|
|
@ -1,7 +1,6 @@
|
||||||
# Default configuration for ppc-softmmu
|
# Default configuration for ppc-softmmu
|
||||||
|
|
||||||
# For embedded PPCs:
|
# For embedded PPCs:
|
||||||
CONFIG_MPC_I2C=y
|
|
||||||
CONFIG_DS1338=y
|
CONFIG_DS1338=y
|
||||||
CONFIG_E500=y
|
CONFIG_E500=y
|
||||||
CONFIG_PPC405=y
|
CONFIG_PPC405=y
|
||||||
|
|
|
@ -67,6 +67,7 @@ Modifications of qemu include:
|
||||||
* network filter for recording and replaying the packets
|
* network filter for recording and replaying the packets
|
||||||
* block driver for making block layer deterministic
|
* block driver for making block layer deterministic
|
||||||
* serial port input record and replay
|
* serial port input record and replay
|
||||||
|
* recording of random numbers obtained from the external sources
|
||||||
|
|
||||||
Locking and thread synchronisation
|
Locking and thread synchronisation
|
||||||
----------------------------------
|
----------------------------------
|
||||||
|
|
|
@ -3171,7 +3171,7 @@ static void gdb_chr_receive(void *opaque, const uint8_t *buf, int size)
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
static void gdb_chr_event(void *opaque, int event)
|
static void gdb_chr_event(void *opaque, QEMUChrEvent event)
|
||||||
{
|
{
|
||||||
int i;
|
int i;
|
||||||
GDBState *s = (GDBState *) opaque;
|
GDBState *s = (GDBState *) opaque;
|
||||||
|
|
|
@ -1955,7 +1955,7 @@ static void pxa2xx_fir_rx(void *opaque, const uint8_t *buf, int size)
|
||||||
pxa2xx_fir_update(s);
|
pxa2xx_fir_update(s);
|
||||||
}
|
}
|
||||||
|
|
||||||
static void pxa2xx_fir_event(void *opaque, int event)
|
static void pxa2xx_fir_event(void *opaque, QEMUChrEvent event)
|
||||||
{
|
{
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
@ -1093,7 +1093,7 @@ static void strongarm_uart_receive(void *opaque, const uint8_t *buf, int size)
|
||||||
strongarm_uart_update_int_status(s);
|
strongarm_uart_update_int_status(s);
|
||||||
}
|
}
|
||||||
|
|
||||||
static void strongarm_uart_event(void *opaque, int event)
|
static void strongarm_uart_event(void *opaque, QEMUChrEvent event)
|
||||||
{
|
{
|
||||||
StrongARMUARTState *s = opaque;
|
StrongARMUARTState *s = opaque;
|
||||||
if (event == CHR_EVENT_BREAK) {
|
if (event == CHR_EVENT_BREAK) {
|
||||||
|
|
|
@ -361,7 +361,7 @@ static gboolean vhost_user_blk_watch(GIOChannel *chan, GIOCondition cond,
|
||||||
return true;
|
return true;
|
||||||
}
|
}
|
||||||
|
|
||||||
static void vhost_user_blk_event(void *opaque, int event)
|
static void vhost_user_blk_event(void *opaque, QEMUChrEvent event)
|
||||||
{
|
{
|
||||||
DeviceState *dev = opaque;
|
DeviceState *dev = opaque;
|
||||||
VirtIODevice *vdev = VIRTIO_DEVICE(dev);
|
VirtIODevice *vdev = VIRTIO_DEVICE(dev);
|
||||||
|
@ -383,6 +383,11 @@ static void vhost_user_blk_event(void *opaque, int event)
|
||||||
s->watch = 0;
|
s->watch = 0;
|
||||||
}
|
}
|
||||||
break;
|
break;
|
||||||
|
case CHR_EVENT_BREAK:
|
||||||
|
case CHR_EVENT_MUX_IN:
|
||||||
|
case CHR_EVENT_MUX_OUT:
|
||||||
|
/* Ignore */
|
||||||
|
break;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
@ -348,7 +348,7 @@ static void uart_receive(void *opaque, const uint8_t *buf, int size)
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
static void uart_event(void *opaque, int event)
|
static void uart_event(void *opaque, QEMUChrEvent event)
|
||||||
{
|
{
|
||||||
CadenceUARTState *s = opaque;
|
CadenceUARTState *s = opaque;
|
||||||
uint8_t buf = '\0';
|
uint8_t buf = '\0';
|
||||||
|
|
|
@ -131,7 +131,7 @@ static void uart_rx(void *opaque, const uint8_t *buf, int size)
|
||||||
s->reg_rx = *buf;
|
s->reg_rx = *buf;
|
||||||
}
|
}
|
||||||
|
|
||||||
static void uart_event(void *opaque, int event)
|
static void uart_event(void *opaque, QEMUChrEvent event)
|
||||||
{
|
{
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
@ -634,7 +634,7 @@ static void serial_receive1(void *opaque, const uint8_t *buf, int size)
|
||||||
serial_receive_byte(s, buf[0]);
|
serial_receive_byte(s, buf[0]);
|
||||||
}
|
}
|
||||||
|
|
||||||
static void serial_event(void *opaque, int event)
|
static void serial_event(void *opaque, QEMUChrEvent event)
|
||||||
{
|
{
|
||||||
ESCCChannelState *s = opaque;
|
ESCCChannelState *s = opaque;
|
||||||
if (event == CHR_EVENT_BREAK)
|
if (event == CHR_EVENT_BREAK)
|
||||||
|
|
|
@ -202,7 +202,7 @@ static int serial_can_receive(void *opaque)
|
||||||
return sizeof(s->rx_fifo) - s->rx_fifo_len;
|
return sizeof(s->rx_fifo) - s->rx_fifo_len;
|
||||||
}
|
}
|
||||||
|
|
||||||
static void serial_event(void *opaque, int event)
|
static void serial_event(void *opaque, QEMUChrEvent event)
|
||||||
{
|
{
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
|
@ -528,7 +528,7 @@ static void exynos4210_uart_receive(void *opaque, const uint8_t *buf, int size)
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
static void exynos4210_uart_event(void *opaque, int event)
|
static void exynos4210_uart_event(void *opaque, QEMUChrEvent event)
|
||||||
{
|
{
|
||||||
Exynos4210UartState *s = (Exynos4210UartState *)opaque;
|
Exynos4210UartState *s = (Exynos4210UartState *)opaque;
|
||||||
|
|
||||||
|
|
|
@ -155,7 +155,7 @@ static void grlib_apbuart_receive(void *opaque, const uint8_t *buf, int size)
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
static void grlib_apbuart_event(void *opaque, int event)
|
static void grlib_apbuart_event(void *opaque, QEMUChrEvent event)
|
||||||
{
|
{
|
||||||
trace_grlib_apbuart_event(event);
|
trace_grlib_apbuart_event(event);
|
||||||
}
|
}
|
||||||
|
|
|
@ -323,7 +323,7 @@ static void imx_receive(void *opaque, const uint8_t *buf, int size)
|
||||||
imx_put_data(opaque, *buf);
|
imx_put_data(opaque, *buf);
|
||||||
}
|
}
|
||||||
|
|
||||||
static void imx_event(void *opaque, int event)
|
static void imx_event(void *opaque, QEMUChrEvent event)
|
||||||
{
|
{
|
||||||
if (event == CHR_EVENT_BREAK) {
|
if (event == CHR_EVENT_BREAK) {
|
||||||
imx_put_data(opaque, URXD_BRK | URXD_FRMERR | URXD_ERR);
|
imx_put_data(opaque, URXD_BRK | URXD_FRMERR | URXD_ERR);
|
||||||
|
|
|
@ -503,7 +503,7 @@ static void hostdev_receive(void *opaque, const uint8_t *buf, int size)
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
static void hostdev_event(void *opaque, int event)
|
static void hostdev_event(void *opaque, QEMUChrEvent event)
|
||||||
{
|
{
|
||||||
SCC2698Channel *ch = opaque;
|
SCC2698Channel *ch = opaque;
|
||||||
switch (event) {
|
switch (event) {
|
||||||
|
|
|
@ -104,7 +104,7 @@ static int juart_can_rx(void *opaque)
|
||||||
return !(s->jrx & JRX_FULL);
|
return !(s->jrx & JRX_FULL);
|
||||||
}
|
}
|
||||||
|
|
||||||
static void juart_event(void *opaque, int event)
|
static void juart_event(void *opaque, QEMUChrEvent event)
|
||||||
{
|
{
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
@ -235,7 +235,7 @@ static int uart_can_rx(void *opaque)
|
||||||
return !(s->regs[R_LSR] & LSR_DR);
|
return !(s->regs[R_LSR] & LSR_DR);
|
||||||
}
|
}
|
||||||
|
|
||||||
static void uart_event(void *opaque, int event)
|
static void uart_event(void *opaque, QEMUChrEvent event)
|
||||||
{
|
{
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
@ -256,7 +256,7 @@ static void mcf_uart_push_byte(mcf_uart_state *s, uint8_t data)
|
||||||
mcf_uart_update(s);
|
mcf_uart_update(s);
|
||||||
}
|
}
|
||||||
|
|
||||||
static void mcf_uart_event(void *opaque, int event)
|
static void mcf_uart_event(void *opaque, QEMUChrEvent event)
|
||||||
{
|
{
|
||||||
mcf_uart_state *s = (mcf_uart_state *)opaque;
|
mcf_uart_state *s = (mcf_uart_state *)opaque;
|
||||||
|
|
||||||
|
|
|
@ -180,7 +180,7 @@ static int uart_can_rx(void *opaque)
|
||||||
return !(s->regs[R_STAT] & STAT_RX_EVT);
|
return !(s->regs[R_STAT] & STAT_RX_EVT);
|
||||||
}
|
}
|
||||||
|
|
||||||
static void uart_event(void *opaque, int event)
|
static void uart_event(void *opaque, QEMUChrEvent event)
|
||||||
{
|
{
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
@ -245,7 +245,7 @@ static int uart_can_receive(void *opaque)
|
||||||
return s->rx_started ? (UART_FIFO_LENGTH - s->rx_fifo_len) : 0;
|
return s->rx_started ? (UART_FIFO_LENGTH - s->rx_fifo_len) : 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
static void uart_event(void *opaque, int event)
|
static void uart_event(void *opaque, QEMUChrEvent event)
|
||||||
{
|
{
|
||||||
NRF51UARTState *s = NRF51_UART(opaque);
|
NRF51UARTState *s = NRF51_UART(opaque);
|
||||||
|
|
||||||
|
|
|
@ -280,7 +280,7 @@ static void pl011_receive(void *opaque, const uint8_t *buf, int size)
|
||||||
pl011_put_fifo(opaque, *buf);
|
pl011_put_fifo(opaque, *buf);
|
||||||
}
|
}
|
||||||
|
|
||||||
static void pl011_event(void *opaque, int event)
|
static void pl011_event(void *opaque, QEMUChrEvent event)
|
||||||
{
|
{
|
||||||
if (event == CHR_EVENT_BREAK)
|
if (event == CHR_EVENT_BREAK)
|
||||||
pl011_put_fifo(opaque, 0x400);
|
pl011_put_fifo(opaque, 0x400);
|
||||||
|
|
|
@ -635,7 +635,7 @@ static void serial_receive1(void *opaque, const uint8_t *buf, int size)
|
||||||
serial_update_irq(s);
|
serial_update_irq(s);
|
||||||
}
|
}
|
||||||
|
|
||||||
static void serial_event(void *opaque, int event)
|
static void serial_event(void *opaque, QEMUChrEvent event)
|
||||||
{
|
{
|
||||||
SerialState *s = opaque;
|
SerialState *s = opaque;
|
||||||
DPRINTF("event %x\n", event);
|
DPRINTF("event %x\n", event);
|
||||||
|
|
|
@ -358,7 +358,7 @@ static void sh_serial_receive1(void *opaque, const uint8_t *buf, int size)
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
static void sh_serial_event(void *opaque, int event)
|
static void sh_serial_event(void *opaque, QEMUChrEvent event)
|
||||||
{
|
{
|
||||||
sh_serial_state *s = opaque;
|
sh_serial_state *s = opaque;
|
||||||
if (event == CHR_EVENT_BREAK)
|
if (event == CHR_EVENT_BREAK)
|
||||||
|
|
|
@ -142,7 +142,7 @@ static void terminal_read(void *opaque, const uint8_t *buf, int size)
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
static void chr_event(void *opaque, int event)
|
static void chr_event(void *opaque, QEMUChrEvent event)
|
||||||
{
|
{
|
||||||
Terminal3270 *t = opaque;
|
Terminal3270 *t = opaque;
|
||||||
CcwDevice *ccw_dev = CCW_DEVICE(t);
|
CcwDevice *ccw_dev = CCW_DEVICE(t);
|
||||||
|
@ -166,6 +166,11 @@ static void chr_event(void *opaque, int event)
|
||||||
sch->curr_status.scsw.dstat = SCSW_DSTAT_DEVICE_END;
|
sch->curr_status.scsw.dstat = SCSW_DSTAT_DEVICE_END;
|
||||||
css_conditional_io_interrupt(sch);
|
css_conditional_io_interrupt(sch);
|
||||||
break;
|
break;
|
||||||
|
case CHR_EVENT_BREAK:
|
||||||
|
case CHR_EVENT_MUX_IN:
|
||||||
|
case CHR_EVENT_MUX_OUT:
|
||||||
|
/* Ignore */
|
||||||
|
break;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
@ -145,7 +145,7 @@ static void chr_read(void *opaque, const uint8_t *buf, int size)
|
||||||
virtio_serial_write(port, buf, size);
|
virtio_serial_write(port, buf, size);
|
||||||
}
|
}
|
||||||
|
|
||||||
static void chr_event(void *opaque, int event)
|
static void chr_event(void *opaque, QEMUChrEvent event)
|
||||||
{
|
{
|
||||||
VirtConsole *vcon = opaque;
|
VirtConsole *vcon = opaque;
|
||||||
VirtIOSerialPort *port = VIRTIO_SERIAL_PORT(vcon);
|
VirtIOSerialPort *port = VIRTIO_SERIAL_PORT(vcon);
|
||||||
|
@ -162,6 +162,11 @@ static void chr_event(void *opaque, int event)
|
||||||
}
|
}
|
||||||
virtio_serial_close(port);
|
virtio_serial_close(port);
|
||||||
break;
|
break;
|
||||||
|
case CHR_EVENT_BREAK:
|
||||||
|
case CHR_EVENT_MUX_IN:
|
||||||
|
case CHR_EVENT_MUX_OUT:
|
||||||
|
/* Ignore */
|
||||||
|
break;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
@ -206,7 +206,7 @@ static int uart_can_rx(void *opaque)
|
||||||
return s->rx_fifo_len < sizeof(s->rx_fifo);
|
return s->rx_fifo_len < sizeof(s->rx_fifo);
|
||||||
}
|
}
|
||||||
|
|
||||||
static void uart_event(void *opaque, int event)
|
static void uart_event(void *opaque, QEMUChrEvent event)
|
||||||
{
|
{
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
|
@ -95,7 +95,7 @@ config Q35
|
||||||
|
|
||||||
config MICROVM
|
config MICROVM
|
||||||
bool
|
bool
|
||||||
imply SERIAL_ISA
|
select SERIAL_ISA # for serial_hds_isa_init()
|
||||||
select ISA_BUS
|
select ISA_BUS
|
||||||
select APIC
|
select APIC
|
||||||
select IOAPIC
|
select IOAPIC
|
||||||
|
|
|
@ -612,6 +612,7 @@ void x86_load_linux(X86MachineState *x86ms,
|
||||||
vmode = strstr(kernel_cmdline, "vga=");
|
vmode = strstr(kernel_cmdline, "vga=");
|
||||||
if (vmode) {
|
if (vmode) {
|
||||||
unsigned int video_mode;
|
unsigned int video_mode;
|
||||||
|
const char *end;
|
||||||
int ret;
|
int ret;
|
||||||
/* skip "vga=" */
|
/* skip "vga=" */
|
||||||
vmode += 4;
|
vmode += 4;
|
||||||
|
@ -622,10 +623,9 @@ void x86_load_linux(X86MachineState *x86ms,
|
||||||
} else if (!strncmp(vmode, "ask", 3)) {
|
} else if (!strncmp(vmode, "ask", 3)) {
|
||||||
video_mode = 0xfffd;
|
video_mode = 0xfffd;
|
||||||
} else {
|
} else {
|
||||||
ret = qemu_strtoui(vmode, NULL, 0, &video_mode);
|
ret = qemu_strtoui(vmode, &end, 0, &video_mode);
|
||||||
if (ret != 0) {
|
if (ret != 0 || (*end && *end != ' ')) {
|
||||||
fprintf(stderr, "qemu: can't parse 'vga' parameter: %s\n",
|
fprintf(stderr, "qemu: invalid 'vga=' kernel parameter.\n");
|
||||||
strerror(-ret));
|
|
||||||
exit(1);
|
exit(1);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
|
@ -3,6 +3,7 @@ config HEATHROW_PIC
|
||||||
|
|
||||||
config I8259
|
config I8259
|
||||||
bool
|
bool
|
||||||
|
select ISA_BUS
|
||||||
|
|
||||||
config PL190
|
config PL190
|
||||||
bool
|
bool
|
||||||
|
|
|
@ -87,10 +87,6 @@ typedef struct IPMIBmcExtern {
|
||||||
bool send_reset;
|
bool send_reset;
|
||||||
} IPMIBmcExtern;
|
} IPMIBmcExtern;
|
||||||
|
|
||||||
static int can_receive(void *opaque);
|
|
||||||
static void receive(void *opaque, const uint8_t *buf, int size);
|
|
||||||
static void chr_event(void *opaque, int event);
|
|
||||||
|
|
||||||
static unsigned char
|
static unsigned char
|
||||||
ipmb_checksum(const unsigned char *data, int size, unsigned char start)
|
ipmb_checksum(const unsigned char *data, int size, unsigned char start)
|
||||||
{
|
{
|
||||||
|
@ -383,7 +379,7 @@ static void receive(void *opaque, const uint8_t *buf, int size)
|
||||||
handle_hw_op(ibe, hw_op);
|
handle_hw_op(ibe, hw_op);
|
||||||
}
|
}
|
||||||
|
|
||||||
static void chr_event(void *opaque, int event)
|
static void chr_event(void *opaque, QEMUChrEvent event)
|
||||||
{
|
{
|
||||||
IPMIBmcExtern *ibe = opaque;
|
IPMIBmcExtern *ibe = opaque;
|
||||||
IPMIInterface *s = ibe->parent.intf;
|
IPMIInterface *s = ibe->parent.intf;
|
||||||
|
@ -439,6 +435,12 @@ static void chr_event(void *opaque, int event)
|
||||||
k->handle_rsp(s, ibe->outbuf[0], ibe->inbuf + 1, 3);
|
k->handle_rsp(s, ibe->outbuf[0], ibe->inbuf + 1, 3);
|
||||||
}
|
}
|
||||||
break;
|
break;
|
||||||
|
|
||||||
|
case CHR_EVENT_BREAK:
|
||||||
|
case CHR_EVENT_MUX_IN:
|
||||||
|
case CHR_EVENT_MUX_OUT:
|
||||||
|
/* Ignore */
|
||||||
|
break;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
@ -98,7 +98,7 @@ enum boston_plat_reg {
|
||||||
PLAT_SYS_CTL = 0x48,
|
PLAT_SYS_CTL = 0x48,
|
||||||
};
|
};
|
||||||
|
|
||||||
static void boston_lcd_event(void *opaque, int event)
|
static void boston_lcd_event(void *opaque, QEMUChrEvent event)
|
||||||
{
|
{
|
||||||
BostonState *s = opaque;
|
BostonState *s = opaque;
|
||||||
if (event == CHR_EVENT_OPENED && !s->lcd_inited) {
|
if (event == CHR_EVENT_OPENED && !s->lcd_inited) {
|
||||||
|
|
|
@ -545,7 +545,7 @@ static void malta_fpga_reset(void *opaque)
|
||||||
snprintf(s->display_text, 9, " ");
|
snprintf(s->display_text, 9, " ");
|
||||||
}
|
}
|
||||||
|
|
||||||
static void malta_fgpa_display_event(void *opaque, int event)
|
static void malta_fgpa_display_event(void *opaque, QEMUChrEvent event)
|
||||||
{
|
{
|
||||||
MaltaFPGAState *s = opaque;
|
MaltaFPGAState *s = opaque;
|
||||||
|
|
||||||
|
|
|
@ -14,6 +14,7 @@ config EEPRO100_PCI
|
||||||
bool
|
bool
|
||||||
default y if PCI_DEVICES
|
default y if PCI_DEVICES
|
||||||
depends on PCI
|
depends on PCI
|
||||||
|
select NMC93XX_EEPROM
|
||||||
|
|
||||||
config PCNET_PCI
|
config PCNET_PCI
|
||||||
bool
|
bool
|
||||||
|
@ -28,6 +29,7 @@ config TULIP
|
||||||
bool
|
bool
|
||||||
default y if PCI_DEVICES
|
default y if PCI_DEVICES
|
||||||
depends on PCI
|
depends on PCI
|
||||||
|
select NMC93XX_EEPROM
|
||||||
|
|
||||||
config E1000_PCI
|
config E1000_PCI
|
||||||
bool
|
bool
|
||||||
|
|
|
@ -7,3 +7,11 @@ config AT24C
|
||||||
|
|
||||||
config MAC_NVRAM
|
config MAC_NVRAM
|
||||||
bool
|
bool
|
||||||
|
select CHRP_NVRAM
|
||||||
|
|
||||||
|
# NMC93XX uses the NS uWire interface (similar to SPI but less configurable)
|
||||||
|
config NMC93XX_EEPROM
|
||||||
|
bool
|
||||||
|
|
||||||
|
config CHRP_NVRAM
|
||||||
|
bool
|
||||||
|
|
|
@ -1,8 +1,8 @@
|
||||||
common-obj-$(CONFIG_DS1225Y) += ds1225y.o
|
common-obj-$(CONFIG_DS1225Y) += ds1225y.o
|
||||||
common-obj-y += eeprom93xx.o
|
common-obj-$(CONFIG_NMC93XX_EEPROM) += eeprom93xx.o
|
||||||
common-obj-$(CONFIG_AT24C) += eeprom_at24c.o
|
common-obj-$(CONFIG_AT24C) += eeprom_at24c.o
|
||||||
common-obj-y += fw_cfg.o
|
common-obj-y += fw_cfg.o
|
||||||
common-obj-y += chrp_nvram.o
|
common-obj-$(CONFIG_CHRP_NVRAM) += chrp_nvram.o
|
||||||
common-obj-$(CONFIG_MAC_NVRAM) += mac_nvram.o
|
common-obj-$(CONFIG_MAC_NVRAM) += mac_nvram.o
|
||||||
obj-$(CONFIG_PSERIES) += spapr_nvram.o
|
obj-$(CONFIG_PSERIES) += spapr_nvram.o
|
||||||
obj-$(CONFIG_NRF51_SOC) += nrf51_nvm.o
|
obj-$(CONFIG_NRF51_SOC) += nrf51_nvm.o
|
||||||
|
|
|
@ -10,6 +10,8 @@ config PSERIES
|
||||||
select XICS_SPAPR
|
select XICS_SPAPR
|
||||||
select XIVE_SPAPR
|
select XIVE_SPAPR
|
||||||
select MSI_NONBROKEN
|
select MSI_NONBROKEN
|
||||||
|
select FDT_PPC
|
||||||
|
select CHRP_NVRAM
|
||||||
|
|
||||||
config SPAPR_RNG
|
config SPAPR_RNG
|
||||||
bool
|
bool
|
||||||
|
@ -26,6 +28,7 @@ config POWERNV
|
||||||
select MC146818RTC
|
select MC146818RTC
|
||||||
select XICS
|
select XICS
|
||||||
select XIVE
|
select XIVE
|
||||||
|
select FDT_PPC
|
||||||
|
|
||||||
config PPC405
|
config PPC405
|
||||||
bool
|
bool
|
||||||
|
@ -42,6 +45,7 @@ config PPC440
|
||||||
select PCI_EXPRESS
|
select PCI_EXPRESS
|
||||||
select PPC4XX
|
select PPC4XX
|
||||||
select SERIAL
|
select SERIAL
|
||||||
|
select FDT_PPC
|
||||||
|
|
||||||
config PPC4XX
|
config PPC4XX
|
||||||
bool
|
bool
|
||||||
|
@ -50,6 +54,7 @@ config PPC4XX
|
||||||
|
|
||||||
config SAM460EX
|
config SAM460EX
|
||||||
bool
|
bool
|
||||||
|
select PPC405
|
||||||
select PFLASH_CFI01
|
select PFLASH_CFI01
|
||||||
select IDE_SII3112
|
select IDE_SII3112
|
||||||
select M41T80
|
select M41T80
|
||||||
|
@ -59,6 +64,7 @@ config SAM460EX
|
||||||
select SMBUS_EEPROM
|
select SMBUS_EEPROM
|
||||||
select USB_EHCI_SYSBUS
|
select USB_EHCI_SYSBUS
|
||||||
select USB_OHCI
|
select USB_OHCI
|
||||||
|
select FDT_PPC
|
||||||
|
|
||||||
config PREP
|
config PREP
|
||||||
bool
|
bool
|
||||||
|
@ -71,6 +77,7 @@ config PREP
|
||||||
select M48T59
|
select M48T59
|
||||||
select PC87312
|
select PC87312
|
||||||
select RS6000_MC
|
select RS6000_MC
|
||||||
|
select FW_CFG_PPC
|
||||||
|
|
||||||
config RS6000_MC
|
config RS6000_MC
|
||||||
bool
|
bool
|
||||||
|
@ -84,6 +91,7 @@ config MAC_OLDWORLD
|
||||||
select GRACKLE_PCI
|
select GRACKLE_PCI
|
||||||
select HEATHROW_PIC
|
select HEATHROW_PIC
|
||||||
select MACIO
|
select MACIO
|
||||||
|
select FW_CFG_PPC
|
||||||
|
|
||||||
config MAC_NEWWORLD
|
config MAC_NEWWORLD
|
||||||
bool
|
bool
|
||||||
|
@ -95,6 +103,7 @@ config MAC_NEWWORLD
|
||||||
select MACIO_GPIO
|
select MACIO_GPIO
|
||||||
select MAC_PMU
|
select MAC_PMU
|
||||||
select UNIN_PCI
|
select UNIN_PCI
|
||||||
|
select FW_CFG_PPC
|
||||||
|
|
||||||
config E500
|
config E500
|
||||||
bool
|
bool
|
||||||
|
@ -105,13 +114,17 @@ config E500
|
||||||
select PLATFORM_BUS
|
select PLATFORM_BUS
|
||||||
select PPCE500_PCI
|
select PPCE500_PCI
|
||||||
select SERIAL
|
select SERIAL
|
||||||
|
select MPC_I2C
|
||||||
|
select FDT_PPC
|
||||||
|
|
||||||
config VIRTEX
|
config VIRTEX
|
||||||
bool
|
bool
|
||||||
|
select PPC4XX
|
||||||
select PFLASH_CFI01
|
select PFLASH_CFI01
|
||||||
select SERIAL
|
select SERIAL
|
||||||
select XILINX
|
select XILINX
|
||||||
select XILINX_ETHLITE
|
select XILINX_ETHLITE
|
||||||
|
select FDT_PPC
|
||||||
|
|
||||||
config XIVE
|
config XIVE
|
||||||
bool
|
bool
|
||||||
|
@ -127,3 +140,10 @@ config XIVE_KVM
|
||||||
bool
|
bool
|
||||||
default y
|
default y
|
||||||
depends on XIVE_SPAPR && KVM
|
depends on XIVE_SPAPR && KVM
|
||||||
|
|
||||||
|
# Only used by 64-bit targets
|
||||||
|
config FW_CFG_PPC
|
||||||
|
bool
|
||||||
|
|
||||||
|
config FDT_PPC
|
||||||
|
bool
|
||||||
|
|
|
@ -1,5 +1,7 @@
|
||||||
# shared objects
|
# shared objects
|
||||||
obj-y += ppc.o ppc_booke.o fdt.o fw_cfg.o
|
obj-y += ppc.o ppc_booke.o
|
||||||
|
obj-$(CONFIG_FDT_PPC) += fdt.o
|
||||||
|
obj-$(CONFIG_FW_CFG_PPC) += fw_cfg.o
|
||||||
# IBM pSeries (sPAPR)
|
# IBM pSeries (sPAPR)
|
||||||
obj-$(CONFIG_PSERIES) += spapr.o spapr_caps.o spapr_vio.o spapr_events.o
|
obj-$(CONFIG_PSERIES) += spapr.o spapr_caps.o spapr_vio.o spapr_events.o
|
||||||
obj-$(CONFIG_PSERIES) += spapr_hcall.o spapr_iommu.o spapr_rtas.o
|
obj-$(CONFIG_PSERIES) += spapr_hcall.o spapr_iommu.o spapr_rtas.o
|
||||||
|
@ -7,14 +9,11 @@ obj-$(CONFIG_PSERIES) += spapr_pci.o spapr_rtc.o spapr_drc.o
|
||||||
obj-$(CONFIG_PSERIES) += spapr_cpu_core.o spapr_ovec.o spapr_irq.o
|
obj-$(CONFIG_PSERIES) += spapr_cpu_core.o spapr_ovec.o spapr_irq.o
|
||||||
obj-$(CONFIG_PSERIES) += spapr_tpm_proxy.o
|
obj-$(CONFIG_PSERIES) += spapr_tpm_proxy.o
|
||||||
obj-$(CONFIG_SPAPR_RNG) += spapr_rng.o
|
obj-$(CONFIG_SPAPR_RNG) += spapr_rng.o
|
||||||
|
obj-$(call land,$(CONFIG_PSERIES),$(CONFIG_LINUX)) += spapr_pci_vfio.o spapr_pci_nvlink2.o
|
||||||
# IBM PowerNV
|
# IBM PowerNV
|
||||||
obj-$(CONFIG_POWERNV) += pnv.o pnv_xscom.o pnv_core.o pnv_lpc.o pnv_psi.o pnv_occ.o pnv_bmc.o
|
obj-$(CONFIG_POWERNV) += pnv.o pnv_xscom.o pnv_core.o pnv_lpc.o pnv_psi.o pnv_occ.o pnv_bmc.o
|
||||||
obj-$(CONFIG_POWERNV) += pnv_homer.o pnv_pnor.o
|
obj-$(CONFIG_POWERNV) += pnv_homer.o pnv_pnor.o
|
||||||
|
|
||||||
|
|
||||||
ifeq ($(CONFIG_PCI)$(CONFIG_PSERIES)$(CONFIG_LINUX), yyy)
|
|
||||||
obj-y += spapr_pci_vfio.o spapr_pci_nvlink2.o
|
|
||||||
endif
|
|
||||||
obj-$(CONFIG_PSERIES) += spapr_rtas_ddw.o
|
obj-$(CONFIG_PSERIES) += spapr_rtas_ddw.o
|
||||||
# PowerPC 4xx boards
|
# PowerPC 4xx boards
|
||||||
obj-$(CONFIG_PPC405) += ppc405_boards.o ppc405_uc.o
|
obj-$(CONFIG_PPC405) += ppc405_boards.o ppc405_uc.o
|
||||||
|
|
|
@ -96,7 +96,7 @@ static void htif_recv(void *opaque, const uint8_t *buf, int size)
|
||||||
* Called by the char dev to supply special events to the HTIF console.
|
* Called by the char dev to supply special events to the HTIF console.
|
||||||
* Not used for HTIF.
|
* Not used for HTIF.
|
||||||
*/
|
*/
|
||||||
static void htif_event(void *opaque, int event)
|
static void htif_event(void *opaque, QEMUChrEvent event)
|
||||||
{
|
{
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
|
@ -162,7 +162,7 @@ static int uart_can_rx(void *opaque)
|
||||||
return s->rx_fifo_len < sizeof(s->rx_fifo);
|
return s->rx_fifo_len < sizeof(s->rx_fifo);
|
||||||
}
|
}
|
||||||
|
|
||||||
static void uart_event(void *opaque, int event)
|
static void uart_event(void *opaque, QEMUChrEvent event)
|
||||||
{
|
{
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
@ -17,6 +17,7 @@ config TWL92230
|
||||||
depends on I2C
|
depends on I2C
|
||||||
|
|
||||||
config MC146818RTC
|
config MC146818RTC
|
||||||
|
depends on ISA_BUS
|
||||||
bool
|
bool
|
||||||
|
|
||||||
config SUN4V_RTC
|
config SUN4V_RTC
|
||||||
|
|
|
@ -34,6 +34,7 @@ config ESP_PCI
|
||||||
default y if PCI_DEVICES
|
default y if PCI_DEVICES
|
||||||
depends on PCI
|
depends on PCI
|
||||||
select ESP
|
select ESP
|
||||||
|
select NMC93XX_EEPROM
|
||||||
|
|
||||||
config SPAPR_VSCSI
|
config SPAPR_VSCSI
|
||||||
bool
|
bool
|
||||||
|
|
|
@ -12,6 +12,7 @@ config SUN4M
|
||||||
select LANCE
|
select LANCE
|
||||||
select M48T59
|
select M48T59
|
||||||
select STP2000
|
select STP2000
|
||||||
|
select CHRP_NVRAM
|
||||||
|
|
||||||
config LEON3
|
config LEON3
|
||||||
bool
|
bool
|
||||||
|
|
|
@ -12,6 +12,7 @@ config SUN4U
|
||||||
select IDE_CMD646
|
select IDE_CMD646
|
||||||
select PCKBD
|
select PCKBD
|
||||||
select SIMBA
|
select SIMBA
|
||||||
|
select CHRP_NVRAM
|
||||||
|
|
||||||
config NIAGARA
|
config NIAGARA
|
||||||
bool
|
bool
|
||||||
|
|
|
@ -15,6 +15,7 @@ config HPET
|
||||||
|
|
||||||
config I8254
|
config I8254
|
||||||
bool
|
bool
|
||||||
|
depends on ISA_BUS
|
||||||
|
|
||||||
config ALTERA_TIMER
|
config ALTERA_TIMER
|
||||||
bool
|
bool
|
||||||
|
|
|
@ -39,9 +39,11 @@ common-obj-$(CONFIG_USB_STORAGE_MTP) += dev-mtp.o
|
||||||
endif
|
endif
|
||||||
|
|
||||||
# usb redirection
|
# usb redirection
|
||||||
|
ifeq ($(CONFIG_USB),y)
|
||||||
common-obj-$(CONFIG_USB_REDIR) += redirect.o quirks.o
|
common-obj-$(CONFIG_USB_REDIR) += redirect.o quirks.o
|
||||||
redirect.o-cflags = $(USB_REDIR_CFLAGS)
|
redirect.o-cflags = $(USB_REDIR_CFLAGS)
|
||||||
redirect.o-libs = $(USB_REDIR_LIBS)
|
redirect.o-libs = $(USB_REDIR_LIBS)
|
||||||
|
endif
|
||||||
|
|
||||||
# usb pass-through
|
# usb pass-through
|
||||||
ifeq ($(CONFIG_USB_LIBUSB)$(CONFIG_USB),yy)
|
ifeq ($(CONFIG_USB_LIBUSB)$(CONFIG_USB),yy)
|
||||||
|
|
|
@ -307,7 +307,7 @@ static void ccid_card_vscard_read(void *opaque, const uint8_t *buf, int size)
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
static void ccid_card_vscard_event(void *opaque, int event)
|
static void ccid_card_vscard_event(void *opaque, QEMUChrEvent event)
|
||||||
{
|
{
|
||||||
PassthruState *card = opaque;
|
PassthruState *card = opaque;
|
||||||
|
|
||||||
|
@ -318,6 +318,11 @@ static void ccid_card_vscard_event(void *opaque, int event)
|
||||||
case CHR_EVENT_OPENED:
|
case CHR_EVENT_OPENED:
|
||||||
DPRINTF(card, D_INFO, "%s: CHR_EVENT_OPENED\n", __func__);
|
DPRINTF(card, D_INFO, "%s: CHR_EVENT_OPENED\n", __func__);
|
||||||
break;
|
break;
|
||||||
|
case CHR_EVENT_MUX_IN:
|
||||||
|
case CHR_EVENT_MUX_OUT:
|
||||||
|
case CHR_EVENT_CLOSED:
|
||||||
|
/* Ignore */
|
||||||
|
break;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
@ -461,7 +461,7 @@ static void usb_serial_read(void *opaque, const uint8_t *buf, int size)
|
||||||
s->recv_used += size;
|
s->recv_used += size;
|
||||||
}
|
}
|
||||||
|
|
||||||
static void usb_serial_event(void *opaque, int event)
|
static void usb_serial_event(void *opaque, QEMUChrEvent event)
|
||||||
{
|
{
|
||||||
USBSerialState *s = opaque;
|
USBSerialState *s = opaque;
|
||||||
|
|
||||||
|
@ -479,6 +479,10 @@ static void usb_serial_event(void *opaque, int event)
|
||||||
usb_device_detach(&s->dev);
|
usb_device_detach(&s->dev);
|
||||||
}
|
}
|
||||||
break;
|
break;
|
||||||
|
case CHR_EVENT_MUX_IN:
|
||||||
|
case CHR_EVENT_MUX_OUT:
|
||||||
|
/* Ignore */
|
||||||
|
break;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
@ -1354,7 +1354,7 @@ static void usbredir_chardev_read(void *opaque, const uint8_t *buf, int size)
|
||||||
usbredirparser_do_write(dev->parser);
|
usbredirparser_do_write(dev->parser);
|
||||||
}
|
}
|
||||||
|
|
||||||
static void usbredir_chardev_event(void *opaque, int event)
|
static void usbredir_chardev_event(void *opaque, QEMUChrEvent event)
|
||||||
{
|
{
|
||||||
USBRedirDevice *dev = opaque;
|
USBRedirDevice *dev = opaque;
|
||||||
|
|
||||||
|
@ -1370,6 +1370,11 @@ static void usbredir_chardev_event(void *opaque, int event)
|
||||||
DPRINTF("chardev close\n");
|
DPRINTF("chardev close\n");
|
||||||
qemu_bh_schedule(dev->chardev_close_bh);
|
qemu_bh_schedule(dev->chardev_close_bh);
|
||||||
break;
|
break;
|
||||||
|
case CHR_EVENT_BREAK:
|
||||||
|
case CHR_EVENT_MUX_IN:
|
||||||
|
case CHR_EVENT_MUX_OUT:
|
||||||
|
/* Ignore */
|
||||||
|
break;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
@ -4,7 +4,7 @@
|
||||||
#include "chardev/char.h"
|
#include "chardev/char.h"
|
||||||
#include "qemu/main-loop.h"
|
#include "qemu/main-loop.h"
|
||||||
|
|
||||||
typedef void IOEventHandler(void *opaque, int event);
|
typedef void IOEventHandler(void *opaque, QEMUChrEvent event);
|
||||||
typedef int BackendChangeHandler(void *opaque);
|
typedef int BackendChangeHandler(void *opaque);
|
||||||
|
|
||||||
/* This is the backend as seen by frontend, the actual backend is
|
/* This is the backend as seen by frontend, the actual backend is
|
||||||
|
|
|
@ -56,6 +56,6 @@ typedef struct MuxChardev {
|
||||||
object_dynamic_cast(OBJECT(chr), TYPE_CHARDEV_MUX)
|
object_dynamic_cast(OBJECT(chr), TYPE_CHARDEV_MUX)
|
||||||
|
|
||||||
void mux_set_focus(Chardev *chr, int focus);
|
void mux_set_focus(Chardev *chr, int focus);
|
||||||
void mux_chr_send_all_event(Chardev *chr, int event);
|
void mux_chr_send_all_event(Chardev *chr, QEMUChrEvent event);
|
||||||
|
|
||||||
#endif /* CHAR_MUX_H */
|
#endif /* CHAR_MUX_H */
|
||||||
|
|
|
@ -210,7 +210,7 @@ void qemu_chr_be_update_read_handlers(Chardev *s,
|
||||||
*
|
*
|
||||||
* Send an event from the back end to the front end.
|
* Send an event from the back end to the front end.
|
||||||
*/
|
*/
|
||||||
void qemu_chr_be_event(Chardev *s, int event);
|
void qemu_chr_be_event(Chardev *s, QEMUChrEvent event);
|
||||||
|
|
||||||
int qemu_chr_add_client(Chardev *s, int fd);
|
int qemu_chr_add_client(Chardev *s, int fd);
|
||||||
Chardev *qemu_chr_find(const char *name);
|
Chardev *qemu_chr_find(const char *name);
|
||||||
|
@ -273,7 +273,7 @@ typedef struct ChardevClass {
|
||||||
void (*chr_accept_input)(Chardev *chr);
|
void (*chr_accept_input)(Chardev *chr);
|
||||||
void (*chr_set_echo)(Chardev *chr, bool echo);
|
void (*chr_set_echo)(Chardev *chr, bool echo);
|
||||||
void (*chr_set_fe_open)(Chardev *chr, int fe_open);
|
void (*chr_set_fe_open)(Chardev *chr, int fe_open);
|
||||||
void (*chr_be_event)(Chardev *s, int event);
|
void (*chr_be_event)(Chardev *s, QEMUChrEvent event);
|
||||||
/* Return 0 if succeeded, 1 if failed */
|
/* Return 0 if succeeded, 1 if failed */
|
||||||
int (*chr_machine_done)(Chardev *chr);
|
int (*chr_machine_done)(Chardev *chr);
|
||||||
} ChardevClass;
|
} ChardevClass;
|
||||||
|
|
|
@ -271,9 +271,6 @@ struct MachineState {
|
||||||
|
|
||||||
/*< public >*/
|
/*< public >*/
|
||||||
|
|
||||||
bool kernel_irqchip_allowed;
|
|
||||||
bool kernel_irqchip_required;
|
|
||||||
bool kernel_irqchip_split;
|
|
||||||
char *dtb;
|
char *dtb;
|
||||||
char *dumpdtb;
|
char *dumpdtb;
|
||||||
int phandle_start;
|
int phandle_start;
|
||||||
|
|
|
@ -117,6 +117,13 @@ int64_t replay_read_clock(ReplayClockKind kind);
|
||||||
? replay_save_clock((clock), (value), cpu_get_icount_raw_locked()) \
|
? replay_save_clock((clock), (value), cpu_get_icount_raw_locked()) \
|
||||||
: (value))
|
: (value))
|
||||||
|
|
||||||
|
/* Processing data from random generators */
|
||||||
|
|
||||||
|
/* Saves the values from the random number generator */
|
||||||
|
void replay_save_random(int ret, void *buf, size_t len);
|
||||||
|
/* Loads the saved values for the random number generator */
|
||||||
|
int replay_read_random(void *buf, size_t len);
|
||||||
|
|
||||||
/* Events */
|
/* Events */
|
||||||
|
|
||||||
/*! Called when qemu shutdown is requested. */
|
/*! Called when qemu shutdown is requested. */
|
||||||
|
|
|
@ -1322,7 +1322,7 @@ static void monitor_read(void *opaque, const uint8_t *buf, int size)
|
||||||
cur_mon = old_mon;
|
cur_mon = old_mon;
|
||||||
}
|
}
|
||||||
|
|
||||||
static void monitor_event(void *opaque, int event)
|
static void monitor_event(void *opaque, QEMUChrEvent event)
|
||||||
{
|
{
|
||||||
Monitor *mon = opaque;
|
Monitor *mon = opaque;
|
||||||
MonitorHMP *hmp_mon = container_of(mon, MonitorHMP, common);
|
MonitorHMP *hmp_mon = container_of(mon, MonitorHMP, common);
|
||||||
|
@ -1371,6 +1371,10 @@ static void monitor_event(void *opaque, int event)
|
||||||
mon_refcount--;
|
mon_refcount--;
|
||||||
monitor_fdsets_cleanup();
|
monitor_fdsets_cleanup();
|
||||||
break;
|
break;
|
||||||
|
|
||||||
|
case CHR_EVENT_BREAK:
|
||||||
|
/* Ignored */
|
||||||
|
break;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
@ -337,7 +337,7 @@ static QDict *qmp_greeting(MonitorQMP *mon)
|
||||||
ver, cap_list);
|
ver, cap_list);
|
||||||
}
|
}
|
||||||
|
|
||||||
static void monitor_qmp_event(void *opaque, int event)
|
static void monitor_qmp_event(void *opaque, QEMUChrEvent event)
|
||||||
{
|
{
|
||||||
QDict *data;
|
QDict *data;
|
||||||
MonitorQMP *mon = opaque;
|
MonitorQMP *mon = opaque;
|
||||||
|
@ -365,6 +365,11 @@ static void monitor_qmp_event(void *opaque, int event)
|
||||||
mon_refcount--;
|
mon_refcount--;
|
||||||
monitor_fdsets_cleanup();
|
monitor_fdsets_cleanup();
|
||||||
break;
|
break;
|
||||||
|
case CHR_EVENT_BREAK:
|
||||||
|
case CHR_EVENT_MUX_IN:
|
||||||
|
case CHR_EVENT_MUX_OUT:
|
||||||
|
/* Ignore */
|
||||||
|
break;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
@ -132,7 +132,7 @@ static void redirector_chr_read(void *opaque, const uint8_t *buf, int size)
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
static void redirector_chr_event(void *opaque, int event)
|
static void redirector_chr_event(void *opaque, QEMUChrEvent event)
|
||||||
{
|
{
|
||||||
NetFilterState *nf = opaque;
|
NetFilterState *nf = opaque;
|
||||||
MirrorState *s = FILTER_REDIRECTOR(nf);
|
MirrorState *s = FILTER_REDIRECTOR(nf);
|
||||||
|
|
|
@ -218,7 +218,7 @@ static gboolean net_vhost_user_watch(GIOChannel *chan, GIOCondition cond,
|
||||||
return TRUE;
|
return TRUE;
|
||||||
}
|
}
|
||||||
|
|
||||||
static void net_vhost_user_event(void *opaque, int event);
|
static void net_vhost_user_event(void *opaque, QEMUChrEvent event);
|
||||||
|
|
||||||
static void chr_closed_bh(void *opaque)
|
static void chr_closed_bh(void *opaque)
|
||||||
{
|
{
|
||||||
|
@ -249,7 +249,7 @@ static void chr_closed_bh(void *opaque)
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
static void net_vhost_user_event(void *opaque, int event)
|
static void net_vhost_user_event(void *opaque, QEMUChrEvent event)
|
||||||
{
|
{
|
||||||
const char *name = opaque;
|
const char *name = opaque;
|
||||||
NetClientState *ncs[MAX_QUEUE_NUM];
|
NetClientState *ncs[MAX_QUEUE_NUM];
|
||||||
|
@ -294,6 +294,11 @@ static void net_vhost_user_event(void *opaque, int event)
|
||||||
aio_bh_schedule_oneshot(ctx, chr_closed_bh, opaque);
|
aio_bh_schedule_oneshot(ctx, chr_closed_bh, opaque);
|
||||||
}
|
}
|
||||||
break;
|
break;
|
||||||
|
case CHR_EVENT_BREAK:
|
||||||
|
case CHR_EVENT_MUX_IN:
|
||||||
|
case CHR_EVENT_MUX_OUT:
|
||||||
|
/* Ignore */
|
||||||
|
break;
|
||||||
}
|
}
|
||||||
|
|
||||||
if (err) {
|
if (err) {
|
||||||
|
|
2
qtest.c
2
qtest.c
|
@ -722,7 +722,7 @@ static int qtest_can_read(void *opaque)
|
||||||
return 1024;
|
return 1024;
|
||||||
}
|
}
|
||||||
|
|
||||||
static void qtest_event(void *opaque, int event)
|
static void qtest_event(void *opaque, QEMUChrEvent event)
|
||||||
{
|
{
|
||||||
int i;
|
int i;
|
||||||
|
|
||||||
|
|
|
@ -6,4 +6,5 @@ common-obj-y += replay-input.o
|
||||||
common-obj-y += replay-char.o
|
common-obj-y += replay-char.o
|
||||||
common-obj-y += replay-snapshot.o
|
common-obj-y += replay-snapshot.o
|
||||||
common-obj-y += replay-net.o
|
common-obj-y += replay-net.o
|
||||||
common-obj-y += replay-audio.o
|
common-obj-y += replay-audio.o
|
||||||
|
common-obj-y += replay-random.o
|
||||||
|
|
|
@ -34,6 +34,8 @@ enum ReplayEvents {
|
||||||
EVENT_AUDIO_OUT,
|
EVENT_AUDIO_OUT,
|
||||||
/* for audio in event */
|
/* for audio in event */
|
||||||
EVENT_AUDIO_IN,
|
EVENT_AUDIO_IN,
|
||||||
|
/* for random number generator */
|
||||||
|
EVENT_RANDOM,
|
||||||
/* for clock read/writes */
|
/* for clock read/writes */
|
||||||
/* some of greater codes are reserved for clocks */
|
/* some of greater codes are reserved for clocks */
|
||||||
EVENT_CLOCK,
|
EVENT_CLOCK,
|
||||||
|
|
|
@ -0,0 +1,44 @@
|
||||||
|
/*
|
||||||
|
* replay-random.c
|
||||||
|
*
|
||||||
|
* Copyright (c) 2010-2020 Institute for System Programming
|
||||||
|
* of the Russian Academy of Sciences.
|
||||||
|
*
|
||||||
|
* This work is licensed under the terms of the GNU GPL, version 2 or later.
|
||||||
|
* See the COPYING file in the top-level directory.
|
||||||
|
*
|
||||||
|
*/
|
||||||
|
|
||||||
|
#include "qemu/osdep.h"
|
||||||
|
#include "qemu/error-report.h"
|
||||||
|
#include "sysemu/replay.h"
|
||||||
|
#include "replay-internal.h"
|
||||||
|
|
||||||
|
void replay_save_random(int ret, void *buf, size_t len)
|
||||||
|
{
|
||||||
|
g_assert(replay_mutex_locked());
|
||||||
|
|
||||||
|
replay_save_instructions();
|
||||||
|
replay_put_event(EVENT_RANDOM);
|
||||||
|
replay_put_dword(ret);
|
||||||
|
replay_put_array(buf, len);
|
||||||
|
}
|
||||||
|
|
||||||
|
int replay_read_random(void *buf, size_t len)
|
||||||
|
{
|
||||||
|
int ret = 0;
|
||||||
|
g_assert(replay_mutex_locked());
|
||||||
|
|
||||||
|
replay_account_executed_instructions();
|
||||||
|
if (replay_next_event_is(EVENT_RANDOM)) {
|
||||||
|
size_t buf_size = 0;
|
||||||
|
ret = replay_get_dword();
|
||||||
|
replay_get_array(buf, &buf_size);
|
||||||
|
replay_finish_event();
|
||||||
|
g_assert(buf_size == len);
|
||||||
|
} else {
|
||||||
|
error_report("Missing random event in the replay log");
|
||||||
|
exit(1);
|
||||||
|
}
|
||||||
|
return ret;
|
||||||
|
}
|
|
@ -22,7 +22,7 @@
|
||||||
|
|
||||||
/* Current version of the replay mechanism.
|
/* Current version of the replay mechanism.
|
||||||
Increase it when file format changes. */
|
Increase it when file format changes. */
|
||||||
#define REPLAY_VERSION 0xe02008
|
#define REPLAY_VERSION 0xe02009
|
||||||
/* Size of replay log header */
|
/* Size of replay log header */
|
||||||
#define HEADER_SIZE (sizeof(uint32_t) + sizeof(uint64_t))
|
#define HEADER_SIZE (sizeof(uint32_t) + sizeof(uint64_t))
|
||||||
|
|
||||||
|
|
|
@ -79,3 +79,12 @@ void replay_mutex_lock(void)
|
||||||
void replay_mutex_unlock(void)
|
void replay_mutex_unlock(void)
|
||||||
{
|
{
|
||||||
}
|
}
|
||||||
|
|
||||||
|
void replay_save_random(int ret, void *buf, size_t len)
|
||||||
|
{
|
||||||
|
}
|
||||||
|
|
||||||
|
int replay_read_random(void *buf, size_t len)
|
||||||
|
{
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
|
@ -3198,7 +3198,8 @@ static X86CPUDefinition builtin_x86_defs[] = {
|
||||||
CPUID_7_0_EDX_SPEC_CTRL_SSBD | CPUID_7_0_EDX_ARCH_CAPABILITIES,
|
CPUID_7_0_EDX_SPEC_CTRL_SSBD | CPUID_7_0_EDX_ARCH_CAPABILITIES,
|
||||||
.features[FEAT_ARCH_CAPABILITIES] =
|
.features[FEAT_ARCH_CAPABILITIES] =
|
||||||
MSR_ARCH_CAP_RDCL_NO | MSR_ARCH_CAP_IBRS_ALL |
|
MSR_ARCH_CAP_RDCL_NO | MSR_ARCH_CAP_IBRS_ALL |
|
||||||
MSR_ARCH_CAP_SKIP_L1DFL_VMENTRY | MSR_ARCH_CAP_MDS_NO,
|
MSR_ARCH_CAP_SKIP_L1DFL_VMENTRY | MSR_ARCH_CAP_MDS_NO |
|
||||||
|
MSR_ARCH_CAP_PSCHANGE_MC_NO | MSR_ARCH_CAP_TAA_NO,
|
||||||
.features[FEAT_7_1_EAX] =
|
.features[FEAT_7_1_EAX] =
|
||||||
CPUID_7_1_EAX_AVX512_BF16,
|
CPUID_7_1_EAX_AVX512_BF16,
|
||||||
/*
|
/*
|
||||||
|
@ -3213,6 +3214,54 @@ static X86CPUDefinition builtin_x86_defs[] = {
|
||||||
CPUID_XSAVE_XGETBV1,
|
CPUID_XSAVE_XGETBV1,
|
||||||
.features[FEAT_6_EAX] =
|
.features[FEAT_6_EAX] =
|
||||||
CPUID_6_EAX_ARAT,
|
CPUID_6_EAX_ARAT,
|
||||||
|
/* Missing: Mode-based execute control (XS/XU), processor tracing, TSC scaling */
|
||||||
|
.features[FEAT_VMX_BASIC] = MSR_VMX_BASIC_INS_OUTS |
|
||||||
|
MSR_VMX_BASIC_TRUE_CTLS,
|
||||||
|
.features[FEAT_VMX_ENTRY_CTLS] = VMX_VM_ENTRY_IA32E_MODE |
|
||||||
|
VMX_VM_ENTRY_LOAD_IA32_PERF_GLOBAL_CTRL | VMX_VM_ENTRY_LOAD_IA32_PAT |
|
||||||
|
VMX_VM_ENTRY_LOAD_DEBUG_CONTROLS | VMX_VM_ENTRY_LOAD_IA32_EFER,
|
||||||
|
.features[FEAT_VMX_EPT_VPID_CAPS] = MSR_VMX_EPT_EXECONLY |
|
||||||
|
MSR_VMX_EPT_PAGE_WALK_LENGTH_4 | MSR_VMX_EPT_WB | MSR_VMX_EPT_2MB |
|
||||||
|
MSR_VMX_EPT_1GB | MSR_VMX_EPT_INVEPT |
|
||||||
|
MSR_VMX_EPT_INVEPT_SINGLE_CONTEXT | MSR_VMX_EPT_INVEPT_ALL_CONTEXT |
|
||||||
|
MSR_VMX_EPT_INVVPID | MSR_VMX_EPT_INVVPID_SINGLE_ADDR |
|
||||||
|
MSR_VMX_EPT_INVVPID_SINGLE_CONTEXT | MSR_VMX_EPT_INVVPID_ALL_CONTEXT |
|
||||||
|
MSR_VMX_EPT_INVVPID_SINGLE_CONTEXT_NOGLOBALS | MSR_VMX_EPT_AD_BITS,
|
||||||
|
.features[FEAT_VMX_EXIT_CTLS] =
|
||||||
|
VMX_VM_EXIT_ACK_INTR_ON_EXIT | VMX_VM_EXIT_SAVE_DEBUG_CONTROLS |
|
||||||
|
VMX_VM_EXIT_LOAD_IA32_PERF_GLOBAL_CTRL |
|
||||||
|
VMX_VM_EXIT_LOAD_IA32_PAT | VMX_VM_EXIT_LOAD_IA32_EFER |
|
||||||
|
VMX_VM_EXIT_SAVE_IA32_PAT | VMX_VM_EXIT_SAVE_IA32_EFER |
|
||||||
|
VMX_VM_EXIT_SAVE_VMX_PREEMPTION_TIMER,
|
||||||
|
.features[FEAT_VMX_MISC] = MSR_VMX_MISC_ACTIVITY_HLT |
|
||||||
|
MSR_VMX_MISC_STORE_LMA | MSR_VMX_MISC_VMWRITE_VMEXIT,
|
||||||
|
.features[FEAT_VMX_PINBASED_CTLS] = VMX_PIN_BASED_EXT_INTR_MASK |
|
||||||
|
VMX_PIN_BASED_NMI_EXITING | VMX_PIN_BASED_VIRTUAL_NMIS |
|
||||||
|
VMX_PIN_BASED_VMX_PREEMPTION_TIMER | VMX_PIN_BASED_POSTED_INTR,
|
||||||
|
.features[FEAT_VMX_PROCBASED_CTLS] = VMX_CPU_BASED_VIRTUAL_INTR_PENDING |
|
||||||
|
VMX_CPU_BASED_USE_TSC_OFFSETING | VMX_CPU_BASED_HLT_EXITING |
|
||||||
|
VMX_CPU_BASED_INVLPG_EXITING | VMX_CPU_BASED_MWAIT_EXITING |
|
||||||
|
VMX_CPU_BASED_RDPMC_EXITING | VMX_CPU_BASED_RDTSC_EXITING |
|
||||||
|
VMX_CPU_BASED_CR8_LOAD_EXITING | VMX_CPU_BASED_CR8_STORE_EXITING |
|
||||||
|
VMX_CPU_BASED_TPR_SHADOW | VMX_CPU_BASED_MOV_DR_EXITING |
|
||||||
|
VMX_CPU_BASED_UNCOND_IO_EXITING | VMX_CPU_BASED_USE_IO_BITMAPS |
|
||||||
|
VMX_CPU_BASED_MONITOR_EXITING | VMX_CPU_BASED_PAUSE_EXITING |
|
||||||
|
VMX_CPU_BASED_VIRTUAL_NMI_PENDING | VMX_CPU_BASED_USE_MSR_BITMAPS |
|
||||||
|
VMX_CPU_BASED_CR3_LOAD_EXITING | VMX_CPU_BASED_CR3_STORE_EXITING |
|
||||||
|
VMX_CPU_BASED_MONITOR_TRAP_FLAG |
|
||||||
|
VMX_CPU_BASED_ACTIVATE_SECONDARY_CONTROLS,
|
||||||
|
.features[FEAT_VMX_SECONDARY_CTLS] =
|
||||||
|
VMX_SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES |
|
||||||
|
VMX_SECONDARY_EXEC_WBINVD_EXITING | VMX_SECONDARY_EXEC_ENABLE_EPT |
|
||||||
|
VMX_SECONDARY_EXEC_DESC | VMX_SECONDARY_EXEC_RDTSCP |
|
||||||
|
VMX_SECONDARY_EXEC_VIRTUALIZE_X2APIC_MODE |
|
||||||
|
VMX_SECONDARY_EXEC_ENABLE_VPID | VMX_SECONDARY_EXEC_UNRESTRICTED_GUEST |
|
||||||
|
VMX_SECONDARY_EXEC_APIC_REGISTER_VIRT |
|
||||||
|
VMX_SECONDARY_EXEC_VIRTUAL_INTR_DELIVERY |
|
||||||
|
VMX_SECONDARY_EXEC_RDRAND_EXITING | VMX_SECONDARY_EXEC_ENABLE_INVPCID |
|
||||||
|
VMX_SECONDARY_EXEC_ENABLE_VMFUNC | VMX_SECONDARY_EXEC_SHADOW_VMCS |
|
||||||
|
VMX_SECONDARY_EXEC_RDSEED_EXITING | VMX_SECONDARY_EXEC_ENABLE_PML,
|
||||||
|
.features[FEAT_VMX_VMFUNC] = MSR_VMX_VMFUNC_EPT_SWITCHING,
|
||||||
.xlevel = 0x80000008,
|
.xlevel = 0x80000008,
|
||||||
.model_id = "Intel Xeon Processor (Cooperlake)",
|
.model_id = "Intel Xeon Processor (Cooperlake)",
|
||||||
},
|
},
|
||||||
|
|
|
@ -835,12 +835,15 @@ typedef uint64_t FeatureWordArray[FEATURE_WORDS];
|
||||||
#define CPUID_TOPOLOGY_LEVEL_DIE (5U << 8)
|
#define CPUID_TOPOLOGY_LEVEL_DIE (5U << 8)
|
||||||
|
|
||||||
/* MSR Feature Bits */
|
/* MSR Feature Bits */
|
||||||
#define MSR_ARCH_CAP_RDCL_NO (1U << 0)
|
#define MSR_ARCH_CAP_RDCL_NO (1U << 0)
|
||||||
#define MSR_ARCH_CAP_IBRS_ALL (1U << 1)
|
#define MSR_ARCH_CAP_IBRS_ALL (1U << 1)
|
||||||
#define MSR_ARCH_CAP_RSBA (1U << 2)
|
#define MSR_ARCH_CAP_RSBA (1U << 2)
|
||||||
#define MSR_ARCH_CAP_SKIP_L1DFL_VMENTRY (1U << 3)
|
#define MSR_ARCH_CAP_SKIP_L1DFL_VMENTRY (1U << 3)
|
||||||
#define MSR_ARCH_CAP_SSB_NO (1U << 4)
|
#define MSR_ARCH_CAP_SSB_NO (1U << 4)
|
||||||
#define MSR_ARCH_CAP_MDS_NO (1U << 5)
|
#define MSR_ARCH_CAP_MDS_NO (1U << 5)
|
||||||
|
#define MSR_ARCH_CAP_PSCHANGE_MC_NO (1U << 6)
|
||||||
|
#define MSR_ARCH_CAP_TSX_CTRL_MSR (1U << 7)
|
||||||
|
#define MSR_ARCH_CAP_TAA_NO (1U << 8)
|
||||||
|
|
||||||
#define MSR_CORE_CAP_SPLIT_LOCK_DETECT (1U << 5)
|
#define MSR_CORE_CAP_SPLIT_LOCK_DETECT (1U << 5)
|
||||||
|
|
||||||
|
|
|
@ -350,15 +350,15 @@ int x86_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)
|
||||||
env->segs[R_GS].base = ldl_p(mem_buf);
|
env->segs[R_GS].base = ldl_p(mem_buf);
|
||||||
return 4;
|
return 4;
|
||||||
|
|
||||||
#ifdef TARGET_X86_64
|
|
||||||
case IDX_SEG_REGS + 8:
|
case IDX_SEG_REGS + 8:
|
||||||
|
#ifdef TARGET_X86_64
|
||||||
if (env->hflags & HF_CS64_MASK) {
|
if (env->hflags & HF_CS64_MASK) {
|
||||||
env->kernelgsbase = ldq_p(mem_buf);
|
env->kernelgsbase = ldq_p(mem_buf);
|
||||||
return 8;
|
return 8;
|
||||||
}
|
}
|
||||||
env->kernelgsbase = ldl_p(mem_buf);
|
env->kernelgsbase = ldl_p(mem_buf);
|
||||||
return 4;
|
|
||||||
#endif
|
#endif
|
||||||
|
return 4;
|
||||||
|
|
||||||
case IDX_FP_REGS + 8:
|
case IDX_FP_REGS + 8:
|
||||||
cpu_set_fpuc(env, ldl_p(mem_buf));
|
cpu_set_fpuc(env, ldl_p(mem_buf));
|
||||||
|
|
|
@ -2173,6 +2173,7 @@ int kvm_arch_init(MachineState *ms, KVMState *s)
|
||||||
}
|
}
|
||||||
|
|
||||||
if (kvm_check_extension(s, KVM_CAP_X86_SMM) &&
|
if (kvm_check_extension(s, KVM_CAP_X86_SMM) &&
|
||||||
|
object_dynamic_cast(OBJECT(ms), TYPE_X86_MACHINE) &&
|
||||||
x86_machine_is_smm_enabled(X86_MACHINE(ms))) {
|
x86_machine_is_smm_enabled(X86_MACHINE(ms))) {
|
||||||
smram_machine_done.notify = register_smram_listener;
|
smram_machine_done.notify = register_smram_listener;
|
||||||
qemu_add_machine_init_done_notifier(&smram_machine_done);
|
qemu_add_machine_init_done_notifier(&smram_machine_done);
|
||||||
|
|
|
@ -54,7 +54,7 @@ static void fe_read(void *opaque, const uint8_t *buf, int size)
|
||||||
quit = true;
|
quit = true;
|
||||||
}
|
}
|
||||||
|
|
||||||
static void fe_event(void *opaque, int event)
|
static void fe_event(void *opaque, QEMUChrEvent event)
|
||||||
{
|
{
|
||||||
FeHandler *h = opaque;
|
FeHandler *h = opaque;
|
||||||
bool new_open_state;
|
bool new_open_state;
|
||||||
|
@ -633,7 +633,7 @@ typedef struct {
|
||||||
|
|
||||||
|
|
||||||
static void
|
static void
|
||||||
char_socket_event(void *opaque, int event)
|
char_socket_event(void *opaque, QEMUChrEvent event)
|
||||||
{
|
{
|
||||||
CharSocketTestData *data = opaque;
|
CharSocketTestData *data = opaque;
|
||||||
data->event = event;
|
data->event = event;
|
||||||
|
@ -1006,7 +1006,7 @@ static void char_socket_client_test(gconstpointer opaque)
|
||||||
}
|
}
|
||||||
|
|
||||||
static void
|
static void
|
||||||
count_closed_event(void *opaque, int event)
|
count_closed_event(void *opaque, QEMUChrEvent event)
|
||||||
{
|
{
|
||||||
int *count = opaque;
|
int *count = opaque;
|
||||||
if (event == CHR_EVENT_CLOSED) {
|
if (event == CHR_EVENT_CLOSED) {
|
||||||
|
|
|
@ -499,7 +499,7 @@ static TestServer *test_server_new(const gchar *name)
|
||||||
return server;
|
return server;
|
||||||
}
|
}
|
||||||
|
|
||||||
static void chr_event(void *opaque, int event)
|
static void chr_event(void *opaque, QEMUChrEvent event)
|
||||||
{
|
{
|
||||||
TestServer *s = opaque;
|
TestServer *s = opaque;
|
||||||
|
|
||||||
|
|
|
@ -14,6 +14,7 @@
|
||||||
#include "qapi/error.h"
|
#include "qapi/error.h"
|
||||||
#include "qemu/guest-random.h"
|
#include "qemu/guest-random.h"
|
||||||
#include "crypto/random.h"
|
#include "crypto/random.h"
|
||||||
|
#include "sysemu/replay.h"
|
||||||
|
|
||||||
|
|
||||||
static __thread GRand *thread_rand;
|
static __thread GRand *thread_rand;
|
||||||
|
@ -44,13 +45,21 @@ static int glib_random_bytes(void *buf, size_t len)
|
||||||
|
|
||||||
int qemu_guest_getrandom(void *buf, size_t len, Error **errp)
|
int qemu_guest_getrandom(void *buf, size_t len, Error **errp)
|
||||||
{
|
{
|
||||||
|
int ret;
|
||||||
|
if (replay_mode == REPLAY_MODE_PLAY) {
|
||||||
|
return replay_read_random(buf, len);
|
||||||
|
}
|
||||||
if (unlikely(deterministic)) {
|
if (unlikely(deterministic)) {
|
||||||
/* Deterministic implementation using Glib's Mersenne Twister. */
|
/* Deterministic implementation using Glib's Mersenne Twister. */
|
||||||
return glib_random_bytes(buf, len);
|
ret = glib_random_bytes(buf, len);
|
||||||
} else {
|
} else {
|
||||||
/* Non-deterministic implementation using crypto routines. */
|
/* Non-deterministic implementation using crypto routines. */
|
||||||
return qcrypto_random_bytes(buf, len, errp);
|
ret = qcrypto_random_bytes(buf, len, errp);
|
||||||
}
|
}
|
||||||
|
if (replay_mode == REPLAY_MODE_RECORD) {
|
||||||
|
replay_save_random(ret, buf, len);
|
||||||
|
}
|
||||||
|
return ret;
|
||||||
}
|
}
|
||||||
|
|
||||||
void qemu_guest_getrandom_nofail(void *buf, size_t len)
|
void qemu_guest_getrandom_nofail(void *buf, size_t len)
|
||||||
|
|
Loading…
Reference in New Issue