01ba98161f
Handle cpu_model in copy_cpu(), by Kirill A. Shutemov.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3778 c046a42c-6fe2-441c-8c8c-71466251a162
2007-12-09 02:22:57 +00:00
dab6322b86
Larger physical address space for 32-bit MIPS.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3765 c046a42c-6fe2-441c-8c8c-71466251a162
2007-12-02 07:14:17 +00:00
ae2dbf7fb0
Micro-optimize back-to-back store-load sequences.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3743 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-26 09:01:34 +00:00
185f07621f
Optimize the conventional move operation.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3720 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-22 15:10:21 +00:00
67d6abff60
Fix off-by-one address checks in MIPS64 MMU, by Aurelien Jarno.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3718 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-22 00:34:36 +00:00
8d162c2b68
Add older 4Km variants.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3708 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-19 16:10:33 +00:00
f090c9d4ad
Add strict checking mode for softfp code.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3688 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-18 14:33:24 +00:00
c6d6dd7c74
Fix MIPS64 R2 instructions.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3686 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-18 03:36:07 +00:00
8c89395eeb
Use a valid PRid.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3685 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-18 03:19:58 +00:00
5747c0733d
Fix int/float inconsistencies.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3672 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-17 14:53:06 +00:00
3e4587d5d1
Introduce 4KEm configuration with fixed MMU mapping. Delete bogus INSN_DSP
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flags.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3637 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-14 03:11:17 +00:00
aaed909a49
added cpu_model parameter to cpu_init()
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3562 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-10 15:15:54 +00:00
8f6f6026f1
Use FORCE_RET, scrap RETURN which was implemented in target-specific code.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3560 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-09 23:09:41 +00:00
7df526e317
Move kernel loader parameters from the cpu state to being board specific.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3557 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-09 17:52:11 +00:00
d26bc2118e
Clean out the N32 macros from target-mips, and introduce MIPS ABI specific
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defines for linux-user.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3556 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-08 18:05:37 +00:00
855cea8c92
Formatting fix.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3554 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-08 16:44:01 +00:00
273af66025
Adjust s390 addresses (the MSB is defined as "to be ignored").
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3486 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-29 14:39:49 +00:00
d2123ead89
Preliminary MIPS64R2 mode.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3479 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-29 09:38:43 +00:00
6276c76758
Fix logic bug which broke TLBL/TLBS handling somewhat.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3478 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-29 02:57:19 +00:00
1b6fd0bc55
Restrict CP0_PerfCnt to legal values.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3476 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-29 00:49:32 +00:00
623a930ec3
Implement missing MIPS supervisor mode bits.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3472 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-28 19:45:05 +00:00
05f778c8bd
Add sharable clz/clo inline functions and use them for the mips target.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3455 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-27 13:05:54 +00:00
5592a750b9
The other half of the mul64 rework. Sorry for the breakage, I committed
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an incomplete version of what I tested.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3454 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-26 22:35:02 +00:00
9f77c1cdcf
Remove bogus instruction decode.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3433 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-24 00:52:07 +00:00
6ad3872210
Force proper sign extension for mfc0/mfhc0 on MIPS64.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3432 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-24 00:10:32 +00:00
60445285a8
Fix writable length of the index register.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3431 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-23 23:58:21 +00:00
7d307e9edc
Enforce proper sign extension for lwl/lwr on MIPS64.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3430 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-23 23:23:43 +00:00
9278480e8f
Fix CLO calculation for MIPS64. And a small code cleanup.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3428 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-23 23:22:03 +00:00
7385ac0ba2
Use the standard ASE check for MIPS-3D and MT.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3427 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-23 17:04:27 +00:00
d8a5950a62
Switch bc1any* instructions off if no MIPS-3D is implemented.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3426 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-23 13:15:33 +00:00
647de6ca24
Handle IBE on MIPS properly.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3416 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-20 19:45:44 +00:00
c7890fc209
Update TODO.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3402 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-17 13:43:58 +00:00
6ebbf39000
Replace is_user variable with mmu_idx in softmmu core,
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allowing support of more than 2 mmu access modes.
Add backward compatibility is_user variable in targets code when needed.
Implement per target cpu_mmu_index function, avoiding duplicated code
and #ifdef TARGET_xxx in softmmu core functions.
Implement per target mmu modes definitions. As an example, add PowerPC
hypervisor mode definition and Alpha executive and kernel modes definitions.
Optimize PowerPC case, precomputing mmu_idx when MSR register changes
and using the same definition in code translation code.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3384 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-14 07:07:08 +00:00
d0f48074db
Update TODO.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3383 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-13 19:00:52 +00:00
89fc88da4c
Fix off-by-one in address check.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3382 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-13 17:29:09 +00:00
c732abe222
Unify '-cpu ?' option.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3380 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-12 06:47:46 +00:00
aa34373598
Use always_inline in the MIPS support where applicable.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3375 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-09 03:39:58 +00:00
ab19cb4129
Delete file which should have been removed in the lst commit.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3373 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-09 03:17:28 +00:00
4e9f853731
Fix [ls][wd][lr] instructions, by Aurelien Jarno.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3372 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-09 03:12:08 +00:00
540635ba65
Code provision for n32/n64 mips userland emulation. Not functional yet.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3284 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-30 01:58:33 +00:00
a09d88b86a
Update TODO.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3278 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-30 00:45:51 +00:00
671880e651
Supervisor mode implementation, by Aurelien Jarno.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3267 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-29 19:21:36 +00:00
544540979c
Less magic constants.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3266 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-29 19:19:59 +00:00
418d7c7169
Fix MIPS FP underflow handling, spotted by Daniel Jacobowitz.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3255 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-28 19:30:36 +00:00
198a74de4c
Move get_sp_from_cpustate from cpu.h to target_signal.h.
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Enable sigaltstack processing for more architectures.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3253 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-27 16:44:32 +00:00
a04e134ad1
linux-user sigaltstack() syscall, by Thayne Harbaugh.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3252 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-27 13:57:58 +00:00
08fa4bab83
hflags computation cleanup, by Aurelien Jarno.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3243 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-26 23:52:06 +00:00
fe253235b2
Wrap a few often used tests with unlikely(), by Aurelien Jarno.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3242 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-26 23:50:39 +00:00
42532189df
Timer start/stop implementation, by Aurelien Jarno.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3237 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-25 16:53:15 +00:00
387a8fe505
Optimise instructions accessing CP0, by Aurelien Jarno.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3235 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-25 14:49:47 +00:00
ths
pbrook
bellard
j_mayer