The old fcmov implementation had a typo:
- tcg_gen_mov_i64(cpu_fir[rc], cpu_fir[ra]);
which moved the condition, not the second source, to the destination.
But it's also easy to implement the simplified fp comparison inline.
Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Fix regression introduced by d19954f46d.
4Kc and 4KEc don't support MIPS16.
Signed-off-by: Stefan Weil <weil@mail.berlios.de>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
"Old" compilers obviously are not able to recognise
that all cases are handled here:
qemu/target-alpha/helper.c:70: error: ‘round_mode’ may be used uninitialized in this function
A small modification helps the compiler to do its jobs.
gcc-4.4 does not need this, but is still not standard on all platforms.
Signed-off-by: Stefan Weil <weil@mail.berlios.de>
Acked-by: Laurent Desnogues <laurent.desnogues@gmail.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
nd->model keeps dynamically allocated model names.
So casting of a constant string is wrong here.
Signed-off-by: Stefan Weil <weil@mail.berlios.de>
Acked-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
4Kc, 4KEc cores do not support MIPS16, so not only the
CP0_Config1 had to be fixed (see previous patch),
but also MIPS16 instructions must not be executed.
(Hint from Nathan Froyd, thanks).
Signed-off-by: Stefan Weil <weil@mail.berlios.de>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
I need to see EAR register in output because I need to parse irqsoff problem.
Signed-off-by: Michal Simek <monstr@monstr.eu>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
Similar in difficulty to ext*l, already expanded.
Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Similar in difficulty to ext*l, already expanded.
Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
When emulating user-mode only, there's no reason to exit
the translation block to effect a call_pal. We can generate
a move to/from the unique slot directly.
Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
The instructions use a disp21 like all other branch insns,
not the disp16 that was being passed.
Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
The architecture manual specifies the EXT instructions
in terms of the ZAPNOT operation; writing it that way in
the translator makes things a bit clearer.
Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
The vast majority of zap instructions have an immediate operand,
since zapnot is the canonical method to zero-extend from u16 or u32.
Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Generic disassembly was incorrectly keyed on ALPHA_DEBUG_DISAS
rather than the generic DEBUG_DISAS. Use qemu_log_mask for
additional LOG_DISAS output. Delete some random insn_count
logging noise from gen_intermediate_code_internal.
Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Running programs with the MIPS user-mode emulator fails during dynamic
loading, as floating-point instructions are not enabled in in
env->hflags. Move the code for doing so from fpu_init to cpu_reset so
the MIPS_HFLAG_{FPU,F64} setting doesn't get clobbered by cpu_reset
setting env->hflags to MIPS_HFLAG_UM.
The same end can be achieved by swapping the ordering of fpu_init and
cpu_reset in cpu_mips_init, but it seemed better to consolidate the
CONFIG_USER_ONLY code into a single location.
Signed-off-by: Nathan Froyd <froydnj@codesourcery.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
The CPUID features QEMU presented to the guest were not up-to-date
with QEMU's emulated feature set.
Add the missing bits of recent (and not so recent) additions to
QEMU's emulation engine.
For stability reasons only the user mode usable bits are exposed for
now, features like Monitor or CR8LEG are left out.
Signed-off-by: Andre Przywara <andre.przywara@amd.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
1. Add correct definitions of error numbers.
2. Implement SYS_osf_sigprocmask
3. Implement SYS_osf_get/setsysinfo for IEEE_FP_CONTROL.
This last requires exposing the FPCR value to do_syscall.
Since this value is actually split up into the float_status,
expose routines from helper.c to access it.
Finally, also add a float_exception_mask field to float_status.
We don't actually use it to control delivery of exceptions to
the emulator yet, but simply hold the value that we placed there
when loading/storing the FPCR.
Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
The only thing to do here is to expose the current processor mode to GDB
and to set the processor mode properly when we change the PC.
Signed-off-by: Nathan Froyd <froydnj@codesourcery.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
There's no good way to add this incrementally, so we do it all at once.
The only changes to shared code are in handle_delay_slot. We need to
flip ISAMode when doing a jump-and-exchange. We also need to set
ISAMode the low bit of the target address for jump-to-register.
Also, since we're now adding bits that can be in MIPS_HFLAG_BMASK_EXT,
make sure we use MIPS_HFLAG_BMASK_BASE in the places where we just want
basic information about a branch.
Signed-off-by: Nathan Froyd <froydnj@codesourcery.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Move delay slot handling to common code whose invocation can be
controlled from gen_intermediate_code_internal.
Signed-off-by: Nathan Froyd <froydnj@codesourcery.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
This is a common pattern in existing code. We'll also use it to
implement the mips16 SAVE/RESTORE instructions.
Signed-off-by: Nathan Froyd <froydnj@codesourcery.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
It's easier to implement mips16 shift instructions if we're not
examining the opcode inside gen_shift_{imm,}. So move ROTR and ROTRV
and do the special-case handling of SRL and SRLV inside decode_opc.
Likewise for their 64-bit counterparts.
Signed-off-by: Nathan Froyd <froydnj@codesourcery.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
We need to stash the operating mode into the low bit of the error PC and
restore it on return from interrupts.
Signed-off-by: Nathan Froyd <froydnj@codesourcery.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
We create separate masks for the "basic" branch hflags and the
"extended" branch hflags and define MIPS_HFLAG_BMASK as the logical or
of those two. This is done to avoid churning the codebase in lots of
different places.
We also make the execution mode an hflag under MIPS_HFLAG_TMASK
Signed-off-by: Nathan Froyd <froydnj@codesourcery.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
This is a workaround only, and is a partial revert
of a few changes to BMDMAState which removed pci_dev
field on the way.
- cmd646 pci_from_bm() expects bm->unit value to
correspond with bm data being passed to callback
as opaque pointer. This breaks when write to dma
control register of second channel happens when no
dma operation is in progress, so bm->unit is zero
for second channel, and pci_from_bm() returns garbage
pointer. Crash happens shortly after that while
dereferencing that pointer.
v0->v1: cleaned up dead code from pci_from_bm.
Signed-off-by: Igor V. Kovalenko <igor.v.kovalenko@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
s390 code has an obvious typo, which results in:
hw/s390-virtio.c: At top level:
hw/s390-virtio.c:249: error: request for member ‘no_vga’ in something not a structure or union
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Acked-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Building on 32 bit host we get:
hw/s390-virtio.c: In function ‘s390_init’:
hw/s390-virtio.c:184: error: integer constant is too large for ‘unsigned long’ type
64 bit values must be ULL.
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Acked-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Don't define C99 math functions on OpenSolaris (Solaris 11),
which still ships GCC 3.4.3. This fixes redefinition warnings.
Spotted by Palle Lyckegaard.
Signed-off-by: Andreas Färber <afaerber@opensolaris.org>
Cc: Palle Lyckegaard <palle@lyckegaard.dk>
Cc: Ben Taylor <bentaylor.solx86@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Avoid an unresolved symbol error for TFR,
which is defined in sysemu.h.
Based on patch by Palle Lyckegaard.
Signed-off-by: Andreas Färber <afaerber@opensolaris.org>
Cc: Palle Lyckegaard <palle@lyckegaard.dk>
Cc: Ben Taylor <bentaylor.solx86@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Stepping through the SS-5's OBP initialization routines
it looks like reading fdc main status register should
clear the fd interrupt.
The patch doesn't fix problems with fdc on sparc platform,
it only fixes fdc detection.
Signed-off-by: Artyom Tarasenko <atar4qemu@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Implement a stub for the AFX register on SparcStation-5.
This stub is needed for running the original SS-5 OBP
instead of OpenBIOS (which allows to boot Solaris 2.5.1
and Solaris 2.6 kernels).
Signed-off-by: Artyom Tarasenko <atar4qemu@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
According to the SCSI-2 specification,
http://ldkelley.com/SCSI2/SCSI2/SCSI2/SCSI2-08.html#8.2.5 ,
"if the allocation length of the command descriptor block (CDB) is too
small to transfer all of the parameters, the additional length shall
not be adjusted to reflect the truncation."
The 36 mandatory bytes of response are written to outbuf, and then
only the length requested in CDB is transferred.
Signed-off-by: Artyom Tarasenko <atar4qemu@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
