Commit Graph

87040 Commits

Author SHA1 Message Date
Richard Henderson
91e615a07d target/ppc: Remove type argument from check_prot
We can now use MMU_INST_FETCH from access_type for this.
Use prot_for_access_type to simplify everything.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20210518201146.794854-8-richard.henderson@linaro.org>
[dwg: Remove a stray trailing whitespace]
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-05-19 12:51:51 +10:00
Richard Henderson
9630cd6262 target/ppc: Use MMUAccessType in mmu_helper.c
This replaces 'int rw' with 'MMUAccessType access_type'.
Comparisons vs zero become either MMU_DATA_LOAD or MMU_DATA_STORE,
since we had previously squashed rw to 0 for code access.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20210518201146.794854-7-richard.henderson@linaro.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-05-19 12:50:47 +10:00
Richard Henderson
352e3627b2 target/ppc: Rename access_type to type in mmu_helper.c
The variable that holds ACCESS_INT, ACCESS_FLOAT, etc is
variously called 'int type' or 'int access_type' within
this file.  Standardize on 'int type' throughout.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20210518201146.794854-6-richard.henderson@linaro.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-05-19 12:50:47 +10:00
Richard Henderson
31fa64ecfd target/ppc: Use MMUAccessType in mmu-hash32.c
We must leave the 'int rwx' parameter to ppc_hash32_handle_mmu_fault
for now, but will clean that up later.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20210518201146.794854-5-richard.henderson@linaro.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-05-19 12:50:47 +10:00
Richard Henderson
59dec5bf5a target/ppc: Use MMUAccessType in mmu-hash64.c
We must leave the 'int rwx' parameter to ppc_hash64_handle_mmu_fault
for now, but will clean that up later.

Signed-off-by: Ricgard Henderson <richard.henderson@linaro.org>
Message-Id: <20210518201146.794854-4-richard.henderson@linaro.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-05-19 12:50:47 +10:00
Richard Henderson
13c5fdbac6 target/ppc: Use MMUAccessType in mmu-radix64.c
We must leave the 'int rwx' parameter to ppc_radix64_handle_mmu_fault
for now, but will clean that up later.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20210518201146.794854-3-richard.henderson@linaro.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-05-19 12:50:47 +10:00
Richard Henderson
182357dbb6 target/ppc: Introduce prot_for_access_type
Use this in the three places we currently have a local array
indexed by rwx (which happens to have the same values).
The types will match up correctly with additional changes.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20210518201146.794854-2-richard.henderson@linaro.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-05-19 12:50:47 +10:00
Giuseppe Musacchio
861f10fd52 target/ppc: Fix load endianness for lxvwsx/lxvdsx
TARGET_WORDS_BIGENDIAN may not match the machine endianness if that's a
runtime-configurable parameter.

Fixes: bcb0b7b1a1
Fixes: afae37d98a
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/212

Signed-off-by: Giuseppe Musacchio <thatlemon@gmail.com>
Message-Id: <20210518133020.58927-1-thatlemon@gmail.com>
Tested-by: Paul A. Clarke <pc@us.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-05-19 10:44:04 +10:00
Richard Henderson
51eb7b1d10 target/ppc: Use translator_loop_temp_check
The special logging is unnecessary.  It will have been done
immediately before in the log file.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Reviewed-by: Bruno Larsen (billionai) <bruno.larsen@eldorado.org.br>
Message-Id: <20210517205025.3777947-9-matheus.ferst@eldorado.org.br>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-05-19 10:30:29 +10:00
Richard Henderson
46a0add975 target/ppc: Mark helper_raise_exception* as noreturn
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20210517205025.3777947-8-matheus.ferst@eldorado.org.br>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-05-19 10:30:29 +10:00
Richard Henderson
0032dbdb41 target/ppc: Tidy exception vs exit_tb
We do not need to emit an exit_tb after an exception,
as the latter will exit via longjmp.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20210517205025.3777947-7-matheus.ferst@eldorado.org.br>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-05-19 10:30:29 +10:00
Richard Henderson
13b4557567 target/ppc: Move single-step check to ppc_tr_tb_stop
When single-stepping, force max_insns to 1 in init_disas
so that we exit the translation loop immediately.

Combine the single-step checks in tb_stop, and give the
gdb exception priority over the cpu exception, just as
we already do in gen_lookup_and_goto_ptr.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20210517205025.3777947-6-matheus.ferst@eldorado.org.br>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-05-19 10:30:29 +10:00
Richard Henderson
7a3fe174b1 target/ppc: Remove DisasContext.exception
Now that we have removed all of the fake exceptions, and all real
exceptions exit via DISAS_NORETURN, we can remove this field.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20210517205025.3777947-5-matheus.ferst@eldorado.org.br>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-05-19 10:30:29 +10:00
Richard Henderson
6086c751c3 target/ppc: Replace POWERPC_EXCP_BRANCH with DISAS_NORETURN
The translation of branch instructions always results in exit from
the TB. Remove the synthetic "exception" after no more uses.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20210517205025.3777947-4-matheus.ferst@eldorado.org.br>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-05-19 10:30:29 +10:00
Richard Henderson
d736de8ff6 target/ppc: Replace POWERPC_EXCP_STOP with DISAS_EXIT_UPDATE
Remove the synthetic "exception" after no more uses.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20210517205025.3777947-3-matheus.ferst@eldorado.org.br>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-05-19 10:30:29 +10:00
Richard Henderson
f5b6daacd6 target/ppc: Introduce gen_icount_io_start
Create a function to handle the details for interacting with icount.

Force the exit from the tb via DISAS_TOO_MANY, which allows chaining
to the next tb, where the code emitted for gen_tb_start() will
determine if we must exit.  We can thus remove any matching
conditional call to gen_stop_exception.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20210517205025.3777947-2-matheus.ferst@eldorado.org.br>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-05-19 10:30:29 +10:00
Richard Henderson
a68cf3a520 target/ppc: Remove unnecessary gen_io_end calls
Since ba3e792669, we switched the implementation of icount
to always reset can_do_io at the start of the following TB.
Most of them were removed in 9e9b10c649, but some were missed.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20210512185441.3619828-10-matheus.ferst@eldorado.org.br>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-05-19 10:30:28 +10:00
Richard Henderson
59bf23faf5 target/ppc: Replace POWERPC_EXCP_SYNC with DISAS_EXIT
Remove the synthetic "exception" after no more uses.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20210512185441.3619828-9-matheus.ferst@eldorado.org.br>
Reviewed-by: Bruno Larsen (billionai) <bruno.larsen@eldorado.org.br>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-05-19 10:30:28 +10:00
Richard Henderson
a9b5b3d06c target/ppc: Introduce DISAS_{EXIT,CHAIN}{,_UPDATE}
Rewrite ppc_tr_tb_stop to handle these new codes.

Convert ctx->exception into these new codes at the end of
ppc_tr_translate_insn, prior to pushing the change back
throughout translate.c.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20210512185441.3619828-8-matheus.ferst@eldorado.org.br>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-05-19 10:30:28 +10:00
Richard Henderson
2736fc6181 target/ppc: Simplify gen_debug_exception
Two of the call sites that use gen_debug_exception have already
updated NIP.  Only ppc_tr_breakpoint_check requires the update.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20210512185441.3619828-7-matheus.ferst@eldorado.org.br>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-05-19 10:30:28 +10:00
Richard Henderson
506fadcfd7 target/ppc: Remove special case for POWERPC_EXCP_TRAP
Since POWERPC_EXCP_TRAP is raised by gen_exception_err,
we will have also set DISAS_NORETURN.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Luis Pires <luis.pires@eldorado.org.br>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20210512185441.3619828-6-matheus.ferst@eldorado.org.br>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-05-19 10:30:28 +10:00
Richard Henderson
da3527d96d target/ppc: Remove special case for POWERPC_SYSCALL
Since POWERPC_SYSCALL is raised by gen_exception_err,
we will have also set DISAS_NORETURN.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Luis Pires <luis.pires@eldorado.org.br>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20210512185441.3619828-5-matheus.ferst@eldorado.org.br>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-05-19 10:30:28 +10:00
Richard Henderson
3d8a5b69bd target/ppc: Move DISAS_NORETURN setting into gen_exception*
There are other valid settings for is_jmp besides
DISAS_NEXT and DISAS_NORETURN, so eliminating that
dichotomy from ppc_tr_translate_insn is helpful.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Luis Pires <luis.pires@eldorado.org.br>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20210512185441.3619828-4-matheus.ferst@eldorado.org.br>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-05-19 10:30:28 +10:00
Richard Henderson
624cb07fde target/ppc: Split out decode_legacy
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Luis Pires <luis.pires@eldorado.org.br>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20210512185441.3619828-3-matheus.ferst@eldorado.org.br>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-05-19 10:30:28 +10:00
Richard Henderson
2c2bcb1b50 target/ppc: Add cia field to DisasContext
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Bruno Larsen (billionai) <bruno.larsen@eldorado.org.br>
Reviewed-by: Luis Pires <luis.pires@eldorado.org.br>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20210512185441.3619828-2-matheus.ferst@eldorado.org.br>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-05-19 10:30:28 +10:00
Bruno Larsen (billionai)
47334e1738 target/ppc: moved ppc_cpu_dump_state to cpu_init.c
This function was forgotten in the cpu_init code motion series, but it
seems to be used regardless of TCG, and so needs to be moved to support
disabling TCG.

Signed-off-by: Bruno Larsen (billionai) <bruno.larsen@eldorado.org.br>
Message-Id: <20210512140813.112884-4-bruno.larsen@eldorado.org.br>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-05-19 10:30:28 +10:00
Bruno Larsen (billionai)
172d74efda target/ppc: moved ppc_store_sdr1 to cpu.c
Moved this function that is required in !TCG cases into a
common code file

Signed-off-by: Bruno Larsen (billionai) <bruno.larsen@eldorado.org.br>
Message-Id: <20210512140813.112884-3-bruno.larsen@eldorado.org.br>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
[dwg: Fixed compile error with linux-user targets]
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-05-19 10:30:28 +10:00
Bruno Larsen (billionai)
87aff23827 target/ppc: updated vscr manipulation in machine.c
Updated the code in machine.c to use the generic ppc_{store,get}_vscr
instead of helper style functions, so it can build without TCG

Signed-off-by: Bruno Larsen (billionai) <bruno.larsen@eldorado.org.br>
Message-Id: <20210512140813.112884-7-bruno.larsen@eldorado.org.br>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-05-19 10:30:28 +10:00
Bruno Larsen (billionai)
c19940db0f target/ppc: created ppc_{store,get}_vscr for generic vscr usage
Some functions unrelated to TCG use helper_m{t,f}vscr, so generic versions
of those functions were added to cpu.c, in preparation for compilation
without TCG

Signed-off-by: Bruno Larsen (billionai) <bruno.larsen@eldorado.org.br>
Message-Id: <20210512140813.112884-2-bruno.larsen@eldorado.org.br>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-05-19 10:30:28 +10:00
Bruno Larsen (billionai)
3e770bf7a9 target/ppc: isolated cpu init from translation logic
finished isolation of CPU initialization logic from
translation logic. CPU initialization now only has common code
and may or may not call accelerator-specific code, as the
build options require.

Signed-off-by: Bruno Larsen (billionai) <bruno.larsen@eldorado.org.br>
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
Message-Id: <20210507115551.11436-1-bruno.larsen@eldorado.org.br>
[dwg: Fix compile error with clang linux-user builds]
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-05-19 10:30:28 +10:00
Bruno Larsen (billionai)
a829cec3a3 target/ppc: turned SPR R/W callbacks not static
To be able to compile translate_init.c.inc as a standalone file,
we have to make the callbacks accessible outside of translate.c;
This patch does exactly that

Signed-off-by: Bruno Larsen (billionai) <bruno.larsen@eldorado.org.br>
Message-Id: <20210507115512.11376-1-bruno.larsen@eldorado.org.br>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-05-19 10:30:28 +10:00
Lucas Mateus Castro (alqotel)
03282a3ab8 hw/ppc: moved has_spr to cpu.h
Moved has_spr to cpu.h as ppc_has_spr and turned it into an inline function.
Change spr verification in pnv.c and spapr.c to a version that can
compile in a !TCG environment.

Signed-off-by: Lucas Mateus Castro (alqotel) <lucas.araujo@eldorado.org.br>
Message-Id: <20210507164146.67086-1-lucas.araujo@eldorado.org.br>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-05-19 10:30:28 +10:00
Lucas Mateus Castro (alqotel)
45998ffcb4 target/ppc: moved ppc_store_lpcr to misc_helper.c
Moved the function ppc_store from mmu-hash64.c to misc_helper.c and the
prototype from mmu-hash64.h to cpu.h as it is a more appropriate place,
but it will have to have its implementation moved to a new file as
misc_helper.c should not be compiled in a !TCG environment.

Signed-off-by: Lucas Mateus Castro (alqotel) <lucas.araujo@eldorado.org.br>
Message-Id: <20210506163941.106984-4-lucas.araujo@eldorado.org.br>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-05-19 10:30:28 +10:00
Lucas Mateus Castro (alqotel)
fd1eb085da target/ppc: moved function out of mmu-hash64
The function ppc_hash64_filter_pagesizes has been moved from a function
with prototype in mmu-hash64.h and implemented in mmu-hash64.c to
a static function in hw/ppc/spapr_caps.c as it's only used in that file.

Signed-off-by: Lucas Mateus Castro (alqotel) <lucas.araujo@eldorado.org.br>
Message-Id: <20210506163941.106984-3-lucas.araujo@eldorado.org.br>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-05-19 10:30:28 +10:00
Lucas Mateus Castro (alqotel)
962104f044 hw/ppc: moved hcalls that depend on softmmu
The hypercalls h_enter, h_remove, h_bulk_remove, h_protect, and h_read,
have been moved to spapr_softmmu.c with the functions they depend on. The
functions is_ram_address and push_sregs_to_kvm_pr are not static anymore
as functions on both spapr_hcall.c and spapr_softmmu.c depend on them.
The hypercalls h_resize_hpt_prepare and h_resize_hpt_commit have been
divided, the KVM part stayed in spapr_hcall.c while the softmmu part
was moved to spapr_softmmu.c

Signed-off-by: Lucas Mateus Castro (alqotel) <lucas.araujo@eldorado.org.br>
Message-Id: <20210506163941.106984-2-lucas.araujo@eldorado.org.br>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-05-19 10:30:28 +10:00
Bruno Larsen (billionai)
37f219c8f8 target/ppc: move SPR R/W callbacks to translate.c
Moved all read and write callbacks for SPRs away from
translate_init.c.inc and into translate.c; these functions are
TCG only, so this motion is required to enable building with
the flag disable-tcg

Signed-off-by: Bruno Larsen (billionai) <bruno.larsen@eldorado.org.br>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20210506190837.6921-1-bruno.larsen@eldorado.org.br>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-05-19 10:30:28 +10:00
Bruno Larsen (billionai)
a08eea67cb target/ppc: renamed SPR registration functions
Renamed all gen_spr_* and gen_* functions specifically related to
registering SPRs to register_*_sprs and register_*, to avoid future
confusion with other TCG related code.

Signed-off-by: Bruno Larsen (billionai) <bruno.larsen@eldorado.org.br>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20210505155310.62710-2-bruno.larsen@eldorado.org.br>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-05-19 10:30:28 +10:00
Bruno Larsen (billionai)
1cc9e93ca8 target/ppc: Fold gen_*_xer into their callers
folded gen_{read,write}_xer into their only callers, spr_{read,write}_xer

Signed-off-by: Bruno Larsen (billionai) <bruno.larsen@eldorado.org.br>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20210504140157.76066-2-bruno.larsen@eldorado.org.br>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-05-19 10:30:28 +10:00
Fabiano Rosas
ab5add4c7b hw/ppc/spapr.c: Make sure the host supports the selected MMU mode
Starting with Linux kernel v5.12 we dropped support[1] in KVM for
hosts that can't have their threads running in different MMU modes
(POWER9 < DD2.2). In these hosts, KVM will no longer report the
KVM_CAP_PPC_MMU_HASH_V3 capability[2] when the host is running Radix.

For guests that support both MMU modes, the negotiation during CAS
will make sure it selects the correct one.

For guests that only support Hash, such as P8 compat mode guests, the
following error is currently thrown:

  $ ~/qemu-system-ppc64 -machine pseries,accel=kvm,max-cpu-compat=power8 ...
  error: kvm run failed Invalid argument
  NIP 0000000000000100   LR 0000000000000000 CTR 0000000000000000 XER 0000000000000000 CPU#0
  MSR 8000000000001000 HID0 0000000000000000  HF 8000000000000000 iidx 3 didx 3
  TB 00000000 00000000 DECR 0
  GPR00 0000000000000000 0000000000000000 0000000000000000 000000007ff00000
  GPR04 0000000000000000 0000000000000000 0000000000000000 0000000000000000
  GPR08 0000000000000000 0000000000000000 0000000000000000 0000000000000000
  GPR12 0000000000000000 0000000000000000 0000000000000000 0000000000000000
  GPR16 0000000000000000 0000000000000000 0000000000000000 0000000000000000
  GPR20 0000000000000000 0000000000000000 0000000000000000 0000000000000000
  GPR24 0000000000000000 0000000000000000 0000000000000000 0000000000000000
  GPR28 0000000000000000 0000000000000000 0000000000000000 0000000000000000
  CR 00000000  [ -  -  -  -  -  -  -  -  ]             RES ffffffffffffffff
   SRR0 0000000000000000  SRR1 0000000000000000    PVR 00000000004e1201 VRSAVE 0000000000000000
  SPRG0 0000000000000000 SPRG1 0000000000000000  SPRG2 0000000000000000  SPRG3 0000000000000000
  SPRG4 0000000000000000 SPRG5 0000000000000000  SPRG6 0000000000000000  SPRG7 0000000000000000
  HSRR0 0000000000000000 HSRR1 0000000000000000
   CFAR 0000000000000000
   LPCR 000000000004f01f
   PTCR 0000000000000000   DAR 0000000000000000  DSISR 0000000000000000

This patch adds a verification during the writing of the platform
support vector so that we error out as soon as we determine this guest
only supports Hash and the host doesn't.

  ~/qemu-system-ppc64 -machine pseries,accel=kvm,max-cpu-compat=power8 ...
  qemu-system-ppc64: Guest requested unavailable MMU mode (hash).

1- https://git.kernel.org/torvalds/p/b1b1697ae0cc8
2- https://git.kernel.org/torvalds/p/a722076e94702

Signed-off-by: Fabiano Rosas <farosas@linux.ibm.com>
Message-Id: <20210505001130.3999968-3-farosas@linux.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-05-19 10:30:28 +10:00
Fabiano Rosas
068479e1e1 hw/ppc/spapr.c: Extract MMU mode error reporting into a function
A following patch will make use of it.

Signed-off-by: Fabiano Rosas <farosas@linux.ibm.com>
Message-Id: <20210505001130.3999968-2-farosas@linux.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-05-19 10:30:28 +10:00
Peter Maydell
c313e52e64 linux-user pull request 20210517
- alpha sigaction fixes/cleanups
 - s390x sigaction fixes/cleanup
 - sparc sigaction fixes/cleanup
 - s390x core dumping support
 - core dump fix (app name)
 - arm  fpa11 fix and cleanup
 - strace fixes (unshare(), llseek())
 - fix copy_file_range()
 - use GDateTime
 - Remove dead code
 -----BEGIN PGP SIGNATURE-----
 
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 wgTyK0iJ2pzFwgpceNyISw7HF5l5FYchlmoDfkgLeNEowwL5bZfAtxq04Cgl114/
 bdfJUJ9mRKKyOfR7y/qn8+uPlv/0iZJ5JLuBFysDlL5pSiOQK07BmxsLi03qRQst
 ce8uJvohtMIX
 =JkjD
 -----END PGP SIGNATURE-----

Merge remote-tracking branch 'remotes/vivier2/tags/linux-user-for-6.1-pull-request' into staging

linux-user pull request 20210517

- alpha sigaction fixes/cleanups
- s390x sigaction fixes/cleanup
- sparc sigaction fixes/cleanup
- s390x core dumping support
- core dump fix (app name)
- arm  fpa11 fix and cleanup
- strace fixes (unshare(), llseek())
- fix copy_file_range()
- use GDateTime
- Remove dead code

# gpg: Signature made Tue 18 May 2021 06:31:12 BST
# gpg:                using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FBE3C
# gpg:                issuer "laurent@vivier.eu"
# gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full]
# gpg:                 aka "Laurent Vivier <laurent@vivier.eu>" [full]
# gpg:                 aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [full]
# Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F  5173 F30C 38BD 3F2F BE3C

* remotes/vivier2/tags/linux-user-for-6.1-pull-request: (59 commits)
  linux-user/elfload: add s390x core dumping support
  linux-user/elfload: fix filling psinfo->pr_psargs
  linux-user: Tidy TARGET_NR_rt_sigaction
  linux-user/alpha: Share code for TARGET_NR_sigaction
  linux-user/alpha: Define TARGET_ARCH_HAS_KA_RESTORER
  linux-user: Honor TARGET_ARCH_HAS_SA_RESTORER in do_syscall
  linux-user: Pass ka_restorer to do_sigaction
  linux-user/alpha: Rename the sigaction restorer field
  linux-user/alpha: Fix rt sigframe return
  linux-user: use GDateTime for formatting timestamp for core file
  linux-user: Fix erroneous conversion in copy_file_range
  linux-user: Add copy_file_range to strace.list
  linux-user/s390x: Handle vector regs in signal stack
  linux-user/s390x: Clean up signal.c
  linux-user/s390x: Add build asserts for sigset sizes
  linux-user/s390x: Fix frame_addr corruption in setup_frame
  linux-user/s390x: Add stub sigframe argument for last_break
  linux-user/s390x: Set psw.mask properly for the signal handler
  linux-user/s390x: Clean up single-use gotos in signal.c
  linux-user/s390x: Tidy save_sigregs
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-05-18 16:17:22 +01:00
Peter Maydell
15e147b3c7 emulated nvme updates
* various fixes (Gollu Appalanaidu)
 * refactoring (me)
 * move to hw/nvme from hw/block (me)
 -----BEGIN PGP SIGNATURE-----
 
 iQEzBAABCAAdFiEEUigzqnXi3OaiR2bATeGvMW1PDekFAmCiNFEACgkQTeGvMW1P
 DeldNQgAgF/FdkGPNNxNlT5Ei7zmycjbKKf7QDSfn4BXgP9a+7Ccil60kGFCX7Ib
 ERiTOFgofJ587GcYVghBSQv4zYKW+3uXIwfFSUxrMi1hG48j8+z7NyxeWUSXSeSi
 AqohaE70iZyoUx7HQWwRhDsoTnlgRfmpK5Ju9jVRE0be28Y5Z9/hSoyti3PeJPNb
 Igg4bYXTGnXIgJcAfXQBe4iHBn9iZrJB+mp59a8Avb62tP2zwgiRED2M0FNHWyhV
 s/Ra1SiUuEzDJROD47mlxCiqfstknZJ31EI34wJwwKJU2rSQUEMcSRZKc+k7dDHG
 qmQAGPwqS7EnW1uJDxSUFZ944nx+dg==
 =gum+
 -----END PGP SIGNATURE-----

Merge remote-tracking branch 'remotes/nvme/tags/nvme-next-pull-request' into staging

emulated nvme updates

* various fixes (Gollu Appalanaidu)
* refactoring (me)
* move to hw/nvme from hw/block (me)

# gpg: Signature made Mon 17 May 2021 10:16:01 BST
# gpg:                using RSA key 522833AA75E2DCE6A24766C04DE1AF316D4F0DE9
# gpg: Good signature from "Klaus Jensen <its@irrelevant.dk>" [unknown]
# gpg:                 aka "Klaus Jensen <k.jensen@samsung.com>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: DDCA 4D9C 9EF9 31CC 3468  4272 63D5 6FC5 E55D A838
#      Subkey fingerprint: 5228 33AA 75E2 DCE6 A247  66C0 4DE1 AF31 6D4F 0DE9

* remotes/nvme/tags/nvme-next-pull-request:
  hw/nvme: move nvme emulation out of hw/block
  hw/block/nvme: move zoned constraints checks
  hw/block/nvme: remove irrelevant zone resource checks
  hw/block/nvme: remove num_namespaces member
  hw/block/nvme: streamline namespace array indexing
  hw/block/nvme: add metadata offset helper
  hw/block/nvme: cache lba and ms sizes
  hw/block/nvme: replace nvme_ns_status
  hw/block/nvme: remove non-shared defines from header file
  hw/block/nvme: cleanup includes
  hw/block/nvme: consolidate header files
  hw/block/nvme: rename __nvme_select_ns_iocs
  hw/block/nvme: rename __nvme_advance_zone_wp
  hw/block/nvme: rename __nvme_zrm_open
  hw/block/nvme: align with existing style
  hw/block/nvme: function formatting fix
  hw/block/nvme: fix io-command set profile feature
  hw/block/nvme: consider metadata read aio return value in compare
  hw/block/nvme: rename reserved fields declarations
  hw/block/nvme: remove redundant invalid_lba_range trace

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-05-18 12:22:16 +01:00
Peter Maydell
8e22b27994 Minor MAINTAINERS update.
Tweak to includes.
 Add tcg_constant_tl.
 Improve constant pool dump.
 -----BEGIN PGP SIGNATURE-----
 
 iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmChJ2odHHJpY2hhcmQu
 aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV/Newf5AdQ422bUA3eBw0da
 snUK4pJWGUbfqVGik6kg4gbVZVxViIvvu9MZBdQj3hKAzpCY/7FSLhKZ6bmGobDF
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 FqZ7zohK2PdpPntEpYrigVeXPaF4N/iacNAWzxH1dUL7sttEr/V57lazzRKuSSah
 /QQBM0ZFPQbmkQKtIK+gkfZoWOO4cBSAiyltj/qSWS2SDXnqqxc3x8+D6psjhvnh
 QPUaoA==
 =rIhS
 -----END PGP SIGNATURE-----

Merge remote-tracking branch 'remotes/rth-gitlab/tags/pull-tcg-20210516' into staging

Minor MAINTAINERS update.
Tweak to includes.
Add tcg_constant_tl.
Improve constant pool dump.

# gpg: Signature made Sun 16 May 2021 15:08:42 BST
# gpg:                using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F
# gpg:                issuer "richard.henderson@linaro.org"
# gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full]
# Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A  05C0 64DF 38E8 AF7E 215F

* remotes/rth-gitlab/tags/pull-tcg-20210516:
  accel/tcg: Align data dumped at end of TB
  tcg: Add tcg_constant_tl
  exec/gen-icount.h: Add missing "exec/exec-all.h" include
  MAINTAINERS: Add include/exec/gen-icount.h to 'Main Loop' section

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-05-18 11:11:27 +01:00
Ilya Leoshkevich
4a1e8931ec linux-user/elfload: add s390x core dumping support
Provide the following definitions required by the common code:

* ELF_NREG: with the value of sizeof(s390_regs) / sizeof(long).
* target_elf_gregset_t: define it like all the other arches do.
* elf_core_copy_regs(): similar to kernel's s390_regs_get().
* USE_ELF_CORE_DUMP.
* ELF_EXEC_PAGESIZE.

Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com>
Message-Id: <20210413205608.22587-1-iii@linux.ibm.com>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2021-05-18 07:10:46 +02:00
Ilya Leoshkevich
5f779a3a26 linux-user/elfload: fix filling psinfo->pr_psargs
The current code dumps the memory between arg_start and arg_end,
which contains the argv pointers. This results in the

    Core was generated by `<garbage>`

message when opening the core file in GDB. This is because the code is
supposed to dump the actual arg strings. Fix by using arg_strings and
env_strings instead of arg_start and arg_end.

Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com>
Message-Id: <20210413205814.22821-1-iii@linux.ibm.com>
[lv: add missing braces]
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2021-05-18 07:10:46 +02:00
Richard Henderson
fb80439b1e linux-user: Tidy TARGET_NR_rt_sigaction
Initialize variables instead of elses.
Use an else instead of a goto.
Add braces.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20210422230227.314751-8-richard.henderson@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2021-05-18 07:10:46 +02:00
Richard Henderson
02d0de101c linux-user/alpha: Share code for TARGET_NR_sigaction
There's no longer a difference between the alpha code and
the generic code.

There is a type difference in target_old_sigaction.sa_flags,
which can be resolved with a very much smaller ifdef, which
allows us to finish sharing the target_sigaction definition.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20210422230227.314751-7-richard.henderson@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2021-05-18 07:10:46 +02:00
Richard Henderson
0f6f99032e linux-user/alpha: Define TARGET_ARCH_HAS_KA_RESTORER
This means that we can share the TARGET_NR_rt_sigaction code,
and the target_rt_sigaction structure is unused.  Untangling
the ifdefs so that target_sigaction can be shared will wait
until the next patch.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20210422230227.314751-6-richard.henderson@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2021-05-18 07:10:45 +02:00
Richard Henderson
ca192277db linux-user: Honor TARGET_ARCH_HAS_SA_RESTORER in do_syscall
Do not access a field that may not be present.  This will
become an issue when sharing more code in the next patch.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20210422230227.314751-5-richard.henderson@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2021-05-18 07:10:45 +02:00
Richard Henderson
02fb28e8ef linux-user: Pass ka_restorer to do_sigaction
The value of ka_restorer needs to be saved in sigact_table.
At the moment, the attempt to save it in do_syscall is
improperly clobbering user memory.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20210422230227.314751-4-richard.henderson@linaro.org>
[lv: remove tab]
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2021-05-18 07:10:32 +02:00