Commit Graph

1004 Commits

Author SHA1 Message Date
Paolo Bonzini 8e98e2e80b build: kill libuser
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2012-12-19 08:29:06 +01:00
Paolo Bonzini 76cad71136 build: kill libdis, move disassemblers to disas/
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2012-12-19 08:29:06 +01:00
Paolo Bonzini cbdd1999da build: compile translate.o with -fno-gcse option on GCC 4.6.x and 4.7.[012]
These versions of GCC require insane (>2GB) amounts of memory to compile
translate.o.  As a countermeasure, disable the culprit optimization pass.
This should fix the buildbot failure for default_x86_64_fedora16.  Anyway
this is a good thing to do because people will try to compile 1.3 with
less than 2GB of memory and complain.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-11-28 13:18:33 -06:00
Paolo Bonzini 3bc2f570ec build: replace weak symbols with a static library
Weak symbols were a nice idea, but they turned out not to be a good one.
Toolchain support is just too sparse, in particular llvm-gcc is totally
broken.

This patch uses a surprisingly low-tech approach: a static library.
Symbols in a static library are always overridden by symbols in an
object file.  Furthermore, if you place each function in a separate
source file, object files for unused functions will not be taken in.
This means that each function can use all the dependencies that it needs
(especially QAPI stuff such as error_setg).

Thus, all stubs are placed in separate object files and put together in
a static library.  The library then is linked to all programs.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Tested-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Tested-by: Stefan Weil <sw@weilnetz.de>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-11-18 19:19:23 +00:00
Stefan Weil c9159fe9aa Remove libhw
The entries for libhw* are no longer needed in .gitignore.

There is also no longer a difference between common-obj-y and
hw-obj-y, so one of those two macros is sufficient.

Signed-off-by: Stefan Weil <sw@weilnetz.de>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-10-05 16:07:49 -05:00
Avi Kivity 4be403c815 Make target_phys_addr_t 64 bits unconditionally
The hassle and compile time overhead of maintaining both 32-bit and 64-bit
capable source isn't worth the tiny performance advantage which is seen on
a minority of configurations.  Switch to compiling libhw only once, with
target_phys_addr_t unconditionally typedefed to uint64_t.

Signed-off-by: Avi Kivity <avi@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-10-04 19:46:18 -05:00
Blue Swirl 89c33337fd Remove unused CONFIG_TCG_PASS_AREG0 and dead code
Now that CONFIG_TCG_PASS_AREG0 is enabled for all targets,
remove dead code and support for !CONFIG_TCG_PASS_AREG0 case.

Remove dyngen-exec.h and all references to it. Although included by
hw/spapr_hcall.c, it does not seem to use it.

Remove unused HELPER_CFLAGS.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Reviewed-by: Richard Henderson <rth@twiddle.net>
2012-09-15 17:51:14 +00:00
Paolo Bonzini 1435ddb89c build: get dependency file directories from object file names
After commit dcff25f2cd, Dependency file
are taken from the directories that have a Makefile.objs file.  This is
not enough, since files can be included from other directories.
So, pick them from directories that have an object file in them.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-07-28 09:16:09 +00:00
Blue Swirl 71ea2e0161 bsd-user: fix build
Link in oslib objects also for BSD user, but avoid using the version of
qemu_vmalloc() defined in oslib-posix.c.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-06-28 20:28:36 +00:00
Peter Maydell b54fa7ddde Makefile.target: Update clean command to clean hw/ directory
Now we create object files in a hierarchy under hw/, so the
'clean' target must also be updated to delete those object files.
Rather than using a manual list of subdirectories which will
easily drift out of date, we just delete all .o and .d files
in the target directory hierarchy.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-06-27 16:26:59 -05:00
Stefan Weil a483bdae10 make: Fix dependencies for fpu/*.c and tcg/*.c
Commit dcff25f2cd removed too many *.d
files. The directories fpu/ and tcg/ still don't use the recursive
subdir rules.

Signed-off-by: Stefan Weil <sw@weilnetz.de>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-06-24 12:17:52 +00:00
Anthony Liguori dcff25f2cd make: automatically include dependencies in recursive subdir rules (v2)
I think I understand enough of what's going on in these rules to ensure this is
right.  But I could certainly use a second or third opinion...

Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-06-19 13:32:42 -05:00
Blue Swirl dbaf26b3b2 Revert "build: compile oslib-obj-y once"
This reverts commit 25f27a4f71
because of bsd-user breakage.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-06-10 20:29:19 +00:00
Paolo Bonzini 25f27a4f71 build: compile oslib-obj-y once
There is no difference in oslib-obj-y between user-mode and system
targets.  There used to be when user-mode could optionally be
compiled with PIE.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2012-06-07 09:21:19 +02:00
Paolo Bonzini fec90ff0bd build: limit usage of vpath
All paths are now explicitly given, and the object tree mimics
the source tree, so there is no need to apply special vpaths.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2012-06-07 09:21:18 +02:00
Paolo Bonzini 00c705fb92 build: libcacard Makefile cleanups
Build vscclient from toplevel Makefile, limit usage of vpath.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2012-06-07 09:21:18 +02:00
Paolo Bonzini 49ac9e0a8c build: move device tree to per-target Makefile.objs
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2012-06-07 09:21:18 +02:00
Paolo Bonzini c353f26194 build: move per-target hw/ objects to nested Makefile.objs
This completes the move to nested Makefiles for virtio and a few
other files that were not part of obj-TARGET-y, but still were
compiled separately for each target.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2012-06-07 09:21:17 +02:00
Paolo Bonzini 99100dc3b5 build: move rules for nesting to Makefile.objs
At this point we will start adding nesting behavior to other files
than Makefile.target.  Because Makefile.objs is included by
Makefile.target, it is simpler to move the processing of
subdirectories there.

To enable this, only add per-target files to obj-y.  Use a separate
variable for the linker dependencies, all-obj-y.  This variable includes
obj-y and also all objects that are taken from other directories.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2012-06-07 09:21:12 +02:00
Paolo Bonzini fbe37ef3e1 build: move other target-*/ objects to nested Makefile.objs
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2012-06-07 09:21:11 +02:00
Paolo Bonzini 5f86146fb3 dump: remove dumping stuff from cpu-all.h
This simplifies things, because they will only be included for softmmu
targets and because the stubs are taken out-of-line in separate files,
which in the future could even be compiled only once.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2012-06-07 09:20:17 +02:00
Paolo Bonzini db2077692f dump: do not compile dump.o for user-mode emulation
It is not needed, because the monitor is not included.

Cc: Wen Congyang <wency@cn.fujitsu.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2012-06-07 09:19:02 +02:00
Paolo Bonzini 9cdc8df314 build: move libobj-y variable to nested Makefile.objs
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2012-06-07 07:19:23 +02:00
Paolo Bonzini 5e8861a036 build: move obj-TARGET-y variables to nested Makefile.objs
Also drop duplicate occurrence of device-hotplug.o.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2012-06-07 07:17:36 +02:00
Paolo Bonzini 7fc5152c6d build: move *-user/ objects to nested Makefile.objs
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2012-06-07 07:17:33 +02:00
Paolo Bonzini 4115852bb0 build: do not sprinkle around GENERATED_HEADERS dependencies
Keeping GENERATED_HEADERS dependencies up-to-date everywhere is complex.
We can simply make the Makefile depend on them, and they will be built
before all other targets.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2012-06-07 07:17:26 +02:00
Wen Congyang 783e9b4826 introduce a new monitor command 'dump-guest-memory' to dump guest's memory
The command's usage:
   dump-guest-memory [-p] protocol [begin] [length]
The supported protocol can be file or fd:
1. file: the protocol starts with "file:", and the following string is
   the file's path.
2. fd: the protocol starts with "fd:", and the following string is the
   fd's name.

Note:
  1. If you want to use gdb to process the core, please specify -p option.
     The reason why the -p option is not default is:
       a. guest machine in a catastrophic state can have corrupted memory,
          which we cannot trust.
       b. The guest machine can be in read-mode even if paging is enabled.
          For example: the guest machine uses ACPI to sleep, and ACPI sleep
          state goes in real-mode.
  2. If you don't want to dump all guest's memory, please specify the start
     physical address and the length.

Signed-off-by: Wen Congyang <wency@cn.fujitsu.com>
Signed-off-by: Luiz Capitulino <lcapitulino@redhat.com>
2012-06-04 13:49:34 -03:00
Wen Congyang 9fecbed0c0 target-i386: Add API to write elf notes to core file
The core file contains register's value. These APIs write registers to
core file, and them will be called in the following patch.

Signed-off-by: Wen Congyang <wency@cn.fujitsu.com>
Signed-off-by: Luiz Capitulino <lcapitulino@redhat.com>
2012-06-04 13:49:34 -03:00
Wen Congyang fae001f551 implement cpu_get_memory_mapping()
Walk cpu's page table and collect all virtual address and physical address mapping.
Then, add these mapping into memory mapping list. If the guest does not use paging,
it will do nothing. Note: the I/O memory will be skipped.

Signed-off-by: Wen Congyang <wency@cn.fujitsu.com>
Signed-off-by: Luiz Capitulino <lcapitulino@redhat.com>
2012-06-04 13:49:33 -03:00
Wen Congyang 80167a8a31 Add API to create memory mapping list
The memory mapping list stores virtual address and physical address mapping.
The virtual address and physical address are contiguous in the mapping.
The folloing patch will use this information to create PT_LOAD in the vmcore.

Signed-off-by: Wen Congyang <wency@cn.fujitsu.com>
Signed-off-by: Luiz Capitulino <lcapitulino@redhat.com>
2012-06-04 13:49:33 -03:00
Blue Swirl 0cac1b66c8 cputlb: move TLB handling to a separate file
Move TLB handling and softmmu code load helpers to cputlb.c,
compile only for softmmu targets.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-05-01 10:45:04 +00:00
Blue Swirl 58b5f5e029 Merge branch 'cocoa-for-upstream' of git://repo.or.cz/qemu/afaerber
* 'cocoa-for-upstream' of git://repo.or.cz/qemu/afaerber:
  Drop darwin-user
  configure: add '--disable-cocoa' switch
  raw-posix: Do not use CONFIG_COCOA macro
2012-05-01 09:29:23 +00:00
Blue Swirl 61d25e1548 Merge branch 'qom-cpu-rest.v1' of git://github.com/afaerber/qemu-cpu
* 'qom-cpu-rest.v1' of git://github.com/afaerber/qemu-cpu:
  Makefile: Simplify compilation of target-*/cpu.c
  target-mips: Start QOM'ifying CPU init
  target-mips: QOM'ify CPU
  target-m68k: Add QOM CPU subclasses
  target-m68k: Start QOM'ifying CPU init
  target-m68k: QOM'ify CPU reset
  target-m68k: QOM'ify CPU
  target-sh4: Start QOM'ifying CPU init
  target-sh4: QOM'ify CPU reset
  target-sh4: QOM'ify CPU
  MAINTAINERS: Downgrade target-mips and target-sh4 to Odd Fixes
  MAINTAINERS: Downgrade target-m68k to Odd Fixes
2012-05-01 09:27:53 +00:00
Andreas Färber 0adb124659 Drop darwin-user
It's been orphaned, not compiling for a long time and despite Apple's
drop of their Rosetta ppc emulation technology with Mac OS X Lion no one
has stepped up to fix it.

Testing necessary changes wrt QOM'ification thus is impossible, so we
might as well remove it completely.

Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
2012-05-01 00:17:27 +02:00
Andreas Färber 894a84e632 Makefile: Simplify compilation of target-*/cpu.c
All targets except for ppc now have a standalone cpu.c file.

Signed-off-by: Andreas Färber <afaerber@suse.de>
2012-04-30 11:32:13 +02:00
Andreas Färber 0f71a7095d target-mips: QOM'ify CPU
Embed CPUMIPSState as first member of QOM MIPSCPU.

Let CPUClass::reset() call cpu_state_reset() for now.

Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Richard Henderson <rth@twiddle.net>
2012-04-30 11:32:13 +02:00
Andreas Färber b9e7a23434 target-m68k: QOM'ify CPU
Embed CPUM68KState as first member of QOM M68kCPU.
Drop cpu_m68k_close() in favor of object_delete().

Let CPUClass::reset() call cpu_state_reset() for now.

Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Laurent Vivier <Laurent@Vivier.EU>
Tested-by: Laurent Vivier <Laurent@Vivier.EU>
2012-04-30 11:32:10 +02:00
Andreas Färber 339894bec9 target-sh4: QOM'ify CPU
Embed CPUSH4State as first member of SuperHCPU.

Let CPUClass::reset() call cpu_state_reset() for now.

Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
2012-04-30 11:32:10 +02:00
Lluís Vilanova c0424934fa Beautify makefile commands for generation of files with tracetool
Signed-off-by: Lluís Vilanova <vilanova@ac.upc.edu>
Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
2012-04-25 14:21:35 +01:00
Eduardo Habkost 6aae2a2e0e config-host.mak: rename datadir to qemu_datadir
Autoconf concept of "datadir" is supposed to be "$prefix/share", not
"$prefix/share/PACKAGE", so using datadir for the Qemu-specific
directory is confusing.

The current C code that uses CONFIG_QEMU_DATADIR should be safe, as now
create_config generates the same #define name (CONFIG_QEMU_DATADIR) for
both "datadir" and "qemu_datadir" variables.

Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-04-24 09:50:30 -05:00
Andreas Färber b77f98cada target-microblaze: QOM'ify CPU
Embed CPUMBState as first member of QOM MicroBlazeCPU.

Let CPUClass::reset() call cpu_state_reset() for now.

Signed-off-by: Andreas Färber <afaerber@suse.de>
Tested-by: Peter A. G. Crosthwaite <peter.crosthwaite@petalogix.com>
[AF: Updated cpu.c to include cpu-qom.h indirectly via cpu.h]
2012-04-24 16:04:56 +02:00
Andreas Färber e739a48e58 target-cris: QOM'ify CPU
Embed CPUCRISState as first member of QOM CRISCPU.

Let CPUClass::reset() call cpu_state_reset() for now.

Signed-off-by: Andreas Färber <afaerber@suse.de>
2012-04-24 16:04:56 +02:00
Anthony Liguori 5469963394 Merge remote-tracking branch 'origin/master' into staging
* origin/master: (27 commits)
  target-arm: Move reset handling to arm_cpu_reset
  target-arm: Drop cpu_reset_model_id()
  target-arm: Move cache ID register setup to cpu specific init fns
  target-arm: Move OMAP cp15_i_{max,min} reset to cpu_state_reset
  target-arm: Move feature register setup to per-CPU init fns
  target-arm: Move iWMMXT wCID reset to cpu_state_reset
  target-arm: Drop JTAG_ID documentation
  target-arm: Move SCTLR reset value setup to per cpu init fns
  target-arm: Move CTR setup to per cpu init fns
  target-arm: Move MVFR* setup to per cpu init fns
  target-arm: Move FPSID config to cpu init fns
  target-arm: Move feature bit settings to CPU init fns
  target-arm: Add QOM subclasses for each ARM cpu implementation
  target-arm: remind to keep arm features in sync with linux-user/elfload.c
  tci: GETPC() macro must return an uintptr_t
  gdbstub: Synchronize CPU state unconditionally in gdb_set_cpu_pc
  softfloat: make USE_SOFTFLOAT_STRUCT_TYPES compile
  target-xtensa: add tests for LOOPNEZ and LOOPGTZ
  target-xtensa: fix LOOPNEZ/LOOPGTZ translation
  qtest: add m48t59 tests for Sparc
  ...
2012-04-23 11:49:59 -05:00
Oskar Andero d1157ca418 realview: break out versatile i2c controller code
The versatile i2c controller implementation was separated to
its own file called versatile_i2c.c. This is done as a preparation
for adding i2c support to the versatilepb board.

Signed-off-by: Oskar Andero <oskar.andero@gmail.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-04-20 15:38:52 +00:00
Lluís Vilanova 650ab98d1d tracetool: Rewrite infrastructure as python modules
The tracetool script is written in shell and has hit several portability
problems due to shell quirks or external tools across host platforms.
Additionally the amount of string processing and lack of real data
structures makes it tough to implement code generator backends for
tracers that are more complex.

This patch replaces the shell version of tracetool with a Python
version.  The new tracetool design is:

  scripts/tracetool.py - top-level script
  scripts/tracetool/backend/ - tracer backends live here (simple, ust)
  scripts/tracetool/format/  - output formats live here (.c, .h)

There is common code for trace-events definition parsing so that
backends can focus on generating code rather than parsing input.

Support for all existing backends (nop, stderr, simple, ust,
and dtrace) is added back in follow-up patches.

[Commit description written by Stefan Hajnoczi]

Signed-off-by: Lluís Vilanova <vilanova@ac.upc.edu>
Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
2012-04-18 14:02:59 +01:00
Anthony Liguori 8a6b8708e3 Merge remote-tracking branch 'sstabellini/for_anthony' into staging
* sstabellini/for_anthony:
  xen: introduce an event channel for buffered io event notifications
  xen-mapcache: don't unmap locked entry during mapcache invalidation
  Xen, mapcache: Fix the compute of the size of bucket.
  xen: handle backend deletion from xenstore
  Xen: Add xen-apic support and hook it up.
  Xen: basic HVM MSI injection support.
2012-04-16 12:50:12 -05:00
Andreas Färber 25ebd80f1d target-alpha: QOM'ify CPU
Embed CPUAlphaState as first member of AlphaCPU.

Signed-off-by: Andreas Färber <afaerber@suse.de>
Acked-by: Richard Henderson <rth@twiddle.net>
2012-04-15 21:26:32 +02:00
Max Filippov 176ac95ed1 target-xtensa: add dc233c core
This is Diamond 233L Standard Core Rev.C (LE), implemented through
linux/gdb overlay.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Reviewed-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-04-15 17:43:16 +00:00
Blue Swirl 044c62aaf2 Merge branch 'xtensa' of git://jcmvbkbc.spb.ru/dumb/qemu-xtensa
* 'xtensa' of git://jcmvbkbc.spb.ru/dumb/qemu-xtensa:
  target-xtensa: Start QOM'ifying CPU init
  target-xtensa: QOM'ify CPU reset
  target-xtensa: QOM'ify CPU
  target-xtensa: improve unit tests debugging
  target-xtensa: Move helpers.h to helper.h
2012-04-14 10:56:04 +00:00
Blue Swirl e92861ccb1 Merge branch 'arm-devs.for-upstream' of git://git.linaro.org/people/pmaydell/qemu-arm
* 'arm-devs.for-upstream' of git://git.linaro.org/people/pmaydell/qemu-arm:
  hw/arm_gic: Remove stray hardcoded tab
  hw/arm_gic: gic_set_pending_private() is NVIC only
  hw/arm_gic: Use NVIC instead of LEGACY_INCLUDED_GIC define
  hw/arm_gic: Make gic_reset a sysbus reset function
  hw/arm11mpcore: Convert to using sysbus GIC device
  hw/exynos4210_gic: Convert to using sysbus GIC
  hw/realview_gic: switch to sysbus GIC
  hw/a9mpcore: Switch to using sysbus GIC
  hw/a15mpcore: switch to using sysbus GIC
  hw/arm_gic: Make the GIC its own sysbus device
  hw/arm_gic: Expose PPI inputs as gpio inputs
  hw/arm_gic: Move gic_get_current_cpu into arm_gic.c
  hw/arm_gic: Move NCPU definition to arm_gic.c
  hw/exynos4210_combiner.c: Drop excessive read/write access check.
  ARM: Exynos4210: Drop gic_cpu_write() after initialization.
  Fix bit test in Exynos4210 UART emulation to use & instead of &&
2012-04-14 10:55:00 +00:00
Andreas Färber a4633e16d7 target-xtensa: QOM'ify CPU
Embed CPUXtensaState as first member of XtensaCPU.
Let CPUClass::reset() call cpu_state_reset() for now.

Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2012-04-14 03:48:08 +04:00
Wei Liu 9468e9c41a Xen: Add xen-apic support and hook it up.
Signed-off-by: Wei Liu <wei.liu2@citrix.com>
Signed-off-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
Acked-by: Paolo Bonzini <pbonzini@redhat.com>
2012-04-13 17:34:21 +00:00
Peter Maydell 496dbcd1a3 hw/arm_gic: Make the GIC its own sysbus device
Compile arm_gic.c as a standalone C file to produce a self contained
sysbus GIC device. Support the legacy usage by #include of the .c file
by making those users #define LEGACY_INCLUDED_GIC, so we can convert
them one by one.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Evgeny Voevodin <e.voevodin@samsung.com>
2012-04-13 11:39:07 +00:00
Andreas Färber fc0ced2fbd target-lm32: QOM'ify CPU
Embed CPULM32State as first member of QOM LM32CPU.
Let CPUClass::reset() call cpu_state_reset() for now.

Signed-off-by: Andreas Färber <afaerber@suse.de>
Acked-by: Michael Walle <michael@walle.cc>
2012-04-12 01:07:41 +02:00
Andreas Färber 30471bc94e target-i386: Rename cpuid.c
Name it cpu.c to align with other QOM'ified targets.

Signed-off-by: Andreas Färber <afaerber@suse.de>
2012-04-10 17:10:27 +02:00
Andreas Färber 88ca012a1f target-sparc: Rename cpu_init.c
Align QOM'ified targets, with a view to simplify Makefile.target.

Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-04-07 08:24:44 +00:00
Andreas Färber 29e4bcb26b target-s390x: QOM'ify CPU
Embed CPUS390XState as first member of S390CPU.
Since -cpu is being ignored, make TYPE_S390_CPU non-abstract.

Signed-off-by: Andreas Färber <afaerber@suse.de>
Tested-by: Christian Borntraeger <borntraeger@de.ibm.com>
2012-04-04 17:29:23 +02:00
Anthony Liguori aba8e41e86 Merge remote-tracking branch 'stefanha/tracing' into staging
* stefanha/tracing:
  tracetool: dtrace: handle in and next reserved words
  tracetool: dtrace disabled-events fix
  Makefile.target: code stp dependency on trace-events
2012-04-02 09:44:35 -05:00
Blue Swirl 4dec465460 Merge branch 'qom-cpu-unicore32.v3' of git://github.com/afaerber/qemu-cpu
* 'qom-cpu-unicore32.v3' of git://github.com/afaerber/qemu-cpu:
  target-unicore32: Move CPU-dependent init into initfn
  target-unicore32: QOM'ify CPU
  target-unicore32: License future contributions under GPLv2+
  target-unicore32: Relicense to GPLv2+
  MAINTAINERS: Add entry for UniCore32
2012-03-31 12:09:06 +00:00
Alon Levy 2174e2380f Makefile.target: code stp dependency on trace-events
Signed-off-by: Alon Levy <alevy@redhat.com>
Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
2012-03-30 11:55:21 +01:00
Andreas Färber ae0f5e9ea8 target-unicore32: QOM'ify CPU
Embed CPUUniCore32State as first member of UniCore32CPU.

Contributed under GPLv2+.

Signed-off-by: Andreas Färber <afaerber@suse.de>
Acked-by: Guan Xuetao <gxt@mprc.pku.edu.cn>
2012-03-30 11:09:30 +02:00
Andreas Färber dec9c2d430 target-arm: Minimalistic CPU QOM'ification
Introduce only one non-abstract type TYPE_ARM_CPU and do not touch
cp15 registers to not interfere with Peter's ongoing remodelling.
Embed CPUARMState as first (additional) field of ARMCPU.

Let CPUClass::reset() call cpu_state_reset() for now.

Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-03-29 15:42:50 +00:00
Richard Henderson c30827555d target-alpha: Move memory helpers to mem_helper.c.
This completes the transition away from AREG0.  This patch must
be last because it requires CONFIG_TCG_PASS_AREG0 set too.

Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-03-24 17:07:32 +00:00
Richard Henderson 69163fbb0c target-alpha: Move palcode support helpers to sys_helper.c.
Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-03-24 17:07:31 +00:00
Richard Henderson 4a58aedff4 target-alpha: Move floating-point helpers to fpu_helper.c.
Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-03-24 17:07:27 +00:00
Richard Henderson 0be034bc2c target-alpha: Move integer helpers to int_helper.c.
Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-03-24 17:07:26 +00:00
Paolo Bonzini 7725d14679 get rid of CONFIG_VIRTIO_SCSI
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2012-03-19 16:35:14 +01:00
Blue Swirl 0184e266cb Sparc: avoid AREG0 wrappers for memory access helpers
Adjust generation of load and store templates so that the functions
take a parameter for CPUState instead of relying on global env.

Remove wrappers. Move remaining memory helpers to ldst_helper.c.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-03-18 12:22:02 +00:00
Blue Swirl fe8d8f0f1c Sparc: avoid AREG0 for memory access helpers
Make memory access helpers take a parameter for CPUState instead
of relying on global env. Introduce wrappers for load and store ops.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-03-18 12:22:00 +00:00
Anthony Liguori 684e1e0479 Merge remote-tracking branch 'kraxel/usb.44' into staging
* kraxel/usb.44:
  Endian fix an assertion in usb-msd
  uhci: alloc can't fail, drop check.
  uhci: new uhci_handle_td return code for tds still in flight
  uhci: renumber uhci_handle_td return codes
  uhci: use enum for uhci_handle_td return codes
  uhci: tracing support
  uhci: cancel on schedule stop.
  uhci: fix uhci_async_cancel_all
  uhci: pass addr to uhci_async_alloc
  usb: improve packet state sanity checks
  usb-ohci: DMA writeback bug fixes
  usb-ehci: drop unused isoch_pause variable
  usb: zap hw/ush-{ohic,uhci}.h + init wrappers
  usb: the big rename
2012-03-13 13:55:02 -05:00
Andreas Färber ce008c1f10 qom: Add QOM support to user emulators
Link the Object base class and the module infrastructure for class
registration. Introduce $(universal-obj-y) for objects that are more
common than $(common-obj-y), so that those only get built once.

Call QOM module init for type registration.

Signed-off-by: Andreas Färber <afaerber@suse.de>
Cc: Anthony Liguori <anthony@codemonkey.ws>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-03-13 13:23:18 -05:00
Gerd Hoffmann f1ae32a1ec usb: the big rename
Reorganize usb source files.  Create a new hw/usb/ directory and move
all usb source code to that place.  Also make filenames a bit more
descriptive.  Host adapters are prefixed with "hch-" now, usb device
emulations are prefixed with "dev-".  Fixup paths Makefile and include
paths to make it compile.  No code changes.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2012-03-13 10:15:32 +01:00
Jan Kiszka 5d17c0d2df kvm: x86: Add user space part for in-kernel i8254
This provides the required user space stubs to enable the in-kernel
i8254 emulation of KVM.

The in-kernel model supports lost tick compensation according to the
"delay" policy. This is enabled by default and can be switched off via a
device property.

Depending on the feature set of the host kernel (before 2.6.32), we may
have to disable the HPET or lack sound output from the PC speaker.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Avi Kivity <avi@redhat.com>
2012-03-07 12:27:43 +02:00
Peter A. G. Crosthwaite e32605062c xilinx_zynq: machine model initial version
Xilinx zynq-7000 machine model. Also includes device model for the zynq-specific
system level control register (SLCR) module.

Signed-off-by: Peter A. G. Crosthwaite <peter.crosthwaite@petalogix.com>
Acked-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2012-03-07 02:20:19 +01:00
Peter A. G. Crosthwaite e9f186e514 cadence_gem: initial version of device model
Device model for cadence gem ethernet controller.

Signed-off-by: Peter A. G. Crosthwaite <peter.crosthwaite@petalogix.com>
Signed-off-by: John Linn <john.linn@xilinx.com>
Acked-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2012-03-07 02:20:19 +01:00
Peter A. G. Crosthwaite f3a6cc0712 cadence_ttc: initial version of device model
Implemented cadence Triple Timer Counter (TCC)

Signed-off-by: Peter A. G. Crosthwaite <peter.crosthwaite@petalogix.com>
Signed-off-by: John Linn <john.linn@xilinx.com>
Acked-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2012-03-07 02:20:19 +01:00
Peter A. G. Crosthwaite 35548b06cf cadence_uart: initial version of device model
Implemented cadence UART serial controller

Signed-off-by: Peter A. G. Crosthwaite <peter.crosthwaite@petalogix.com>
Signed-off-by: John Linn <john.linn@xilinx.com>
Acked-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2012-03-07 02:20:19 +01:00
Peter A. G. Crosthwaite d94e743476 microblaze: factored out common boot code
factored out the copy-pasted common boot code from the two microblaze platforms
into a dedicated microblaze bootloader (microblaze_boot.o).

Signed-off-by: Peter A. G. Crosthwaite <peter.crosthwaite@petalogix.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2012-03-05 23:00:14 +01:00
Blue Swirl d9bafcd1db Merge branch 'arm-devs.for-upstream' of git://git.linaro.org/people/pmaydell/qemu-arm
* 'arm-devs.for-upstream' of git://git.linaro.org/people/pmaydell/qemu-arm:
  hw/arm11mpcore: Fix broken realview_mpcore/arm11mpcore_priv properties
  arm: add device tree support
  arm: make sure that number of irqs can be represented in GICD_TYPER.
  arm: clean up GIC constants
2012-03-03 17:53:56 +00:00
Grant Likely 412beee6a0 arm: add device tree support
If compiled with CONFIG_FDT, allow user to specify a device tree file using
the -dtb argument.  If the machine supports it then the dtb will be loaded
into memory and passed to the kernel on boot.

Signed-off-by: Jeremy Kerr <jeremy.kerr@canonical.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
[Peter Maydell: Use machine opt rather than global to pass dtb filename]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-03-02 11:56:38 +00:00
Anthony Liguori 5918ff68ff Merge remote-tracking branch 'qemu-kvm/uq/master' into staging
* qemu-kvm/uq/master:
  pc-bios: update kvmvapic.bin
  kvmvapic: Use optionrom helpers
  optionsrom: Reserve space for checksum
  kvmvapic: Simplify mp/up_set_tpr
  kvmvapic: Introduce TPR access optimization for Windows guests
  kvmvapic: Add option ROM
  target-i386: Add infrastructure for reporting TPR MMIO accesses
  Allow to use pause_all_vcpus from VCPU context
  Process pending work while waiting for initial kick-off in TCG mode
  Remove useless casts from cpu iterators
  kvm: Set cpu_single_env only once
  kvm: Synchronize cpu state in kvm_arch_stop_on_emulation_error()
2012-03-01 15:26:01 -06:00
Anthony Liguori 9ef1300b1b Merge remote-tracking branch 'bonzini/virtio-scsi' into staging
* bonzini/virtio-scsi:
  scsi-block: always use scsi_generic_ops for cache != none
  scsi: fix searching for an empty id
  scsi: fix wrong return for target INQUIRY
  virtio-scsi: add migration support
  virtio-scsi: process control queue requests
  virtio-scsi: add basic SCSI bus operation
  virtio-scsi: Add basic request processing infrastructure
  virtio-scsi: Add virtio-scsi stub device
  scsi-disk: add migration support
  scsi-generic: add migration support
  scsi: add SCSIDevice vmstate definitions
  scsi-disk: enable scatter/gather functionality
  scsi: add scatter/gather functionality
  scsi: pass residual amount to command_complete
  ahci: use new DMA helpers
  dma-helpers: add accounting wrappers
  dma-helpers: add dma_buf_read and dma_buf_write
  dma-helpers: make QEMUSGList target independent
2012-02-24 09:33:03 -06:00
Hervé Poussineau 78207d80a3 jazz-led: compile it only twice
Signed-off-by: Hervé Poussineau <hpoussin@reactos.org>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-02-22 09:02:19 -06:00
Jordan Justen cbc5b5f3aa hw/pc: move rom init to pc_sysfw.c
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-02-22 09:02:17 -06:00
Stefan Hajnoczi 973abc7f41 virtio-scsi: Add virtio-scsi stub device
Add a useless virtio SCSI HBA device:

  qemu -device virtio-scsi-pci

Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
Reviewed-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2012-02-22 13:39:59 +01:00
Jan Kiszka e5ad936b0f kvmvapic: Introduce TPR access optimization for Windows guests
This enables acceleration for MMIO-based TPR registers accesses of
32-bit Windows guest systems. It is mostly useful with KVM enabled,
either on older Intel CPUs (without flexpriority feature, can also be
manually disabled for testing) or any current AMD processor.

The approach introduced here is derived from the original version of
qemu-kvm. It was refactored, documented, and extended by support for
user space APIC emulation, both with and without KVM acceleration. The
VMState format was kept compatible, so was the ABI to the option ROM
that implements the guest-side para-virtualized driver service. This
enables seamless migration from qemu-kvm to upstream or, one day,
between KVM and TCG mode.

The basic concept goes like this:
 - VAPIC PV interface consisting of I/O port 0x7e and (for KVM in-kernel
   irqchip) a vmcall hypercall is registered
 - VAPIC option ROM is loaded into guest
 - option ROM activates TPR MMIO access reporting via port 0x7e
 - TPR accesses are trapped and patched in the guest to call into option
   ROM instead, VAPIC support is enabled
 - option ROM TPR helpers track state in memory and invoke hypercall to
   poll for pending IRQs if required

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Avi Kivity <avi@redhat.com>
2012-02-18 12:15:59 +02:00
Peter Maydell 5d782e0805 hw/a15mpcore.c: Add Cortex-A15 private peripheral model
Add a model of the Cortex-A15 memory mapped private peripheral
space. This is fairly simple because the only memory mapped
bit of the A15 is the GIC.

Note that we don't currently model a VGIC and therefore don't
map the VGIC related bits of the GIC.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-02-17 11:13:17 +00:00
Mitsyanko Igor 30628cb12d Exynos4210: added display controller implementation
Exynos4210 display controller (FIMD) has 5 hardware windows with alpha and
chroma key blending functions.

Signed-off-by: Mitsyanko Igor <i.mitsyanko@samsung.com>
Signed-off-by: Evgeny Voevodin <e.voevodin@samsung.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-02-17 11:13:14 +00:00
Evgeny Voevodin 12c775db14 ARM: exynos4210: MCT support.
Signed-off-by: Evgeny Voevodin <e.voevodin@samsung.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-02-17 11:13:09 +00:00
Maksim Kozlov df91b48f64 ARM: exynos4210: basic Power Management Unit implementation
Patch adds basic model for Exynos4210 SoC PMU.
This model implements PMU registers just as a bulk of memory. Currently,
the only reason this device exists is that secondary CPU boot loader
uses PMU INFORM5 register as a holding pen.

Signed-off-by: Maksim Kozlov <m.kozlov@samsung.com>
Signed-off-by: Evgeny Voevodin <e.voevodin@samsung.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-02-17 11:13:07 +00:00
Evgeny Voevodin 62db8bf39b ARM: exynos4210: PWM support.
Signed-off-by: Evgeny Voevodin <e.voevodin@samsung.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-02-17 11:13:05 +00:00
Maksim Kozlov e5a4914efc ARM: exynos4210: UART support
Add basic support of exynos4210 UART

Signed-off-by: Maksim Kozlov <m.kozlov@samsung.com>
Signed-off-by: Evgeny Voevodin <e.voevodin@samsung.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-02-17 11:13:02 +00:00
Evgeny Voevodin 0caa711335 ARM: Samsung exynos4210-based boards emulation
Add initial support of NURI and SMDKC210 boards

Signed-off-by: Evgeny Voevodin <e.voevodin@samsung.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-02-17 11:12:59 +00:00
Evgeny Voevodin 8e03cf1eeb ARM: exynos4210: IRQ subsystem support.
Signed-off-by: Evgeny Voevodin <e.voevodin@samsung.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-02-17 11:12:57 +00:00
Stefan Weil 57c83dacfe make: Remove duplicate use of GLIB_CFLAGS
Makefile, Makefile.hw, Makefile.target and libcacard/Makefile
added GLIB_CFLAGS to QEMU_CFLAGS.

Makefile.objs does this, too, and is included by all other
Makefiles, so GLIB_CFLAGS were added twice (reported by malc).

Signed-off-by: Stefan Weil <sw@weilnetz.de>
Signed-off-by: malc <av1474@comtv.ru>
2012-02-09 20:44:38 +04:00
Stefan Weil 0fa5491eed w32: Build windows and console executables
System emulation executables with SDL are typically windows
executables. Sometimes console executables are more useful,
so create both variants if linker option -mwindows was detected.

v2:
This version uses QEMU_PROGW / QEMU_PROG instead of QEMU_PROG / QEMU_PROGC.

Signed-off-by: Stefan Weil <sw@weilnetz.de>
2012-02-07 18:11:41 +01:00
Anthony Liguori 2f28d2ff9d qom: add the base Object class (v2)
This class provides the main building block for QEMU Object Model and is
extensively documented in the header file.  It is largely inspired by GObject.

Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
---
v1 -> v2
 - remove printf() in type registration
 - fix typo in comment (Paolo)
 - make Interface private
 - move object into a new directory and move header into include/qemu/
 - don't make object.h depend on qemu-common.h
 - remove Type and replace it with TypeImpl * (Paolo)
 - use hash table to store types (Paolo)
 - aggressively cache parent type (Paolo)
 - make a type_register and use it with interfaces (Paolo)
 - fix interface cast comment (Paolo)
 - add a few more functions required in later series
2012-01-27 10:28:30 -06:00
Rob Herring 2488514cef arm: SoC model for Calxeda Highbank
Adds support for Calxeda's Highbank SoC.

Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Signed-off-by: Mark Langsdorf <mark.langsdorf@calxeda.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-01-26 11:49:09 +00:00
Rob Herring 4c0e167c9d Add xgmac ethernet model
This adds very basic support for the xgmac ethernet core. Missing things
include:

- statistics counters
- WoL support
- rx checksum offload
- chained descriptors (only linear descriptor ring)
- broadcast and multicast handling

Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Signed-off-by: Mark Langsdorf <mark.langsdorf@calxeda.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-01-26 11:43:47 +00:00
Blue Swirl 331636431a vga: compile cirrus_vga in hwlib
Remove target dependencies and compile Cirrus VGA in hwlib.

Address masking can be removed since memory API handles that now.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-01-25 18:32:59 +00:00
Blue Swirl 61eb1f38c1 hyperv: fix build on non-KVM hosts
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-01-23 20:04:51 +00:00
Anthony Liguori 5b4448d27d Merge remote-tracking branch 'qemu-kvm/uq/master' into staging
* qemu-kvm/uq/master:
  kvm: Activate in-kernel irqchip support
  kvm: x86: Add user space part for in-kernel IOAPIC
  kvm: x86: Add user space part for in-kernel i8259
  kvm: x86: Add user space part for in-kernel APIC
  kvm: x86: Establish IRQ0 override control
  kvm: Introduce core services for in-kernel irqchip support
  memory: Introduce memory_region_init_reservation
  ioapic: Factor out base class for KVM reuse
  ioapic: Drop post-load irr initialization
  i8259: Factor out base class for KVM reuse
  i8259: Completely privatize PicState
  apic: Open-code timer save/restore
  apic: Factor out base class for KVM reuse
  apic: Introduce apic_report_irq_delivered
  apic: Inject external NMI events via LINT1
  apic: Stop timer on reset
  kvm: Move kvmclock into hw/kvm folder
  msi: Generalize msix_supported to msi_supported
  hyper-v: initialize Hyper-V CPUID leaves.
  hyper-v: introduce Hyper-V support infrastructure.

Conflicts:
	Makefile.target

Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-01-23 11:00:26 -06:00
Blue Swirl 3d402831de vga: make Cirrus ISA device optional
Reviewed-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-01-22 07:28:23 +00:00
Alexander Graf 3960b04d62 PPC: Bamboo: fold ppc440.c and ppc440_bamboo.c into a single file
The separation of ppc440 and ppc440_bamboo makes some sense, since ppc440
is the SoC while ppc440_bamboo is the actual board. But the separation
makes things harder for us for no good reason, so let's just fold them
in together with each other.

Signed-off-by: Alexander Graf <agraf@suse.de>
2012-01-21 05:17:01 +01:00
Jan Kiszka a39c1d47ac kvm: x86: Add user space part for in-kernel IOAPIC
This introduces the KVM-accelerated IOAPIC model 'kvm-ioapic' and
extends the IRQ routing setup by the 0->2 redirection when needed.

The kvm-ioapic model has a property that allows to define its GSI base
for injecting interrupts into the kernel model. This will allow to
disentangle PIC and IOAPIC pins for chipsets that support more
sophisticated IRQ routes than the PIIX3. So far the base is kept at 0,
i.e. PIC and IOAPIC share pins 0..15.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
2012-01-19 12:14:42 +01:00
Jan Kiszka 10b6188275 kvm: x86: Add user space part for in-kernel i8259
Introduce the alternative 'kvm-i8259' device model that exploits KVM
in-kernel acceleration.

The PIIX3 initialization code is furthermore extended by KVM specific
IRQ route setup. GSI injection differs in KVM mode from the user space
model. As we can dispatch ISA-range IRQs to both IOAPIC and PIC inside
the kernel, we do not need to inject them separately. This is reflected
by a KVM-specific GSI handler.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
2012-01-19 12:14:42 +01:00
Jan Kiszka 680c1c6fd7 kvm: x86: Add user space part for in-kernel APIC
This introduces the alternative APIC device which makes use of KVM's
in-kernel device model. External NMI injection via LINT1 is emulated by
checking the current state of the in-kernel APIC, only injecting a NMI
into the VCPU if LINT1 is unmasked and configured to DM_NMI.

MSI is not yet supported, so we disable this when the in-kernel model is
in use.

CC: Lai Jiangshan <laijs@cn.fujitsu.com>
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
2012-01-19 12:14:42 +01:00
Jan Kiszka 244ac3af23 ioapic: Factor out base class for KVM reuse
Split up the IOAPIC analogously to APIC and i8259. KVM will share the
IOAPICCommonState, the vmstate, reset logic and certain init parts with
the user space model.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
2012-01-19 12:14:41 +01:00
Jan Kiszka dae0168528 apic: Factor out base class for KVM reuse
The KVM in-kernel APIC model will reuse parts of the user space model
while providing the same frontend view to guest and most management
interfaces.

Factor out an APIC base class to encapsulate those parts that will be
shared by user space and KVM model. This class offers callback hooks for
init, base/tpr setting, and the external NMI delivery that will be
set via APICCommonInfo structure and implemented specifically in the
subclasses.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
2012-01-19 12:14:40 +01:00
Jan Kiszka 3b9a6ee50e kvm: Move kvmclock into hw/kvm folder
More KVM-specific devices will come, so let's start with moving the
kvmclock into a dedicated folder.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
2012-01-19 12:14:39 +01:00
Vadim Rozenfeld 28f52cc04d hyper-v: introduce Hyper-V support infrastructure.
[Jan: fix build with CONFIG_USER_ONLY]

Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2012-01-19 08:32:12 -02:00
Aurelien Jarno 14763ec873 Merge branch 's390-next' of git://repo.or.cz/qemu/agraf
* 's390-next' of git://repo.or.cz/qemu/agraf:
  s390: fix cpu hotplug / cpu activity on interrupts
  s390x: add TR function for EXECUTE
  Expose drive_add on all architectures
  Add generic drive hotplugging
  Compile device-hotplug on all targets
  [S390] Add hotplug support
2012-01-10 18:24:11 +01:00
Anthony Liguori c47f322365 Merge remote-tracking branch 'pmaydell/arm-devs.for-upstream' into staging
* pmaydell/arm-devs.for-upstream:
  add L2x0/PL310 cache controller device
  arm: add dummy gic security registers
  arm: Set frequencies for arm_timer
  arm: add missing scu registers
  hw/omap_gpmc: Fix region map/unmap when configuring prefetch engine
  hw/omap1.c: Drop unused includes
  hw/omap1.c: Separate dpll_ctl from omap_mpu_state
  hw/omap1.c: Separate PWT from omap_mpu_state
  hw/omap1.c: Separate PWL from omap_mpu_state
  hw/omap1.c: omap_mpuio_init() need not be public
  hw/pl110.c: Add post-load hook to invalidate display
  hw/pl181.c: Add save/load support
2012-01-04 10:06:25 -06:00
Rob Herring b2123a4856 add L2x0/PL310 cache controller device
This is just a dummy device for ARM L2 cache controllers, based on the
pl310. The cache type parameter can be defined by a property value
and has a meaningful default.

Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Signed-off-by: Mark Langsdorf <mark.langsdorf@calxeda.com>
[Peter Maydell: removed stray blank line at end]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-01-04 13:41:42 +00:00
Avi Kivity c5705a7728 vmstate, memory: decouple vmstate from memory API
Currently creating a memory region automatically registers it for
live migration.  This differs from other state (which is enumerated
in a VMStateDescription structure) and ties the live migration code
into the memory core.

Decouple the two by introducing a separate API, vmstate_register_ram(),
for registering a RAM block for migration.  Currently the same
implementation is reused, but later it can be moved into a separate list,
and registrations can be moved to VMStateDescription blocks.

Signed-off-by: Avi Kivity <avi@redhat.com>
2012-01-04 13:34:48 +02:00
Alexander Graf 963d83c854 Compile device-hotplug on all targets
All guest targets could potentially implement hotplugging. With the next
patches in this set I will also reflect this in the monitor interface.

So let's always compile it in. It shouldn't hurt.

Signed-off-by: Alexander Graf <agraf@suse.de>
2012-01-04 02:48:14 +01:00
Peter Maydell 7fc3574d06 Makefile.target: Remove unnecessary dependency rules
Remove some dependency rules which aren't necessary (the automatically
generated .d files cover all these). These were leftovers from dyngen
days, when the object files also had a dependency on some generated
files.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
2011-12-16 10:03:23 +00:00
Anthony Liguori 9423a2e8dd Merge remote-tracking branch 'stefanha/trivial-patches-next' into staging 2011-12-14 07:59:21 -06:00
Stefan Hajnoczi d396a657ba syborg: drop support for Symbian Virtual Platform
The Symbian Virtual Platform was an ARM-based development and debugging
board.  Since Symbian has been disbanded and the code is no longer being
used it can now be removed.

Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2011-12-12 17:06:22 -06:00
Peter Maydell b9dc07d42a hw/arm_mptimer.c: Turn ARM MPcore private timers into qdev devices
Turn the ARM MPcore private timer/watchdog blocks into separate
qdev devices. This will allow us to share them neatly between
11MPCore and A9MPcore.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2011-12-12 10:26:31 +00:00
Chen Wei-Ren 1c8a80f3b9 Makefile.target: Remove out of date comment
Remove the out of date comment, i.e., "# libqemu" since libqemu.a is not
available anymore.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Chen Wei-Ren <chenwj@iis.sinica.edu.tw>
Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
2011-12-09 10:10:19 +00:00
Blue Swirl c51d9cb5b6 Merge branch 'tci' of git://qemu.weilnetz.de/qemu
* 'tci' of git://qemu.weilnetz.de/qemu:
  tcg: Add tcg interpreter to configure / make
  tcg: Add tci disassembler
  tcg: Add interpreter for bytecode
  tcg: Add bytecode generator for tcg interpreter
  tcg: Make ARRAY_SIZE(tcg_op_defs) globally available
  tcg: TCG targets may define tcg_qemu_tb_exec
2011-11-02 20:52:13 +00:00
Blue Swirl e927dab1fd Merge branch 'ppc-next' of git://repo.or.cz/qemu/agraf
* 'ppc-next' of git://repo.or.cz/qemu/agraf: (24 commits)
  pseries: Add partial support for PCI
  ppc: Alter CPU state to mask out TCG unimplemented instructions as appropriate
  pseries: Allow writes to KVM accelerated TCE table
  KVM: PPC: Override host vmx/vsx/dfp only when information known
  ppc: Fix up usermode only builds
  pseries: Correct vmx/dfp handling in both KVM and TCG cases
  PPC: Fail configure when libfdt is not available
  ppc: Avoid decrementer related kvm exits
  PPC: Disable non-440 CPUs for ppcemb target
  PPC: Bump qemu-system-ppc to 64-bit physical address space
  pseries: Under kvm use guest cpu = host cpu by default
  ppc: Add cpu defs for POWER7 revisions 2.1 and 2.3
  ppc: First cut implementation of -cpu host
  ppc: Remove broken partial PVR matching
  pseries: Update SLOF firmware image
  pseries: Add device tree properties for VMX/VSX and DFP under kvm
  ppc: Generalize the kvmppc_get_clockfreq() function
  Set an invalid-bits mask for each SPE instructions
  pseries: Update SLOF firmware image
  pseries: Use Book3S-HV TCE acceleration capabilities
  ...
2011-11-01 20:57:01 +00:00
Stefan Weil 9195b2c2b1 tcg: Add tcg interpreter to configure / make
Signed-off-by: Stefan Weil <sw@weilnetz.de>
2011-10-31 21:52:17 +01:00
Mathieu Sonet d028d02d0c Add AACI audio playback support to the ARM Versatile/PB platform
This driver emulates the ARM AACI interface (PL041) connected to a LM4549 codec.
It enables audio playback for the Versatile/PB platform.

Limitations:
- Supports only a playback on one channel (Versatile/Vexpress)
- Supports only one TX FIFO in compact-mode or non-compact mode.
- Supports playback of 12, 16, 18 and 20 bits samples.
- Record is not supported.
- The PL041 is hardwired to a LM4549 codec.

Versatile/PB test build:
linux-2.6.38.5
buildroot-2010.11
alsa-lib-1.0.22
alsa-utils-1.0.22
mpg123-0.66

Qemu host: Ubuntu 10.04 in Vmware/OS X

Playback tested successfully with speaker-test/aplay/mpg123.

Signed-off-by: Mathieu Sonet <contact@elasticsheep.com>
[Peter Maydell: fixed typo in code clearing SL1RXBUSY/SL2RXBUSY
 bits, as spotted by Andrzej Zaborowski]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Andrzej Zaborowski <andrew.zaborowski@intel.com>
2011-10-31 05:40:22 +01:00
David Gibson 3384f95c59 pseries: Add partial support for PCI
This patch adds a PCI bus to the pseries machine.  This instantiates
the qemu generic PCI bus code, advertises a PCI host bridge in the
guest's device tree and implements the RTAS methods specified by PAPR
to access PCI config space.  It also sets up the memory regions we
need to provide windows into the PCI memory and IO space, and
advertises those to the guest.

However, because qemu can't yet emulate an IOMMU, which is mandatory on
pseries, PCI devices which use DMA (i.e. most of them) will not work with
this code alone.  Still, this is enough to support the virtio_pci device
(which probably _should_ use emulated PCI DMA, but is specced to use
direct hypervisor access to guest physical memory instead).

[agraf] remove typedef which could cause compile errors

Signed-off-by: Alexey Kardashevskiy <aik@au1.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Alexander Graf <agraf@suse.de>
2011-10-31 04:53:01 +01:00
Blue Swirl fafd8bceb5 Sparc: split load and store op helpers
Move load and store op helpers top ldst_helper.c.

Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-10-26 17:19:20 +00:00
Blue Swirl 163fa5ca51 Sparc: split MMU helpers
Move MMU helpers to mmu_helper.c.

Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-10-26 17:18:55 +00:00
Blue Swirl 063c367558 Sparc: avoid AREG0 for CWP and PSTATE helpers
Make CWP and PSTATE helpers take a parameter for CPUState instead
of relying on global env. Remove wrapper functions.

Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-10-26 17:18:04 +00:00
Blue Swirl 070af38404 Sparc: split CWP and PSTATE op helpers
Move CWP and PSTATE op helpers to win_helper.c.

Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-10-23 15:10:18 +00:00
Blue Swirl 2ffd9176b1 Sparc: avoid AREG0 for lazy condition code helpers
Make lazy condition code helpers take a parameter for CPUState instead
of relying on global env.

Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-10-23 15:09:37 +00:00
Blue Swirl cffc581873 Sparc: split lazy condition code handling op helpers
Move lazy condition code handling op helpers to cc_helper.c.

Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-10-23 15:09:28 +00:00
Blue Swirl 2e2f4ade86 Sparc: avoid AREG0 for float and VIS ops
Make floating point and VIS ops take a parameter for CPUState instead
of relying on global env.

Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-10-23 15:09:13 +00:00
Blue Swirl 1bccec25e1 Sparc: split FPU and VIS op helpers
Move FPU op helpers to fop_helper.c. Move VIS op helpers to vis_helper.c,
compile it only for Sparc64.

Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-10-23 15:08:56 +00:00
Blue Swirl ab3b491f21 Sparc: split helper.c
Move CPU init to cpu_init.c and interrupt handling to int32_helper.c
for Sparc32 and int64_helper.c for Sparc64.

Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-10-23 15:07:52 +00:00
Jan Kiszka cfce6d8934 i8259: Move to hw library
No target-specific bits remaining, let's move it over.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-10-16 11:11:56 +00:00
Max Filippov 0200db650e target-xtensa: add Avnet LX60/LX110/LX200 boards
These boards carry similar hardware: SDRAM (48M for LX110, 64M for LX60,
96M for LX200), 16 Mbyte FLASH, FPGA, 10/100 Mbps Ethernet PHY and 16550
UART. FPGA may be loaded with almost any Tensilica processor. It is also
used to implement Ethernet MAC, e.g. OpenCores 10/100 Mbps Ethernet MAC
and LED/DIP switches access.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-10-16 10:42:21 +00:00
Max Filippov 5e40857374 target-xtensa: rename dc232b board to sim
This is to get aligned with the linux name for this machine.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-10-16 10:40:23 +00:00
Max Filippov 935f7a2b42 target-xtensa: add fsf core
This is FSF big endian core implemented through linux overlay.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-10-16 10:40:16 +00:00
Max Filippov 53add759be target-xtensa: add dc232b core
This is Diamond 232L Standard Core Rev.B (LE), implemented through
linux/gdb overlay.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-10-16 10:40:02 +00:00
Max Filippov 63f95e4c65 target-xtensa: remove hand-written xtensa cores implementations
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-10-16 10:39:36 +00:00
Anthony Liguori 36f490b176 Merge remote-tracking branch 'qemu-kvm-tmp/memory/batch' into staging 2011-10-14 10:44:52 -05:00
Avi Kivity 6bf9fd43cf Introduce PortioList
Add a type and methods for manipulating a list of disjoint I/O ports,
used in some older hardware devices.

Based on original patch by Richard Henderson.

Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Avi Kivity <avi@redhat.com>
2011-10-11 15:57:07 +02:00
Anthony Liguori ebffe2afce Merge remote-tracking branch 'qmp/queue/qmp' into staging 2011-10-10 08:21:46 -05:00
Richard Henderson 80bb2ff770 target-alpha: Add CLIPPER emulation.
This is a DP264 variant, SMP capable, no unusual hardware present.

The emulation does not currently include any PCI IOMMU code.
Hopefully the generic support for that can be merged to HEAD soon.

Signed-off-by: Richard Henderson <rth@twiddle.net>
2011-10-08 08:49:09 -07:00
Fabien Chouteau ddd1055b07 PPC: booke timers
While working on the emulation of the freescale p2010 (e500v2) I realized that
there's no implementation of booke's timers features. Currently mpc8544 uses
ppc_emb (ppc_emb_timers_init) which is close but not exactly like booke (for
example booke uses different SPR).

Signed-off-by: Fabien Chouteau <chouteau@adacore.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2011-10-06 09:48:09 +02:00
Alexander Graf 0a6b8dde65 PPC: Add new target config for pseries
We only support -M pseries when certain prerequisites are met, such
as a PPC64 guest and libfdt. To only gather these requirements in
a single place, this patch introduces a new CONFIG_PSERIES variable
that gets set when all prerequisites are met.

Signed-off-by: Alexander Graf <agraf@suse.de>
2011-10-06 09:48:02 +02:00
Alexander Graf 5c145dacac PPC: E500: Add PV spinning code
CPUs that are not the boot CPU need to run in spinning code to check if they
should run off to execute and if so where to jump to. This usually happens
by leaving secondary CPUs looping and checking if some variable in memory
changed.

In an environment like Qemu however we can be more clever. We can just export
the spin table the primary CPU modifies as MMIO region that would event based
wake up the respective secondary CPUs. That saves us quite some cycles while
the secondary CPUs are not up yet.

So this patch adds a PV device that simply exports the spinning table into the
guest and thus allows the primary CPU to wake up secondary ones.

Signed-off-by: Alexander Graf <agraf@suse.de>

---

v1 -> v2:

  - change into MMIO scheme
  - map the secondary NIP instead of 0 1:1
  - only map 64MB for TLB, same as u-boot
  - prepare code for 64-bit spinnings

v2 -> v3:

  - remove r6
  - set MAS2_M
  - map EA 0
  - use second TLB1 entry

v3 -> v4:

  - change to memoryops

v4 -> v5:

  - fix endianness bugs

v5 -> v6:

  - add header
2011-10-06 09:47:52 +02:00
Alexander Graf d751dfb313 PPC: Move openpic to target specific code compilation
The MPIC has some funny feature where it maps different registers to an MMIO
region depending which CPU accesses them.

To be able to reflect that, we need to make OpenPIC be compiled in the target
code, so it can access cpu_single_env.

Signed-off-by: Alexander Graf <agraf@suse.de>
2011-10-06 09:43:32 +02:00
Anthony Liguori e3193601c8 qapi: use middle mode in QMP server
Use the new middle mode within the existing QMP server.

Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Signed-off-by: Luiz Capitulino <lcapitulino@redhat.com>
2011-10-04 11:00:46 -03:00