Richard Henderson
af9e5a04ea
target-s390: Convert MVC
...
The code that was in gen_op_mvc was a bit confused wrt what lengths
it wanted to handle. I also disbelieve that the inline memset is
worthwhile.
Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-01-05 12:18:39 -08:00
Richard Henderson
eb66e6a969
target-s390: Convert CLCLE, MVCLE
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Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-01-05 12:18:39 -08:00
Richard Henderson
7df3e93aa9
target-s390: Convert LAM, STAM
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Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-01-05 12:18:39 -08:00
Richard Henderson
145cdb4019
target-s390: Convert STNSM, STOSM
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Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-01-05 12:18:39 -08:00
Richard Henderson
a05d2b6b83
target-s390: Convert NI, XI, OI
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Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-01-05 12:18:39 -08:00
Richard Henderson
6a04d76a81
target-s390: Convert MOVE
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Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-01-05 12:18:39 -08:00
Richard Henderson
77f8d6c3ed
target-s390: Convert LOAD, STORE MULTIPLE
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Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-01-05 12:18:39 -08:00
Richard Henderson
a79ba3398a
target-s390: Convert SHIFT DOUBLE
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Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-01-05 12:18:38 -08:00
Richard Henderson
cbe24bfa91
target-s390: Convert SHIFT, ROTATE SINGLE
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Note that we were missing the 32-bit SLA.
Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-01-05 12:18:38 -08:00
Richard Henderson
972e35b966
target-s390: Convert DIAGNOSE
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Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-01-05 12:18:38 -08:00
Richard Henderson
8b5ff57115
target-s390: Convert LOAD PSW
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Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-01-05 12:18:38 -08:00
Richard Henderson
7d30bb73db
target-s390: Convert SET SYSTEM MASK
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Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-01-05 12:18:38 -08:00
Richard Henderson
c49daa51a8
target-s390: Convert CONVERT TO DECIMAL
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Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-01-05 12:18:38 -08:00
Richard Henderson
00574261e1
target-s390: Convert FP STORE
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Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-01-05 12:18:38 -08:00
Richard Henderson
6e764e97ca
target-s390: Convert EXECUTE
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Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-01-05 12:18:38 -08:00
Richard Henderson
58a9e35bcc
target-s390: Convert INSERT CHARACTERS UNDER MASK
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Change the CC handling to be more like TEST UNDER MASK, with val & mask.
This lets us handle ICMH much more like ICM.
Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-01-05 12:18:38 -08:00
Richard Henderson
443aaeb899
target-s390: Cleanup cc computation helpers
...
The inline markers hid the fact that {n}abs_32 were unused
because of typos in the main do_calc_cc function. Let the
compiler handle auto-inlining here.
Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-01-05 12:18:38 -08:00
Richard Henderson
afdc70bea0
target-s390: Convert INSERT CHARACTER
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Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-01-05 12:18:38 -08:00
Richard Henderson
d764a8d12b
target-s390: Convert FP LOAD
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Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-01-05 12:18:38 -08:00
Richard Henderson
e1eaada955
target-s390: Convert MOVE LONG
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Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-01-05 12:18:37 -08:00
Richard Henderson
b9836c1acd
target-s390: Convert SUPERVISOR CALL
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Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-01-05 12:18:37 -08:00
Richard Henderson
d9a3992799
target-s390: Convert SET ADDRESSING MODE
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Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-01-05 12:18:37 -08:00
Richard Henderson
00d2dc192f
target-s390: Convert TEST UNDER MASK
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Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-01-05 12:18:37 -08:00
Richard Henderson
b4e2bd3563
target-s390: Send signals for divide
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Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-01-05 12:18:37 -08:00
Richard Henderson
891452e5e2
target-s390: Convert DIVIDE
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Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-01-05 12:00:29 -08:00
Richard Henderson
c61aad6943
target-s390: Convert BRANCH ON COUNT
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Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-01-05 12:00:29 -08:00
Richard Henderson
7233f2ed17
target-s390: Convert BRANCH ON CONDITION
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Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-01-05 12:00:29 -08:00
Richard Henderson
8ac33cdb8b
target-s390: Convert BRANCH AND SAVE
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Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-01-05 12:00:29 -08:00
Richard Henderson
4e4bb43899
target-s390: Convert ADD LOGICAL CARRY and SUBTRACT LOGICAL BORROW
...
I'm resonably certain that the carry/borrow-out condition for both
helpers was incorrect, failing to take into account the carry-in.
Adding the new CC_OP codes also allows removing the awkward interface
we used for the slb helpers.
Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-01-05 12:00:29 -08:00
Richard Henderson
2b280b9708
target-s390: Convert STORE
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Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-01-05 12:00:28 -08:00
Richard Henderson
facfc86487
target-s390: Convert AND, OR, XOR, INSERT IMMEDIATE
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Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-01-05 12:00:28 -08:00
Richard Henderson
b9bca3e57a
target-s390: Convert LOAD COMPLIMENT, POSITIVE, NEGATIVE
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Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-01-05 12:00:28 -08:00
Richard Henderson
ade9dea429
target-s390: Convert LOAD LOGICAL IMMEDIATE
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Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-01-05 12:00:28 -08:00
Richard Henderson
11bf2d73d0
target-s390: Convert LOAD AND TEST
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Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-01-05 12:00:28 -08:00
Richard Henderson
c698d87687
target-s390: Convert LOAD (LOGICAL) BYTE, CHARACTER, HALFWORD
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Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-01-05 12:00:28 -08:00
Richard Henderson
aedec19d62
target-s390: Convert LOAD ADDRESS
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Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-01-05 12:00:28 -08:00
Richard Henderson
22c37a08bd
target-s390: Convert LOAD, LOAD LOGICAL
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Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-01-05 12:00:28 -08:00
Richard Henderson
a7e836d5eb
target-s390: Convert COMPARE, COMPARE LOGICAL
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Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-01-05 12:00:28 -08:00
Richard Henderson
3bbfbd1f95
target-s390: Convert AND, OR, XOR
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Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-01-05 12:00:28 -08:00
Richard Henderson
1ac5889f48
target-s390: Convert 64-bit MULTIPLY LOGICAL
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Use a new "retxl" member of CPUS290XState to return the "eXtra Low" part
of a 128-bit value. That said, this will get used when two independent
values need returning (e.g. quotient+remainder) as well.
At the same time, shuffle the elements of CPUS390XState to get this new
space from existing padding in the structure.
Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-01-05 12:00:28 -08:00
Richard Henderson
d87aaf934f
target-s390: Convert 32-bit MULTIPLY, MULTIPLY LOGICAL
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Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-01-05 12:00:28 -08:00
Richard Henderson
d1c04a2ba0
target-s390: Convert MULTIPLY HALFWORD, SINGLE
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Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-01-05 12:00:28 -08:00
Richard Henderson
e272b3ace3
target-s390: Implement ADD LOGICAL WITH SIGNED IMMEDIATE
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Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-01-05 12:00:28 -08:00
Richard Henderson
3f4cb56a43
target-s390: Implement SUBTRACT HALFWORD
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Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-01-05 12:00:28 -08:00
Richard Henderson
d82287dee9
target-s390: Convert ADD HALFWORD
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Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-01-05 12:00:28 -08:00
Richard Henderson
d5a103cd6e
target-s390: Reorg exception handling
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Make the user path more like the system path. Prepare for more kinds
of runtime exceptions. Rename ILC to ILEN to make it clear that we
want to pass around a full instruction length, rather than a "code"
that happens to be stored one bit left in a larger field.
Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-01-05 12:00:28 -08:00
Richard Henderson
3fde06f5fb
target-s390: Split out disas_jcc
...
Lots of duplicated code replaced with a couple of tables. We no longer
attempt to manually invert the logic operation: the comments now match
the code. In the fully general test, constant propagate (1 << (3 - cc))
into (8 >> cc).
The new function will be usable by non-branch insns as well.
Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-01-05 12:00:27 -08:00
Richard Henderson
ad044d09de
target-s390: Add format based disassassmbly infrastructure
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Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-01-05 12:00:27 -08:00
Richard Henderson
51855ecf1a
target-s390: Fix PSW_MASK handling
...
We were treating psw.mask as the 32-bit quantity it is in ESA mode.
In particular, the CC field was at the wrong place.
Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-01-05 12:00:27 -08:00
Richard Henderson
2f22e2ec79
target-s390: Tidy unconditional BRCL
...
Yes, we're about to rewrite all of this, but having this unconditional
jump recompute cc_op is a large source of "false diff errors" when
trying to examine before and after dumps.
Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-01-05 12:00:27 -08:00