Commit Graph

95783 Commits

Author SHA1 Message Date
Max Filippov 703cebcfac tests/tcg/xtensa: enable autorefill phys_mem tests for MMUv3
Autorefill tests in the phys_mem test suite are disabled for cores that
have spanning TLB way, i.e. for all MMUv3 cores. Instead of disabling it
invalidate TLB mappings for entries that conflict with the test.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2022-05-06 15:27:40 -07:00
Max Filippov e120c8335d tests/tcg/xtensa: remove dependency on the loop option
xtensa core may not have the loop option, but still have timers. Don't
use loop opcode in the timer test.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2022-05-06 15:27:40 -07:00
Max Filippov 64407f6a9e tests/tcg/xtensa: fix watchpoint test
xtensa core may have only one set of DBREAKA/DBREAKC registers. Don't
hardcode register numbers in the test as 0 and 1, use macros that only
index valid DBREAK* registers.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2022-05-06 15:27:40 -07:00
Max Filippov 8164f14bb9 tests/tcg/xtensa: restore vecbase SR after test
Writing garbage into the vecbase SR results in hang in the subsequent
tests that expect to raise an exception. Restore vecbase SR to its
reset value after the test.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2022-05-06 15:27:40 -07:00
Max Filippov b9400b1fba tests/tcg/xtensa: fix build for cores without windowed registers
Don't try to initialize windowbase/windowstart in crt.S if they don't
exist.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2022-05-06 15:27:40 -07:00
Max Filippov c6f3f334d1 hw/xtensa: fix reset value of MIROUT register of MX PIC
MX PIC comes out of reset with IRQ routing registers set to 0, thus
not delivering any external IRQ to any connected CPU by default.
Fix the model to match the hardware.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2022-05-06 15:27:40 -07:00
Max Filippov 9e377be1f0 target/xtensa: add clock input to xtensa CPU
Create clock input for the xtensa CPU device and initialize its
frequency to the default core frequency specified in the config.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2022-05-06 15:27:40 -07:00
Simon Safar 8c48e36548 target/xtensa: import core lx106
This is the core used in e.g. ESP8266 chips. Importing them
using import_core.sh, with the required files sourced from

https://github.com/espressif/xtensa-overlays

core-lx106.c was generated by the script; the only change is removing
the reference to core-matmap.h which doesn't seem to be available.

Signed-off-by: Simon Safar <simon@simonsafar.com>
Reviewed-by: Max Filippov <jcmvbkbc@gmail.com>
Message-Id: <20220423040835.29254-1-simon@simonsafar.com>
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2022-05-06 15:27:40 -07:00
Max Filippov 6ade0ce972 target/xtensa: use tcg_constant_* for remaining opcodes
- gen_jumpi passes target PC to the helper;
- gen_callw_slot uses callinc (1..3);
- gen_brcondi passes immediate field (less than 32 different possible
  values) to the helper;
- disas_xtensa_insn passes PC to the helpers;
- translate_entry passes PC, stack register number (0..15) and stack
  frame size to the helper;
- gen_check_exclusive passes PC and boolean flag to the helper;
- test_exceptions_retw passes PC to the helper;
- gen_check_atomctl passes PC to the helper;
- translate_ssai passes immediate shift amount (0..31) to the helper;
- gen_waiti passes next PC and an immediate (0..15) to the helper;

use tcg_constant_* for the constants listed above. Fold gen_waiti body
into the translate_waiti as it's the only user.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2022-05-06 15:27:40 -07:00
Max Filippov 867e354cbd target/xtensa: use tcg_constant_* for FPU conversion opcodes
FPU conversion opcodes pass scale (range 0..15) and rounding mode to
their helpers. Use tcg_constant_* for them.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2022-05-06 15:27:40 -07:00
Max Filippov dad266a1e3 target/xtensa: use tcg_constant_* for numbered special registers
Numbered special registers are small arrays of consecutive SRs. Use
tcg_constant_* for the SR index.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2022-05-06 15:27:40 -07:00
Max Filippov 4ee412df69 target/xtensa: use tcg_constant_* for TLB opcodes
dtlb is a boolean flag, use tcg_constant_* for it.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2022-05-06 15:27:40 -07:00
Max Filippov f99fbd125b target/xtensa: use tcg_constant_* for exceptions
Use tcg_contant_* for exception number, exception cause, debug cause
code and exception PC.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2022-05-06 15:27:40 -07:00
Max Filippov 2b570a178a target/xtensa: use tcg_contatnt_* for numeric literals
Replace tcg_const_* for numeric literals with tcg_constant_*.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2022-05-06 15:27:40 -07:00
Max Filippov 0269a6cf4e target/xtensa: fix missing tcg_temp_free in gen_window_check
pc and w are allocated with tcg_const_i32 but not freed in
gen_window_check. Use tcg_constant_i32 for them both.

Fixes: 2db59a76c4 ("target-xtensa: record available window in TB flags")
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2022-05-06 15:27:40 -07:00
Richard Henderson 13220a46e2 VFIO updates 2022-05-06
* Defer IRQ routing commits to improve setup and resume latency (Longpeng)
 
  * Fix trace sparse mmap boundary condition (Xiang Chen)
 
  * Quiet misalignment warning from TPM device mapping (Eric Auger)
 
  * Misc cleanups (Yi Liu, Eric Auger)
 -----BEGIN PGP SIGNATURE-----
 
 iQJPBAABCAA5FiEEQvbATlQL0amee4qQI5ubbjuwiyIFAmJ1hm8bHGFsZXgud2ls
 bGlhbXNvbkByZWRoYXQuY29tAAoJECObm247sIsi8cIP+wfOMh9YLAm6NC70Gd9q
 7Z6Z3ql/5SYUF8AmsLZf3UPa1+bVQ4TcsjqN5tiaCx36iDXF39jkHM/w9Cd4sPuB
 7ETmWndj6FwOI9PNpFmVoUrpONyLI3VuCNZqwhV1mlmTEnmCsE1PAvjjjPz51HDd
 +dnkIJsjoKqpzja9zotQnpWtx7O4iKGGAUx3oi4BbF47sG2az2GQnI/5L/Zj8dBO
 G3h+FCavSO6ODmIxX865ndZifN3BV1asazNDjFp7beUNFVrNCpzZkIkFGzhtx8yS
 npxw/27m2s/O+dJZIlWPMCH0H0ItIHpqntBziMopxCG3ELsnhJjAccg5aWi2okXM
 M0rmNu+BH9WKPJoqy8u89gZvebyhvtTuMQ1gDzZWkEe80LLfoB9Re/qvMuw2LBnv
 BSu8hUHCoX3Whnc7PoP11Y97uBW/uaH/LTagrqzIJIBWSniUCZaZUep6Ihg1wFFQ
 oTNKKiaer/jtzmCTFtGKC7dj/gGuKNvAO8l/yqWj3k7ssstllaOLOzjDmoD5bmZD
 jVaaAedOhFme5sGtgqcmFmNXA+r01PoKmopkHku74meCk+RCxV4i8xkVZGlREHpS
 YB7CsA8B8jcLQS9QfguFWreImhstaC0fOKRDXDGMGm9ikPThdtIE5oWt2c4fKz5Y
 Hi6FjfEsDoZNLs64lc4cyMEq
 =ShHn
 -----END PGP SIGNATURE-----

Merge tag 'vfio-updates-20220506.1' of https://gitlab.com/alex.williamson/qemu into staging

VFIO updates 2022-05-06

 * Defer IRQ routing commits to improve setup and resume latency (Longpeng)

 * Fix trace sparse mmap boundary condition (Xiang Chen)

 * Quiet misalignment warning from TPM device mapping (Eric Auger)

 * Misc cleanups (Yi Liu, Eric Auger)

# -----BEGIN PGP SIGNATURE-----
#
# iQJPBAABCAA5FiEEQvbATlQL0amee4qQI5ubbjuwiyIFAmJ1hm8bHGFsZXgud2ls
# bGlhbXNvbkByZWRoYXQuY29tAAoJECObm247sIsi8cIP+wfOMh9YLAm6NC70Gd9q
# 7Z6Z3ql/5SYUF8AmsLZf3UPa1+bVQ4TcsjqN5tiaCx36iDXF39jkHM/w9Cd4sPuB
# 7ETmWndj6FwOI9PNpFmVoUrpONyLI3VuCNZqwhV1mlmTEnmCsE1PAvjjjPz51HDd
# +dnkIJsjoKqpzja9zotQnpWtx7O4iKGGAUx3oi4BbF47sG2az2GQnI/5L/Zj8dBO
# G3h+FCavSO6ODmIxX865ndZifN3BV1asazNDjFp7beUNFVrNCpzZkIkFGzhtx8yS
# npxw/27m2s/O+dJZIlWPMCH0H0ItIHpqntBziMopxCG3ELsnhJjAccg5aWi2okXM
# M0rmNu+BH9WKPJoqy8u89gZvebyhvtTuMQ1gDzZWkEe80LLfoB9Re/qvMuw2LBnv
# BSu8hUHCoX3Whnc7PoP11Y97uBW/uaH/LTagrqzIJIBWSniUCZaZUep6Ihg1wFFQ
# oTNKKiaer/jtzmCTFtGKC7dj/gGuKNvAO8l/yqWj3k7ssstllaOLOzjDmoD5bmZD
# jVaaAedOhFme5sGtgqcmFmNXA+r01PoKmopkHku74meCk+RCxV4i8xkVZGlREHpS
# YB7CsA8B8jcLQS9QfguFWreImhstaC0fOKRDXDGMGm9ikPThdtIE5oWt2c4fKz5Y
# Hi6FjfEsDoZNLs64lc4cyMEq
# =ShHn
# -----END PGP SIGNATURE-----
# gpg: Signature made Fri 06 May 2022 03:34:55 PM CDT
# gpg:                using RSA key 42F6C04E540BD1A99E7B8A90239B9B6E3BB08B22
# gpg:                issuer "alex.williamson@redhat.com"
# gpg: Good signature from "Alex Williamson <alex.williamson@redhat.com>" [undefined]
# gpg:                 aka "Alex Williamson <alex@shazbot.org>" [undefined]
# gpg:                 aka "Alex Williamson <alwillia@redhat.com>" [undefined]
# gpg:                 aka "Alex Williamson <alex.l.williamson@gmail.com>" [undefined]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 42F6 C04E 540B D1A9 9E7B  8A90 239B 9B6E 3BB0 8B22

* tag 'vfio-updates-20220506.1' of https://gitlab.com/alex.williamson/qemu:
  vfio/common: Rename VFIOGuestIOMMU::iommu into ::iommu_mr
  vfio/pci: Use vbasedev local variable in vfio_realize()
  hw/vfio/pci: fix vfio_pci_hot_reset_result trace point
  vfio/common: remove spurious tpm-crb-cmd misalignment warning
  sysemu: tpm: Add a stub function for TPM_IS_CRB
  vfio/common: Fix a small boundary issue of a trace
  vfio: defer to commit kvm irq routing when enable msi/msix
  Revert "vfio: Avoid disabling and enabling vectors repeatedly in VFIO migration"
  vfio: simplify the failure path in vfio_msi_enable
  vfio: move re-enabling INTX out of the common helper
  vfio: simplify the conditional statements in vfio_msi_enable

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-05-06 16:18:14 -05:00
Yi Liu 44ee6aaae0 vfio/common: Rename VFIOGuestIOMMU::iommu into ::iommu_mr
Rename VFIOGuestIOMMU iommu field into iommu_mr. Then it becomes clearer
it is an IOMMU memory region.

no functional change intended

Signed-off-by: Yi Liu <yi.l.liu@intel.com>
Link: https://lore.kernel.org/r/20220502094223.36384-4-yi.l.liu@intel.com
Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
2022-05-06 09:06:51 -06:00
Eric Auger 0d570a2572 vfio/pci: Use vbasedev local variable in vfio_realize()
Using a VFIODevice handle local variable to improve the code readability.

no functional change intended

Signed-off-by: Eric Auger <eric.auger@redhat.com>
Signed-off-by: Yi Liu <yi.l.liu@intel.com>
Link: https://lore.kernel.org/r/20220502094223.36384-3-yi.l.liu@intel.com
Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
2022-05-06 09:06:50 -06:00
Eric Auger 9d38ffc5d8 hw/vfio/pci: fix vfio_pci_hot_reset_result trace point
"%m" format specifier is not interpreted by the trace infrastructure
and thus "%m" is output instead of the actual errno string. Fix it by
outputting strerror(errno).

Signed-off-by: Eric Auger <eric.auger@redhat.com>
Signed-off-by: Yi Liu <yi.l.liu@intel.com>
Link: https://lore.kernel.org/r/20220502094223.36384-2-yi.l.liu@intel.com
[aw: replace commit log as provided by Eric]
Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
2022-05-06 09:06:50 -06:00
Eric Auger 851d6d1a0f vfio/common: remove spurious tpm-crb-cmd misalignment warning
The CRB command buffer currently is a RAM MemoryRegion and given
its base address alignment, it causes an error report on
vfio_listener_region_add(). This region could have been a RAM device
region, easing the detection of such safe situation but this option
was not well received. So let's add a helper function that uses the
memory region owner type to detect the situation is safe wrt
the assignment. Other device types can be checked here if such kind
of problem occurs again.

Signed-off-by: Eric Auger <eric.auger@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Acked-by: Stefan Berger <stefanb@linux.ibm.com>
Reviewed-by: Cornelia Huck <cohuck@redhat.com>
Link: https://lore.kernel.org/r/20220506132510.1847942-3-eric.auger@redhat.com
Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
2022-05-06 09:06:50 -06:00
Eric Auger 4168cdad39 sysemu: tpm: Add a stub function for TPM_IS_CRB
In a subsequent patch, VFIO will need to recognize if
a memory region owner is a TPM CRB device. Hence VFIO
needs to use TPM_IS_CRB() even if CONFIG_TPM is unset. So
let's add a stub function.

Signed-off-by: Eric Auger <eric.auger@redhat.com>
Suggested-by: Cornelia Huck <cohuck@redhat.com>
Reviewed-by: Stefan Berger <stefanb@linnux.ibm.com>
Link: https://lore.kernel.org/r/20220506132510.1847942-2-eric.auger@redhat.com
Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
2022-05-06 09:06:50 -06:00
Xiang Chen 99510d271b vfio/common: Fix a small boundary issue of a trace
It uses [offset, offset + size - 1] to indicate that the length of range is
size in most places in vfio trace code (such as
trace_vfio_region_region_mmap()) execpt trace_vfio_region_sparse_mmap_entry().
So change it for trace_vfio_region_sparse_mmap_entry(), but if size is zero,
the trace will be weird with an underflow, so move the trace and trace it
only if size is not zero.

Signed-off-by: Xiang Chen <chenxiang66@hisilicon.com>
Link: https://lore.kernel.org/r/1650100104-130737-1-git-send-email-chenxiang66@hisilicon.com
Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
2022-05-06 09:06:50 -06:00
Longpeng(Mike) dc580d51f7 vfio: defer to commit kvm irq routing when enable msi/msix
In migration resume phase, all unmasked msix vectors need to be
setup when loading the VF state. However, the setup operation would
take longer if the VM has more VFs and each VF has more unmasked
vectors.

The hot spot is kvm_irqchip_commit_routes, it'll scan and update
all irqfds that are already assigned each invocation, so more
vectors means need more time to process them.

vfio_pci_load_config
  vfio_msix_enable
    msix_set_vector_notifiers
      for (vector = 0; vector < dev->msix_entries_nr; vector++) {
        vfio_msix_vector_do_use
          vfio_add_kvm_msi_virq
            kvm_irqchip_commit_routes <-- expensive
      }

We can reduce the cost by only committing once outside the loop.
The routes are cached in kvm_state, we commit them first and then
bind irqfd for each vector.

The test VM has 128 vcpus and 8 VF (each one has 65 vectors),
we measure the cost of the vfio_msix_enable for each VF, and
we can see 90+% costs can be reduce.

VF      Count of irqfds[*]  Original        With this patch

1st           65            8               2
2nd           130           15              2
3rd           195           22              2
4th           260           24              3
5th           325           36              2
6th           390           44              3
7th           455           51              3
8th           520           58              4
Total                       258ms           21ms

[*] Count of irqfds
How many irqfds that already assigned and need to process in this
round.

The optimization can be applied to msi type too.

Signed-off-by: Longpeng(Mike) <longpeng2@huawei.com>
Link: https://lore.kernel.org/r/20220326060226.1892-6-longpeng2@huawei.com
Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
2022-05-06 09:06:50 -06:00
Longpeng(Mike) 75d546fc18 Revert "vfio: Avoid disabling and enabling vectors repeatedly in VFIO migration"
Commit ecebe53fe9 ("vfio: Avoid disabling and enabling vectors
repeatedly in VFIO migration") avoids inefficiently disabling and
enabling vectors repeatedly and lets the unmasked vectors be enabled
one by one.

But we want to batch multiple routes and defer the commit, and only
commit once outside the loop of setting vector notifiers, so we
cannot enable the vectors one by one in the loop now.

Revert that commit and we will take another way in the next patch,
it can not only avoid disabling/enabling vectors repeatedly, but
also satisfy our requirement of defer to commit.

Signed-off-by: Longpeng(Mike) <longpeng2@huawei.com>
Link: https://lore.kernel.org/r/20220326060226.1892-5-longpeng2@huawei.com
Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
2022-05-06 09:06:50 -06:00
Longpeng(Mike) 8ab217d5d3 vfio: simplify the failure path in vfio_msi_enable
Use vfio_msi_disable_common to simplify the error handling
in vfio_msi_enable.

Signed-off-by: Longpeng(Mike) <longpeng2@huawei.com>
Link: https://lore.kernel.org/r/20220326060226.1892-4-longpeng2@huawei.com
Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
2022-05-06 09:06:50 -06:00
Longpeng(Mike) be4a46eccf vfio: move re-enabling INTX out of the common helper
Move re-enabling INTX out, and the callers should decide to
re-enable it or not.

Signed-off-by: Longpeng(Mike) <longpeng2@huawei.com>
Link: https://lore.kernel.org/r/20220326060226.1892-3-longpeng2@huawei.com
Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
2022-05-06 09:06:50 -06:00
Longpeng(Mike) a6f5770fb2 vfio: simplify the conditional statements in vfio_msi_enable
It's unnecessary to test against the specific return value of
VFIO_DEVICE_SET_IRQS, since any positive return is an error
indicating the number of vectors we should retry with.

Signed-off-by: Longpeng(Mike) <longpeng2@huawei.com>
Link: https://lore.kernel.org/r/20220326060226.1892-2-longpeng2@huawei.com
Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
2022-05-06 09:06:50 -06:00
Richard Henderson 31abf61c49 ppc patch queue for 2022-05-05:
The star of the show in this PR is the 'Remove hidden usages of *env'
 work done by Víctor, which impacts a lot of target/ppc code and we want
 to get it landed ASAP so future target/ppc contributions can be based on
 it.
 
 Other changes:
 
 - XIVE fixes in guest interrupt handling
 - BookE debug interrupt fix
 - vhost-user TARGET_PPC64 macro fix
 - valgrind fixes in kvmppc functions
 -----BEGIN PGP SIGNATURE-----
 
 iHUEABYKAB0WIQQX6/+ZI9AYAK8oOBk82cqW3gMxZAUCYnQbpgAKCRA82cqW3gMx
 ZM1ZAQChjU/oBVDlhrlfInGjOcdXlM4l0R0pDQZ6dm1NYVqcvgD/WRNWj+tQ2H1V
 xmKXSzrGlDyYFu1uozfU8kvYJeHaKgw=
 =eRrg
 -----END PGP SIGNATURE-----

Merge tag 'pull-ppc-20220505' of https://gitlab.com/danielhb/qemu into staging

ppc patch queue for 2022-05-05:

The star of the show in this PR is the 'Remove hidden usages of *env'
work done by Víctor, which impacts a lot of target/ppc code and we want
to get it landed ASAP so future target/ppc contributions can be based on
it.

Other changes:

- XIVE fixes in guest interrupt handling
- BookE debug interrupt fix
- vhost-user TARGET_PPC64 macro fix
- valgrind fixes in kvmppc functions

# -----BEGIN PGP SIGNATURE-----
#
# iHUEABYKAB0WIQQX6/+ZI9AYAK8oOBk82cqW3gMxZAUCYnQbpgAKCRA82cqW3gMx
# ZM1ZAQChjU/oBVDlhrlfInGjOcdXlM4l0R0pDQZ6dm1NYVqcvgD/WRNWj+tQ2H1V
# xmKXSzrGlDyYFu1uozfU8kvYJeHaKgw=
# =eRrg
# -----END PGP SIGNATURE-----
# gpg: Signature made Thu 05 May 2022 01:47:02 PM CDT
# gpg:                using EDDSA key 17EBFF9923D01800AF2838193CD9CA96DE033164
# gpg: Good signature from "Daniel Henrique Barboza <danielhb413@gmail.com>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 17EB FF99 23D0 1800 AF28  3819 3CD9 CA96 DE03 3164

* tag 'pull-ppc-20220505' of https://gitlab.com/danielhb/qemu: (30 commits)
  target/ppc: Change MSR_* to follow POWER ISA numbering convention
  target/ppc: Add unused msr bits FIELDs
  target/ppc: Remove msr_de macro
  target/ppc: Remove msr_hv macro
  target/ppc: Remove msr_ts macro
  target/ppc: Remove msr_fe0 and msr_fe1 macros
  target/ppc: Remove msr_ep macro
  target/ppc: Remove msr_dr macro
  target/ppc: Remove msr_ir macro
  target/ppc: Remove msr_cm macro
  target/ppc: Remove msr_fp macro
  target/ppc: Remove msr_gs macro
  target/ppc: Remove msr_me macro
  target/ppc: Remove msr_pow macro
  target/ppc: Remove msr_ce macro
  target/ppc: Remove msr_ee macro
  target/ppc: Remove msr_ile macro
  target/ppc: Remove msr_ds macro
  target/ppc: Remove msr_le macro
  target/ppc: Remove msr_pr macro
  ...

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-05-05 13:52:22 -05:00
Víctor Colombo bf3dd1e6d0 target/ppc: Change MSR_* to follow POWER ISA numbering convention
Today we have the issue where MSR_* values are the 'inverted order'
bit numbers from what the ISA specifies. e.g. MSR_LE is bit 63 but
is defined as 0 in QEMU.

Add a macro to be used to convert from QEMU order to ISA order.

This solution requires less changes than to use the already defined
PPC_BIT macro, which would turn MSR_* in masks instead of the numbers
itself.

Signed-off-by: Víctor Colombo <victor.colombo@eldorado.org.br>
Acked-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220504210541.115256-23-victor.colombo@eldorado.org.br>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2022-05-05 15:36:17 -03:00
Víctor Colombo 39af1384fa target/ppc: Add unused msr bits FIELDs
Add FIELDs macros for msr bits that had an unused msr_* before.

Signed-off-by: Víctor Colombo <victor.colombo@eldorado.org.br>
Acked-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220504210541.115256-22-victor.colombo@eldorado.org.br>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2022-05-05 15:36:17 -03:00
Víctor Colombo 67935ecdd9 target/ppc: Remove msr_de macro
msr_de macro hides the usage of env->msr, which is a bad
behavior. Substitute it with FIELD_EX64 calls that explicitly use
env->msr as a parameter.

Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Víctor Colombo <victor.colombo@eldorado.org.br>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220504210541.115256-21-victor.colombo@eldorado.org.br>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2022-05-05 15:36:17 -03:00
Víctor Colombo 9de754d30d target/ppc: Remove msr_hv macro
msr_hv macro hides the usage of env->msr, which is a bad
behavior. Substitute it with FIELD_EX64 calls that explicitly use
env->msr as a parameter.

Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Víctor Colombo <victor.colombo@eldorado.org.br>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220504210541.115256-20-victor.colombo@eldorado.org.br>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2022-05-05 15:36:17 -03:00
Víctor Colombo ca241959cd target/ppc: Remove msr_ts macro
msr_ts macro hides the usage of env->msr, which is a bad
behavior. Substitute it with FIELD_EX64 calls that explicitly use
env->msr as a parameter.

Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Víctor Colombo <victor.colombo@eldorado.org.br>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220504210541.115256-19-victor.colombo@eldorado.org.br>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2022-05-05 15:36:17 -03:00
Víctor Colombo da806a6c63 target/ppc: Remove msr_fe0 and msr_fe1 macros
msr_fe0 and msr_fe1 macros hide the usage of env->msr, which is a bad
behavior. Substitute it with FIELD_EX64 calls that explicitly use
env->msr as a parameter.

Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Víctor Colombo <victor.colombo@eldorado.org.br>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220504210541.115256-18-victor.colombo@eldorado.org.br>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2022-05-05 15:36:17 -03:00
Víctor Colombo 5024233091 target/ppc: Remove msr_ep macro
msr_ep macro hides the usage of env->msr, which is a bad behavior
Substitute it with FIELD_EX64 calls that explicitly use env->msr
as a parameter.

Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Víctor Colombo <victor.colombo@eldorado.org.br>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220504210541.115256-17-victor.colombo@eldorado.org.br>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2022-05-05 15:36:17 -03:00
Víctor Colombo e4eea6ef66 target/ppc: Remove msr_dr macro
msr_dr macro hides the usage of env->msr, which is a bad behavior
Substitute it with FIELD_EX64 calls that explicitly use env->msr
as a parameter.

Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Víctor Colombo <victor.colombo@eldorado.org.br>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220504210541.115256-16-victor.colombo@eldorado.org.br>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2022-05-05 15:36:17 -03:00
Víctor Colombo 4d979c9ffb target/ppc: Remove msr_ir macro
msr_ir macro hides the usage of env->msr, which is a bad behavior
Substitute it with FIELD_EX64 calls that explicitly use env->msr
as a parameter.

Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Víctor Colombo <victor.colombo@eldorado.org.br>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220504210541.115256-15-victor.colombo@eldorado.org.br>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2022-05-05 15:36:17 -03:00
Víctor Colombo cda2336027 target/ppc: Remove msr_cm macro
msr_cm macro hides the usage of env->msr, which is a bad behavior
Substitute it with FIELD_EX64 calls that explicitly use env->msr
as a parameter.

Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Víctor Colombo <victor.colombo@eldorado.org.br>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220504210541.115256-14-victor.colombo@eldorado.org.br>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2022-05-05 15:36:17 -03:00
Víctor Colombo 39695e156f target/ppc: Remove msr_fp macro
msr_fp macro hides the usage of env->msr, which is a bad behavior
Substitute it with FIELD_EX64 calls that explicitly use env->msr
as a parameter.

Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Víctor Colombo <victor.colombo@eldorado.org.br>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220504210541.115256-13-victor.colombo@eldorado.org.br>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2022-05-05 15:36:17 -03:00
Víctor Colombo 10b2b37391 target/ppc: Remove msr_gs macro
msr_gs macro hides the usage of env->msr, which is a bad behavior
Substitute it with FIELD_EX64 calls that explicitly use env->msr
as a parameter.

Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Víctor Colombo <victor.colombo@eldorado.org.br>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220504210541.115256-12-victor.colombo@eldorado.org.br>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2022-05-05 15:36:17 -03:00
Víctor Colombo c354d85828 target/ppc: Remove msr_me macro
msr_me macro hides the usage of env->msr, which is a bad behavior
Substitute it with FIELD_EX64 calls that explicitly use env->msr
as a parameter.

Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Víctor Colombo <victor.colombo@eldorado.org.br>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220504210541.115256-11-victor.colombo@eldorado.org.br>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2022-05-05 15:36:17 -03:00
Víctor Colombo 8e54ad65c2 target/ppc: Remove msr_pow macro
msr_pow macro hides the usage of env->msr, which is a bad behavior
Substitute it with FIELD_EX64 calls that explicitly use env->msr
as a parameter.

Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Víctor Colombo <victor.colombo@eldorado.org.br>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220504210541.115256-10-victor.colombo@eldorado.org.br>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2022-05-05 15:36:17 -03:00
Víctor Colombo acc861c2e9 target/ppc: Remove msr_ce macro
msr_ce macro hides the usage of env->msr, which is a bad behavior
Substitute it with FIELD_EX64 calls that explicitly use env->msr
as a parameter.

Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Víctor Colombo <victor.colombo@eldorado.org.br>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220504210541.115256-9-victor.colombo@eldorado.org.br>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2022-05-05 15:36:17 -03:00
Víctor Colombo 0939b8f8df target/ppc: Remove msr_ee macro
msr_ee macro hides the usage of env->msr, which is a bad behavior
Substitute it with FIELD_EX64 calls that explicitly use env->msr
as a parameter.

Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Víctor Colombo <victor.colombo@eldorado.org.br>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220504210541.115256-8-victor.colombo@eldorado.org.br>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2022-05-05 15:36:17 -03:00
Víctor Colombo 3868540f05 target/ppc: Remove msr_ile macro
msr_ile macro hides the usage of env->msr, which is a bad behavior
Substitute it with FIELD_EX64 calls that explicitly use env->msr
as a parameter.

Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Víctor Colombo <victor.colombo@eldorado.org.br>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220504210541.115256-7-victor.colombo@eldorado.org.br>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2022-05-05 15:36:17 -03:00
Víctor Colombo 26363616c6 target/ppc: Remove msr_ds macro
msr_ds macro hides the usage of env->msr, which is a bad behavior
Substitute it with FIELD_EX64 calls that explicitly use env->msr
as a parameter.

Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Víctor Colombo <victor.colombo@eldorado.org.br>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220504210541.115256-6-victor.colombo@eldorado.org.br>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2022-05-05 15:36:17 -03:00
Víctor Colombo 1922322ce4 target/ppc: Remove msr_le macro
msr_le macro hides the usage of env->msr, which is a bad behavior
Substitute it with FIELD_EX64 calls that explicitly use env->msr
as a parameter.

Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Víctor Colombo <victor.colombo@eldorado.org.br>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220504210541.115256-5-victor.colombo@eldorado.org.br>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2022-05-05 15:36:17 -03:00
Víctor Colombo d41ccf6eea target/ppc: Remove msr_pr macro
msr_pr macro hides the usage of env->msr, which is a bad behavior
Substitute it with FIELD_EX64 calls that explicitly use env->msr
as a parameter.

Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Víctor Colombo <victor.colombo@eldorado.org.br>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220504210541.115256-4-victor.colombo@eldorado.org.br>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2022-05-05 15:36:17 -03:00
Víctor Colombo 92984c96df target/ppc: Remove unused msr_* macros
Some msr_* macros are not used anywhere. Remove them as part of
the work to remove all hidden usage of *env.

Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Víctor Colombo <victor.colombo@eldorado.org.br>
Message-Id: <20220504210541.115256-3-victor.colombo@eldorado.org.br>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2022-05-05 15:36:17 -03:00
Víctor Colombo 208d803326 target/ppc: Remove fpscr_* macros from cpu.h
fpscr_* defined macros are hiding the usage of *env behind them.
Substitute the usage of these macros with `env->fpscr & FP_*` to make
the code cleaner.

Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Víctor Colombo <victor.colombo@eldorado.org.br>
Message-Id: <20220504210541.115256-2-victor.colombo@eldorado.org.br>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2022-05-05 15:36:17 -03:00