blueswir1
|
1ec6d2ea99
|
Use tcg_const_tl for zero constant
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4054 c046a42c-6fe2-441c-8c8c-71466251a162
|
2008-03-13 20:47:53 +00:00 |
|
blueswir1
|
dc99a3f2e8
|
Convert condition code changing versions of add, sub, logic, and div to TCG
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4052 c046a42c-6fe2-441c-8c8c-71466251a162
|
2008-03-13 20:45:31 +00:00 |
|
blueswir1
|
db4a4ea4ee
|
Use a TCG global for regwptr
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4038 c046a42c-6fe2-441c-8c8c-71466251a162
|
2008-03-11 20:59:02 +00:00 |
|
blueswir1
|
56ec06bb8e
|
Convert andn, orn and xnor to TCG
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4030 c046a42c-6fe2-441c-8c8c-71466251a162
|
2008-03-09 20:46:51 +00:00 |
|
blueswir1
|
19f329ad7b
|
Convert branches and conditional moves to TCG
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4028 c046a42c-6fe2-441c-8c8c-71466251a162
|
2008-03-08 21:36:50 +00:00 |
|
blueswir1
|
134d77a14b
|
Convert exception ops to TCG
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4022 c046a42c-6fe2-441c-8c8c-71466251a162
|
2008-03-06 20:09:54 +00:00 |
|
blueswir1
|
a3ffaf3060
|
Fix microSPARC II SFSR mask (Robert Reif)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4021 c046a42c-6fe2-441c-8c8c-71466251a162
|
2008-03-06 16:13:51 +00:00 |
|
blueswir1
|
375ee38b4b
|
Convert Sparc64 trap state ops to TCG
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4018 c046a42c-6fe2-441c-8c8c-71466251a162
|
2008-03-05 17:59:48 +00:00 |
|
blueswir1
|
7e8c2b6ca8
|
Convert float helpers to TCG, fix fabsq in the process
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4014 c046a42c-6fe2-441c-8c8c-71466251a162
|
2008-03-04 20:00:18 +00:00 |
|
blueswir1
|
dcf2490568
|
Convert fmovr to TCG
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4013 c046a42c-6fe2-441c-8c8c-71466251a162
|
2008-03-04 19:56:06 +00:00 |
|
blueswir1
|
ccd4a21937
|
Convert tick operations to TCG
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4011 c046a42c-6fe2-441c-8c8c-71466251a162
|
2008-03-02 18:28:06 +00:00 |
|
blueswir1
|
00f219bf50
|
Convert movr and (partially) movcc to TCG
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4010 c046a42c-6fe2-441c-8c8c-71466251a162
|
2008-03-02 18:25:27 +00:00 |
|
blueswir1
|
38bc628b08
|
Convert addx, subx, next_insn and mov_pc_npc to TCG
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4009 c046a42c-6fe2-441c-8c8c-71466251a162
|
2008-03-02 18:22:19 +00:00 |
|
blueswir1
|
b25deda7ca
|
Temporary fix for i386 host
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3994 c046a42c-6fe2-441c-8c8c-71466251a162
|
2008-02-27 17:44:03 +00:00 |
|
blueswir1
|
1a2fb1c009
|
Modify Sparc32/64 to use TCG
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3989 c046a42c-6fe2-441c-8c8c-71466251a162
|
2008-02-24 14:10:06 +00:00 |
|
blueswir1
|
9e31b9e28a
|
Fix remote debugger memory access problems reported by Matthias Stein
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3982 c046a42c-6fe2-441c-8c8c-71466251a162
|
2008-02-14 17:46:44 +00:00 |
|
blueswir1
|
3deaeab717
|
Sparc32 MMU register fixes (Robert Reif)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3979 c046a42c-6fe2-441c-8c8c-71466251a162
|
2008-02-11 18:27:33 +00:00 |
bellard
|
57fec1fee9
|
use the TCG code generator
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3944 c046a42c-6fe2-441c-8c8c-71466251a162
|
2008-02-01 10:50:11 +00:00 |
|
blueswir1
|
045380be94
|
More ASIs
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3882 c046a42c-6fe2-441c-8c8c-71466251a162
|
2008-01-01 17:07:39 +00:00 |
|
blueswir1
|
0b09be2b2f
|
Nicer debug output for exceptions
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3878 c046a42c-6fe2-441c-8c8c-71466251a162
|
2007-12-30 17:13:01 +00:00 |
|
blueswir1
|
7d85892b9b
|
Initial support for Sun4d machines (SS-1000, SS-2000)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3869 c046a42c-6fe2-441c-8c8c-71466251a162
|
2007-12-28 20:57:43 +00:00 |
|
blueswir1
|
8543e2cfce
|
Improved ASI debugging (Robert Reif)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3868 c046a42c-6fe2-441c-8c8c-71466251a162
|
2007-12-28 18:50:23 +00:00 |
|
blueswir1
|
3aa662faae
|
Enforce context table alignment
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3857 c046a42c-6fe2-441c-8c8c-71466251a162
|
2007-12-25 07:49:10 +00:00 |
|
blueswir1
|
66f1cdbde4
|
Partial fix to Sparc32 Linux host global register mangling problem
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3806 c046a42c-6fe2-441c-8c8c-71466251a162
|
2007-12-11 19:39:25 +00:00 |
|
blueswir1
|
666c87aa3b
|
Add ASIs (Robert Reif)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3801 c046a42c-6fe2-441c-8c8c-71466251a162
|
2007-12-10 19:58:20 +00:00 |
ths
|
01ba98161f
|
Handle cpu_model in copy_cpu(), by Kirill A. Shutemov.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3778 c046a42c-6fe2-441c-8c8c-71466251a162
|
2007-12-09 02:22:57 +00:00 |
|
blueswir1
|
58a770f3a4
|
Increase prom size for boot mode
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3748 c046a42c-6fe2-441c-8c8c-71466251a162
|
2007-11-29 17:08:01 +00:00 |
|
blueswir1
|
3ebf5aafe5
|
Use slavio base as boot prom address, rearrange sun4m init code
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3747 c046a42c-6fe2-441c-8c8c-71466251a162
|
2007-11-28 20:54:33 +00:00 |
|
blueswir1
|
9c2b428ee1
|
Fix compilation and warnings on PPC host
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3746 c046a42c-6fe2-441c-8c8c-71466251a162
|
2007-11-28 18:08:28 +00:00 |
|
blueswir1
|
2382dc6b9b
|
Fix floating point register decoding
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3742 c046a42c-6fe2-441c-8c8c-71466251a162
|
2007-11-25 20:27:35 +00:00 |
|
blueswir1
|
1f58732916
|
128-bit float support for user mode
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3740 c046a42c-6fe2-441c-8c8c-71466251a162
|
2007-11-25 18:40:20 +00:00 |
|
blueswir1
|
3dd9a152e1
|
More MMU registers (Robert Reif)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3738 c046a42c-6fe2-441c-8c8c-71466251a162
|
2007-11-25 12:43:10 +00:00 |
|
blueswir1
|
d07b4d0ea7
|
Fix MXCC register 64 bit read word order (Robert Reif)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3709 c046a42c-6fe2-441c-8c8c-71466251a162
|
2007-11-19 19:14:10 +00:00 |
pbrook
|
87ecb68bdf
|
Break up vl.h.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3674 c046a42c-6fe2-441c-8c8c-71466251a162
|
2007-11-17 17:14:51 +00:00 |
|
blueswir1
|
2761992d13
|
Remove unnecessary register masking (Robert Reif)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3663 c046a42c-6fe2-441c-8c8c-71466251a162
|
2007-11-17 08:21:43 +00:00 |
|
blueswir1
|
bbf7d96b45
|
Fix MXCC error register (Robert Reif)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3662 c046a42c-6fe2-441c-8c8c-71466251a162
|
2007-11-17 08:19:57 +00:00 |
|
blueswir1
|
295db11371
|
Add MXCC module reset register (Robert Reif)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3661 c046a42c-6fe2-441c-8c8c-71466251a162
|
2007-11-17 08:18:59 +00:00 |
|
bellard
|
bd37ec2141
|
removed warning
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3616 c046a42c-6fe2-441c-8c8c-71466251a162
|
2007-11-11 19:50:22 +00:00 |
|
bellard
|
aaed909a49
|
added cpu_model parameter to cpu_init()
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3562 c046a42c-6fe2-441c-8c8c-71466251a162
|
2007-11-10 15:15:54 +00:00 |
|
blueswir1
|
7d77bf2006
|
More Sparc64 CPU definitions
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3561 c046a42c-6fe2-441c-8c8c-71466251a162
|
2007-11-10 09:32:02 +00:00 |
|
blueswir1
|
406f82e833
|
More CPU definitions
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3559 c046a42c-6fe2-441c-8c8c-71466251a162
|
2007-11-09 19:08:43 +00:00 |
|
blueswir1
|
6d5f237a59
|
CPU specific boot mode (Robert Reif)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3542 c046a42c-6fe2-441c-8c8c-71466251a162
|
2007-11-07 17:03:37 +00:00 |
|
ths
|
273af66025
|
Adjust s390 addresses (the MSB is defined as "to be ignored").
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3486 c046a42c-6fe2-441c-8c8c-71466251a162
|
2007-10-29 14:39:49 +00:00 |
|
blueswir1
|
eed152bba5
|
Use shared ctpop64 helper
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3468 c046a42c-6fe2-441c-8c8c-71466251a162
|
2007-10-28 14:35:04 +00:00 |
|
blueswir1
|
20b749f607
|
Avoid gcc warnings
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3412 c046a42c-6fe2-441c-8c8c-71466251a162
|
2007-10-20 07:09:08 +00:00 |
|
blueswir1
|
1e64e78d0c
|
Fix compiling Sparc64 on PPC host
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3411 c046a42c-6fe2-441c-8c8c-71466251a162
|
2007-10-20 07:07:47 +00:00 |
|
blueswir1
|
e909ec2f11
|
Use ldq and stq for 8 byte accesses (original patch by Robert Reif)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3405 c046a42c-6fe2-441c-8c8c-71466251a162
|
2007-10-17 17:37:13 +00:00 |
|
blueswir1
|
8f577d3d29
|
Enable all alignment checks
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3404 c046a42c-6fe2-441c-8c8c-71466251a162
|
2007-10-17 17:34:57 +00:00 |
|
blueswir1
|
94ced07534
|
Fix bug in Sparc32 sta op (Robert Reif)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3399 c046a42c-6fe2-441c-8c8c-71466251a162
|
2007-10-14 20:27:00 +00:00 |
|
blueswir1
|
6f27aba62e
|
Sparc64 hypervisor mode
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3398 c046a42c-6fe2-441c-8c8c-71466251a162
|
2007-10-14 17:07:21 +00:00 |