Commit Graph

409 Commits

Author SHA1 Message Date
aliguori c0ce998e94 Use sys-queue.h for break/watchpoint managment (Jan Kiszka)
This switches cpu_break/watchpoint_* to TAILQ wrappers, simplifying the
code and also fixing a use after release issue in
cpu_break/watchpoint_remove_all.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>



git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5799 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-25 22:13:57 +00:00
aliguori a1d1bb3101 Refactor and enhance break/watchpoint API (Jan Kiszka)
This patch prepares the QEMU cpu_watchpoint/breakpoint API to allow the
succeeding enhancements this series comes with.

First of all, it overcomes MAX_BREAKPOINTS/MAX_WATCHPOINTS by switching
to dynamically allocated data structures that are kept in linked lists.
This also allows to return a stable reference to the related objects,
required for later introduced x86 debug register support.

Breakpoints and watchpoints are stored with their full information set
and an additional flag field that makes them easily extensible for use
beyond pure guest debugging.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>



git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5738 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-18 20:07:32 +00:00
aliguori 6b9175478e Refactor translation block CPU state handling (Jan Kiszka)
This patch refactors the way the CPU state is handled that is associated
with a TB. The basic motivation is to move more arch specific code out
of generic files. Specifically the long #ifdef clutter in tb_find_fast()
has to be overcome in order to avoid duplicating it for the gdb
watchpoint fixes (patch "Restore pc on watchpoint hits").

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>



git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5736 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-18 19:46:41 +00:00
aliguori 622ed3605b Convert CPU_PC_FROM_TB to static inline (Jan Kiszka)
as macros should be avoided when possible.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>



git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5735 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-18 19:36:03 +00:00
pbrook a7812ae412 TCG variable type checking.
Signed-off-by: Paul Brook <paul@codesourcery.com>


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5729 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-17 14:43:54 +00:00
aurel32 da80682b42 target-mips: avoid tcg internal error in mfc0/dmfc0
Set t0 to 0 for unimplemented mfc0/dmfc0 instructions. This fixes a tcg
internal error while booting mips linux.

Noticed by Julia Longtin.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5723 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-15 12:12:08 +00:00
aurel32 de9a95f022 Revert commits 5685 to 5688 committed by mistake
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5691 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-11 13:41:01 +00:00
aurel32 1c58b16694 Don't stop translation for mtc0 compare
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5686 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-11 13:30:37 +00:00
aurel32 a6e92a658b target-mips: gen_compute_branch1()
Optimize code generation in gen_compute_branch1():
- Directly use I32 variables instead of converting values from _tl to
  _i32 and back to _tl.
- Write the result directly to bcond instead of passing by a local
  variable.
- Temp variables are valid up to and *including* the brcond instruction.
  Use them instead of temp local variables.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5684 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-11 11:50:51 +00:00
aurel32 9bf3eb2ca5 target-mips: optimize movc*()
Optimize code generation in gen_movc*():
- Temp variables are valid up to and *including* the brcond instruction.
  Use them instead of temp local variables.
- Avoid using temporary variables to transfer values.
- Access fpu_fcr31 directly in gen_movcf_ps().

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5683 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-11 11:50:43 +00:00
aurel32 2a0ab99899 target-mips: optimize gen_farith()
Optimize code generation in gen_farith():
- Temp variables are valid up to and *including* the brcond instruction.
  Use them instead of temp local variables.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5682 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-11 11:50:33 +00:00
aurel32 b10fa3c906 target-mips: optimize gen_muldiv()
Optimize code generation in gen_muldiv():
- Don't do sign extension when the value is already guaranteed to be
  sign extended (otherwise, results are marked as UNPREDICTABLE).
- Access the LO, HI registers directly instead of writting them through
  a temporary variable.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5681 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-11 11:50:25 +00:00
aurel32 507563e85d target-mips: optimize gen_arith()/gen_arith_imm()
Optimize code generation in gen_arith()/gen_arith_imm():
- Don't do sign extension when the value is already guaranteed to be
  sign extended (otherwise, results are marked as UNPREDICTABLE).
- When the value is sign extended, compare the value to 0 instead of
  testing bit 31/63.
- Temp variables are valid up to and *including* the brcond instruction.
  Use them instead of temp local variables.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5680 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-11 11:50:17 +00:00
aurel32 49bcf33cc7 target-mips: convert bit shuffle ops to TCG
Bit shuffle operations can be written with very few TCG instructions
(between 5 and 8), so it is worth converting them to TCG.

This code also move all bit shuffle generation code to a separate
function in order to have a cleaner exception code path, that is it
doesn't store back the TCG register to the target register after the
exception, as the TCG register doesn't exist anymore.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5679 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-11 11:47:06 +00:00
aurel32 505ad7c2ff target-mips: convert bitfield ops to TCG
Bitfield operations can be written with very few TCG instructions
(between 2 and 5), so it is worth converting them to TCG.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5678 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-11 11:46:58 +00:00
aurel32 2623c1ecfc target-mips: optimize gen_op_addr_add() (2/2)
Instead of dynamically generating different code depending on the UX
flag, add a new flag in ctx->flags to generate different code.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5677 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-11 11:39:33 +00:00
aurel32 d144d1d9e5 target-mips: optimize gen_op_addr_add() (1/2)
The user mode can be tested at translation time using ctx->hflags.
This simplifies gen_op_addr_add().

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5676 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-11 11:36:52 +00:00
aurel32 1eb75d4a36 target-mips: optimize gen_save_pc()
We obviously don't need to use a temporary variable to write PC.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5675 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-11 11:36:04 +00:00
aurel32 add69063e8 target-mips: fix mft* helpers/call
This patch attempts to fix mft* helpers and the associated TCG calls.
mft* helpers do not take a register in argument, however:
- some helpers are called with an argument while they do not take one.
- some helpers are declared with an argument they don't use.

Acked-by: Thiemo Seufer <ths@networkno.de>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5674 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-11 11:34:39 +00:00
aurel32 c24135ffcc target-mips: fix temporary variable freeing in op_ldst_##insn()
Move tcg_temp_free() out of the conditional part to make sure
the TCG temporary variable is freed in all cases.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Acked-by: Thiemo Seufer <ths@networkno.de>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5673 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-11 11:34:30 +00:00
aurel32 e00fcff710 target-mips: use the new rotr/rotri instructions
Acked-by: Thiemo Seufer <ths@networkno.de>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5622 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-04 19:13:47 +00:00
blueswir1 e18231a3ff Show size for unassigned accesses (Robert Reif)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5436 c046a42c-6fe2-441c-8c8c-71466251a162
2008-10-06 18:46:28 +00:00
ths cb2c9921f8 Use concet TCG instructions in the MIPS target.
Signed-off-by: Thiemo Seufer <ths@networkno.de>


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5303 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-22 21:54:00 +00:00
ths 9c67ef0cb5 Fix Xcontext fill, by Here Poussineau.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5284 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-21 21:21:26 +00:00
pbrook 36aa55dcd9 Add concat_i32_i64 op.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5280 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-21 13:48:32 +00:00
ths 4b2eb8d275 Use TCG registers for most CPU register accesses.
Signed-off-by: Thiemo Seufer <ths@networkno.de>


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5253 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-18 11:59:03 +00:00
ths f01be15458 Move the active FPU registers into env again, and use more TCG registers
to access them.

Signed-off-by: Thiemo Seufer <ths@networkno.de>


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5252 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-18 11:57:27 +00:00
aurel32 bbc0d79cb7 MIPS: Fix tlbwi/tlbwr
In CP0 Index register, bit 31 means 'Probe Failure', while lowest bits
contain the TLB index.

In tlbwi and tlbwr instructions, this Probe Failure bit must be ignored
when reading the TLB index.

Attached patch fixes it.

(Hervé Poussineau)

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5215 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-14 17:09:56 +00:00
aurel32 75973fa1ee MIPS: remove empty cpu_mips_irqctrl_init()
cpu_mips_irqctrl_init() function in hw/mips_timer.c is empty.
Attached patch removes it, and its callers.

(Hervé Poussineau)

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5214 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-14 16:38:57 +00:00
aurel32 929a62a0d7 target-mips: fix warning
Attached patch fixes a warning in cpu_mips_find_by_name().
'name' is a string, so it should be declared as char*, not unsigned char*.

(Hervé Poussineau)

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5213 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-14 16:28:26 +00:00
aurel32 2fdbad255e TCG fixes for target-mips
This patch fixes TCG errors reported on the MIPS target when TCG_DEBUG
is enabled.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Acked-by: Thiemo Seufer <ths@networkno.de>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5164 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-05 14:19:17 +00:00
ths f8a6ec5817 Build fix for gcc-3.3.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5139 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-02 17:39:45 +00:00
blueswir1 79383c9c08 Fix some warnings that would be generated by gcc -Wredundant-decls
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5115 c046a42c-6fe2-441c-8c8c-71466251a162
2008-08-30 09:51:20 +00:00
aurel32 492b239197 MIPS: don't free TCG temporary variable twice
In gen_dmtc0 function, TCG temporary variable t0 is freed at the end of
the function. Variable is freed again in the gen_dmtc0 caller.
I removed the free in gen_dmtc0, to do like in gen_dmfc0, gen_mfc0,
gen_mtc0.

(Hervé Poussineau)

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5075 c046a42c-6fe2-441c-8c8c-71466251a162
2008-08-23 17:22:19 +00:00
ths 0fd70f8f20 Delete unused variable.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4981 c046a42c-6fe2-441c-8c8c-71466251a162
2008-08-01 17:14:35 +00:00
ths c904ef0e7c Use plain standard inline.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4929 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-23 16:16:31 +00:00
ths 0eaef5aa01 Less hardcoding of TARGET_USER_ONLY.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4928 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-23 16:14:22 +00:00
ths 8706c3824f A bunch of minor code improvements in the MIPS target.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4921 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-21 21:38:04 +00:00
ths 3d5be8709b Fix logging output for MIPS HI, LO registers, by Stefan Weil.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4916 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-21 07:46:03 +00:00
ths 50366fe93a Fix compiler warning, by Stefan Weil.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4915 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-20 19:13:19 +00:00
ths 920c608ef3 Simplify conditional FP moves.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4913 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-20 18:48:42 +00:00
ths 2cfc5f17d3 Small cleanup of gen_intermediate_code(_internal), by Laurent Desnogues.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4891 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-18 18:01:29 +00:00
ths b6d96beda3 Use temporary registers for the MIPS FPU emulation.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4861 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-09 11:05:10 +00:00
ths c7e8a937b7 Fix typo in comment.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4852 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-05 21:54:32 +00:00
ths 63742cf887 Change MIPS machine default to Malta.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4851 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-05 21:51:47 +00:00
pbrook 9656f324d2 Move interrupt_request and user_mode_only to common cpu state.
Save and restore env->interrupt_request and env->halted.



git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4817 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-01 20:01:19 +00:00
ths 356265ae4a Static'ify some functions, and use standard inline in translate.c.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4813 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-01 16:37:52 +00:00
ths ea334207a3 Delete duplicate code.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4811 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-01 08:45:45 +00:00
ths bf20dc076b Spelling fixes, spotted by Stuart Brady.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4809 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-30 17:22:19 +00:00
pbrook b3c7724cbc Move CPU save/load registration to common code.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4808 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-30 16:31:04 +00:00