Commit Graph

20543 Commits

Author SHA1 Message Date
Peter Maydell
c480421426 target-arm: convert cp15 crn=7 registers
Convert the cp15 crn=7 registers to the new scheme.
Note that to do this we have to distinguish some registers
used on the ARM9 and ARM10 from some which are ARM1176
only. This is because the old code returned a value of 0
but always set the Z flag (by clearing env->ZF, since we
store the Z flag in CPUState inverted). This is inconsistent
with actual ARM CPU behaviour, which only sets flags for
reads to r15 and sets them based on the top bits of the result.
However it happened to work for the two common use cases for
cp15 crn=7 reads:
 * On ARM9 and ARM10 the cache clean-and-test operations are
typically done with a destination of r15 so that you can do
a "loop: mrc ... ; bne loop" to keep cleaning until the cache
is finally clean; always setting the Z flag means this loop
terminates immediately
 * on ARM1176 the Cache Dirty Status Register reads as zero
if the cache is dirty; returning 0 means this is correctly
implemented for QEMU

Since the new coprocessor register framework does the right
thing of always setting flags based on the returned result
for reads to r15, we need to split these up so that we can
return (1<<30) for the ARM9/ARM10 registers but 0 for the
ARM1176 one.

This allows us to remove the nasty hack which always sets Z.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-06-20 12:07:11 +00:00
Peter Maydell
4a50160666 target-arm: Convert cp15 VA-PA translation registers
Convert the cp15 VA-PA translation registers (a subset of
the crn=7 regs) to the new scheme.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-06-20 12:07:05 +00:00
Peter Maydell
d929823fa1 target-arm: Convert cp15 MMU TLB control
Convert cp15 MMU TLB control (crn=8) to new scheme.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-06-20 12:07:00 +00:00
Peter Maydell
1047b9d7bb target-arm: Convert cp15 crn=15 registers
Convert the cp15 crn=15 (implementation specific) registers
to the new scheme.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-06-20 12:06:09 +00:00
Peter Maydell
4fdd17dd35 target-arm: Convert cp15 crn=10 registers
We RAZ/WI the entire block of crn=10 registers. Note that this
actually covers not just the implementation-defined TLB
lockdown registers but also a number of v7 VMSA memory
attribute registers which we would need to implement to
support TEX remap. We retain the previous QEMU behaviour
in this conversion, though.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-06-20 12:06:05 +00:00
Peter Maydell
08de207bc5 target-arm: Convert cp15 crn=13 registers
Convert the cp15 crn=13 registers (FCSEIDR, CONTEXTIDR,
and the ARM946 Trace Process Identifier Register).

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-06-20 12:06:01 +00:00
Peter Maydell
ecce5c3c90 target-arm: Convert cp15 crn=2 registers
Convert the cp15 crn=2 registers (MMU page table control,
MPU cache control) to the new scheme.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-06-20 12:05:56 +00:00
Peter Maydell
18032bec5c target-arm: Convert MMU fault status cp15 registers
Convert the MMU fault status and MPU access permission cp15
registers to the new scheme.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-06-20 12:05:50 +00:00
Peter Maydell
c983fe6cf1 target-arm: Convert cp15 c3 register
Convert the cp15 c3 register (MMU domain access control
or MPU write buffer control). NB that this is horribly
underdecoded for modern cores (should be crn=3,crm=0,
opc1=0,opc2=0) but this change preserves the existing
QEMU behaviour.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-06-20 12:05:44 +00:00
Peter Maydell
6cc7a3aee6 target-arm: Convert generic timer cp15 regs
Convert the (dummy) generic timer cp15 implementation.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-06-20 12:05:40 +00:00
Peter Maydell
200ac0ef87 target-arm: Convert performance monitor registers
Convert the v7 performance monitor cp15 registers to
the new scheme.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-06-20 12:05:17 +00:00
Peter Maydell
4d31c59679 target-arm: Convert TLS registers
Convert TLS registers to the new cp15 framework

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-06-20 12:04:54 +00:00
Peter Maydell
7d57f40877 target-arm: Convert WFI/barriers special cases to cp_reginfo
Convert the various WFI and barrier instruction special cases to use
cp_reginfo infrastructure.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-06-20 12:04:32 +00:00
Peter Maydell
c326b9796f target-arm: Convert TEECR, TEEHBR to new scheme
Convert the THUMB2EE cp14 registers TEECR and TEEHBR to
use arm_cp_reginfo.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-06-20 12:04:08 +00:00
Peter Maydell
e9aa6c2148 target-arm: Convert debug registers to cp_reginfo
Convert the cp14 debug registers (DBGDIDR, DBGDRAR, DBGDSAR) to the
cp_reginfo scheme.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-06-20 12:03:44 +00:00
Peter Maydell
2ceb98c007 target-arm: Add register_cp_regs_for_features()
Add new function register_cp_regs_for_features() as a place to
register coprocessor registers dependent on feature flags.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-06-20 12:02:54 +00:00
Peter Maydell
e8070a23a8 target-arm: Remove old cpu_arm_set_cp_io infrastructure
All the users of cpu_arm_set_cp_io have been converted, so we
can remove it and the infrastructure it used.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-06-20 12:02:01 +00:00
Peter Maydell
9ee703b096 hw/pxa2xx_pic: Convert coprocessor registers to new scheme
Convert the coprocessor access functions for the pxa2xx PIC to the
arm_cp_reginfo scheme.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-06-20 12:01:58 +00:00
Peter Maydell
e2f8a44d0d hw/pxa2xx.c: Convert CLKCFG and PWRMODE cp14 regs
Convert the PXA2xx CLKCFG and PWRMODE cp14 registers to the
new arm_cp_reginfo scheme.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-06-20 12:01:55 +00:00
Peter Maydell
dc2a9045cf hw/pxa2xx: Convert cp14 perf registers to new scheme
Convert the PXA2xx cp14 perf registers from old-style
coprocessor hooks to the new scheme.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-06-20 12:01:52 +00:00
Peter Maydell
4b6a83fb0c target-arm: initial coprocessor register framework
Initial infrastructure for data-driven registration of
coprocessor register implementations.

We still fall back to the old-style switch statements pending
complete conversion of all existing registers.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-06-20 12:01:02 +00:00
Peter Maydell
200bf596b9 target-arm: Fix 11MPCore cache type register value
Make the 11MPCore report a valid value in its cache type register
(the previous value appears to have been incorrectly copied from
the 1136/1176). In particular, do not report that we have an
aliasing VIPT cache, because this causes Linux to attempt to use
the v6 block cache ops which the 11MPCore doesn't actually have.
(This causes no problems currently because we over-broadly provide
those ops on all cores, but prevents us correctly narrowing the
block ops down to those cores which actually implement them.)

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-06-20 12:00:58 +00:00
Crístian Viana
93bfef4c6e Allow machines to configure the QEMU_VERSION that's exposed via hardware
QEMU exposes its version to the guest's hardware and in some cases that is wrong
(e.g. Windows prints messages about driver updates when you switch
the QEMU version).
There is a new field now on the struct QEmuMachine, hw_version, which may
contain the version that the specific machine should report. If that field is
set, then that machine will report that version to the guest.

Signed-off-by: Crístian Viana <vianac@linux.vnet.ibm.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-06-19 13:36:56 -05:00
Gleb Natapov
459ae5ea5a Add PIIX4 properties to control PM system states.
This patch adds two things. First it allows QEMU to distinguish between
regular powerdown and S4 powerdown. Later separate QMP notification will
be added for S4 powerdown. Second it allows S3/S4 states to be disabled
from QEMU command line. Some guests known to be broken with regards to
power management, but allow to use it anyway. Using new properties
management will be able to disable S3/S4 for such guests.

Supported system state are passed to a firmware using new fw_cfg file.
The file contains  6 byte array. Each byte represents one system
state. If byte at offset X has its MSB set it means that system state
X is supported and to enter it guest should use the value from lowest 3
bits.

Signed-off-by: Gleb Natapov <gleb@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-06-19 13:36:56 -05:00
Anthony Liguori
dcff25f2cd make: automatically include dependencies in recursive subdir rules (v2)
I think I understand enough of what's going on in these rules to ensure this is
right.  But I could certainly use a second or third opinion...

Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-06-19 13:32:42 -05:00
Avi Kivity
8be74dc0ba configure: fix -enable-debug with newer toolchains
Fedora 17's toolchain wants optimization enabled for _FORTIFY_SOURCE;
so disable _FORTIFY_SOURCE when debugging.

Signed-off-by: Avi Kivity <avi@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-06-19 13:32:22 -05:00
Anthony Liguori
8aca521512 Merge remote-tracking branch 'afaerber-or/qom-next-2' into staging
* afaerber-or/qom-next-2: (22 commits)
  qom: Push error reporting to object_property_find()
  qdev: Remove qdev_prop_exists()
  qbus: Initialize in standard way
  qbus: Make child devices links
  qdev: Connect busses with their parent devices
  qdev: Convert busses to QEMU Object Model
  qdev: Move SysBus initialization to sysbus.c
  qdev: Use wrapper for qdev_get_path
  qdev: Remove qdev_prop_set_defaults
  qdev: Clean up global properties
  qdev: Move bus properties to abstract superclasses
  qdev: Move bus properties to a separate global
  qdev: Push "type" property up to Object
  arm_l2x0: Rename "type" property to "cache-type"
  m48t59: Rename "type" property to "model"
  qom: Assert that public types have a non-NULL parent field
  qom: Drop type_register_static_alias() macro
  qom: Make Object a type
  qom: Add class_base_init
  qom: Add object_child_foreach()
  ...
2012-06-18 10:35:16 -05:00
Anthony Liguori
664535c31c Merge remote-tracking branch 'qmp/queue/qmp' into staging
* qmp/queue/qmp:
  build: install qmp-commands.txt
  Add rate limiting of RTC_CHANGE, BALLOON_CHANGE & WATCHDOG events
  Add event notification for guest balloon changes
  Fix some more license versions (GPL2+ instead of GPL2)
  monitor: Fix memory leak with readline completion
  qmp: do not include monitor.h from qapi-types-core.h
  qmp: include monitor.h when needed
  kvm: add missing include files
2012-06-18 10:35:13 -05:00
Anthony Liguori
0b0cb9d310 Merge remote-tracking branch 'kwolf/for-anthony' into staging
* kwolf/for-anthony: (39 commits)
  qemu-iotests: add 036 autoclear feature bit test
  qemu-iotests: add qcow2.py set-feature-bit command
  fdc-test: introduced qtest read_without_media
  fdc: fix implied seek while there is no media in drive
  qcow2: fix autoclear image header update
  xen: Don't peek behind the BlockDriverState abstraction
  xen: Don't change -drive if=xen device name during machine init
  block: Replace bdrv_get_format() by bdrv_get_format_name()
  qemu-img: document qed format on qemu-img man page
  qemu-iotests: COW with many AIO requests on the same cluster
  qemu-iotests: Some backing file COW tests
  qcow2: Fix avail_sectors in cluster allocation code
  qcow2: Simplify calculation for COW area at the end
  qcow2: always operate caches in writeback mode
  ide: support enable/disable write cache
  block: always open drivers in writeback mode
  block: add bdrv_set_enable_write_cache
  block: copy enable_write_cache in bdrv_append
  savevm: flush after saving vm state
  block: flush in writethrough mode after writes
  ...
2012-06-18 10:34:59 -05:00
Anthony Liguori
df6606f455 Merge remote-tracking branch 'mst/tags/for_anthony' into staging
* mst/tags/for_anthony:
  pci_bridge_dev: fix error path in pci_bridge_dev_initfn()
  qdev: release parent properties on dc->init failure
  msi: Use msi/msix_present more consistently
  msi: Invoke msi/msix_write_config from PCI core
  msi: Guard msi/msix_write_config with msi_present
  msi: Invoke msi/msix_reset from PCI core
  msi: Guard msi_reset with msi_present
  ahci: Clean up reset functions
  intel-hda: Fix reset of MSI function
  ahci: Fix reset of MSI function
  rtl8139: honor RxOverflow flag in can_receive method
  shpc: unparent device before free
2012-06-18 10:18:44 -05:00
Anthony Liguori
49023ff78c Merge remote-tracking branch 'sweil/for-anthony' into staging
* sweil/for-anthony:
  Fix some more license versions (GPL2+ instead of GPL2)
  dump: Fix license version (GPL2+ instead of GPL2)
  configure: Fix build for some versions of glibc (9pfs)
  monitor: Fix memory leak with readline completion
2012-06-18 10:18:26 -05:00
Paolo Bonzini
89bfe00043 qom: Push error reporting to object_property_find()
Avoids duplicated error_set().

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
[AF: Also drop error_set() in object_property_del().]
Signed-off-by: Andreas Färber <afaerber@suse.de>
2012-06-18 15:14:38 +02:00
Paolo Bonzini
8cb6789a31 qdev: Remove qdev_prop_exists()
Can be replaced everywhere with object_property_find().

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
2012-06-18 15:14:38 +02:00
Anthony Liguori
ac7d1ba6d1 qbus: Initialize in standard way
Move code to an initfn and finalizer.
Replace do_qbus_create_inplace() with qbus_realize().

Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
2012-06-18 15:14:38 +02:00
Anthony Liguori
0866aca1de qbus: Make child devices links
Make qbus children show up as link<> properties.  There is no stable
addressing for qbus children so we use an unstable naming convention.

This is okay in QOM though because the composition name is expected to
be what's stable.

Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
2012-06-18 15:14:38 +02:00
Anthony Liguori
f968fc6892 qdev: Connect busses with their parent devices
This makes SysBus part of the root hierarchy and all busses children of
their respective parent DeviceState.

Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
2012-06-18 15:14:38 +02:00
Anthony Liguori
0d936928ef qdev: Convert busses to QEMU Object Model
This is far less interesting than it sounds.  We simply add an Object to each
BusState and then register the types appropriately.  Most of the interesting
refactoring will follow in the next patches.

Since we're changing fundamental type names (BusInfo -> BusClass), it all needs
to convert at once.  Fortunately, not a lot of code is affected.

Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
[AF: Made all new bus TypeInfos static const.]
[AF: Made qbus_free() call object_delete(), required {qom,glib}_allocated]
Signed-off-by: Andreas Färber <afaerber@suse.de>
2012-06-18 15:14:38 +02:00
Paolo Bonzini
8185d21639 qdev: Move SysBus initialization to sysbus.c
TYPE_SYSTEM_BUS will be local to hw/sysbus.c, so move existing references
to main_system_bus and system_bus_info there.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
2012-06-18 15:14:38 +02:00
Anthony Liguori
09e5ab6360 qdev: Use wrapper for qdev_get_path
This makes it easier to remove it from BusInfo.

Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
[AF: Drop now unnecessary NULL initialization in scsibus_get_dev_path()]
Signed-off-by: Andreas Färber <afaerber@suse.de>
2012-06-18 15:14:38 +02:00
Paolo Bonzini
fdae245f56 qdev: Remove qdev_prop_set_defaults
Instead, qdev_property_add_static can set the default.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Reviewed-by: Anthony Liguori <aliguori@us.ibm.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
2012-06-18 15:14:38 +02:00
Paolo Bonzini
4b3582b06b qdev: Clean up global properties
Now that global properties do not depend on buses anymore, set
them directly in the device instance_init function.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
2012-06-18 15:14:37 +02:00
Paolo Bonzini
bce544740a qdev: Move bus properties to abstract superclasses
In qdev, each bus in practice identified an abstract superclass, but
this was mostly hidden.  In QOM, instead, these abstract classes are
explicit so we can move bus properties there.

All bus property walks are removed, and all device property walks
are changed to look along the class hierarchy instead.

We would have duplicates if class A defines some properties and its
subclass B does not define any, because class_b->props will be
left equal to class_a->props.

The solution here is to reintroduce the class_base_init TypeInfo
callback, that was present in one of the early QOM versions but
removed (on my request...) before committing.

This breaks global bus properties, an obscure feature when used
with the command-line which is actually useful and used when used by
backwards-compatible machine types.  So this patch also adjusts the
global bus properties in hw/pc_piix.c to refer to the abstract class.

Globals and other properties must be modified in the same patch to
avoid complications related to initialization ordering.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
2012-06-18 15:14:37 +02:00
Paolo Bonzini
3cb75a7cba qdev: Move bus properties to a separate global
Simple code movement in order to simplify future refactoring.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
2012-06-18 15:14:37 +02:00
Paolo Bonzini
2f262e06f0 qdev: Push "type" property up to Object
Now that Object is a type, add an instance_init function and push
the "type" property from qdev to there.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
2012-06-18 15:14:37 +02:00
Andreas Färber
edc92115a9 arm_l2x0: Rename "type" property to "cache-type"
Resolves a name conflict with the qdev "type" property that is about to
be moved to Object.

Signed-off-by: Andreas Färber <afaerber@suse.de>
Acked-by: Mark Langsdorf <mark.langsdorf@calxeda.com>
2012-06-18 15:14:37 +02:00
Paolo Bonzini
7bc3018b32 m48t59: Rename "type" property to "model"
This resolves a name conflict with the qdev "type" property that is
about to move into Object.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
[AF: Add braces missing in original code.]
Signed-off-by: Andreas Färber <afaerber@suse.de>
2012-06-18 15:14:37 +02:00
Paolo Bonzini
049cb3cfda qom: Assert that public types have a non-NULL parent field
This protects against unwanted effects of changing TYPE_OBJECT from
NULL to a string.

Suggested-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
2012-06-18 15:14:37 +02:00
Paolo Bonzini
9c4b4cc436 qom: Drop type_register_static_alias() macro
It's unused.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
2012-06-18 15:14:37 +02:00
Paolo Bonzini
745549c8d0 qom: Make Object a type
Right now the base Object class has a special NULL type.  Change this so
that we will be able to add class_init and class_base_init callbacks.
To do this, remove some special casing of ObjectClass that is not really
necessary.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
2012-06-18 15:14:37 +02:00
Paolo Bonzini
3b50e311b4 qom: Add class_base_init
The class_base_init TypeInfo callback was present in one of the early
QOM versions but removed (on my request...) before committing.  We
will need it soon, add it.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Reviewed-by: Anthony Liguori <aliguori@us.ibm.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
2012-06-18 15:14:37 +02:00