Alistair Francis 419ddf00ed target/riscv: Remove the hardcoded SATP_MODE macro ... Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 6b701769d6621f45ba1739334198e36a64fe04df.1619234854.git.alistair.francis@wdc.com		2021-05-11 20:02:07 +10:00
..
alpha	target/alpha: fix icount handling for timer instructions	2021-04-05 07:32:56 -07:00
arm	target/arm: Make WFI a NOP for userspace emulators	2021-05-10 13:24:09 +01:00
avr	target/avr: Fix interrupt execution	2021-03-15 00:39:52 +01:00
cris
hexagon	Trivial patches pull request 20210503	2021-05-05 13:52:00 +01:00
hppa
i386	* NetBSD NVMM support	2021-05-06 18:56:17 +01:00
lm32	hw: Do not include qemu/log.h if it is not necessary	2021-05-02 17:24:50 +02:00
m68k	Prepare MacOS ROM support:	2021-03-12 18:56:56 +00:00
microblaze
mips	target/mips: Move TCG source files under tcg/ sub directory	2021-05-02 16:49:35 +02:00
moxie
nios2	semihosting: Move include/hw/semihosting/ -> include/semihosting/	2021-03-10 15:34:12 +00:00
openrisc	Do not include sysemu/sysemu.h if it's not really necessary	2021-05-02 17:24:50 +02:00
ppc	target/ppc: removed VSCR from SPR registration	2021-05-04 13:12:59 +10:00
riscv	target/riscv: Remove the hardcoded SATP_MODE macro	2021-05-11 20:02:07 +10:00
rx	Do not include sysemu/sysemu.h if it's not really necessary	2021-05-02 17:24:50 +02:00
s390x	Do not include exec/address-spaces.h if it's not really necessary	2021-05-02 17:24:51 +02:00
sh4
sparc	hw/sparc*: Move cpu_check_irqs() to target/sparc/	2021-05-04 22:45:53 +01:00
tricore	target/tricore: Fix OPC2_32_RRPW_EXTR for width=0	2021-03-14 14:49:01 +01:00
unicore32	semihosting: Move include/hw/semihosting/ -> include/semihosting/	2021-03-10 15:34:12 +00:00
xtensa	Do not include exec/address-spaces.h if it's not really necessary	2021-05-02 17:24:51 +02:00
meson.build