qemu-e2k/target/ppc
David Gibson ce2918cbc3 spapr: Use CamelCase properly
The qemu coding standard is to use CamelCase for type and structure names,
and the pseries code follows that... sort of.  There are quite a lot of
places where we bend the rules in order to preserve the capitalization of
internal acronyms like "PHB", "TCE", "DIMM" and most commonly "sPAPR".

That was a bad idea - it frequently leads to names ending up with hard to
read clusters of capital letters, and means they don't catch the eye as
type identifiers, which is kind of the point of the CamelCase convention in
the first place.

In short, keeping type identifiers look like CamelCase is more important
than preserving standard capitalization of internal "words".  So, this
patch renames a heap of spapr internal type names to a more standard
CamelCase.

In addition to case changes, we also make some other identifier renames:
  VIOsPAPR* -> SpaprVio*
    The reverse word ordering was only ever used to mitigate the capital
    cluster, so revert to the natural ordering.
  VIOsPAPRVTYDevice -> SpaprVioVty
  VIOsPAPRVLANDevice -> SpaprVioVlan
    Brevity, since the "Device" didn't add useful information
  sPAPRDRConnector -> SpaprDrc
  sPAPRDRConnectorClass -> SpaprDrcClass
    Brevity, and makes it clearer this is the same thing as a "DRC"
    mentioned in many other places in the code

This is 100% a mechanical search-and-replace patch.  It will, however,
conflict with essentially any and all outstanding patches touching the
spapr code.

Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-03-12 14:33:05 +11:00
..
translate target/ppc: Optimize x[sv]xsigdp using deposit_i64() 2019-03-12 14:33:05 +11:00
arch_dump.c target/ppc: Add helper_mfvscr 2019-02-18 11:00:44 +11:00
compat.c target/ppc: Allow cpu compatiblity checks based on type, not instance 2018-06-21 21:22:53 +10:00
cpu-models.c target/ppc/cpu-models: Re-group the 970 CPUs together again 2018-09-25 11:12:25 +10:00
cpu-models.h
cpu-qom.h target/ppc: Implement large decrementer support for TCG 2019-03-12 12:07:49 +11:00
cpu.c
cpu.h target/ppc: introduce vsr64_offset() to simplify get_cpu_vsr{l,h}() and set_cpu_vsr{l,h}() 2019-03-12 14:33:04 +11:00
dfp_helper.c
excp_helper.c target/ppc: Move exception vector offset computation into a function 2019-03-12 14:33:04 +11:00
fpu_helper.c target/ppc: Split out float_invalid_cvt 2018-11-08 12:04:40 +11:00
gdbstub.c target/ppc: Enable reporting of SPRs to GDB 2019-02-17 21:54:02 +11:00
helper_regs.h target/ppc: Fix synchronization of mttcg with broadcast TLB flushes 2019-02-26 09:21:25 +11:00
helper.h target/ppc: Flush the TLB locally when the LPIDR is written 2019-02-26 09:21:25 +11:00
int_helper.c target/ppc: convert vmin* and vmax* to vector operations 2019-02-18 11:00:44 +11:00
internal.h target/ppc: switch fpr/vsrl registers so all VSX registers are in host endian order 2019-03-12 14:33:04 +11:00
kvm_ppc.h target/ppc/spapr: Enable H_PAGE_INIT in-kernel handling 2019-03-12 14:33:04 +11:00
kvm-stub.c
kvm.c spapr: Use CamelCase properly 2019-03-12 14:33:05 +11:00
machine.c target/ppc: switch fpr/vsrl registers so all VSX registers are in host endian order 2019-03-12 14:33:04 +11:00
Makefile.objs
mem_helper.c target/ppc: add external PID support 2018-11-08 12:04:40 +11:00
mfrom_table_gen.c
mfrom_table.inc.c
misc_helper.c target/ppc: Flush the TLB locally when the LPIDR is written 2019-02-26 09:21:25 +11:00
mmu_helper.c target/ppc/mmu: Use LPCR:HR to chose radix vs. hash translation 2019-02-26 09:21:25 +11:00
mmu-book3s-v3.c target/ppc: Support for POWER9 native hash 2019-02-26 09:21:25 +11:00
mmu-book3s-v3.h target/ppc: Support for POWER9 native hash 2019-02-26 09:21:25 +11:00
mmu-hash32.c target/ppc: Fix ordering of hash MMU accesses 2019-02-26 09:21:25 +11:00
mmu-hash32.h
mmu-hash64.c target/ppc: Implement large decrementer support for TCG 2019-03-12 12:07:49 +11:00
mmu-hash64.h target/ppc: Support for POWER9 native hash 2019-02-26 09:21:25 +11:00
mmu-radix64.c target/ppc: Basic POWER9 bare-metal radix MMU support 2019-02-26 09:21:25 +11:00
mmu-radix64.h target/ppc: Rename PATB/PATBE -> PATE 2019-02-26 09:21:25 +11:00
monitor.c target/ppc: move FP and VMX registers into aligned vsr register array 2019-01-09 09:28:14 +11:00
timebase_helper.c
trace-events
translate_init.inc.c target/ppc: add HV support for POWER9 2019-03-12 14:33:05 +11:00
translate.c target/ppc: improve avr64_offset() and use it to simplify get_avr64()/set_avr64() 2019-03-12 14:33:04 +11:00
user_only_helper.c