.. |
insn_trans
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target/riscv: Use gen_shift*_per_ol for RVB, RVI
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2021-10-22 23:35:47 +10:00 |
arch_dump.c
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bitmanip_helper.c
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target/riscv: Add rev8 instruction, removing grev/grevi
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2021-10-07 08:41:33 +10:00 |
cpu_bits.h
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target/riscv: Add CSR defines for RISC-V PM extension
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2021-10-28 14:39:23 +10:00 |
cpu_helper.c
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target/riscv: Compute mstatus.sd on demand
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2021-10-22 23:35:47 +10:00 |
cpu_user.h
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cpu-param.h
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cpu.c
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target/riscv: Support CSRs required for RISC-V PM extension except for the h-mode
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2021-10-28 14:39:23 +10:00 |
cpu.h
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target/riscv: Support CSRs required for RISC-V PM extension except for the h-mode
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2021-10-28 14:39:23 +10:00 |
csr.c
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target/riscv: Support CSRs required for RISC-V PM extension except for the h-mode
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2021-10-28 14:39:23 +10:00 |
fpu_helper.c
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target/riscv: Consolidate RV32/64 32-bit instructions
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2021-05-11 20:02:07 +10:00 |
gdbstub.c
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target/riscv: Replace riscv_cpu_is_32bit with riscv_cpu_mxl
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2021-10-22 07:47:51 +10:00 |
helper.h
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target/riscv: Add rev8 instruction, removing grev/grevi
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2021-10-07 08:41:33 +10:00 |
insn16.decode
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target/riscv: Consolidate RV32/64 16-bit instructions
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2021-05-11 20:02:07 +10:00 |
insn32.decode
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target/riscv: Remove RVB (replaced by Zb[abcs])
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2021-10-07 08:41:33 +10:00 |
instmap.h
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internals.h
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Kconfig
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meson: Introduce target-specific Kconfig
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2021-07-09 18:21:34 +02:00 |
machine.c
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target/riscv: Split misa.mxl and misa.ext
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2021-10-22 07:47:51 +10:00 |
meson.build
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target/riscv: rvb: generalized reverse
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2021-06-08 09:59:45 +10:00 |
monitor.c
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target/riscv: Replace riscv_cpu_is_32bit with riscv_cpu_mxl
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2021-10-22 07:47:51 +10:00 |
op_helper.c
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target/riscv: Reorg csr instructions
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2021-09-01 11:59:12 +10:00 |
pmp.c
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target/riscv: pmp: Fix some typos
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2021-07-15 08:56:00 +10:00 |
pmp.h
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target/riscv: Add ePMP CSR access functions
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2021-05-11 20:02:06 +10:00 |
trace-events
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target/riscv: Add ePMP CSR access functions
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2021-05-11 20:02:06 +10:00 |
trace.h
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translate.c
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target/riscv: Compute mstatus.sd on demand
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2021-10-22 23:35:47 +10:00 |
vector_helper.c
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target/riscv: Consolidate RV32/64 32-bit instructions
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2021-05-11 20:02:07 +10:00 |