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qemu-e2k/target/riscv
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Leon Schuermann 4e3adce124 target/riscv/pmp.c: respect mseccfg.RLB for pmpaddrX changes 
When the rule-lock bypass (RLB) bit is set in the mseccfg CSR, the PMP
configuration lock bits must not apply. While this behavior is
implemented for the pmpcfgX CSRs, this bit is not respected for
changes to the pmpaddrX CSRs. This patch ensures that pmpaddrX CSR
writes work even on locked regions when the global rule-lock bypass is
enabled.

Signed-off-by: Leon Schuermann <leons@opentitan.org>
Reviewed-by: Mayuresh Chitale <mchitale@ventanamicro.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-ID: <20230829215046.1430463-1-leon@is.currently.online>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2023-09-11 11:45:55 +10:00
..
insn_trans
target/riscv: Fix zfa fleq.d and fltq.d
2023-09-11 11:45:55 +10:00
arch_dump.c
target/riscv: Fix format for comments
2023-05-05 10:49:50 +10:00
bitmanip_helper.c
…
common-semi-target.h
…
cpu_bits.h
target/riscv: Update CSR bits name for svadu extension
2023-09-11 11:45:55 +10:00
cpu_cfg.h
target/riscv: Add Zihintntl extension ISA string to DTS
2023-09-11 11:45:55 +10:00
cpu_helper.c
target/riscv: Update CSR bits name for svadu extension
2023-09-11 11:45:55 +10:00
cpu_user.h
…
cpu_vendorid.h
target/riscv: add Ventana's Veyron V1 CPU
2023-05-05 10:49:50 +10:00
cpu-param.h
…
cpu-qom.h
target/riscv: add Ventana's Veyron V1 CPU
2023-05-05 10:49:50 +10:00
cpu.c
target/riscv: Allocate itrigger timers only once
2023-09-11 11:45:55 +10:00
cpu.h
riscv: spelling fixes
2023-09-08 13:08:52 +03:00
crypto_helper.c
target/riscv: Use accelerated helper for AES64KS1I
2023-09-11 11:45:55 +10:00
csr.c
target/riscv: Update CSR bits name for svadu extension
2023-09-11 11:45:55 +10:00
debug.c
target/riscv: Allocate itrigger timers only once
2023-09-11 11:45:55 +10:00
debug.h
target/riscv: Allocate itrigger timers only once
2023-09-11 11:45:55 +10:00
fpu_helper.c
riscv: Add support for the Zfa extension
2023-07-10 22:29:20 +10:00
gdbstub.c
target/riscv: Use PRV_RESERVED instead of PRV_H
2023-05-05 10:49:50 +10:00
helper.h
target/riscv: Add Zvksed ISA extension support
2023-09-11 11:45:55 +10:00
insn16.decode
…
insn32.decode
target/riscv: Add Zvksed ISA extension support
2023-09-11 11:45:55 +10:00
instmap.h
…
internals.h
target/riscv: Introduce mmuidx_2stage
2023-05-05 10:49:50 +10:00
Kconfig
…
kvm_riscv.h
hw/intc/riscv_aplic.c fix non-KVM --enable-debug build
2023-09-11 11:45:55 +10:00
kvm-stub.c
…
kvm.c
hw/intc/riscv_aplic.c fix non-KVM --enable-debug build
2023-09-11 11:45:55 +10:00
m128_helper.c
target/helpers: Remove unnecessary 'qemu/main-loop.h' header
2023-08-31 19:47:43 +02:00
machine.c
target/riscv: Restrict KVM-specific fields from ArchCPU
2023-06-28 14:27:59 +02:00
meson.build
target/riscv: Add Zvbc ISA extension support
2023-09-11 11:45:55 +10:00
monitor.c
riscv: spelling fixes
2023-09-08 13:08:52 +03:00
op_helper.c
target/helpers: Remove unnecessary 'qemu/main-loop.h' header
2023-08-31 19:47:43 +02:00
pmp.c
target/riscv/pmp.c: respect mseccfg.RLB for pmpaddrX changes
2023-09-11 11:45:55 +10:00
pmp.h
target/riscv: Change the return type of pmp_hart_has_privs() to bool
2023-06-13 17:09:13 +10:00
pmu.c
target/riscv/pmu: Restrict 'qemu/log.h' include to source
2023-08-31 19:47:43 +02:00
pmu.h
target/helpers: Remove unnecessary 'qemu/main-loop.h' header
2023-08-31 19:47:43 +02:00
riscv-qmp-cmds.c
target/riscv: add TYPE_RISCV_DYNAMIC_CPU
2023-05-05 10:49:50 +10:00
sbi_ecall_interface.h
target/riscv: Fix format for comments
2023-05-05 10:49:50 +10:00
time_helper.c
…
time_helper.h
…
trace-events
…
trace.h
…
translate.c
target/riscv: Add Zvbc ISA extension support
2023-09-11 11:45:55 +10:00
vcrypto_helper.c
target/riscv: Add Zvksed ISA extension support
2023-09-11 11:45:55 +10:00
vector_helper.c
target/riscv: Refactor some of the generic vector functionality
2023-09-11 11:45:55 +10:00
vector_internals.c
target/riscv: Refactor some of the generic vector functionality
2023-09-11 11:45:54 +10:00
vector_internals.h
target/riscv: Refactor some of the generic vector functionality
2023-09-11 11:45:55 +10:00
xthead.decode
…
XVentanaCondOps.decode
…
zce_helper.c
…