qemu-e2k/target/arm
Marc Zyngier 6a4ef4e5d1 target/arm: Honor HCR_EL2.TID3 trapping requirements
HCR_EL2.TID3 mandates that access from EL1 to a long list of id
registers traps to EL2, and QEMU has so far ignored this requirement.

This breaks (among other things) KVM guests that have PtrAuth enabled,
while the hypervisor doesn't want to expose the feature to its guest.
To achieve this, KVM traps the ID registers (ID_AA64ISAR1_EL1 in this
case), and masks out the unsupported feature.

QEMU not honoring the trap request means that the guest observes
that the feature is present in the HW, starts using it, and dies
a horrible death when KVM injects an UNDEF, because the feature
*really* isn't supported.

Do the right thing by trapping to EL2 if HCR_EL2.TID3 is set.

Note that this change does not include trapping of the MVFR
registers from AArch32 (they are accessed via the VMRS
instruction and need to be handled in a different way).

Reported-by: Will Deacon <will@kernel.org>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Tested-by: Will Deacon <will@kernel.org>
Message-id: 20191123115618.29230-1-maz@kernel.org
[PMM: added missing accessfn line for ID_AA4PFR2_EL1_RESERVED;
 changed names of access functions to include _tid3]
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-11-26 13:55:37 +00:00
..
a32-uncond.decode
a32.decode
arch_dump.c
arm_ldst.h target/arm: fetch code with translator_ld 2019-10-28 15:12:38 +00:00
arm-powerctl.c
arm-powerctl.h
arm-semi.c
cpu64.c target/arm: Merge arm_cpu_vq_map_next_smaller into sole caller 2019-11-19 13:20:27 +00:00
cpu-param.h
cpu-qom.h
cpu.c target/arm/kvm: host cpu: Add support for sve<N> properties 2019-11-01 20:40:59 +00:00
cpu.h target/arm: Support EL0 v7m msr/mrs for CONFIG_USER_ONLY 2019-11-19 13:20:28 +00:00
crypto_helper.c
debug_helper.c
gdbstub64.c
gdbstub.c
helper-a64.c
helper-a64.h
helper-sve.h
helper.c target/arm: Honor HCR_EL2.TID3 trapping requirements 2019-11-26 13:55:37 +00:00
helper.h
idau.h
internals.h
iwmmxt_helper.c
kvm32.c target/arm/kvm: scratch vcpu: Preserve input kvm_vcpu_init features 2019-11-01 20:40:59 +00:00
kvm64.c target/arm/kvm: host cpu: Add support for sve<N> properties 2019-11-01 20:40:59 +00:00
kvm_arm.h target/arm/cpu64: max cpu: Support sve properties with KVM 2019-11-01 20:40:59 +00:00
kvm-consts.h
kvm-stub.c
kvm.c target/arm/kvm: scratch vcpu: Preserve input kvm_vcpu_init features 2019-11-01 20:40:59 +00:00
m_helper.c target/arm: Fix handling of cortex-m FTYPE flag in EXCRET 2019-11-26 13:55:36 +00:00
machine.c
Makefile.objs
monitor.c target/arm/cpu64: max cpu: Introduce sve<N> properties 2019-11-01 20:40:59 +00:00
neon_helper.c
op_addsub.h
op_helper.c
pauth_helper.c
psci.c
sve_helper.c
sve.decode
t16.decode
t32.decode
tlb_helper.c
trace-events
translate-a64.c
translate-a64.h
translate-sve.c
translate-vfp.inc.c target/arm: Allow reading flags from FPSCR for M-profile 2019-11-01 20:41:00 +00:00
translate.c target/arm: Relax r13 restriction for ldrex/strex for v8.0 2019-11-19 13:20:28 +00:00
translate.h
vec_helper.c
vfp_helper.c
vfp-uncond.decode
vfp.decode