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6ba430b58a
qemu-e2k/hw/intc
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Peter Maydell 6ba430b58a hw/intc/armv7m_nvic: Implement read/write for RAS register block 
The RAS feature has a block of memory-mapped registers at offset
0x5000 within the PPB.  For a "minimal RAS" implementation we provide
no error records and so the only registers that exist in the block
are ERRIIDR and ERRDEVID.

The "RAZ/WI for privileged, BusFault for nonprivileged" behaviour
of the "nvic-default" region is actually valid for minimal-RAS,
so the main benefit of providing an explicit implementation of
the register block is more accurate LOG_UNIMP messages, and a
framework for where we could add a real RAS implementation later
if necessary.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20201119215617.29887-27-peter.maydell@linaro.org
2020-12-10 11:44:56 +00:00
..
allwinner-a10-pic.c Clean up inclusion of sysemu/sysemu.h 2019-08-16 13:31:53 +02:00
apic_common.c nomaintainer: Fix Lesser GPL version number 2020-11-15 17:04:40 +01:00
apic.c nomaintainer: Fix Lesser GPL version number 2020-11-15 17:04:40 +01:00
arm_gic_common.c arm_gic: Mask the un-supported priority bits 2020-02-28 16:14:57 +00:00
arm_gic_kvm.c Use DECLARE_*CHECKER* when possible (--force mode) 2020-09-09 09:27:11 -04:00
arm_gic.c arm_gic: Mask the un-supported priority bits 2020-02-28 16:14:57 +00:00
arm_gicv2m.c arm tcg cpus: Fix Lesser GPL version number 2020-11-15 16:42:14 +01:00
arm_gicv3_common.c qdev: set properties with device_class_set_props() 2020-01-24 20:59:15 +01:00
arm_gicv3_cpuif.c hw/intc/arm_gicv3_cpuif: Make GIC maintenance interrupts work 2020-11-02 16:52:17 +00:00
arm_gicv3_dist.c hw/intc/arm_gicv3: GICD_TYPER.SecurityExtn is RAZ if GICD_CTLR.DS == 1 2019-06-17 15:13:19 +01:00
arm_gicv3_its_common.c Include migration/vmstate.h less 2019-08-16 13:31:52 +02:00
arm_gicv3_its_kvm.c arm tcg cpus: Fix Lesser GPL version number 2020-11-15 16:42:14 +01:00
arm_gicv3_kvm.c Use DECLARE_*CHECKER* when possible (--force mode) 2020-09-09 09:27:11 -04:00
arm_gicv3_redist.c hw/intc/arm_gicv3: Fix decoding of ID register range 2019-06-17 15:13:19 +01:00
arm_gicv3.c Include qemu/module.h where needed, drop it from qemu-common.h 2019-06-12 13:18:33 +02:00
armv7m_nvic.c hw/intc/armv7m_nvic: Implement read/write for RAS register block 2020-12-10 11:44:56 +00:00
aspeed_vic.c Include migration/vmstate.h less 2019-08-16 13:31:52 +02:00
bcm2835_ic.c hw/intc/bcm2835_ic: Trace GPU/CPU IRQ handlers 2020-10-20 16:12:00 +01:00
bcm2836_control.c hw/intc/bcm2836_control: Use IRQ definitions instead of magic numbers 2020-10-20 16:12:00 +01:00
etraxfs_pic.c Use DECLARE_*CHECKER* macros 2020-09-09 09:27:09 -04:00
exynos4210_combiner.c Use OBJECT_DECLARE_SIMPLE_TYPE when possible 2020-09-18 14:12:32 -04:00
exynos4210_gic.c Use OBJECT_DECLARE_SIMPLE_TYPE when possible 2020-09-18 14:12:32 -04:00
gic_internal.h hw/intc/arm_gic: Drop GIC_BASE_IRQ macro 2018-09-25 15:13:24 +01:00
gicv3_internal.h target-arm: Add GICv3CPUState in CPUARMState struct 2017-02-28 17:10:00 +00:00
grlib_irqmp.c Use OBJECT_DECLARE_SIMPLE_TYPE when possible 2020-09-18 14:12:32 -04:00
heathrow_pic.c Include hw/hw.h exactly where needed 2019-08-16 13:31:52 +02:00
i8259_common.c isa: Convert uses of isa_create() with Coccinelle 2020-06-15 22:05:28 +02:00
i8259.c Use DECLARE_*CHECKER* macros 2020-09-09 09:27:09 -04:00
ibex_plic.c intc/ibex_plic: Ensure we don't loose interrupts 2020-11-13 21:43:48 -08:00
imx_avic.c Include migration/vmstate.h less 2019-08-16 13:31:52 +02:00
imx_gpcv2.c Include migration/vmstate.h less 2019-08-16 13:31:52 +02:00
intc.c intc: add an interface to gather statistics/informations on interrupt controllers 2016-10-04 10:00:25 +02:00
ioapic_common.c nomaintainer: Fix Lesser GPL version number 2020-11-15 17:04:40 +01:00
ioapic.c nomaintainer: Fix Lesser GPL version number 2020-11-15 17:04:40 +01:00
Kconfig hw/riscv: Move sifive_plic model to hw/intc 2020-09-09 15:54:19 -07:00
lm32_pic.c nomaintainer: Fix Lesser GPL version number 2020-11-15 17:04:40 +01:00
loongson_liointc.c hw/intc/loongson: Fix incorrect 'core' calculation in liointc_read/write 2020-11-03 16:51:13 +01:00
meson.build hw/riscv: Move sifive_plic model to hw/intc 2020-09-09 15:54:19 -07:00
mips_gic.c qdev: set properties with device_class_set_props() 2020-01-24 20:59:15 +01:00
nios2_iic.c Use OBJECT_DECLARE_SIMPLE_TYPE when possible 2020-09-18 14:12:32 -04:00
omap_intc.c omap_intc: Use typedef name for instance_size 2020-09-09 13:20:22 -04:00
ompic.c Use OBJECT_DECLARE_SIMPLE_TYPE when possible 2020-09-18 14:12:32 -04:00
openpic_kvm.c Use OBJECT_DECLARE_SIMPLE_TYPE when possible 2020-09-18 14:12:32 -04:00
openpic.c qdev: set properties with device_class_set_props() 2020-01-24 20:59:15 +01:00
pl190.c Use OBJECT_DECLARE_SIMPLE_TYPE when possible 2020-09-18 14:12:32 -04:00
pnv_xive_regs.h ppc/pnv: add a XIVE interrupt controller model for POWER9 2019-03-12 14:33:04 +11:00
pnv_xive.c error: Eliminate error_propagate() with Coccinelle, part 1 2020-07-10 15:18:08 +02:00
puv3_intc.c Use OBJECT_DECLARE_SIMPLE_TYPE when possible 2020-09-18 14:12:32 -04:00
realview_gic.c error: Eliminate error_propagate() with Coccinelle, part 1 2020-07-10 15:18:08 +02:00
rx_icu.c hw/intc: fix heap-buffer-overflow in rxicu_realize() 2020-11-23 10:41:58 +00:00
s390_flic_kvm.c Use DECLARE_*CHECKER* macros 2020-09-09 09:27:09 -04:00
s390_flic.c sysbus: Convert to sysbus_realize() etc. with Coccinelle 2020-06-15 22:05:28 +02:00
sh_intc.c Include hw/hw.h exactly where needed 2019-08-16 13:31:52 +02:00
sifive_clint.c hw/riscv: Move sifive_clint model to hw/intc 2020-09-09 15:54:19 -07:00
sifive_plic.c target/riscv: Add sifive_plic vmstate 2020-11-03 07:17:23 -08:00
slavio_intctl.c Use OBJECT_DECLARE_SIMPLE_TYPE when possible 2020-09-18 14:12:32 -04:00
spapr_xive_kvm.c Revert series "spapr/xive: Allocate vCPU IPIs from the vCPU contexts" 2020-11-18 11:05:56 +01:00
spapr_xive.c spapr/xive: Add a 'hv-prio' property to represent the KVM escalation priority 2020-09-08 10:08:42 +10:00
trace-events hw/intc/bcm2835_ic: Trace GPU/CPU IRQ handlers 2020-10-20 16:12:00 +01:00
trace.h trace: switch position of headers to what Meson requires 2020-08-21 06:18:24 -04:00
vgic_common.h intc/gic: Extract some reusable vGIC code 2015-09-24 01:29:36 +01:00
xics_kvm.c error: Eliminate error_propagate() with Coccinelle, part 1 2020-07-10 15:18:08 +02:00
xics_pnv.c non-virt: Fix Lesser GPL version number 2020-11-15 16:38:24 +01:00
xics_spapr.c spapr: Pass the maximum number of vCPUs to the KVM interrupt controller 2019-12-17 10:39:48 +11:00
xics.c error: Eliminate error_propagate() with Coccinelle, part 2 2020-07-10 15:18:08 +02:00
xilinx_intc.c Use DECLARE_*CHECKER* macros 2020-09-09 09:27:09 -04:00
xive.c ppc/xive: Simplify error handling in xive_tctx_realize() 2020-08-13 21:07:28 +10:00
xlnx-pmu-iomod-intc.c qdev: set properties with device_class_set_props() 2020-01-24 20:59:15 +01:00
xlnx-zynqmp-ipi.c Include migration/vmstate.h less 2019-08-16 13:31:52 +02:00