qemu-e2k/target
Peter Maydell 8196fe9d83 target/arm: Make Thumb store insns UNDEF for Rn==1111
The Arm ARM specifies that for Thumb encodings of the various plain
store insns, if the Rn field is 1111 then we must UNDEF.  This is
different from the Arm encodings, where this case is either
UNPREDICTABLE or has well-defined behaviour.  The exclusive stores,
store-release and STRD do not have this UNDEF case for any encoding.

Enforce the UNDEF for this case in the Thumb plain store insns.

Fixes: https://bugs.launchpad.net/qemu/+bug/1922887
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210408162402.5822-1-peter.maydell@linaro.org
2021-04-30 11:16:49 +01:00
..
alpha target/alpha: fix icount handling for timer instructions 2021-04-05 07:32:56 -07:00
arm target/arm: Make Thumb store insns UNDEF for Rn==1111 2021-04-30 11:16:49 +01:00
avr target/avr: Fix interrupt execution 2021-03-15 00:39:52 +01:00
cris target/cris: Plug leakage of TCG temporaries 2021-02-22 09:04:58 +01:00
hexagon hexagon: do not specify Python scripts as inputs 2021-04-01 10:37:20 +02:00
hppa exec: Use cpu_untagged_addr in g2h; split out g2h_untagged 2021-02-16 11:04:53 +00:00
i386 i386: Add missing cpu feature bits in EPYC-Rome model 2021-04-09 16:02:18 -04:00
lm32 semihosting: Move include/hw/semihosting/ -> include/semihosting/ 2021-03-10 15:34:12 +00:00
m68k Prepare MacOS ROM support: 2021-03-12 18:56:56 +00:00
microblaze cpu: tcg_ops: move to tcg-cpu-ops.h, keep a pointer in CPUClass 2021-02-05 10:24:15 -10:00
mips target/mips/rel6_translate: Change license to GNU LGPL v2.1 (or later) 2021-04-20 12:52:04 +01:00
moxie exec: Move TranslationBlock typedef to qemu/typedefs.h 2021-02-18 08:19:08 +00:00
nios2 semihosting: Move include/hw/semihosting/ -> include/semihosting/ 2021-03-10 15:34:12 +00:00
openrisc target/openrisc: fix icount handling for timer instructions 2021-04-01 10:37:20 +02:00
ppc target/ppc/kvm: Cache timebase frequency 2021-03-31 11:10:50 +11:00
riscv target/riscv: Prevent lost illegal instruction exceptions 2021-03-22 21:54:40 -04:00
rx cpu: tcg_ops: move to tcg-cpu-ops.h, keep a pointer in CPUClass 2021-02-05 10:24:15 -10:00
s390x target/s390x: fix s390_probe_access to check PAGE_WRITE_ORG for writeability 2021-04-23 14:10:56 +01:00
sh4 target/sh4: Remove unused definitions 2021-03-06 16:18:42 +01:00
sparc cpu: tcg_ops: move to tcg-cpu-ops.h, keep a pointer in CPUClass 2021-02-05 10:24:15 -10:00
tricore target/tricore: Fix OPC2_32_RRPW_EXTR for width=0 2021-03-14 14:49:01 +01:00
unicore32 semihosting: Move include/hw/semihosting/ -> include/semihosting/ 2021-03-10 15:34:12 +00:00
xtensa target/xtensa: make xtensa_modules static on import 2021-04-03 08:52:18 -07:00
meson.build Remove deprecated target tilegx 2021-03-09 11:26:32 +01:00