Peter Maydell 367196caa0 Pull request trivial-branch 20210515 ... -----BEGIN PGP SIGNATURE----- iQJGBAABCAAwFiEEzS913cjjpNwuT1Fz8ww4vT8vvjwFAmCfnFMSHGxhdXJlbnRA dml2aWVyLmV1AAoJEPMMOL0/L74817EQAKnobLPk1uRD9TghCVw6oaaQ0CoIYP4h H2J+r+zEMR4jQs43j8NP5H70/DCclQoDeTYz0ukU1yh8qj4REB0icEZbt7oB2Sjj rJFarzQ8SnCvmPHJRdH/jaSgeUYdTJIFZbK0/bchI9FO80XhzTEwm4zDKp8LJys+ vb9LXZ8NDCGZT20Fn1V/m0+YNFHqW0IPHZMHy0f/Qstr7/ciL2P8gb3r4tCiMpji whVuvA9x3o2tA8Lnibco7IoVllJ5JLvqUOruMp+eOFn0b/eUnMuO3lOALFYQxg/A FCrmi8kIcCWrRkAIQvUnfUWveG3LCRnd2Wk7JK5uGPawC4VKvjjjtt6ZWIBHDBjC qtFYSZLvP+r7o/WR9WaB5XAMVVinTZ1Ra7RRFub8JsyflNCAnumdn4gM21ztG8g9 p1GEvOWspM6Q3gfZFtQRhDvAVxW7++6dewTfuZE09eyXxL2be3pNStNCzPGFG8ww p7nFrasMN1mr3H97sqBh4alu+yAwtyVbvstGcA33KQzxATAmGz9O57qDcQPJLgaF WfxU4+K2xiFQoiJEGcQ4NlHTEQQBgxATvY8o5mBs+Kar6Y/6AarcYA7HDAJlyG9E JIvwEqvhz8qNlQ5+A6cNBYwSJD4cP4nv2fopKduY53t3Ngw03nJ1CKey2y/knTBS KibeapH4GNmJ =Qu5j -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/vivier2/tags/trivial-branch-for-6.1-pull-request' into staging Pull request trivial-branch 20210515 # gpg: Signature made Sat 15 May 2021 11:02:59 BST # gpg: using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FBE3C # gpg: issuer "laurent@vivier.eu" # gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full] # gpg: aka "Laurent Vivier <laurent@vivier.eu>" [full] # gpg: aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [full] # Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F 5173 F30C 38BD 3F2F BE3C * remotes/vivier2/tags/trivial-branch-for-6.1-pull-request: target/avr: Ignore unimplemented WDR opcode hw/avr/atmega.c: use the avr51 cpu for atmega1280 target/sh4: Return error if CPUClass::get_phys_page_debug() fails multi-process: Avoid logical AND of mutually exclusive tests hw/pci-host: Do not build gpex-acpi.c if GPEX is not selected hw/mem/meson: Fix linking sparse-mem device with fuzzer cutils: fix memory leak in get_relocated_path() hw/rtc/mc146818rtc: Convert to 3-phase reset (Resettable interface) hw/timer/etraxfs_timer: Convert to 3-phase reset (Resettable interface) hw/gpio/aspeed: spelling fix (addtional) qapi: spelling fix (addtional) virtiofsd: Fix check of chown()'s return value virtio-net: Constify VirtIOFeature feature_sizes[] virtio-blk: Constify VirtIOFeature feature_sizes[] hw/virtio: Pass virtio_feature_get_config_size() a const argument backends/tpm: Replace qemu_mutex_lock calls with QEMU_LOCK_GUARD Signed-off-by: Peter Maydell <peter.maydell@linaro.org>		2021-05-17 16:44:47 +01:00
..
alpha	target/alpha: fix icount handling for timer instructions	2021-04-05 07:32:56 -07:00
arm	target/arm: Make WFI a NOP for userspace emulators	2021-05-10 13:24:09 +01:00
avr	target/avr: Ignore unimplemented WDR opcode	2021-05-13 19:18:42 +02:00
cris	target/cris: Plug leakage of TCG temporaries	2021-02-22 09:04:58 +01:00
hexagon	Trivial patches pull request 20210503	2021-05-05 13:52:00 +01:00
hppa	exec: Use cpu_untagged_addr in g2h; split out g2h_untagged	2021-02-16 11:04:53 +00:00
i386	numa: Teach ram block notifiers about resizeable ram blocks	2021-05-13 18:21:13 +01:00
m68k	Prepare MacOS ROM support:	2021-03-12 18:56:56 +00:00
microblaze	cpu: tcg_ops: move to tcg-cpu-ops.h, keep a pointer in CPUClass	2021-02-05 10:24:15 -10:00
mips	target/mips: Move TCG source files under tcg/ sub directory	2021-05-02 16:49:35 +02:00
nios2	semihosting: Move include/hw/semihosting/ -> include/semihosting/	2021-03-10 15:34:12 +00:00
openrisc	Do not include sysemu/sysemu.h if it's not really necessary	2021-05-02 17:24:50 +02:00
ppc	target/ppc: removed VSCR from SPR registration	2021-05-04 13:12:59 +10:00
riscv	target/riscv: Fix the RV64H decode comment	2021-05-11 20:02:07 +10:00
rx	Do not include sysemu/sysemu.h if it's not really necessary	2021-05-02 17:24:50 +02:00
s390x	Do not include exec/address-spaces.h if it's not really necessary	2021-05-02 17:24:51 +02:00
sh4	target/sh4: Return error if CPUClass::get_phys_page_debug() fails	2021-05-13 19:00:50 +02:00
sparc	hw/sparc*: Move cpu_check_irqs() to target/sparc/	2021-05-04 22:45:53 +01:00
tricore	target/tricore: Fix OPC2_32_RRPW_EXTR for width=0	2021-03-14 14:49:01 +01:00
xtensa	Do not include exec/address-spaces.h if it's not really necessary	2021-05-02 17:24:51 +02:00
meson.build	Drop the deprecated unicore32 target	2021-05-12 18:20:52 +02:00