qemu-e2k/target/riscv
Yifei Jiang ad40be2708 target/riscv: Support start kernel directly by KVM
Get kernel and fdt start address in virt.c, and pass them to KVM
when cpu reset. Add kvm_riscv.h to place riscv specific interface.

In addition, PLIC is created without M-mode PLIC contexts when KVM
is enabled.

Signed-off-by: Yifei Jiang <jiangyifei@huawei.com>
Signed-off-by: Mingwang Li <limingwang@huawei.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Message-id: 20220112081329.1835-7-jiangyifei@huawei.com
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2022-01-21 15:52:56 +10:00
..
insn_trans target/riscv: modification of the trans_csrxx for 128-bit support 2022-01-08 15:46:10 +10:00
arch_dump.c
bitmanip_helper.c target/riscv: Add rev8 instruction, removing grev/grevi 2021-10-07 08:41:33 +10:00
cpu_bits.h target/riscv: actual functions to realize crs 128-bit insns 2022-01-08 15:46:10 +10:00
cpu_helper.c target/riscv: Implement the stval/mtval illegal instruction 2022-01-08 15:46:10 +10:00
cpu_user.h
cpu-param.h
cpu.c target/riscv: Support start kernel directly by KVM 2022-01-21 15:52:56 +10:00
cpu.h target/riscv: Support start kernel directly by KVM 2022-01-21 15:52:56 +10:00
csr.c target/riscv: actual functions to realize crs 128-bit insns 2022-01-08 15:46:10 +10:00
fpu_helper.c target/riscv: add "set round to odd" rounding mode helper function 2021-12-20 14:53:31 +10:00
gdbstub.c target/riscv: setup everything for rv64 to support rv128 execution 2022-01-08 15:46:10 +10:00
helper.h target/riscv: helper functions to wrap calls to 128-bit csr insns 2022-01-08 15:46:10 +10:00
insn16.decode target/riscv: accessors to registers upper part and 128-bit load/store 2022-01-08 15:46:10 +10:00
insn32.decode target/riscv: support for 128-bit M extension 2022-01-08 15:46:10 +10:00
instmap.h
internals.h target/riscv: add "set round to odd" rounding mode helper function 2021-12-20 14:53:31 +10:00
Kconfig
kvm_riscv.h target/riscv: Support start kernel directly by KVM 2022-01-21 15:52:56 +10:00
kvm-stub.c target/riscv: Support start kernel directly by KVM 2022-01-21 15:52:56 +10:00
kvm.c target/riscv: Support start kernel directly by KVM 2022-01-21 15:52:56 +10:00
m128_helper.c target/riscv: support for 128-bit M extension 2022-01-08 15:46:10 +10:00
machine.c target/riscv: adding high part of some csrs 2022-01-08 15:46:10 +10:00
meson.build target/riscv: Support start kernel directly by KVM 2022-01-21 15:52:56 +10:00
monitor.c target/riscv: Replace riscv_cpu_is_32bit with riscv_cpu_mxl 2021-10-22 07:47:51 +10:00
op_helper.c target/riscv: helper functions to wrap calls to 128-bit csr insns 2022-01-08 15:46:10 +10:00
pmp.c
pmp.h
trace-events
trace.h
translate.c target/riscv: Implement the stval/mtval illegal instruction 2022-01-08 15:46:10 +10:00
vector_helper.c target/riscv: rvv-1.0: rename vmandnot.mm and vmornot.mm to vmandn.mm and vmorn.mm 2021-12-20 14:53:31 +10:00