qemu-e2k/target/ppc
Victor Colombo c5df1898a1 target/ppc: Move xs{max,min}[cj]dp to decodetree
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Victor Colombo <victor.colombo@eldorado.org.br>
Message-Id: <20211213120958.24443-3-victor.colombo@eldorado.org.br>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
2021-12-17 17:57:18 +01:00
..
translate target/ppc: Move xs{max,min}[cj]dp to decodetree 2021-12-17 17:57:18 +01:00
arch_dump.c
compat.c
cpu_init.c target/ppc: remove 401/403 CPUs 2021-12-17 17:57:16 +01:00
cpu-models.c target/ppc: remove 401/403 CPUs 2021-12-17 17:57:16 +01:00
cpu-models.h target/ppc: remove 401/403 CPUs 2021-12-17 17:57:16 +01:00
cpu-param.h
cpu-qom.h target/ppc: remove 401/403 CPUs 2021-12-17 17:57:16 +01:00
cpu.c target/ppc: ppc_store_fpscr doesn't update bits 0 to 28 and 52 2021-12-17 17:57:13 +01:00
cpu.h target/ppc: Remove the software TLB model of 7450 CPUs 2021-12-17 17:57:16 +01:00
dfp_helper.c target/ppc: Move ddedpd[q],denbcd[q],dscli[q],dscri[q] to decodetree 2021-11-09 10:32:52 +11:00
excp_helper.c target/ppc: remove 401/403 CPUs 2021-12-17 17:57:16 +01:00
fpu_helper.c target/ppc: Fix xs{max, min}[cj]dp to use VSX registers 2021-12-17 17:57:18 +01:00
gdbstub.c target/ppc: Fix XER access in gdbstub 2021-10-21 11:42:47 +11:00
helper_regs.c target/ppc: add MMCR0 PMCC bits to hflags 2021-10-21 11:42:47 +11:00
helper_regs.h
helper.h target/ppc: Fix xs{max, min}[cj]dp to use VSX registers 2021-12-17 17:57:18 +01:00
insn32.decode target/ppc: Move xs{max,min}[cj]dp to decodetree 2021-12-17 17:57:18 +01:00
insn64.decode target/ppc: Implement xxblendvb/xxblendvh/xxblendvw/xxblendvd instructions 2021-11-09 10:32:53 +11:00
int_helper.c target/ppc: Implement xxblendvb/xxblendvh/xxblendvw/xxblendvd instructions 2021-11-09 10:32:53 +11:00
internal.h target/ppc: Restrict ppc_cpu_do_unaligned_access to sysemu 2021-11-02 07:00:52 -04:00
Kconfig
kvm_ppc.h
kvm-stub.c
kvm.c
machine.c
mem_helper.c accel/tcg: Move cpu_atomic decls to exec/cpu_ldst.h 2021-10-13 08:14:54 -07:00
meson.build target/ppc: divided mmu_helper.c in 2 files 2021-08-27 12:41:13 +10:00
mfrom_table_gen.c
mfrom_table.c.inc
misc_helper.c
mmu_common.c target/ppc: remove 401/403 CPUs 2021-12-17 17:57:16 +01:00
mmu_helper.c target/ppc: remove 401/403 CPUs 2021-12-17 17:57:16 +01:00
mmu-book3s-v3.c
mmu-book3s-v3.h
mmu-books.h
mmu-hash32.c
mmu-hash32.h
mmu-hash64.c target/ppc: fix Hash64 MMU update of PTE bit R 2021-11-29 21:00:08 +01:00
mmu-hash64.h target/ppc: fix Hash64 MMU update of PTE bit R 2021-11-29 21:00:08 +01:00
mmu-radix64.c
mmu-radix64.h
monitor.c target/ppc: Fix XER access in monitor 2021-10-21 11:42:47 +11:00
power8-pmu-regs.c.inc target/ppc: adding user read/write functions for PMCs 2021-10-21 11:42:47 +11:00
spr_tcg.h target/ppc: adding user read/write functions for PMCs 2021-10-21 11:42:47 +11:00
tcg-stub.c
timebase_helper.c
trace-events target/ppc: Convert debug to trace events (exceptions) 2021-09-30 12:26:06 +10:00
trace.h
translate.c target/ppc: Remove the software TLB model of 7450 CPUs 2021-12-17 17:57:16 +01:00
user_only_helper.c target/ppc: Implement ppc_cpu_record_sigsegv 2021-11-02 07:00:52 -04:00