Paolo Bonzini feabc71dfa configure: do not include dependency flags in QEMU_CFLAGS and LIBS ...

All Meson executables should specify their dependencies explicitly, either
directly or indirectly via declare_dependency.  Makefiles instead did
not propagate dependencies correctly from static libraries, for example.
Therefore, flags for dependencies need not be included in QEMU_CFLAGS.
LIBS is not used at all, so drop that one as well.

In a few cases the dependencies were not yet specified, so add them.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

2020-09-08 11:43:16 +02:00

..

boot.c

RISC-V: Support 64 bit start address

2020-07-13 17:25:37 -07:00

Kconfig

hw/char: Initial commit of Ibex UART

2020-06-19 08:24:07 -07:00

meson.build

configure: do not include dependency flags in QEMU_CFLAGS and LIBS

2020-09-08 11:43:16 +02:00

numa.c

hw/riscv: Add helpers for RISC-V multi-socket NUMA machines

2020-08-25 09:11:35 -07:00

opentitan.c

opentitan: Rename memmap enum constants

2020-08-27 14:04:54 -04:00

riscv_hart.c

riscv_hart: Fix riscv_harts_realize() error API violations

2020-07-02 06:25:29 +02:00

riscv_htif.c

chardev: Use QEMUChrEvent enum in IOEventHandler typedef

2020-01-08 11:15:35 +01:00

sifive_clint.c

hw/riscv: Allow creating multiple instances of CLINT

2020-08-25 09:11:35 -07:00

sifive_e_prci.c

sysbus: Convert to sysbus_realize() etc. with Coccinelle

2020-06-15 22:05:28 +02:00

sifive_e.c

hw/riscv: Allow creating multiple instances of PLIC

2020-08-25 09:11:35 -07:00

sifive_gpio.c

hw/riscv: sifive_gpio: Do not blindly trigger output IRQs

2020-06-19 08:25:27 -07:00

sifive_plic.c

hw/riscv: Allow creating multiple instances of PLIC

2020-08-25 09:11:35 -07:00

sifive_test.c

sysbus: Convert to sysbus_realize() etc. with Coccinelle

2020-06-15 22:05:28 +02:00

sifive_u_otp.c

qdev: set properties with device_class_set_props()

2020-01-24 20:59:15 +01:00

sifive_u_prci.c

riscv: sifive: Implement PRCI model for FU540

2019-09-17 08:42:47 -07:00

sifive_u.c

hw/riscv: Allow creating multiple instances of PLIC

2020-08-25 09:11:35 -07:00

sifive_uart.c

chardev: Use QEMUChrEvent enum in IOEventHandler typedef

2020-01-08 11:15:35 +01:00

spike.c

hw/riscv: spike: Allow creating multiple NUMA sockets

2020-08-25 09:11:35 -07:00

trace-events

SiFive RISC-V GPIO Device

2019-05-24 11:58:30 -07:00

trace.h

trace: switch position of headers to what Meson requires

2020-08-21 06:18:24 -04:00

virt.c

hw/riscv: virt: Allow creating multiple NUMA sockets

2020-08-25 09:11:35 -07:00