binutils-gdb/opcodes/ChangeLog

361 lines
11 KiB
Plaintext
Raw Normal View History

2014-07-08 Ilya Tocar <ilya.tocar@intel.com>
* i386-dis-evex.h (EVEX_W_0F10_P_1_M_1): Fix vmovss.
(EVEX_W_0F10_P_3_M_1): Fix vmovsd.
2014-07-04 Alan Modra <amodra@gmail.com>
* configure.ac: Rename from configure.in.
* Makefile.in: Regenerate.
* config.in: Regenerate.
Use modern AC_INIT in configure.in This removes usage of the obsolete AC_INIT and AM_INIT_AUTOMAKE in all binutils configure.in files. The BFD version is now in bfd/version.m4 rather than bfd/configure.in, which allows automake to automatically track this dependency. bfd/ * version.m4: New file. * configure.in: Include version.m4. (AC_INIT): Update. * Makefile.am (RELEASE): Delete. (bfdver.h): Depend on development.sh, use instead of RELEASE. * Makefile.in: Regenerate. * doc/Makefile.in: Regenerate. opcodes/ * configure.in: Include bfd/version.m4. (AC_INIT, AM_INIT_AUTOMAKE): Use modern form. (BFD_VERSION): Delete. * Makefile.am (CONFIG_STATUS_DEPENDENCIES): Remove bfd/configure.in. * configure: Regenerate. * Makefile.in: Regenerate. binutils/ * configure.in: Include bfd/version.m4. (AC_INIT, AM_INIT_AUTOMAKE): Use modern form. (BFD_VERSION): Delete. * Makefile.am (CONFIG_STATUS_DEPENDENCIES): Remove bfd/configure.in. * configure: Regenerate. * Makefile.in: Regenerate. * doc/Makefile.in: Regenerate. gas/ * configure.in: Include bfd/version.m4. (AC_INIT, AM_INIT_AUTOMAKE): Use modern form. (BFD_VERSION): Delete. * configure.com: Get bfd version from bfd/version.m4. * Makefile.am (CONFIG_STATUS_DEPENDENCIES): Remove bfd/configure.in. * configure: Regenerate. * Makefile.in: Regenerate. * doc/Makefile.in: Regenerate. gprof/ * configure.in: Include bfd/version.m4. (AC_INIT, AM_INIT_AUTOMAKE): Use modern form. (BFD_VERSION): Delete. * Makefile.am (CONFIG_STATUS_DEPENDENCIES): Remove bfd/configure.in. * configure: Regenerate. * Makefile.in: Regenerate. ld/ * configure.in: Include bfd/version.m4. (AC_INIT, AM_INIT_AUTOMAKE): Use modern form. (BFD_VERSION): Delete. * Makefile.am (CONFIG_STATUS_DEPENDENCIES): Remove bfd/configure.in. * configure: Regenerate. * Makefile.in: Regenerate.
2014-07-04 04:05:16 +02:00
2014-07-04 Alan Modra <amodra@gmail.com>
* configure.in: Include bfd/version.m4.
(AC_INIT, AM_INIT_AUTOMAKE): Use modern form.
(BFD_VERSION): Delete.
* Makefile.am (CONFIG_STATUS_DEPENDENCIES): Remove bfd/configure.in.
* configure: Regenerate.
* Makefile.in: Regenerate.
Add support for the AVR Tiny series of microcontrollers. * archures.c: add avrtiny architecture for avr target. * bfd-in2.h: Regenerate. * cpu-avr.c (arch_info_struct): add avrtiny arch info. * elf32-avr.c (elf_avr_howto_table): new relocation R_AVR_LDS_STS_16 added for 16 bit LDS/STS instruction of avrtiny arch. (avr_reloc_map): reloc R_AVR_LDS_STS_16 is mapped to BFD_RELOC_AVR_LDS_STS_16. (bfd_elf_avr_final_write_processing): select machine number avrtiny arch. (elf32_avr_object_p): set machine number for avrtiny arch. * libbfd.h: Regenerate. * reloc.c: Add documentation for BFD_RELOC_AVR_LDS_STS_16 reloc. * config/tc-avr.c (mcu_types): Add avrtiny arch. Add avrtiny arch devices attiny4, attiny5, attiny9, attiny10, attiny20 and attiny40. (md_show_usage): Add avrtiny arch in usage message. (avr_operand): validate and issue error for invalid register for avrtiny. add new reloc exp for 16 bit lds/sts instruction. (md_apply_fix): check 16 bit lds/sts operand for out of range and encode. (md_assemble): check ISA for arch and issue diagnostic. * include/elf/avr.h (E_AVR_MACH_AVRTINY): define avrtiny machine number. (R_AVR_LDS_STS_16): define 16 bit lds/sts reloc number. * include/opcode/avr.h (AVR_ISA_TINY): define avrtiny specific ISA. (AVR_ISA_2xxxa): define ISA without LPM. (AVR_ISA_AVRTINY): define avrtiny arch ISA. Add doc for contraint used in 16 bit lds/sts. Adjust ISA group for icall, ijmp, pop and push. Add 16 bit lds/sts encoding and update 32 bit lds/sts constraints. * opcodes/avr-dis.c (avr_operand): Handle constraint j for 16 bit lds/sts. (print_insn_avr): do not select opcode if insn ISA is avrtiny and machine is not avrtiny. * Makefile.am (ALL_EMULATION_SOURCES): add avrtiny emulation source. (eavrtiny.c): add rules for avrtiny emulation source. * Makefile.in: Regenerate. * configure.tgt: Add avrtiny to avr target emulations. * scripttempl/avrtiny.sc: New file. linker script template for avrtiny arch. * emulparams/avrtiny.sh: New file. emulation parameters for avrtiny arch.
2014-07-01 11:20:17 +02:00
2014-07-01 Barney Stratford <barney_stratford@fastmail.fm>
Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
Pitchumani Sivanupandi <pitchumani.s@atmel.com>
Soundararajan <Sounderarajan.D@atmel.com>
* avr-dis.c (avr_operand): Handle constraint j for 16 bit lds/sts.
Use modern AC_INIT in configure.in This removes usage of the obsolete AC_INIT and AM_INIT_AUTOMAKE in all binutils configure.in files. The BFD version is now in bfd/version.m4 rather than bfd/configure.in, which allows automake to automatically track this dependency. bfd/ * version.m4: New file. * configure.in: Include version.m4. (AC_INIT): Update. * Makefile.am (RELEASE): Delete. (bfdver.h): Depend on development.sh, use instead of RELEASE. * Makefile.in: Regenerate. * doc/Makefile.in: Regenerate. opcodes/ * configure.in: Include bfd/version.m4. (AC_INIT, AM_INIT_AUTOMAKE): Use modern form. (BFD_VERSION): Delete. * Makefile.am (CONFIG_STATUS_DEPENDENCIES): Remove bfd/configure.in. * configure: Regenerate. * Makefile.in: Regenerate. binutils/ * configure.in: Include bfd/version.m4. (AC_INIT, AM_INIT_AUTOMAKE): Use modern form. (BFD_VERSION): Delete. * Makefile.am (CONFIG_STATUS_DEPENDENCIES): Remove bfd/configure.in. * configure: Regenerate. * Makefile.in: Regenerate. * doc/Makefile.in: Regenerate. gas/ * configure.in: Include bfd/version.m4. (AC_INIT, AM_INIT_AUTOMAKE): Use modern form. (BFD_VERSION): Delete. * configure.com: Get bfd version from bfd/version.m4. * Makefile.am (CONFIG_STATUS_DEPENDENCIES): Remove bfd/configure.in. * configure: Regenerate. * Makefile.in: Regenerate. * doc/Makefile.in: Regenerate. gprof/ * configure.in: Include bfd/version.m4. (AC_INIT, AM_INIT_AUTOMAKE): Use modern form. (BFD_VERSION): Delete. * Makefile.am (CONFIG_STATUS_DEPENDENCIES): Remove bfd/configure.in. * configure: Regenerate. * Makefile.in: Regenerate. ld/ * configure.in: Include bfd/version.m4. (AC_INIT, AM_INIT_AUTOMAKE): Use modern form. (BFD_VERSION): Delete. * Makefile.am (CONFIG_STATUS_DEPENDENCIES): Remove bfd/configure.in. * configure: Regenerate. * Makefile.in: Regenerate.
2014-07-04 04:05:16 +02:00
(print_insn_avr): Do not select opcode if insn ISA is avrtiny and
machine is not avrtiny.
Add support for the AVR Tiny series of microcontrollers. * archures.c: add avrtiny architecture for avr target. * bfd-in2.h: Regenerate. * cpu-avr.c (arch_info_struct): add avrtiny arch info. * elf32-avr.c (elf_avr_howto_table): new relocation R_AVR_LDS_STS_16 added for 16 bit LDS/STS instruction of avrtiny arch. (avr_reloc_map): reloc R_AVR_LDS_STS_16 is mapped to BFD_RELOC_AVR_LDS_STS_16. (bfd_elf_avr_final_write_processing): select machine number avrtiny arch. (elf32_avr_object_p): set machine number for avrtiny arch. * libbfd.h: Regenerate. * reloc.c: Add documentation for BFD_RELOC_AVR_LDS_STS_16 reloc. * config/tc-avr.c (mcu_types): Add avrtiny arch. Add avrtiny arch devices attiny4, attiny5, attiny9, attiny10, attiny20 and attiny40. (md_show_usage): Add avrtiny arch in usage message. (avr_operand): validate and issue error for invalid register for avrtiny. add new reloc exp for 16 bit lds/sts instruction. (md_apply_fix): check 16 bit lds/sts operand for out of range and encode. (md_assemble): check ISA for arch and issue diagnostic. * include/elf/avr.h (E_AVR_MACH_AVRTINY): define avrtiny machine number. (R_AVR_LDS_STS_16): define 16 bit lds/sts reloc number. * include/opcode/avr.h (AVR_ISA_TINY): define avrtiny specific ISA. (AVR_ISA_2xxxa): define ISA without LPM. (AVR_ISA_AVRTINY): define avrtiny arch ISA. Add doc for contraint used in 16 bit lds/sts. Adjust ISA group for icall, ijmp, pop and push. Add 16 bit lds/sts encoding and update 32 bit lds/sts constraints. * opcodes/avr-dis.c (avr_operand): Handle constraint j for 16 bit lds/sts. (print_insn_avr): do not select opcode if insn ISA is avrtiny and machine is not avrtiny. * Makefile.am (ALL_EMULATION_SOURCES): add avrtiny emulation source. (eavrtiny.c): add rules for avrtiny emulation source. * Makefile.in: Regenerate. * configure.tgt: Add avrtiny to avr target emulations. * scripttempl/avrtiny.sc: New file. linker script template for avrtiny arch. * emulparams/avrtiny.sh: New file. emulation parameters for avrtiny arch.
2014-07-01 11:20:17 +02:00
2014-06-26 Philippe De Muyter <phdm@macqel.be>
* or1k-desc.h (spr_field_masks): Add U suffix to the end of long
constants.
2014-06-12 Alan Modra <amodra@gmail.com>
* or1k-asm.c, * or1k-desc.c, * or1k-desc.h, * or1k-dis.c,
* or1k-ibld.c, * or1k-opc.c, * or1k-opc.h, * or1k-opinst.c: Regenerate.
2014-06-10 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (fwait_prefix): New.
(ckprefix): Set fwait_prefix.
(print_insn): Properly print prefixes before fwait.
2014-06-07 Alan Modra <amodra@gmail.com>
* ppc-opc.c (UISIGNOPT): Define and use with cmpli.
Make it easy to make --disable-werror the default for both binutils and gdb The goal of this patch is to provide an easy way to make --disable-werror the default when building binutils, or the parts of binutils that need to get built when building GDB. In development mode, we want to continue making -Werror the default with GCC. But, when making releases, I think we want to make it as easy as possible for regular users to successfully build from sources. GDB already has this kind of feature to turn -Werror as well as the use of the libmcheck library. As GDB Release Manager, I take advantage of it to turn those off after having cut the branch. I'd like to be able to do the same for the binutils bits. And perhaps Tristan will want to do the same for his releases too (not sure, binutils builders might be a little savvier than GDB builders). This patch introduces a new file, called development.sh, which just sets a variable called $development. In our development branches (Eg. "master"), it's set to true. But setting it to false would allow us to change the default behavior of various development-related features to be turned off; in this case, it turns off the use of -Werror by default (use --enable-werror to turn it back on). bfd/ChangeLog: * development.sh: New file. * warning.m4 (AM_BINUTILS_WARNINGS): Source bfd/development.sh. Make -Werror the default with GCC only if DEVELOPMENT is true. * Makefile.am (CONFIG_STATUS_DEPENDENCIES): Add $(srcdir)/development.sh. * Makefile.in, configure: Regenerate. binutils/ChangeLog: * Makefile.am (CONFIG_STATUS_DEPENDENCIES): Add dependency on bfd's development.sh. * Makefile.in, configure: Regenerate. gas/ChangeLog: * Makefile.am (CONFIG_STATUS_DEPENDENCIES): Add dependency on bfd's development.sh. * Makefile.in, configure: Regenerate. gold/ChangeLog: * Makefile.am (CONFIG_STATUS_DEPENDENCIES): New. * Makefile.in, configure: Regenerate. gprof/ChangeLog: * Makefile.am (CONFIG_STATUS_DEPENDENCIES): Add dependency on bfd's development.sh. * Makefile.in, configure: Regenerate. ld/ChangeLog: * Makefile.am (CONFIG_STATUS_DEPENDENCIES): Add dependency on bfd's development.sh. * Makefile.in, configure: Regenerate. opcodes/ChangeLog: * Makefile.am (CONFIG_STATUS_DEPENDENCIES): Add dependency on bfd's development.sh. * Makefile.in, configure: Regenerate. gdb/ChangeLog: * development.sh: Delete. * Makefile.in (config.status): Adjust dependency on development.sh. * configure.ac: Adjust development.sh source call. * configure: Regenerate. gdb/gdbserver/ChangeLog: * configure.ac: Adjust development.sh source call. * Makefile.in (config.status): Adjust dependency on development.sh. * configure: Regenerate. Tested on x86_64-linux by building two ways: One with DEVELOPMENT set to true, and one with DEVELOPMENT set to false. In the first case, I could see the use of -Werror, while it disappeared in the second case.
2014-05-19 23:46:01 +02:00
2014-06-05 Joel Brobecker <brobecker@adacore.com>
* Makefile.am (CONFIG_STATUS_DEPENDENCIES): Add dependency on
bfd's development.sh.
* Makefile.in, configure: Regenerate.
2014-06-03 Nick Clifton <nickc@redhat.com>
* msp430-dis.c (msp430_doubleoperand): Use extension_word to
decide when extended addressing is being used.
2014-06-02 Eric Botcazou <ebotcazou@adacore.com>
* sparc-opc.c (cas): Disable for LEON.
(casl): Likewise.
2014-05-20 Alan Modra <amodra@gmail.com>
* m68k-dis.c: Don't include setjmp.h.
Properly display extra data/address size prefixes X86 disassembler checks data and address size prefixes when displaying instruction mnemonic and operands. For the extra data and address size prefixes, their names depend only on the address mode, not the data and address size prefixes. This patch changes x86 disassembler not to check the data and address size prefix when printing extra data and address size prefixes. gas/testsuite/ * gas/i386/nops-1-core2.d: Replace data32 with data16. * gas/i386/nops-4a-i686.d: Likewise. * gas/i386/nops-5-i686.d: Likewise. * gas/i386/nops-5.d: Likewise. * gas/i386/x86-64-cbw-intel.d: Likewise. * gas/i386/x86-64-cbw.d: Likewise. * gas/i386/x86-64-io-intel.d: Likewise. * gas/i386/x86-64-io-suffix.d: Likewise. * gas/i386/x86-64-io.d: Likewise. * gas/i386/x86-64-nops-1-core2.d: Likewise. * gas/i386/x86-64-nops-1-g64.d: Likewise. * gas/i386/x86-64-nops-1-nocona.d: Likewise. * gas/i386/x86-64-nops-1.d: Likewise. * gas/i386/x86-64-nops-2.d: Likewise. * gas/i386/x86-64-nops-3.d: Likewise. * gas/i386/x86-64-nops-4-core2.d: Likewise. * gas/i386/x86-64-nops-4.d: Likewise. * gas/i386/x86-64-nops-5-k8.d: Likewise. * gas/i386/x86-64-nops-5.d: Likewise. * gas/i386/x86-64-stack-intel.d: Likewise. * gas/i386/x86-64-stack-suffix.d: Likewise. * gas/i386/x86-64-stack.d: Likewise. * gas/i386/ilp32/x86-64-cbw-intel.d: Likewise. * gas/i386/ilp32/x86-64-cbw.d: Likewise. * gas/i386/ilp32/x86-64-io-intel.d: Likewise. * gas/i386/ilp32/x86-64-io-suffix.d: Likewise. * gas/i386/ilp32/x86-64-io.d: Likewise. * gas/i386/ilp32/x86-64-nops-1-core2.d: * gas/i386/ilp32/x86-64-nops-1-nocona.d: Likewise. * gas/i386/ilp32/x86-64-nops-1.d: Likewise. * gas/i386/ilp32/x86-64-nops-2.d: Likewise. * gas/i386/ilp32/x86-64-nops-3.d: Likewise. * gas/i386/ilp32/x86-64-nops-4-core2.d: Likewise. * gas/i386/ilp32/x86-64-nops-4.d: Likewise. * gas/i386/ilp32/x86-64-nops-5-k8.d: Likewise. * gas/i386/ilp32/x86-64-nops-5.: Likewise. * gas/i386/ilp32/x86-64-stack-intel.d: Likewise. * gas/i386/ilp32/x86-64-stack-suffix.: Likewise. * gas/i386/ilp32/x86-64-stack.d: Likewise. ld/testsuite/ * ld-x86-64/tlsbin.dd: Replace data32 with data16. * ld-x86-64/tlsdesc-nacl.pd: Likewise. * ld-x86-64/tlsgdesc.dd: Likewise. * ld-x86-64/tlsld1.dd: Likewise. * ld-x86-64/tlsld3.dd: Likewise. * ld-x86-64/tlspic.dd: Likewise. opcodes/ 2014-05-09 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (ADDR16_PREFIX): Removed. (ADDR32_PREFIX): Likewise. (DATA16_PREFIX): Likewise. (DATA32_PREFIX): Likewise. (prefix_name): Updated. (print_insn): Simplify data and address size prefixes processing.
2014-05-09 19:58:00 +02:00
2014-05-09 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (ADDR16_PREFIX): Removed.
(ADDR32_PREFIX): Likewise.
(DATA16_PREFIX): Likewise.
(DATA32_PREFIX): Likewise.
(prefix_name): Updated.
(print_insn): Simplify data and address size prefixes processing.
2014-05-08 Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
* or1k-desc.c: Regenerated.
* or1k-desc.h: Likewise.
* or1k-opc.c: Likewise.
* or1k-opc.h: Likewise.
* or1k-opinst.c: Likewise.
Add MIPS r3 and r5 support. This patch firstly adds support for mips32r3 mips32r5, mips64r3 and mips64r5. Secondly it adds support for the eretnc instruction. ChangeLog: bfd/ * aoutx.h (NAME (aout, machine_type)): Add mips32r3, mips64r3, mips32r5 and mips64r5. * archures.c (bfd_architecture): Likewise. * bfd-in2.h (bfd_architecture): Likewise. * cpu-mips.c (arch_info_struct): Likewise. * elfxx-mips.c (mips_set_isa_flags): Likewise. gas/ * tc-mips.c (ISA_SUPPORTS_MIPS16E): Add mips32r3, mips32r5, mips64r3 and mips64r5. (ISA_HAS_64BIT_FPRS): Likewise. (ISA_HAS_ROR): Likewise. (ISA_HAS_ODD_SINGLE_FPR): Likewise. (ISA_HAS_MXHC1): Likewise. (hilo_interlocks): Likewise. (md_longopts): Likewise. (ISA_HAS_64BIT_REGS): Add mips64r3 and mips64r5. (ISA_HAS_DROR): Likewise. (options): Add OPTION_MIPS32R3, OPTION_MIPS32R5, OPTION_MIPS64R3, and OPTION_MIPS64R5. (mips_isa_rev): Add support for mips32r3, mips32r5, mips64r3 and mips64r5. (md_parse_option): Likewise. (s_mipsset): Likewise. (mips_cpu_info_table): Add entries for mips32r3, mips32r5, mips64r3 and mips64r5. Also change p5600 entry to be mips32r5. * configure.in: Add support for mips32r3, mips32r5, mips64r3 and mips64r5. * configure: Regenerate. * doc/c-mips.texi: Document the -mips32r3, -mips32r5, -mips64r3 and -mips64r5 command line options. * doc/as.texinfo: Likewise. gas/testsuite/ * gas/mips/mips.exp: Add MIPS32r5 tests. Also add the mips32r3, mips32r5, mips64r3 and mips64r5 isas to the testsuite. * gas/mips/r5.s: New test. * gas/mips/r5.d: Likewise. include/opcode/ * mips.h (INSN_ISA_MASK): Updated. (INSN_ISA32R3): New define. (INSN_ISA32R5): New define. (INSN_ISA64R3): New define. (INSN_ISA64R5): New define. (INSN_ISA64, INSN_ISA64R2, INSN_ISA3_32, INSN_ISA3_32R2, INSN_ISA4_32 INSN_ISA4_32R2, INSN_ISA5_32R2): Renumbered. (mips_isa_table): Add entries for mips32r3, mips32r5, mips64r3 and mips64r5. (INSN_UPTO32R3): New define. (INSN_UPTO32R5): New define. (INSN_UPTO64R3): New define. (INSN_UPTO64R5): New define. (ISA_MIPS32R3): New define. (ISA_MIPS32R5): New define. (ISA_MIPS64R3): New define. (ISA_MIPS64R5): New define. (CPU_MIPS32R3): New define. (CPU_MIPS32R5): New define. (CPU_MIPS64R3): New define. (CPU_MIPS64R5): New define. opcodes/ * mips-opc.c (mips_builtin_opcodes): Add MIPS32r5 eretnc instruction. (I34): New define. (I36): New define. (I66): New define. (I68): New define. * mips-dis.c (mips_arch_choices): Add mips32r3, mips32r5, mips64r3 and mips64r5. (parse_mips_dis_option): Update MSA and virtualization support to allow mips64r3 and mips64r5.
2014-05-02 15:12:48 +02:00
2014-05-07 Andrew Bennett <andrew.bennett@imgtec.com>
* mips-opc.c (mips_builtin_opcodes): Add MIPS32r5 eretnc instruction.
(I34): New define.
(I36): New define.
(I66): New define.
(I68): New define.
* mips-dis.c (mips_arch_choices): Add mips32r3, mips32r5, mips64r3 and
mips64r5.
(parse_mips_dis_option): Update MSA and virtualization support to
allow mips64r3 and mips64r5.
Add MIPS r3 and r5 support. This patch firstly adds support for mips32r3 mips32r5, mips64r3 and mips64r5. Secondly it adds support for the eretnc instruction. ChangeLog: bfd/ * aoutx.h (NAME (aout, machine_type)): Add mips32r3, mips64r3, mips32r5 and mips64r5. * archures.c (bfd_architecture): Likewise. * bfd-in2.h (bfd_architecture): Likewise. * cpu-mips.c (arch_info_struct): Likewise. * elfxx-mips.c (mips_set_isa_flags): Likewise. gas/ * tc-mips.c (ISA_SUPPORTS_MIPS16E): Add mips32r3, mips32r5, mips64r3 and mips64r5. (ISA_HAS_64BIT_FPRS): Likewise. (ISA_HAS_ROR): Likewise. (ISA_HAS_ODD_SINGLE_FPR): Likewise. (ISA_HAS_MXHC1): Likewise. (hilo_interlocks): Likewise. (md_longopts): Likewise. (ISA_HAS_64BIT_REGS): Add mips64r3 and mips64r5. (ISA_HAS_DROR): Likewise. (options): Add OPTION_MIPS32R3, OPTION_MIPS32R5, OPTION_MIPS64R3, and OPTION_MIPS64R5. (mips_isa_rev): Add support for mips32r3, mips32r5, mips64r3 and mips64r5. (md_parse_option): Likewise. (s_mipsset): Likewise. (mips_cpu_info_table): Add entries for mips32r3, mips32r5, mips64r3 and mips64r5. Also change p5600 entry to be mips32r5. * configure.in: Add support for mips32r3, mips32r5, mips64r3 and mips64r5. * configure: Regenerate. * doc/c-mips.texi: Document the -mips32r3, -mips32r5, -mips64r3 and -mips64r5 command line options. * doc/as.texinfo: Likewise. gas/testsuite/ * gas/mips/mips.exp: Add MIPS32r5 tests. Also add the mips32r3, mips32r5, mips64r3 and mips64r5 isas to the testsuite. * gas/mips/r5.s: New test. * gas/mips/r5.d: Likewise. include/opcode/ * mips.h (INSN_ISA_MASK): Updated. (INSN_ISA32R3): New define. (INSN_ISA32R5): New define. (INSN_ISA64R3): New define. (INSN_ISA64R5): New define. (INSN_ISA64, INSN_ISA64R2, INSN_ISA3_32, INSN_ISA3_32R2, INSN_ISA4_32 INSN_ISA4_32R2, INSN_ISA5_32R2): Renumbered. (mips_isa_table): Add entries for mips32r3, mips32r5, mips64r3 and mips64r5. (INSN_UPTO32R3): New define. (INSN_UPTO32R5): New define. (INSN_UPTO64R3): New define. (INSN_UPTO64R5): New define. (ISA_MIPS32R3): New define. (ISA_MIPS32R5): New define. (ISA_MIPS64R3): New define. (ISA_MIPS64R5): New define. (CPU_MIPS32R3): New define. (CPU_MIPS32R5): New define. (CPU_MIPS64R3): New define. (CPU_MIPS64R5): New define. opcodes/ * mips-opc.c (mips_builtin_opcodes): Add MIPS32r5 eretnc instruction. (I34): New define. (I36): New define. (I66): New define. (I68): New define. * mips-dis.c (mips_arch_choices): Add mips32r3, mips32r5, mips64r3 and mips64r5. (parse_mips_dis_option): Update MSA and virtualization support to allow mips64r3 and mips64r5.
2014-05-02 15:12:48 +02:00
2014-05-07 Andrew Bennett <andrew.bennett@imgtec.com>
* mips-opc.c (G3): Remove I4.
Properly handle multiple opcode prefixes This patch updates multiple opcode prefix processing: 1. Always print prefix together with bad opcode. 2. Since the last seen segment register prefix is active, we only print the active segment register in the memory operand. 3. The 0xf2 and 0xf3 prefixes take precedence over the 0x66 prefix as the opcode prefix. Also the last of the 0xf2 and 0xf3 prefixes wins. 4. Ignore invalid 0xf2/0xf3 prefixes if they aren't mandatory. gas/testsuite/ PR binutils/16893 * gas/i386/katmai.d: Expect "gs" as prefix. * gas/i386/long-1.s: Replace movapd with movss. * gas/i386/x86-64-long-1.s: Likewise. * gas/i386/long-1-intel.d: Updated. * gas/i386/long-1.d: Likewise. * gas/i386/x86-64-long-1-intel.d: Likewise. * gas/i386/x86-64-long-1.d: Likewise. * gas/i386/prefix.s: Add tests for multiple 0x66, 0x67, 0xf0, 0xf2 and 0xf3 prefixes. * gas/i386/prefix.d: Updated. opcodes/ PR binutils/16893 * i386-dis.c (twobyte_has_mandatory_prefix): New variable. (end_codep): Likewise. (mandatory_prefix): Likewise. (active_seg_prefix): Likewise. (ckprefix): Set active_seg_prefix to the active segment register prefix. (seg_prefix): Removed. (get_valid_dis386): Use the last of PREFIX_REPNZ and PREFIX_REPZ for prefix index. Ignore the index if it is invalid and the mandatory prefix isn't required. (print_insn): Set mandatory_prefix if the PREFIX_XXX prefix is mandatory. Don't set PREFIX_REPZ/PREFIX_REPNZ/PREFIX_LOCK bits in used_prefixes here. Don't print unused prefixes. Check active_seg_prefix for the active segment register prefix. Restore the DFLAG bit in sizeflag if the data size prefix is unused. Check the unused mandatory PREFIX_XXX prefixes (append_seg): Only print the segment register which gets used. (OP_E_memory): Check active_seg_prefix for the segment register prefix. (OP_OFF): Likewise. (OP_OFF64): Likewise. (OP_DSreg): Set active_seg_prefix to PREFIX_DS if it is unset.
2014-05-02 20:22:04 +02:00
2014-05-05 H.J. Lu <hongjiu.lu@intel.com>
PR binutils/16893
* i386-dis.c (twobyte_has_mandatory_prefix): New variable.
(end_codep): Likewise.
(mandatory_prefix): Likewise.
(active_seg_prefix): Likewise.
(ckprefix): Set active_seg_prefix to the active segment register
prefix.
(seg_prefix): Removed.
(get_valid_dis386): Use the last of PREFIX_REPNZ and PREFIX_REPZ
for prefix index. Ignore the index if it is invalid and the
mandatory prefix isn't required.
(print_insn): Set mandatory_prefix if the PREFIX_XXX prefix is
mandatory. Don't set PREFIX_REPZ/PREFIX_REPNZ/PREFIX_LOCK bits
in used_prefixes here. Don't print unused prefixes. Check
active_seg_prefix for the active segment register prefix.
Restore the DFLAG bit in sizeflag if the data size prefix is
unused. Check the unused mandatory PREFIX_XXX prefixes
(append_seg): Only print the segment register which gets used.
(OP_E_memory): Check active_seg_prefix for the segment register
prefix.
(OP_OFF): Likewise.
(OP_OFF64): Likewise.
(OP_DSreg): Set active_seg_prefix to PREFIX_DS if it is unset.
Use sigsetjmp/siglongjmp in opcodes sigsetjmp/siglongjmp without saving the signal mask is faster than setjmp/longjmp on systems where the signal mask is saved. This patch uses sigsetjmp/siglongjmp without saving the signal mask if possible. PR binutils/16886 * config.in: Regenerated. * configure: Likewise. * configure.in: Check if sigsetjmp is available. * h8500-dis.c (private): Replace jmp_buf with OPCODES_SIGJMP_BUF. (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP. (print_insn_h8500): Replace setjmp with OPCODES_SIGSETJMP. * i386-dis.c (dis_private): Replace jmp_buf with OPCODES_SIGJMP_BUF. (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP. (print_insn): Replace setjmp with OPCODES_SIGSETJMP. * ns32k-dis.c (private): Replace jmp_buf with OPCODES_SIGJMP_BUF. (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP. (print_insn_ns32k): Replace setjmp with OPCODES_SIGSETJMP. * sysdep.h (OPCODES_SIGJMP_BUF): New macro. (OPCODES_SIGSETJMP): Likewise. (OPCODES_SIGLONGJMP): Likewise. * vax-dis.c (private): Replace jmp_buf with OPCODES_SIGJMP_BUF. (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP. (print_insn_vax): Replace setjmp with OPCODES_SIGSETJMP. * xtensa-dis.c (dis_private): Replace jmp_buf with OPCODES_SIGJMP_BUF. (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP. (print_insn_xtensa): Replace setjmp with OPCODES_SIGSETJMP. * z8k-dis.c(instr_data_s): Replace jmp_buf with OPCODES_SIGJMP_BUF. (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP. (print_insn_z8k): Replace setjmp with OPCODES_SIGSETJMP.
2014-05-02 17:27:16 +02:00
2014-05-02 H.J. Lu <hongjiu.lu@intel.com>
PR binutils/16886
* config.in: Regenerated.
* configure: Likewise.
* configure.in: Check if sigsetjmp is available.
* h8500-dis.c (private): Replace jmp_buf with OPCODES_SIGJMP_BUF.
(fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
(print_insn_h8500): Replace setjmp with OPCODES_SIGSETJMP.
* i386-dis.c (dis_private): Replace jmp_buf with OPCODES_SIGJMP_BUF.
(fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
(print_insn): Replace setjmp with OPCODES_SIGSETJMP.
* ns32k-dis.c (private): Replace jmp_buf with OPCODES_SIGJMP_BUF.
(fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
(print_insn_ns32k): Replace setjmp with OPCODES_SIGSETJMP.
* sysdep.h (OPCODES_SIGJMP_BUF): New macro.
(OPCODES_SIGSETJMP): Likewise.
(OPCODES_SIGLONGJMP): Likewise.
* vax-dis.c (private): Replace jmp_buf with OPCODES_SIGJMP_BUF.
(fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
(print_insn_vax): Replace setjmp with OPCODES_SIGSETJMP.
* xtensa-dis.c (dis_private): Replace jmp_buf with
OPCODES_SIGJMP_BUF.
(fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
(print_insn_xtensa): Replace setjmp with OPCODES_SIGSETJMP.
* z8k-dis.c(instr_data_s): Replace jmp_buf with OPCODES_SIGJMP_BUF.
(fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
(print_insn_z8k): Replace setjmp with OPCODES_SIGSETJMP.
2014-05-01 H.J. Lu <hongjiu.lu@intel.com>
PR binutils/16891
* i386-dis.c (print_insn): Handle prefixes before fwait.
2014-04-26 Alan Modra <amodra@gmail.com>
* po/POTFILES.in: Regenerate.
2014-04-23 Andrew Bennett <andrew.bennett@imgtec.com>
* mips-dis.c (mips_arch_choices): Update mips32r2 and mips64r2
to allow the MIPS XPA ASE.
(parse_mips_dis_option): Process the -Mxpa option.
* mips-opc.c (XPA): New define.
(mips_builtin_opcodes): Add MIPS XPA instructions and move the
locations of the ctc0 and cfc0 instructions.
2014-04-22 Christian Svensson <blue@cmd.nu>
* Makefile.am: Remove openrisc and or32 support. Add support for or1k.
* configure.in: Likewise.
* disassemble.c: Likewise.
* or1k-asm.c: New file.
* or1k-desc.c: New file.
* or1k-desc.h: New file.
* or1k-dis.c: New file.
* or1k-ibld.c: New file.
* or1k-opc.c: New file.
* or1k-opc.h: New file.
* or1k-opinst.c: New file.
* Makefile.in: Regenerate.
* configure: Regenerate.
* openrisc-asm.c: Delete.
* openrisc-desc.c: Delete.
* openrisc-desc.h: Delete.
* openrisc-dis.c: Delete.
* openrisc-ibld.c: Delete.
* openrisc-opc.c: Delete.
* openrisc-opc.h: Delete.
* or32-dis.c: Delete.
* or32-opc.c: Delete.
2014-04-04 Ilya Tocar <ilya.tocar@intel.com>
* i386-dis.c (rm_table): Add encls, enclu.
* i386-gen.c (cpu_flag_init): Add CPU_SE1_FLAGS,
(cpu_flags): Add CpuSE1.
* i386-opc.h (enum): Add CpuSE1.
(i386_cpu_flags): Add cpuse1.
* i386-opc.tbl: Add encls, enclu.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
2014-04-02 Anthony Green <green@moxielogic.com>
* moxie-opc.c (moxie_form1_opc_info): Add sign-extension
instructions, sex.b and sex.s.
2014-03-26 Jiong Wang <jiong.wang@arm.com>
* aarch64-dis.c (aarch64_ext_ldst_elemlist): Check H/S undefined
instructions.
2014-03-20 Ilya Tocar <ilya.tocar@intel.com>
* i386-opc.tbl: Change memory size for vgatherpf0qps, vgatherpf1qps,
vscatterpf0qps, vscatterpf1qps, vgatherqps, vpgatherqd, vpscatterqd,
vscatterqps.
* i386-tbl.h: Regenerate.
2014-03-19 Jose E. Marchesi <jose.marchesi@oracle.com>
* sparc-dis.c (v9_hpriv_reg_names): Names for %hstick_offset and
%hstick_enable added.
2014-03-19 Nick Clifton <nickc@redhat.com>
* rx-decode.opc (bwl): Allow for bogus instructions with a size
field of 3.
2014-03-19 10:40:21 +01:00
(sbwl, ubwl, SCALE): Likewise.
* rx-decode.c: Regenerate.
2014-03-12 Alan Modra <amodra@gmail.com>
* Makefile.in: Regenerate.
2014-03-05 12:46:15 +01:00
2014-03-05 Alan Modra <amodra@gmail.com>
Update copyright years.
2014-03-04 Heiher <r@hev.cc>
* mips-dis.c (mips_arch_choices): Usee ISA_MIPS64R2 for Loongson-3A.
2014-03-04 Richard Sandiford <rdsandiford@googlemail.com>
* mips-opc.c (mips_builtin_opcodes): Move the udi* instructions
so that they come after the Loongson extensions.
2014-03-03 Alan Modra <amodra@gmail.com>
* i386-gen.c (process_copyright): Emit copyright notice on one line.
2014-02-28 Alan Modra <amodra@gmail.com>
* msp430-decode.c: Regenerate.
2014-02-27 Jiong Wang <jiong.wang@arm.com>
* aarch64-tbl.h (aarch64_opcode_table): Replace IMM0 with
FPIMM0 for fcmeq, fcmgt, fcmge, fcmlt and fcmle.
2014-02-27 Yufeng Zhang <yufeng.zhang@arm.com>
* aarch64-opc.c (print_register_offset_address): Call
get_int_reg_name to prepare the register name.
2014-02-25 Ilya Tocar <ilya.tocar@intel.com>
* i386-opc.tbl: Remove wrong variant of vcvtps2ph
* i386-tbl.h: Regenerate.
2014-02-20 Ilya Tocar <ilya.tocar@intel.com>
* i386-gen.c (cpu_flag_init): Add CPU_PREFETCHWT1_FLAGS/
(cpu_flags): Add CpuPREFETCHWT1.
* i386-init.h: Regenerate.
* i386-opc.h (CpuPREFETCHWT1): New.
(i386_cpu_flags): Add cpuprefetchwt1.
* i386-opc.tbl: Cahnge CPU of prefetchwt1 from CpuAVX512PF to CpuPREFETCHWT1.
* i386-tbl.h: Regenerate.
2014-02-20 Ilya Tocar <ilya.tocar@intel.com>
* i386-opc.tbl: Change CPU of vptestnmq, vptestnmd from CpuAVX512CD,
to CpuAVX512F.
* i386-tbl.h: Regenerate.
2014-02-19 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (output_cpu_flags): Don't output trailing space.
(output_opcode_modifier): Likewise.
(output_operand_type): Likewise.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
Add clflushopt, xsaves, xsavec, xrstors gas/ 2014-02-12 Ilya Tocar <ilya.tocar@intel.com> * config/tc-i386.c (cpu_arch): Add .clflushopt, .xsavec, .xsaves. * doc/c-i386.texi: Document .xsavec/xsavec/.xsaves/xsaves/ clflushopt/.clfushopt. gas/testsuite/ 2014-02-12 Ilya Tocar <ilya.tocar@intel.com> * gas/i386/clflushopt-intel.d: New. * gas/i386/clflushopt.d: Ditto. * gas/i386/clflushopt.s: Ditto. * gas/i386/i386.exp: Run new tests. * gas/i386/x86-64-clflushopt-intel.d: New. * gas/i386/x86-64-clflushopt.d: Ditto. * gas/i386/x86-64-clflushopt.s: Ditto. * gas/i386/x86-64-xsavec-intel.d: Ditto. * gas/i386/x86-64-xsavec.d: Ditto. * gas/i386/x86-64-xsavec.s: Ditto. * gas/i386/x86-64-xsaves-intel.d: Ditto. * gas/i386/x86-64-xsaves.d: Ditto. * gas/i386/x86-64-xsaves.s: Ditto. * gas/i386/xsavec-intel.d: Ditto. * gas/i386/xsavec.d: Ditto. * gas/i386/xsavec.s: Ditto. * gas/i386/xsaves-intel.d: Ditto. * gas/i386/xsaves.d: Ditto. * gas/i386/xsaves.s: Ditto. opcodes/ 2014-02-12 Ilya Tocar <ilya.tocar@intel.com> * i386-dis.c (MOD enum): Add MOD_0FC7_REG_3, MOD_0FC7_REG_4, MOD_0FC7_REG_5. (PREFIX enum): Add PREFIX_0FAE_REG_7. (reg_table): Add MOD_0FC7_REG_3, MOD_0FC7_REG_4 MOD_0FC7_REG_5. (prefix_table): Add clflusopt. (mod_table): Add xrstors, xsavec, xsaves. * i386-gen.c (cpu_flag_init): Add CPU_CLFLUSHOPT_FLAGS, CPU_XSAVES_FLAGS, CPU_XSAVEC_FLAGS. (cpu_flags): Add CpuClflushOpt, CpuXSAVES, CpuXSAVEC. * i386-init.h: Regenerate. * i386-opc.tbl: Add clflushopt, xrstors, xrstors64, xsaves, xsaves64, xsavec, xsavec64. * i386-tbl.h: Regenerate.
2013-11-25 13:35:42 +01:00
2014-02-12 Ilya Tocar <ilya.tocar@intel.com>
* i386-dis.c (MOD enum): Add MOD_0FC7_REG_3, MOD_0FC7_REG_4,
MOD_0FC7_REG_5.
(PREFIX enum): Add PREFIX_0FAE_REG_7.
(reg_table): Add MOD_0FC7_REG_3, MOD_0FC7_REG_4 MOD_0FC7_REG_5.
(prefix_table): Add clflusopt.
(mod_table): Add xrstors, xsavec, xsaves.
* i386-gen.c (cpu_flag_init): Add CPU_CLFLUSHOPT_FLAGS,
CPU_XSAVES_FLAGS, CPU_XSAVEC_FLAGS.
(cpu_flags): Add CpuClflushOpt, CpuXSAVES, CpuXSAVEC.
* i386-init.h: Regenerate.
* i386-opc.tbl: Add clflushopt, xrstors, xrstors64, xsaves,
xsaves64, xsavec, xsavec64.
* i386-tbl.h: Regenerate.
2014-02-10 Alan Modra <amodra@gmail.com>
* po/POTFILES.in: Regenerate.
* po/opcodes.pot: Regenerate.
2014-01-30 Michael Zolotukhin <michael.v.zolotukhin@gmail.com>
Jan Beulich <jbeulich@suse.com>
PR binutils/16490
* i386-dis.c (OP_E_memory): Fix shift computation for
vex_vsib_q_w_dq_mode.
2014-01-09 Bradley Nelson <bradnelson@google.com>
Roland McGrath <mcgrathr@google.com>
* i386-dis.c (print_insn): Do not touch all_prefixes[-1] when
last_rex_prefix is -1.
2014-01-08 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (process_copyright): Update copyright year to 2014.
2014-01-03 Maciej W. Rozycki <macro@codesourcery.com>
* nds32-asm.c (parse_operand): Fix out-of-range integer constant.
2014-01-08 14:32:12 +01:00
For older changes see ChangeLog-2013
1999-05-03 09:29:11 +02:00
2014-01-08 14:32:12 +01:00
Copyright (C) 2014 Free Software Foundation, Inc.
2012-12-10 13:48:03 +01:00
Copying and distribution of this file, with or without modification,
are permitted in any medium without royalty provided the copyright
notice and this notice are preserved.
1999-05-03 09:29:11 +02:00
Local Variables:
2001-01-11 20:01:42 +01:00
mode: change-log
left-margin: 8
fill-column: 74
1999-05-03 09:29:11 +02:00
version-control: never
End: