This patch fixes a few linker crashes due to TLS code reaching an assert when it
shouldn't.
The first scenario is with weak TLS symbols that remain weak during linking. In
this case the mid-end would not have seen a TLS symbol and so wouldn't have
allocated the TLS section. We currently assert here and the linker crashes with
a not very useful message.
This patch changes this to return the value 0 for the TLS symbol in question
emulating what lld and gold and other BFD targets do. However because weak TLS
is implementation defined and we don't define any behavior for it I also emit a
warning to the user to inform them of such.
Secondly when a strong TLS reference is undefined. The linker crashes even after
it correctly reported that there is an undefined reference. This changes it so
that it gracefully exits and reports a useful error.
bfd/ChangeLog:
PR ld/24601
* elfnn-aarch64.c (aarch64_relocate): Handle weak TLS and undefined TLS.
Also Pass input_bfd to _bfd_aarch64_elf_resolve_relocation.
* elfxx-aarch64.c (_bfd_aarch64_elf_resolve_relocation): Use it.
* elfxx-aarch64.h (_bfd_aarch64_elf_resolve_relocation): Emit warning
for weak TLS.
ld/ChangeLog:
PR ld/24601
* testsuite/ld-aarch64/aarch64-elf.exp (undef-tls, weak-tls): New.
* testsuite/ld-aarch64/undef-tls.d: New test.
* testsuite/ld-aarch64/undef-tls.s: New test.
* testsuite/ld-aarch64/weak-tls.d: New test.
* testsuite/ld-aarch64/weak-tls.s: New test.
These ilp32 relocations were missing for some reason.
bfd/ChangeLog:
* elfnn-aarch64.c: Enable MOVW_PREL relocs for ELF32.
include/ChangeLog:
* elf/aarch64.h (R_AARCH64_P32_MOVW_PREL_G0): Define.
(R_AARCH64_P32_MOVW_PREL_G0_NC): Define.
(R_AARCH64_P32_MOVW_PREL_G1): Define.
ld/ChangeLog:
* testsuite/ld-aarch64/aarch64-elf.exp: Add emit-relocs-22 and -23.
* testsuite/ld-aarch64/emit-relocs-22.d: New test.
* testsuite/ld-aarch64/emit-relocs-22.s: New test.
* testsuite/ld-aarch64/emit-relocs-23.d: New test.
* testsuite/ld-aarch64/emit-relocs-23.s: New test.
If the new GNU property section was being created by the linker
(this will happen only if none of the inputs have any GNU property
section but the command line to the linker forces a bti with
--force-bti), the alignment of the section and hence the program
header of PT_GNU_PROPERTY type was not being set correctly. This
patch fixes this issue.
bfd/ChangeLog:
2019-06-06 Sudakshina Das <sudi.das@arm.com>
* elfxx-aarch64.c (_bfd_aarch64_elf_link_setup_gnu_properties): Set
alignment of the new gnu property section.
ld/ChangeLog:
2019-06-06 Sudakshina Das <sudi.das@arm.com>
* testsuite/ld-aarch64/aarch64-elf.exp: Add new tests.
* testsuite/ld-aarch64/property-bti-pac4-a.d: New test.
* testsuite/ld-aarch64/property-bti-pac4-b.d: New test.
* testsuite/ld-aarch64/property-bti-pac4.s: New test.
Force sysv hash style for reliable symbol table layout.
ld/ChangeLog:
* testsuite/ld-aarch64/variant_pcs-now.d: Use --hash-style=sysv.
* testsuite/ld-aarch64/variant_pcs-shared.d: Likewise.
Propagate STO_AARCH64_VARIANT_PCS st_other attribute to the output and
add DT_AARCH64_VARIANT_PCS dynamic tag if necessary.
Mismatching attributes are not diagnosed.
bfd/ChangeLog:
* elfnn-aarch64.c (elfNN_aarch64_merge_symbol_attribute): New function.
(struct elf_aarch64_link_hash_table): Add variant_pcs member.
(elfNN_aarch64_allocate_dynrelocs): Update variant_pcs.
(elfNN_aarch64_size_dynamic_sections): Add DT_AARCH64_VARIANT_PCS.
(elf_backend_merge_symbol_attribute): Define.
ld/ChangeLog:
* testsuite/ld-aarch64/aarch64-elf.exp: Add new tests.
* testsuite/ld-aarch64/variant_pcs-1.s: New asm for tests.
* testsuite/ld-aarch64/variant_pcs-2.s: New asm for tests.
* testsuite/ld-aarch64/variant_pcs-now.d: New test.
* testsuite/ld-aarch64/variant_pcs-r.d: New test.
* testsuite/ld-aarch64/variant_pcs-shared.d: New test.
* testsuite/ld-aarch64/variant_pcs.ld: New linker script for tests.
The Cortex-A53 erratum currently has two ways it can resolve the erratum when
using the flag --fix-cortex-a53-843419:
1) If the address is within the range of an ADR instruction it rewrites the ADRP
into an ADR, and those doesn't need the use of a veneer.
2) If the address is not within range, it adds a branch to a veneer which will
execute the final bit of the erratum workaround and branch back to the call
site.
When we do this we always generate the veneers and we always align the size of
the text section to 4KB. This is because we only know which workaround we can
use after all linking has finished and all addresses are known. This means even
though the veneers are not used, we still generate the section and we still
change the size of the input section.
This is problematic for small memory devices as this would require the user to
take about a ~4KB hit in memory even though it's not even used.
Since there's no real way to restart the linking process from the final write
phase this patch solves the issue by allowing the user more control over which
erratum workaround gets used.
Concretely this changes the option --fix-cortex-a53-843419 to take optional
arguments --fix-cortex-a53-843419[=full|adr|adrp]
- full (default): Use both ADRP and ADR workaround. This is equivalent to not
specifying any options and is the default behavior before this
patch.
- adr: Only use the ADR workaround, this will not cause any increase in binary
size but linking will fail if the referenced address is out of range of
an ADR instruction.
- adrp: Use only the ADRP workaround, this will never rewrite your ADRP.
In the cases where the user knows how big their binaries are the `adr` option
would prevent the unneeded overhead.
bfd/ChangeLog:
PR ld/24373
* bfd-in.h (enum erratum_84319_opts): New
(bfd_elf64_aarch64_set_options, bfd_elf32_aarch64_set_options): Change
int to enum erratum_84319_opts.
* bfd-in2.h: Regenerate.
* elfnn-aarch64.c (struct elf_aarch64_link_hash_table): Change
fix_erratum_843419 to use new enum, remove fix_erratum_843419_adr.
(_bfd_aarch64_add_stub_entry_after): Conditionally create erratum stub.
(aarch64_size_one_stub): Conditionally size erratum 843419 stubs.
(_bfd_aarch64_resize_stubs): Amend comment.
(elfNN_aarch64_size_stubs): Don't generate stubs when no workaround
requested.
(bfd_elfNN_aarch64_set_options): Use new fix_erratum_843419 enum.
(_bfd_aarch64_erratum_843419_branch_to_stub): Implement selection of
erratum workaround.
(clear_erratum_843419_entry): Update erratum conditional.
ld/ChangeLog:
PR ld/24373
* emultempl/aarch64elf.em (PARSE_AND_LIST_LONGOPTS): Add optional args
to flags.
* NEWS: Add changes to flag.
(PARSE_AND_LIST_OPTIONS): Update help descriptions.
(PARSE_AND_LIST_ARGS_CASES): Add new options to parser.
* testsuite/ld-aarch64/aarch64-elf.exp: Add new run_dump_tests.
* testsuite/ld-aarch64/erratum843419-adr.d: New test.
* testsuite/ld-aarch64/erratum843419-adrp.d: New test.
* testsuite/ld-aarch64/erratum843419-far-adr.d: New test.
* testsuite/ld-aarch64/erratum843419-far-full.d: New test.
* testsuite/ld-aarch64/erratum843419-far.s: New test.
* testsuite/ld-aarch64/erratum843419-full.d: New test.
* testsuite/ld-aarch64/erratum843419-near.s: New test.
* testsuite/ld-aarch64/erratum843419-no-args.d: New test.
This patch aims to improve the definitions of BTI and PAC based PLTs.
The following changes are made:
* PLT0 does not need PAC instructions since the PLTGOT[2] (and PLTGOT[1])
are readonly so they cannot be corrupted at runtime. Thus both PAC plt0
and BTI+PAC plt0 are removed and we can use basic plt0 and BTI plt0
instead, respectively.
* We can remove the extra padding nops when we add the new bti instructions.
BTI plt0 and BTI TLSDESC plt are updated.
* For better performance PLTn could be padded to 24bytes. Both BTI pltn and
PAC pltn are updated.
*** bfd/ChangeLog ***
2019-04-25 Sudakshina Das <sudi.das@arm.com>
* elfnn-aarch64.c (PLT_BTI_ENTRY_SIZE): Remove.
(PLT_BTI_TLSDESC_ENTRY_SIZE): Remove.
(PLT_PAC_ENTRY_SIZE, PLT_BTI_PAC_ENTRY_SIZE): Remove.
(PLT_BTI_SMALL_ENTRY_SIZE, PLT_PAC_SMALL_ENTRY_SIZE): Update.
(elfNN_aarch64_small_plt0_pac_entry): Remove.
(elfNN_aarch64_small_plt0_bti_pac_entry): Remove.
(elfNN_aarch64_small_plt0_bti_entry): Update.
(elfNN_aarch64_small_plt_bti_entry): Update.
(elfNN_aarch64_small_plt_pac_entry): Update.
(elfNN_aarch64_tlsdesc_small_plt_bti_entry): Update.
(setup_plt_values): Setup new entries.
(elfNN_aarch64_finish_dynamic_sections): Remove size change.
(elfNN_aarch64_plt_sym_val): Likewise.
*** ld/ChangeLog ***
2019-04-25 Sudakshina Das <sudi.das@arm.com>
* testsuite/ld-aarch64/bti-pac-plt-1.d: Update.
* testsuite/ld-aarch64/bti-pac-plt-2.d: Update.
* testsuite/ld-aarch64/bti-plt-1.d: Update.
* testsuite/ld-aarch64/bti-plt-3.d: Update.
* testsuite/ld-aarch64/bti-plt-5.d: Update.
* testsuite/ld-aarch64/pac-plt-1.d: Update.
* testsuite/ld-aarch64/pac-plt-2.d: Update.
When using DF_BIND_NOW on AArch64 we don't reserve the GOT slot for a TLSDESC,
but we still emitted DT_TLSDESC_GOT and DT_TLSDESC_PLT. This caused random
memory corruption as the "special" value of (bfd_vma)-1 would be set for
dt_tlsdesc_got.
Since we don't have a value of dt_tlsdesc_got I also don't emit DT_TLSDESC_PLT
now becuase it would point to an incomplete PLT. To be able to write the PLT
entry DT_TLSDESC_GOT is needed and since we don't have one we can't write the
PLT entry either.
It is my understanding that GLIBC doesn't need these two entries when not lazy
loading. Conversely AArch32 does not reserve neither the GOT not the PLT slot
when doing DF_BIND_NOW.
AArch32 does not need these checks because these values are initialized to 0
and so the if (...) checks don't pass, but on AArch64 these are initialized
to (bfd_vma)-1 and thus we need some extra checks.
bfd/ChangeLog:
PR ld/24302
* elfnn-aarch64.c (elfNN_aarch64_size_dynamic_sections): Don't emit
DT_TLSDESC_GOT and DT_TLSDESC_PLT when DF_BIND_NOW.
(elfNN_aarch64_finish_dynamic_sections): Don't write PLT if DF_BIND_NOW.
ld/ChangeLog:
PR ld/24302
* testsuite/ld-aarch64/aarch64-elf.exp: Add new test.
* testsuite/ld-aarch64/tls-relax-gdesc-le-now.d: New test.
The AArch64 linker option to turn on BTI (--force-bti) warns in case there are
input objects which have a missing GNU NOTE section for BTI. This patch is trying
to improve the warnings that come out.
In order to do so, I propose adding a new argument to elf_merge_gnu_properties
and the backend function merge_gnu_properties. This new argument makes sure
that we now pass both the objects along with the properties to which they
belong to. The x86 backend function has also been updated to match this
change.
*** bfd/ChangeLog ***
2019-03-21 Sudakshina Das <sudi.das@arm.com>
* elf-bfd.h (struct elf_backend_data): Add argument to
merge_gnu_properties.
* elf-properties.c (elf_merge_gnu_properties): Add argument to
itself and while calling bed->merge_gnu_properties.
(elf_merge_gnu_property_list): Update the calls for
elf_merge_gnu_properties.
* elfnn-aarch64.c (elfNN_aarch64_merge_gnu_properties): Update handling
of --force-bti warning and add argument.
* elfxx-aarch64.c (_bfd_aarch64_elf_link_setup_gnu_properties): Add
warning.
* elfxx-x86.c (_bfd_x86_elf_merge_gnu_properties): Add argument.
* elfxx-x86.h (_bfd_x86_elf_merge_gnu_properties): Likewise in
declaration.
*** ld/ChangeLog ***
2019-03-21 Sudakshina Das <sudi.das@arm.com>
* testsuite/ld-aarch64/aarch64-elf.exp: Add new test.
* testsuite/ld-aarch64/bti-plt-1.s: Add .ifdef for PAC note section.
* testsuite/ld-aarch64/bti-plt-6.d: Update warning.
* testsuite/ld-aarch64/bti-plt-7.d: Likewise.
* testsuite/ld-aarch64/bti-warn.d: New test.
This is part of the patch series to add support for BTI and
PAC in AArch64 linker.
1) This patch adds new definitions of PAC enabled PLTs
and both BTI and PAC enabled PLTs.
2) It also defines the new dynamic tag DT_AARCH64_PAC_PLT
for the PAC enabled PLTs.
3) This patch adds a new ld command line option: --pac-plt.
In the presence of this option, the linker uses the PAC
enabled PLTs and marks with DT_AARCH64_PAC_PLT.
4) In case both BTI and PAC are enabled the linker should
pick PLTs enabled with both and also use dynamic tags for both.
All these are made according to the new AArch64 ELF ABI
https://developer.arm.com/docs/ihi0056/latest/elf-for-the-arm-64-bit-architecture-aarch64-abi-2018q4
*** bfd/ChangeLog ***
2019-03-13 Sudakshina Das <sudi.das@arm.com>
* elfnn-aarch64.c (PLT_PAC_ENTRY_SIZE, PLT_PAC_SMALL_ENTRY_SIZE): New.
(PLT_BTI_PAC_ENTRY_SIZE, PLT_BTI_PAC_SMALL_ENTRY_SIZE): New.
(setup_plt_values): Account for PAC or PAC and BTI enabled PLTs.
(elfNN_aarch64_size_dynamic_sections): Add checks for PLT_BTI_PAC
and PLT_PAC_PLT.
(elfNN_aarch64_finish_dynamic_sections): Account for PLT_BTI_PAC.
(get_plt_type): Add case for DT_AARCH64_PAC_PLT.
(elfNN_aarch64_plt_sym_val): Add cases for PLT_BTI_PAC and PLT_PAC.
*** binutils/ChangeLog ***
2019-03-13 Sudakshina Das <sudi.das@arm.com>
* readelf.c (get_aarch64_dynamic_type): Add case for
DT_AARCH64_PAC_PLT.
(dynamic_section_aarch64_val): Likewise.
*** include/ChangeLog ***
2019-03-13 Sudakshina Das <sudi.das@arm.com>
* elf/aarch64.h (DT_AARCH64_PAC_PLT): New.
*** ld/ChangeLog ***
2019-03-13 Sudakshina Das <sudi.das@arm.com>
* NEWS: Document --pac-plt.
* emultempl/aarch64elf.em (OPTION_PAC_PLT): New.
(PARSE_AND_LIST_LONGOPTS, PARSE_AND_LIST_OPTIONS): Add pac-plt.
(PARSE_AND_LIST_ARGS_CASES): Handle OPTION_PAC_PLT.
* testsuite/ld-aarch64/aarch64-elf.exp: Add the following tests.
* testsuite/ld-aarch64/bti-pac-plt-1.d: New test.
* testsuite/ld-aarch64/bti-pac-plt-2.d: New test.
* testsuite/ld-aarch64/pac-plt-1.d: New test.
* testsuite/ld-aarch64/pac-plt-2.d: New test.
* testsuite/ld-aarch64/bti-plt-1.s: Add .ifndef directive.
This is part of the patch series to add support for BTI and
PAC in AArch64 linker.
1) This patch adds a new ld command line option: --force-bti.
In the presence of this option, the linker enables BTI with the
GNU_PROPERTY_AARCH64_FEATURE_1_BTI feature. This gives out warning
in case of missing gnu notes for BTI in inputs.
2) It also defines a new set of BTI enabled PLTs. These are used either
when all the inputs are marked with GNU_PROPERTY_AARCH64_FEATURE_1_BTI
or when the new --force-bti option is used. This required adding new
fields in elf_aarch64_link_hash_table so that we could make the PLT
related information more generic.
3) It also defines a dynamic tag DT_AARCH64_BTI_PLT. The linker uses
this whenever it picks BTI enabled PLTs.
All these are made according to the new AArch64 ELF ABI
https://developer.arm.com/docs/ihi0056/latest/elf-for-the-arm-64-bit-architecture-aarch64-abi-2018q4
*** bfd/ChangeLog ***
2019-03-13 Sudakshina Das <sudi.das@arm.com>
Szabolcs Nagy <szabolcs.nagy@arm.com>
* bfd-in.h (aarch64_plt_type, aarch64_enable_bti_type): New.
(aarch64_bti_pac_info): New.
(bfd_elf64_aarch64_set_options): Add aarch64_bti_pac_info argument.
(bfd_elf32_aarch64_set_options): Likewise.
* bfd-in2.h: Regenerate
* elfnn-aarch64.c (PLT_BTI_ENTRY_SIZE): New.
(PLT_BTI_SMALL_ENTRY_SIZE, PLT_BTI_TLSDESC_ENTRY_SIZE): New.
(elfNN_aarch64_small_plt0_bti_entry): New.
(elfNN_aarch64_small_plt_bti_entry): New.
(elfNN_aarch64_tlsdesc_small_plt_bti_entry): New.
(elf_aarch64_obj_tdata): Add no_bti_warn and plt_type fields.
(elf_aarch64_link_hash_table): Add plt0_entry, plt_entry and
tlsdesc_plt_entry_size fields.
(elfNN_aarch64_link_hash_table_create): Initialise the new fields.
(setup_plt_values): New helper function.
(bfd_elfNN_aarch64_set_options): Use new bp_info to set plt sizes and
bti enable type.
(elfNN_aarch64_allocate_dynrelocs): Use new size members instead of
fixed macros.
(elfNN_aarch64_size_dynamic_sections): Likewise and add checks.
(elfNN_aarch64_create_small_pltn_entry): Use new generic pointers
to plt stubs instead of fixed ones and update filling them according
to the need for bti.
(elfNN_aarch64_init_small_plt0_entry): Likewise.
(elfNN_aarch64_finish_dynamic_sections): Likewise.
(get_plt_type, elfNN_aarch64_get_synthetic_symtab): New.
(elfNN_aarch64_plt_sym_val): Update size accordingly.
(elfNN_aarch64_link_setup_gnu_properties): Set up plts if BTI GNU NOTE
is set.
(bfd_elfNN_get_synthetic_symtab): Define.
(elfNN_aarch64_merge_gnu_properties): Give out warning with --force-bti
and mising BTI NOTE SECTION.
*** binutils/ChangeLog ***
2019-03-13 Sudakshina Das <sudi.das@arm.com>
Szabolcs Nagy <szabolcs.nagy@arm.com>
* readelf.c (get_aarch64_dynamic_type): New.
(get_dynamic_type): Use above for EM_AARCH64.
(dynamic_section_aarch64_val): New.
(process_dynamic_section): Use above for EM_AARCH64.
*** include/ChangeLog ***
2019-03-13 Sudakshina Das <sudi.das@arm.com>
Szabolcs Nagy <szabolcs.nagy@arm.com>
* elf/aarch64.h (DT_AARCH64_BTI_PLT): New.
*** ld/ChangeLog ***
2019-03-13 Sudakshina Das <sudi.das@arm.com>
Szabolcs Nagy <szabolcs.nagy@arm.com>
* NEWS: Document --force-bti.
* emultempl/aarch64elf.em (plt_type, bti_type, OPTION_FORCE_BTI): New.
(PARSE_AND_LIST_SHORTOPTS, PARSE_AND_LIST_OPTIONS): Add force-bti.
(PARSE_AND_LIST_ARGS_CASES): Handle OPTION_FORCE_BTI.
* testsuite/ld-aarch64/aarch64-elf.exp: Add all the tests below.
* testsuite/ld-aarch64/bti-plt-1.d: New test.
* testsuite/ld-aarch64/bti-plt-1.s: New test.
* testsuite/ld-aarch64/bti-plt-2.s: New test.
* testsuite/ld-aarch64/bti-plt-2.d: New test.
* testsuite/ld-aarch64/bti-plt-3.d: New test.
* testsuite/ld-aarch64/bti-plt-4.d: New test.
* testsuite/ld-aarch64/bti-plt-5.d: New test.
* testsuite/ld-aarch64/bti-plt-6.d: New test.
* testsuite/ld-aarch64/bti-plt-7.d: New test.
* testsuite/ld-aarch64/bti-plt-so.s: New test.
* testsuite/ld-aarch64/bti-plt.ld: New test.
This is part of the patch series to add support for BTI and
PAC in AArch64 linker.
This patch implements the following:
1) This extends in the gnu property support in the linker for
AArch64 by defining backend hooks for elf_backend_setup_gnu_properties,
elf_backend_merge_gnu_properties and elf_backend_parse_gnu_properties.
2) It defines AArch64 specific GNU property
GNU_PROPERTY_AARCH64_FEATURE_1_AND and 2 bit for BTI and PAC in it.
3) It also adds support in readelf.c to read and print these new
GNU properties in AArch64.
All these are made according to the new AArch64 ELF ABI
https://developer.arm.com/docs/ihi0056/latest/elf-for-the-arm-64-bit-architecture-aarch64-abi-2018q4
*** bfd/ChangeLog ***
2019-03-13 Sudakshina Das <sudi.das@arm.com>
* elf-properties.c (_bfd_elf_link_setup_gnu_properties): Exclude
linker created inputs from merge.
* elfnn-aarch64.c (struct elf_aarch64_obj_tdata): Add field for
GNU_PROPERTY_AARCH64_FEATURE_1_AND properties.
(elfNN_aarch64_link_setup_gnu_properties): New.
(elfNN_aarch64_merge_gnu_properties): New.
(elf_backend_setup_gnu_properties): Define for AArch64.
(elf_backend_merge_gnu_properties): Likewise.
* elfxx-aarch64.c (_bfd_aarch64_elf_link_setup_gnu_properties): Define.
(_bfd_aarch64_elf_parse_gnu_properties): Define.
(_bfd_aarch64_elf_merge_gnu_properties): Define.
* elfxx-aarch64.h (_bfd_aarch64_elf_link_setup_gnu_properties): Declare.
(_bfd_aarch64_elf_parse_gnu_properties): Declare.
(_bfd_aarch64_elf_merge_gnu_properties): Declare.
(elf_backend_parse_gnu_properties): Define for AArch64.
*** binutils/ChangeLog ***
2019-03-13 Sudakshina Das <sudi.das@arm.com>
* readelf.c (decode_aarch64_feature_1_and): New.
(print_gnu_property_note): Add case for AArch64 gnu notes.
*** include/ChangeLog ***
2019-03-13 Sudakshina Das <sudi.das@arm.com>
* elf/common.h (GNU_PROPERTY_AARCH64_FEATURE_1_AND): New.
(GNU_PROPERTY_AARCH64_FEATURE_1_BTI): New.
(GNU_PROPERTY_AARCH64_FEATURE_1_PAC): New.
*** ld/ChangeLog ***
2019-03-13 Sudakshina Das <sudi.das@arm.com>
* NEWS: Document GNU_PROPERTY_AARCH64_FEATURE_1_BTI and
GNU_PROPERTY_AARCH64_FEATURE_1_PAC.
* testsuite/ld-aarch64/aarch64-elf.exp: Add run commands for new tests.
* testsuite/ld-aarch64/property-bti-pac1.d: New test.
* testsuite/ld-aarch64/property-bti-pac1.s: New test.
* testsuite/ld-aarch64/property-bti-pac2.d: New test.
* testsuite/ld-aarch64/property-bti-pac2.s: New test.
* testsuite/ld-aarch64/property-bti-pac3.d: New test.
The fix for PR ld/22263 causes TLS relocations using ADRP to be relaxed
into MOVZ, however this causes issues for the erratum code.
The erratum code scans the input sections looking for ADRP instructions
and notes their location in the stream.
It then later tries to find them again in order to generate the linker
stubs. Due to the relaxation it instead finds a MOVZ and hard aborts.
Since this relaxation is a valid one, and in which case the erratum no
longer applies, it shouldn't abort but instead just continue.
This changes the TLS relaxation code such that when it finds an ADRP and
it relaxes it, it removes the erratum entry from the work list by changing
the stub type into none so the stub is ignored.
The entry is not actually removed as removal is a more expensive operation
and we have already allocated the memory anyway.
The clearing is done for IE->LE and GD->LE relaxations, and a testcase is
added for the IE case. The GD case I believe to be impossible to get together
with the erratum sequence due to the required BL which would break the sequence.
However to cover all basis I have added the guard there as well.
build on native hardware and regtested on
aarch64-none-elf, aarch64-none-elf (32 bit host),
aarch64-none-linux-gnu, aarch64-none-linux-gnu (32 bit host)
Cross-compiled and regtested on
aarch64-none-linux-gnu, aarch64_be-none-linux-gnu
Testcase in PR23940 tested and works as expected now and benchmarks ran on A53
showing no regressions and no issues.
bfd/ChangeLog:
PR ld/23904
* elfnn-aarch64.c (_bfd_aarch64_adrp_p): Use existing constants.
(_bfd_aarch64_erratum_843419_branch_to_stub): Use _bfd_aarch64_adrp_p.
(struct erratum_835769_branch_to_stub_clear_data): New.
(_bfd_aarch64_erratum_843419_clear_stub): New.
(clear_erratum_843419_entry): New.
(elfNN_aarch64_tls_relax): Use it.
(elfNN_aarch64_relocate_section): Pass input_section.
(aarch64_map_one_stub): Handle branch type none as valid.
ld/ChangeLog:
PR ld/23904
* testsuite/ld-aarch64/aarch64-elf.exp: Add erratum843419_tls_ie.
* testsuite/ld-aarch64/erratum843419_tls_ie.d: New test.
* testsuite/ld-aarch64/erratum843419_tls_ie.s: New test.
This patch fixes some ifunc testisms after H.J. Lu's patch to enable the
use of IFUNC pointers in position dependent code for binutils. See PR
LD/23169 in binutils bugzilla.
The aarch64 ifunc error message test was changed to no longer expect
this error message as this is now an accepted combination. This patch
also disables the executable tests added by H.J. Lu for aarch64, just as
Alan Modra did with his patch, as these tests only seem to work on some
architectures.
ld/ChangeLog:
2018-07-19 Andre Vieira <andre.simoesdiasvieira@arm.com>
* testsuite/ld-aarch64/ifunc-9.d: Remove no longer expected error.
* testsuite/ld-ifunc/ifunc.exp: Disable tests for aarch64.
Many ELF targets arrange to emit a number of section symbols in
.dynsym for use by dynamic relocations. This happens before the
dynamic relocations are output, and the need for those symbols
determined. In most cases they are not needed. A proper analysis of
the need for dynamic section symbols is target specific and tedious,
so this patch just excludes them in the obvious case when no
dynamic relocations are present.
The patch also runs the new pr23161 and pr23162 tests on more targets.
bfd/
* elf-bfd.h (struct elf_link_hash_table): Add "dynamic_relocs".
* elflink.c (_bfd_elf_init_2_index_sections): Comment fix.
(_bfd_elf_add_dynamic_entry): Set "dynamic_relocs".
(_bfd_elf_link_renumber_dynsyms): Exclude all section symbols when
"dynamic_relocs" is not set.
* elfxx-mips.c (count_section_dynsyms): Likewise.
ld/
* testsuite/ld-elf/readelf.exp: Delete DUMP and selection of
variant ver_def.vd.
* testsuite/ld-elf/ver_def-tic6x.vd: Delete.
* testsuite/ld-elf/shared.exp: Run most pr23161 and pr23162 tests for
linux, nacl and gnu targets.
* testsuite/ld-mips-elf/mips-elf.exp: Set base_syms to 1.
* testsuite/ld-elf/pr23161a.rd: Don't check reloc type. Allow any
order of __bss_start, _edata and _end.
* testsuite/ld-elf/pr23161b.rd: Don't check plt and dyn relocs.
Allow and order of __bss_start, _edata and _end.
* testsuite/ld-elf/pr23162.rd: Fail if __bss_start, _edata or _end
relocs are present rather than testing for no relocations.
* testsuite/ld-aarch64/gc-plt-relocs.d,
* testsuite/ld-aarch64/ifunc-1-local.d,
* testsuite/ld-aarch64/ifunc-1.d,
* testsuite/ld-aarch64/ifunc-2-local.d,
* testsuite/ld-aarch64/ifunc-2.d,
* testsuite/ld-aarch64/ifunc-21.d,
* testsuite/ld-aarch64/ifunc-3a.d,
* testsuite/ld-arm/farcall-mixed-lib-v4t.d,
* testsuite/ld-arm/farcall-mixed-lib.d,
* testsuite/ld-arm/gc-hidden-1.d,
* testsuite/ld-arm/tls-gdesc-got.d,
* testsuite/ld-arm/tls-lib-loc.d,
* testsuite/ld-arm/tls-longplt-lib.d,
* testsuite/ld-arm/tls-thumb1.d,
* testsuite/ld-cris/libdso-10.d,
* testsuite/ld-cris/libdso-11.d,
* testsuite/ld-cris/libdso-13b.d,
* testsuite/ld-cris/libdso-14.d,
* testsuite/ld-cris/libdso-15.d,
* testsuite/ld-cris/pic-gc-72.d,
* testsuite/ld-cris/pic-gc-73.d,
* testsuite/ld-cris/tls-gc-71.d,
* testsuite/ld-mips-elf/mips16-pic-4a.nd,
* testsuite/ld-mips-elf/pic-and-nonpic-3a.dd,
* testsuite/ld-mips-elf/pie-n32.d,
* testsuite/ld-mips-elf/pie-n64.d,
* testsuite/ld-mips-elf/pie-o32.d: Update for removed dynamic
section symbols.
This patch adds the following relocation support into binutils bfd linker.
BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12,
BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12_NC,
BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12,
BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12_NC,
BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12,
BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12_NC,
BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12,
BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12_NC.
Those relocations includes both ip64 and ilp32 variant.
For absolute symbols which are forced local or not dynamic, the ABS relocation
should be resolved at static linking time.
Originally, an RELATIVE/ABS relocation will be generated even for absolution
symbols for the dynamic linker to resolve.
bfd/
2018-03-07 Renlin Li <renlin.li@arm.com>
PR ld/20402
* elfnn-aarch64.c (elfNN_aarch64_final_link_relocate): Check absolute symbol,
and don't emit relocation in specific case.
ld/
2018-03-07 Renlin Li <renlin.li@arm.com>
PR ld/20402
* testsuite/ld-aarch64/aarch64-elf.exp: Run new test.
* testsuite/ld-aarch64/pr20402.s: New.
* testsuite/ld-aarch64/pr20402.d: New.
More standarization of error/warning messages. The ARM backend has
some multi-line error messages, which don't fit particularly well with
the GNU coding standard insistence that error messages shouldn't be
capitalized or have a full-stop. I've replaced the line breaks with
semicolons.
So for instance the following
system/path/to/ld: myobject.o: invalid special symbol `foo'.
system/path/to/ld: It must be a global or weak function symbol.
becomes
system/path/to/ld: myobject.o: invalid special symbol `foo'; it must be a global or weak function symbol
bfd/
* elf32-arm.c, * elfnn-aarch64.c: Standardize error/warning messages.
ld/
* testsuite/ld-aarch64/reloc-overflow-bad.d,
* testsuite/ld-arm/attr-merge-9.out,
* testsuite/ld-arm/attr-merge-arch-2.d,
* testsuite/ld-arm/attr-merge-unknown-1.d,
* testsuite/ld-arm/attr-merge-unknown-2.d,
* testsuite/ld-arm/attr-merge-unknown-2r.d,
* testsuite/ld-arm/attr-merge-unknown-3.d,
* testsuite/ld-arm/cmse-implib-errors.out,
* testsuite/ld-arm/cmse-new-earlier-later-implib.out,
* testsuite/ld-arm/cmse-new-implib-no-output.out,
* testsuite/ld-arm/cmse-new-implib-not-sg-in-implib.out,
* testsuite/ld-arm/cmse-new-implib.out,
* testsuite/ld-arm/cmse-new-wrong-implib.out,
* testsuite/ld-arm/cmse-veneers-no-gnu_sgstubs.out,
* testsuite/ld-arm/cmse-veneers-wrong-entryfct.out,
* testsuite/ld-arm/group-relocs-alu-bad-2.d,
* testsuite/ld-arm/group-relocs-alu-bad.d,
* testsuite/ld-arm/group-relocs-ldc-bad-2.d,
* testsuite/ld-arm/group-relocs-ldc-bad.d,
* testsuite/ld-arm/group-relocs-ldr-bad-2.d,
* testsuite/ld-arm/group-relocs-ldr-bad.d,
* testsuite/ld-arm/group-relocs-ldrs-bad-2.d,
* testsuite/ld-arm/group-relocs-ldrs-bad.d,
* testsuite/ld-arm/stm32l4xx-cannot-fix-far-ldm.d: Update.
The assumption that R_AARCH64_ABS16 and R_AARCH64_ABS32 relocation in LP64 abi
will be used to generate an address does not hold for absolute symbol.
In this case, it is a value fixed at static linking time.
The condition to check the relocations is relax to allow absolute symbol and
undefined symbol case.
bfd/
2018-02-05 Renlin Li <renlin.li@arm.com>
PR ld/22764
* elfnn-aarch64.c (elfNN_aarch64_check_relocs): Relax the
R_AARCH64_ABS32 and R_AARCH64_ABS16 for absolute symbol. Apply the
check for writeable section as well.
ld/
2018-02-05 Renlin Li <renlin.li@arm.com>
PR ld/22764
* testsuite/ld-aarch64/emit-relocs-258.s: Define symbol as an address.
* testsuite/ld-aarch64/emit-relocs-259.s: Likewise.
* testsuite/ld-aarch64/aarch64-elf.exp: Run new test.
* testsuite/ld-aarch64/pr22764.s: New.
* testsuite/ld-aarch64/pr22764.d: New.
R_AARCH64_ABS64, R_AARCH64_ABS32 and R_AARCH64_ABS16 are data relocations
supported in AArch64 elf ABI.
R_AARCH64_ABS64 under LP64 is allowed in shared object and a dynamic relocation entry
will be generated. This allows the dynamic linker to do further symbol resolution.
R_AARCH64_ABS32 likewise is allowed in shared object, however under ILP32 abi.
The original behavior for R_AARCH64_ABS32 under LP64 is that, it's allowed
in shared object and silently resolved at static linking time.
No dynamic relocation entry is generate for it.
R_AARCH64_ABS16 is allowed in shared object under both L64 and ILP32.
It's resolved at static linking time as well.
Under LP64, the address should be 64-bit. R_AARCH64_ABS32 relocation indicates
an address that is only sized 32 bits which is meaningless in LP64 shared object.
It's useful to error out.
I have checked glibc dynamic linker code, R_AARCH64_ABS16 is not supported at all. So
R_AARCH64_ABS16 should be reject in shared object completely.
In this patch, R_AARCH64_ABS32 is rejected under LP64 in constant section of shared object.
R_AARCH64_ABS16 is rejected in constant section of shared object in both ABI.
This will sometimes provide useful information for buggy code.
* reloc.c (enum bfd_reloc_status): Start values at 2.
* bfd-in2.h: Regenerate.
* elfnn-aarch64.c (aarch64_relocate): Invert sense of function, so
that a TRUE return indicates success. Compare the result of
calling _bfd_aarch64_elf_put_addend against bfd_reloc_ok.
(build_one_stub): Change sense of tests against aarch64_relocate
return value.
(elfNN_aarch64_tls_relax): Return bfd_reloc_notsupported, rather
than FALSE, when an error is detected.
(elfNN_aarch64_final_link_relocate): Likewise.
* testsuite/ld-aarch64/pcrel_pic_defined.d: Expect errors not
warnings. Expect errors about unsupported relocations.
* testsuite/ld-aarch64/pcrel_pic_undefined.d: Likewise.
These were discovered when running --hash-style=gnu as default, the
previous batch being --hash-style=both.
* testsuite/ld-aarch64/ifunc-1-local.d: Run ld with --hash-style=sysv.
* testsuite/ld-aarch64/ifunc-2-local.d: Likewise.
* testsuite/ld-aarch64/ifunc-3a.d: Likewise.
* testsuite/ld-frv/fdpic-pie-1.d: Likewise.
* testsuite/ld-frv/fdpic-pie-2.d: Likewise.
* testsuite/ld-frv/fdpic-pie-7.d: Likewise.
* testsuite/ld-frv/fdpic-pie-8.d: Likewise.
* testsuite/ld-arm/arm-elf.exp: Add --hash-style=sysv to "Using
Thumb lib by another lib" test's ld options.
* testsuite/ld-elf/note-3.l: Match .gnu.hash.
* testsuite/ld-elf/note-3.t: Add .gnu.hash output section.
For some pc-relative relocations we want to allow them under PIC mode while
a normal global symbol defined in the same dynamic object can still bind
externally through copy relocation. So, we should not allow pc-relative
relocation against such symbol.
SYMBOL_REFERENCES_LOCAL should be used and is more accurate than the original
individual checks.
bfd/
* elfnn-aarch64.c (elfNN_aarch64_final_link_relocate): Use
SYMBOL_REFERENCES_LOCAL.
ld/
* testsuite/ld-aarch64/aarch64-elf.exp: Update test name
* testsuite/ld-aarch64/pcrel.s: Add new testcases.
* testsuite/ld-aarch64/pcrel_pic_undefined.d: Update the expected
warnings.
* testsuite/ld-aarch64/pcrel_pic_defined_local.d: Rename ...
* testsuite/ld-aarch64/pcrel_pic_defined.d: ... to this.
Update expected warnings.
As discussed at the PR, this patch tries to avoid COPY relocation generation
and propagate the original relocation into runtime if it was relocating on
writable section. The ELIMINATE_COPY_RELOCS has been set to true and it's
underlying infrastructure has been improved so that the COPY reloc elimination
at least working on absoluate relocations (ABS64) on AArch64.
BFD linker copy relocation elimination framwork requires the backend to always
allocate dynrelocs for all those relocation types that are possible to introduce
copy relocations. This is for adjust_dynamic_symbol hook to be able to get all
symbol reference information. Should one symbol is referenced by more than one
relocations, if there is any of them needs copy relocation then linker should
generate it.
bfd/
PR ld/21532
* elfnn-aarch64.c (ELIMINATE_COPY_RELOCS): Set to 1.
(elfNN_aarch64_final_link_relocate): Also propagate relocations to
runtime for if there needs copy relocation elimination.
(need_copy_relocation_p): New function. Return true for symbol with
pc-relative references and if it's against read-only sections.
(elfNN_aarch64_adjust_dynamic_symbol): Use need_copy_relocation_p.
(elfNN_aarch64_check_relocs): Allocate dynrelocs for relocation types
that are related with accessing external objects.
(elfNN_aarch64_gc_sweep_hook): Sync the relocation types with the change
in elfNN_aarch64_check_relocs.
ld/
* testsuite/ld-aarch64/copy-reloc-exe-2.s: New test source file.
* testsuite/ld-aarch64/copy-reloc-2.d: New test.
* testsuite/ld-aarch64/copy-reloc-exe-eliminate.s: New test source file.
* testsuite/ld-aarch64/copy-reloc-eliminate.d: New test.
* testsuite/ld-aarch64/copy-reloc-so.s: Define new global objects.
* testsuite/ld-aarch64/aarch64-elf.exp: Run new tests.
This reverts commit bc327528fd.
This patch can only be committed after PC-relative relocation types
support on copy relocation elimination is also completed.
As discussed at the PR, this patch tries to avoid COPY relocation generation
and propagate the original relocation into runtime if it was relocating on
writable section. The ELIMINATE_COPY_RELOCS has been set to true and it's
underlying infrastructure has been improved so that the COPY reloc elimination
at least working on absoluate relocations (ABS64) after this patch.
bfd/
PR ld/21532
* elfnn-aarch64.c (ELIMINATE_COPY_RELOCS): Set to 1.
(elfNN_aarch64_final_link_relocate): Also propagate relocations to
runtime for copy relocation elimination cases.
(alias_readonly_dynrelocs): New function.
(elfNN_aarch64_adjust_dynamic_symbol): Keep the dynamic relocs instead
of generating copy relocation if it is not against read-only sections.
(elfNN_aarch64_check_relocs): Likewise.
ld/
* testsuite/ld-aarch64/copy-reloc-eliminate.d: New test.
* testsuite/ld-aarch64/copy-reloc-exe-eliminate.s: New test source file.
* testsuite/ld-aarch64/aarch64-elf.exp: Run new testcase.
bfd * elfnn-aarch64.c: Fix relaxations for ILP32 mode.
ld * testsuite/ld-aarch64/aarch64-elf.exp: Run new tests.
* testsuite/ld-aarch64/tls-desc-ie-ilp32.d: New test.
* testsuite/ld-aarch64/tls-relax-all-ilp32.d: New test.
* testsuite/ld-aarch64/tls-relax-gd-le-ilp32.d: New test.
* testsuite/ld-aarch64/tls-relax-gdesc-le-2-ilp32.d: New test.
* testsuite/ld-aarch64/tls-relax-gdesc-le-ilp32.d: New test.
* testsuite/ld-aarch64/tls-relax-ie-le-2-ilp32.d: New test.
* testsuite/ld-aarch64/tls-relax-ie-le-3-ilp32.d: New test.
* testsuite/ld-aarch64/tls-relax-ie-le-ilp32.d: New test.
* testsuite/ld-aarch64/tls-tiny-desc-ie-ilp32.d: New test.
* testsuite/ld-aarch64/tls-tiny-desc-le-ilp32.d: New test.
* testsuite/ld-aarch64/tls-tiny-gd-ie-ilp32.d: New test.
* testsuite/ld-aarch64/tls-tiny-gd-le-ilp32.d: New test.
bfd/
* elfnn-aarch64.c (elf_aarch64_hash_symbol): New function.
(elf_backend_hash_symbol): Define.
ld/
* testsuite/ld-aarch64/aarch64-elf.exp (aarch64elflinktests): New tests.
* testsuite/ld-aarch64/func-in-so.s: New test source file.
* testsuite/ld-aarch64/func-sym-hash-opt.s: Likewise.
* testsuite/ld-aarch64/func-sym-hash-opt.d: New expected test result.
TCB_SIZE is 2*sizeof(void *), which is 0x10 for lp64, and 0x8 for
ilp32. During relaxation, ld goes to do a replace:
bl __tls_get_addr => add R0, R0, TCB_SIZE
But actual implementation is:
bfd_putl32 (0x91004000, contents + rel->r_offset + 4);
Which is equivalent of add x0, x0, 0x10. This is wrong for ilp32.
The possible fix for it is:
bfd_putl32 (0x91000000 | (TCB_SIZE<<10), contents + rel->r_offset + 4);
But ilp32 also needs w-registers, so it's simpler to put proper
instruction in #if/#else condition.
There are 2 such relaxations in elfNN_aarch64_tls_relax(), and so 2 new
tests added for ilp32 mode to test it.
Yury
* bfd/elfnn-aarch64.c: fix TLS relaxations for ilp32 where
TCB_SIZE is used.
* ld/testsuite/ld-aarch64/aarch64-elf.exp: Add tests for the case.
* ld/testsuite/ld-aarch64/tls-relax-ld-le-small-ilp32.d: New file.
* ld/testsuite/ld-aarch64/tls-relax-ld-le-tiny-ilp32.d: New file.
Signed-off-by: Yury Norov <ynorov@caviumnetworks.com>
TCB_SIZE is 2*sizeof(void *), which is 0x10 for lp64, and 0x8 for
ilp32. During relaxation, ld goes to do a replace:
bl __tls_get_addr => add R0, R0, TCB_SIZE
But actual implementation is:
bfd_putl32 (0x91004000, contents + rel->r_offset + 4);
Which is equivalent of add x0, x0, 0x10. This is wrong for ilp32.
The possible fix for it is:
bfd_putl32 (0x91000000 | (TCB_SIZE<<10), contents + rel->r_offset + 4);
But ilp32 also needs w-registers, so it's simpler to put proper
instruction in #if/#else condition.
THere are 2 such relaxations in elfNN_aarch64_tls_relax(), and so 2 new
tests added for ilp32 mode to test it.
Yury
PR ld/20868
bfd * elfnn-aarch64.c (elfNN_aarch64_tls_relax): Use 32-bit accesses
to the GOT when operating in 32-bit mode.
ld * testsuite/ld-aarch64/tls-relax-gd-ie-ilp32.d: New test.
* testsuite/ld-aarch64/relocs-ilp32.ld: Linker script for the new
test.
* testsuite/ld-aarch64/aarch64-elf.exp: Run the new test.
Alan Modra
Tamar Christina
Nick Clifton
Szabolcs Nagy
Sudakshina Das
Roland McGrath
Andre Simoes Dias Vieira
Renlin Li
Jim Wilson
H.J. Lu
Jiong Wang
Yury Norov