Commit Graph

21 Commits

Author SHA1 Message Date
Alan Modra
5dd0794dca Branch hints for Pentium4 as insn modifiers, and some minor tweaks
to formatting.
2001-06-10 14:07:12 +00:00
Nick Clifton
87e6d78217 Add openRISC support in opcodes 2001-04-27 13:34:20 +00:00
H.J. Lu
f4fbb4a3d1 2001-03-20 H.J. Lu <hjl@gnu.org>
* configure.in: Remove the redundent AC_ARG_PROGRAM.
	* configure: Rebuild.
2001-03-20 18:24:30 +00:00
Alan Modra
27b7e12d2d Bump version to 2.11.90, fix missing dependencies in bfd/,
and run "make dep-am".
2001-02-27 06:43:56 +00:00
Nick Clifton
e135f41bc2 Add PDP-11 support 2001-02-18 23:33:11 +00:00
Nick Clifton
a85d7ed0f0 Add s390 support 2001-02-10 00:58:38 +00:00
Nick Clifton
0d2bcfafbf Updated ARC assembler from arccores.com 2001-01-11 21:20:20 +00:00
Nick Clifton
099194551f Regenerate files 2000-12-16 22:01:44 +00:00
Ben Elliston
6e31aea3cd 2000-07-28 Ben Elliston <bje@redhat.com>
* Makefile.am (CGEN, CGENDEPS, CGENDIR, CGENFLAGS): New.
	(run-cgen, stamp-m32r, stamp-fr30): New targets.
	* Makefile.in: Regenerate.
	* configure.in: Add --enable-cgen-maint option.
	* configure: Regenerate.
2000-07-29 00:33:34 +00:00
Jason Eckhardt
9d75133528 2000-07-22 Jason Eckhardt <jle@cygnus.com>
* include/opcode/i860.h (btne, bte, bla): Changed these opcodes
	to use sbroff ('r') instead of split16 ('s').
	(J, K, L, M): New operand types for 16-bit aligned fields.
	(ld.x, {p}fld.x, fst.x, pst.d): Changed these opcodes to
	use I, J, K, L, M instead of just I.
	(T, U): New operand types for split 16-bit aligned fields.
	(st.x): Changed these opcodes to use S, T, U instead of just S.
	(andh, andnoth, orh, xorh): Deleted 3-register forms as they do not
	exist on the i860.
	(pfgt.sd, pfle.sd): Deleted these as they do not exist on the i860.
	(pfeq.ss, pfeq.dd): New opcodes.
	(st.s): Fixed incorrect mask bits.
	(fmlow): Fixed incorrect mask bits.
	(fzchkl, pfzchkl): Fixed incorrect mask bits.
	(faddz, pfaddz): Fixed incorrect mask bits.
	(form, pform): Fixed incorrect mask bits.
	(pfld.l): Fixed incorrect mask bits.
	(fst.q): Fixed incorrect mask bits.
	(all floating point opcodes): Fixed incorrect mask bits for
	handling of dual bit.

	* include/elf/i860.h: New file.
	(elf_i860_reloc_type): Defined ELF32 i860 relocations.

	* bfd/cpu-i860.c: Added comments.

	* bfd/elf32-i860.c (TARGET_LITTLE_SYM): Defined to
	bfd_elf32_i860_little_vec.
	(TARGET_LITTLE_NAME): Defined to "elf32-i860-little".
	(ELF_MAXPAGESIZE): Changed to 4096.

	* bfd/targets.c (bfd_elf32_i860_little_vec): Declaration of
	new target.
	(bfd_target_vector): Added bfd_elf32_i860_little_vec.

	* bfd/config.bfd (i860-stardent-sysv4*, i860-stardent-elf*): Added
	config for little endian elf32 i860.
	(targ_defvec): Define for the new config above
	as "bfd_elf32_i860_little_vec".
	(targ_selvecs): Define for the new config above
	as "bfd_elf32_i860_vec bfd_elf32_i860_little_vec"

	* bfd/configure.in (bfd_elf32_i860_little_vec): Added recognition
	of new target vec.

	* bfd/configure: Regenerated.

	* opcodes/i860-dis.c: New file.
	(print_insn_i860): New function.
	(print_br_address): New function.
	(sign_extend): New function.
	(BITWISE_OP): New macro.
	(I860_REG_PREFIX): New macro.
	(grnames, frnames, crnames): New structures.

	* opcodes/disassemble.c (ARCH_i860): Define.
	(disassembler): Add check for bfd_arch_i860 to set disassemble
	function to print_insn_i860.

	* include/dis-asm.h (print_insn_i860): Add prototype.

	* opcodes/Makefile.in (CFILES): Added i860-dis.c.
	(ALL_MACHINES): Added i860-dis.lo.
	(i860-dis.lo): New dependences.

	* opcodes/configure.in: New bits for bfd_i860_arch.

	* opcodes/configure: Regenerated.
2000-07-28 21:10:20 +00:00
Hans-Peter Nilsson
6c95a37f64 * Makefile.am (CFILES): Add cris-dis.c and cris-opc.c.
(ALL_MACHINES): Add cris-dis.lo and cris-opc.lo.
	(cris-dis.lo, cris-opc.lo): New rules.
	* Makefile.in: Rebuild.
	* configure.in (bfd_cris_arch): New target.
	* configure: Rebuild.
	* disassemble.c (ARCH_cris): Define.
	(disassembler): Support ARCH_cris.
	* cris-dis.c, cris-opc.c: New files.
	* po/POTFILES.in, po/opcodes.pot: Regenerate.
2000-07-20 16:46:28 +00:00
Nick Clifton
60bcf0fa8c Applied Stephane Carrez <Stephane.Carrez@worldnet.fr> patches to add support
for m68hc11 and m68hc12 processors.
2000-06-19 01:22:44 +00:00
Timothy Wall
5c84d377b6 Support for tic54x target. 2000-05-06 17:14:34 +00:00
Clinton Popetz
7f6d05e83e Add XCOFF64 support.
bfd:
	* Makefile.am (coff64-rs6000.lo): New rule.
	* Makefile.in: Regenerate.
	* coff-rs6000.c (xcoff_mkobject, xcoff_copy_private_bfd_data,
	xcoff_is_local_label_name, xcoff_rtype2howto,
	xcoff_reloc_type_lookup, xcoff_slurp_armap, xcoff_archive_p,
	xcoff_read_ar_hdr, xcoff_openr_next_archived_file, xcoff_write_armap,
	xcoff_write_archive_contents): No longer static, and prefix with _bfd_.
	(NO_COFF_SYMBOLS): Define.
	(xcoff64_swap_sym_in, xcoff64_swap_sym_out, xcoff64_swap_aux_in,
	xcoff64_swap_aux_out): New functions; handle xcoff symbol tables
	internally.
	(MINUS_ONE): New macro.
	(xcoff_howto_tabl, xcoff_reloc_type_lookup): Add 64 bit POS
	relocation.
	(coff_SWAP_sym_in, coff_SWAP_sym_out, coff_SWAP_aux_in,
	coff_SWAP_aux_out): Map to the new functions.
	* coff64-rs6000.c: New file.
	* libcoff.h (bfd_coff_backend_data): Add new fields
	_bfd_coff_force_symnames_in_strings and
	_bfd_coff_debug_string_prefix_length.
	(bfd_coff_force_symnames_in_strings,
	bfd_coff_debug_string_prefix_length): New macros for above fields.
	* coffcode.h (coff_set_arch_mach_hook): Handle XCOFF64 magic.
	Set machine to 620 for XCOFF64.  Use bfd_coff_swap_sym_in instead
	of using coff_swap_sym_in directly.
	(FORCE_SYMNAMES_IN_STRINGS): New macro, defined for XCOFF64.
	(coff_set_flags) Set magic for XCOFF64.
	(coff_compute_section_file_positions): Add symbol name length to
	string section length if bfd_coff_debug_string_prefix_length is
	true.
	(coff_write_object_contents): Don't do reloc overflow for XCOFF64.
	(coff_slurp_line_table): Use bfd_coff_swap_lineno_in instead of
	using coff_swap_lineno_in directly.
	(bfd_coff_backend_data): Add _bfd_coff_force_symnames_in_strings
	and _bfd_coff_debug_string_prefix_length fields.
	* coffgen.c (coff_fix_symbol_name, coff_write_symbols): Force
	symbol names into strings table when
	bfd_coff_force_symnames_in_strings is true.
	* coffswap.h (MAX_SCNHDR_NRELOC, MAX_SCNHDR_NLNNO, GET_RELOC_VADDR,
	SET_RELOC_VADDR): New macros.
	(coff_swap_reloc_in, coff_swap_reloc_out): Use above macros.
	(coff_swap_aux_in, coff_swap_aux_out): Remove RS6000COFF_C
	code.
	(coff_swap_aouthdr_in, coff_swap_aouthdr_out): Handle XCOFF64
	changes within RS6000COFF_C specific code.
	(coff_swap_scnhdr_out): Use PUT_SCNHDR_NLNNO, PUT_SCNHDR_NRELOC,
	MAX_SCNHDR_NRELOC, and MAX_SCNHDR_NLNNO.
	* reloc.c (bfd_perform_relocation, bfd_install_relocation):
	Extend existing hack on target name.
	* xcofflink.c (XCOFF_XVECP): Extend existing hack on
	target name.
	* coff-tic54x.c (ticof): Keep up to date with new fields
	in bfd_coff_backend_data.
	* config.bfd: Add bfd_powerpc_64_arch to targ_arch and define
	targ_selvecs to include rs6000coff64_vec for rs6000.
	* configure.in: Add rs6000coff64_vec case.
 	* cpu-powerpc.c: New bfd_arch_info_type.

	gas:
	* as.c (parse_args): Allow md_parse_option to override -a listing
	option.
	* config/obj-coff.c (add_lineno): Change type of offset parameter
	from "int" to "bfd_vma."
	* config/tc-ppc.c (md_pseudo_table): Add "llong" and "machine."
	(ppc_mach, ppc_subseg_align, ppc_target_format): New.
	(ppc_change_csect): Align correctly for XCOFF64.
	(ppc_machine): New function, which discards "ppc_machine" line.
	(ppc_tc): Cons for 8 when code is 64 bit.
	(md_apply_fix3): Don't check operand->insert.  Handle 64 bit
	relocations.
	(md_parse_option): Handle -a64 and -a32.
	(ppc_xcoff64): New.
	* config/tc-ppc.h (TARGET_MACH): Define.
	(TARGET_FORMAT): Move to function.
	(SUB_SEGMENT_ALIGN): Use ppc_subseg_align.

	include:
	* include/coff/rs6k64.h: New file.

	opcodes:
	* configure.in: Add bfd_powerpc_64_arch.
	* disassemble.c (disassembler): Use print_insn_big_powerpc for
	64 bit code.
2000-04-26 15:09:44 +00:00
Jim Wilson
800eeca487 IA-64 ELF support. 2000-04-21 20:22:24 +00:00
Andrew Cagney
a2d91340f3 Remove ``-W -Wall'' from top-level Makefile/configure.
Add ``-W -Wall'' to sub-directories bfd, binutils, gas gprof, ld and
opcodes by the addition of WARN_CFLAGS to Makefile.am and configury to
set it.  Add configure option --enable-build-warnings.
Re-generate all and sundry using auto*-000227.
2000-04-09 12:17:43 +00:00
Alan Modra
adde6300e0 ATMEL AVR microcontroller support. 2000-03-27 08:39:14 +00:00
Alan Modra
5b93d8bb51 Add IBM 370 support. 2000-02-23 13:52:23 +00:00
Michael Meissner
6d83c84bcf Fix problem with going to automake 2.14 1999-09-14 23:29:35 +00:00
Ian Lance Taylor
1e608f986c 1999-09-04 Steve Chamberlain <sac@pobox.com>
* pj-opc.c: New file.
	* pj-dis.c: New file.
	* disassemble.c	(disassembler): Handle bfd_arch_pj.
	* configure.in: Handle bfd_pj_arch.
	* Makefile.am: Rebuild dependencies.
	(CFILES): Add pj-dis.c and pj-opc.c.
	(ALL_MACHINES): Add pj-dis.lo and pj-opc.lo.
	* configure, Makefile.in: Rebuild.
1999-09-04 17:14:37 +00:00
Richard Henderson
252b5132c7 19990502 sourceware import 1999-05-03 07:29:11 +00:00