Commit Graph

12954 Commits

Author SHA1 Message Date
GDB Administrator cbf55359ca Automatic date update in version.in 2016-06-22 00:00:09 +00:00
Maciej W. Rozycki 5f68df25f8 MIPS/BFD: Don't stop processing on a cross-mode jump conversion error
As with commit ed53407eec ("MIPS/BFD: Don't stop processing on
`bfd_reloc_outofrange'") don't bail out right away and instead continue
processing on a cross-mode jump conversion error, so that any further
issues are also reported.  Adjust message formatting accordingly, using
`%X' to abort processing at conclusion.  Remove the full stop from the
end of the message, for consistency across error reporting.

Adjust the corresponding test case accordingly and make it trigger the
error twice.

	bfd/
	* elfxx-mips.c (mips_elf_perform_relocation): Call
	`info->callbacks->einfo' rather than `*_bfd_error_handler' and
	use the `%X%H' format for the cross-mode jump conversion error
	message.  Remove the full stop from the end of the message.
	Continue processing rather than returning failure.

	ld/
	* testsuite/ld-mips-elf/mode-change-error-1a.s: Trigger an error
	twice rather than once.
	* testsuite/ld-mips-elf/mode-change-error-1.d: Adjust
	accordingly.  Remove the full stop from the end of the message.
2016-06-21 14:18:23 +01:00
Graham Markall bdd582dbf1 Arc assembler: Convert nps400 from a machine type to an extension.
gas	* config/tc-arc.c (check_cpu_feature, md_parse_option):
	Add nps400 option and feature. Add check for nps400
	feature. Refactor existing checks to check subclass before
	feature enablement.
	(md_show_usage): Document flags for NPS-400 and add some other
	undocumented flags.
	(cpu_type): Remove nps400 CPU type entry
	(check_zol): Remove bfd_mach_arc_nps400 case.
	(md_show_usage): Add help on -mcpu=nps400.
	(cpu_types): Add entry for nps400 as arc700 plus nps400 extension
	set.
	* doc/c-arc.texi: Document the -mnps400, -mspfp, -mdpfp, and
	-fpuda flags.  Document -mcpu=nps400.
	* testsuite/gas/arc/nps-400-0.d: Use -mcpu=arc700 -mnps400. Change
	expected flags to match ARC700 instead of NPS400.
	* testsuite/gas/arc/nps-400-1.d: Use -mcpu=arc700 -mnps400.
	* testsuite/gas/arc/nps-400-2.d: Likewise.
	* testsuite/gas/arc/nps-400-3.d: Likewise.
	* testsuite/gas/arc/nps-400-4.d: Likewise.
	* testsuite/gas/arc/nps-400-5.d: Likewise.
	* testsuite/gas/arc/nps-400-6.d: Likewise.
	* testsuite/gas/arc/nps-400-7.d: Likewise.
	* testsuite/gas/arc/textinsn2op01.s: Change opcode of myinsn to
	avoid clash with cbba instruction.
	* testsuite/gas/arc/textinsn2op01.d: Likewise.
	* testsuite/gas/arc/textinsn3op.d: Likewise.
	* testsuite/gas/arc/textinsn3op.s: Likewise.
	* testsuite/gas/arc/nps-400-0.d: Test using NPS-400 using
	-mcpu=nps400 as an alternative to -mcpu=arc700 -mnps400 flags.

binutils* readelf.c (decode_ARC_machine_flags): Remove E_ARC_MACH_NPS400
	case.

ld	* testsuite/ld-arc/nps-1a.d: Use -mcpu=arc700 -mnps400.
	* testsuite/ld-arc/nps-1b.d: Likewise.

include	* opcode/arc.h: Add nps400 extension and instruction
	subclass.
	Remove ARC_OPCODE_NPS400
	* elf/arc.h: Remove E_ARC_MACH_NPS400

opcodes	* arc-dis.c (arc_insn_length): Add comment on instruction length.
	Use same method for determining	instruction length on ARC700 and
	NPS-400.
	(arc_insn_length, print_insn_arc): Remove bfd_mach_arc_nps400.
	* arc-nps400-tbl.h: Make all nps400 instructions ARC700 instructions
	with the NPS400 subclass.
	* arc-opc.c: Likewise.

bfd	* archures.c: Remove bfd_mach_arc_nps400.
	* bfd-in2.h: Likewise.
	* cpu-arc.c (arch_info_struct): Likewise.
	* elf32-arc.c (arc_elf_object_p, arc_elf_final_write_processing):
	Likewise.
2016-06-21 14:03:08 +01:00
GDB Administrator 4fdf8fa604 Automatic date update in version.in 2016-06-21 00:00:18 +00:00
H.J. Lu 7dc3990e40 Use the IR symbol table for the IR input object
ELF linker shouldn't skip the IR object when searching the symbol table
of an archive element.  If linker doesn't know if the object file is an
IR object, it should give LTO plugin a chance to get the correct symbol
table and use the IR symbol table if the input is an IR object.

bfd/

	PR ld/18250
	PR ld/20267
	* elflink.c: Include plugin.h if BFD_SUPPORTS_PLUGINS is
	defined.
	(elf_link_is_defined_archive_symbol): Call
	bfd_link_plugin_object_p on unknown plugin object and use the
	IR symbol table if the input is an IR object.
	* plugin.c (bfd_link_plugin_object_p): New function.
	* plugin.h (bfd_link_plugin_object_p): New prototype.

ld/

	PR ld/20267
	* testsuite/ld-plugin/lto.exp (lto_link_tests): Add test for
	PR ld/20267.
	(lto_run_tests): Likewise.
	* testsuite/ld-plugin/pr20267a.c: New file.
	* testsuite/ld-plugin/pr20267b.c: Likewise.
2016-06-20 05:10:46 -07:00
Alan Modra 0616a28038 PR ld/20276: Set non_ir_ref on common symbol
Also, don't check alignment on symbol from plugin dummy input.

bfd/
	PR ld/20276
	* elflink.c (elf_link_add_object_symbols): Don't check alignment
	on symbol from plugin dummy input.
ld/
	PR ld/20276
	* plugin.c (plugin_notice): Set non_ir_ref on common symbols.
	* testsuite/ld-plugin/lto.exp (lto_link_tests): Add test for
	PR ld/20276.
	(lto_run_tests): Likewise.
	* testsuite/ld-plugin/pass.out: New file.
	* testsuite/ld-plugin/pr20276a.c: Likewise.
	* testsuite/ld-plugin/pr20276b.c: Likewise.
2016-06-20 11:26:13 +09:30
GDB Administrator 6336b4b737 Automatic date update in version.in 2016-06-20 00:00:17 +00:00
GDB Administrator 9a4f2f5dad Automatic date update in version.in 2016-06-19 00:00:22 +00:00
H.J. Lu 49f30d83f6 Rename bfd_plugin_uknown to bfd_plugin_unknown
bfd/

	* bfd.c (bfd_plugin_format): Rename bfd_plugin_uknown to
	bfd_plugin_unknown.
	* bfd-in2.h: Regenerated.
	* plugin.c (bfd_plugin_object_p): Replace bfd_plugin_uknown
	with bfd_plugin_unknown.

ld/

	* plugin.c (plugin_object_p): Replace bfd_plugin_uknown
	with bfd_plugin_unknown.
2016-06-18 14:15:31 -07:00
H.J. Lu 233cc9c13a Don't generate PLT for IFUNC GOT/pointer reference
If a backend supports it, PLT entry isn't needed when all references
to a STT_GNU_IFUNC symbols are done via GOT or static function pointers.
For GOT entries, We generate dynamic R_*_GLOB_DAT relocations for
preemptable symbols and R_*_IRELATIVE relocations for non-preemptable
symbols to update them with real function address.  For static pointer
pointers, we generate dynamic pointer relocations and store them in:

1. .rel[a].ifunc section in PIC object.
2. .rel[a].got section in dynamic executable.
3. .rel[a].iplt section in static executable.

We don't allocate GOT entry if it isn't used.

bfd/

	PR ld/20253
	* elf-bfd.h (_bfd_elf_allocate_ifunc_dyn_relocs): Add an
	bfd_boolean argument.
	* elf-ifunc.c (_bfd_elf_create_ifunc_sections): Replace
	"shared object" with "PIC object" in comments.
	(_bfd_elf_allocate_ifunc_dyn_relocs): Updated.  Replace
	"shared object" with "PIC object" in comments.  Avoid PLT if
	requested.  Generate dynamic relocations for non-GOT references.
	Make room for the special first entry in PLT and allocate PLT
	entry only for PLT and PC-relative references.  Store dynamic
	GOT relocations in .rel[a].iplt section for static executables.
	If PLT isn't used, always use GOT for symbol value.  Don't
	allocate GOT entry if it isn't used.
	* elf32-i386.c (elf_i386_check_relocs): Increment PLT reference
	count only in the code section.  Allocate dynamic pointer
	relocation against STT_GNU_IFUNC symbol in the non-code section.
	(elf_i386_adjust_dynamic_symbol): Increment PLT reference count
	only for PC-relative references.
	(elf_i386_allocate_dynrelocs): Pass TRUE to
	_bfd_elf_allocate_ifunc_dyn_relocs.
	(elf_i386_relocate_section): Allow R_386_GOT32/R_386_GOT32X
	relocations against STT_GNU_IFUNC symbols without PLT.  Generate
	dynamic pointer relocation against STT_GNU_IFUNC symbol in
	the non-code section and store it in the proper REL section.
	Don't allow non-pointer relocation against STT_GNU_IFUNC symbol
	without PLT.
	(elf_i386_finish_dynamic_symbol): Generate dynamic
	R_386_IRELATIVE and R_386_GLOB_DAT GOT relocations against
	STT_GNU_IFUNC symbols without PLT.
	(elf_i386_finish_dynamic_sections): Don't handle local
	STT_GNU_IFUNC symbols here.
	(elf_i386_output_arch_local_syms): Handle local STT_GNU_IFUNC
	symbols here.
	(elf_backend_output_arch_local_syms): New.
	* elf32-x86-64.c (elf_i386_check_relocs): Increment PLT reference
	count only in the code section.  Allocate dynamic pointer
	relocation against STT_GNU_IFUNC symbol in the non-code section.
	(elf_x86_64_adjust_dynamic_symbol): Increment PLT reference
	count only for PC-relative references.
	(elf_x86_64_allocate_dynrelocs): Pass TRUE to
	_bfd_elf_allocate_ifunc_dyn_relocs.
	(elf_x86_64_relocate_section): Allow R_X86_64_GOTPCREL,
	R_X86_64_GOTPCRELX, R_X86_64_REX_GOTPCRELX and
	R_X86_64_GOTPCREL64 relocations against STT_GNU_IFUNC symbols
	without PLT.  Generate dynamic pointer relocation against
	STT_GNU_IFUNC symbol in the non-code section and store it in
	the proper RELA section.  Don't allow non-pointer relocation
	against STT_GNU_IFUNC symbol without PLT.
	(elf_x86_64_finish_dynamic_symbol): Generate dynamic
	R_X86_64_IRELATIVE and R_X86_64_GLOB_DAT GOT relocations against
	STT_GNU_IFUNC symbols without PLT.
	(elf_x86_64_finish_dynamic_sections): Don't handle local
	STT_GNU_IFUNC symbols here.
	(elf_x86_64_output_arch_local_syms): Handle local STT_GNU_IFUNC
	symbols here.
	(elf_backend_output_arch_local_syms): New.
	* elfnn-aarch64.c (elfNN_aarch64_allocate_ifunc_dynrelocs):
	Pass FALSE to _bfd_elf_allocate_ifunc_dyn_relocs.

ld/

	PR ld/20253
	* testsuite/ld-i386/i386.exp: Run PR ld/20253 tests.
	* testsuite/ld-i386/no-plt.exp: Likewise.
	* testsuite/ld-x86-64/no-plt.exp: Likewise.
	* testsuite/ld-i386/pr13302.d: Remove .rel.plt section.
	* testsuite/ld-ifunc/ifunc-13-i386.d: Likewise.
	* testsuite/ld-ifunc/ifunc-13-x86-64.d: Likewise.
	* testsuite/ld-ifunc/ifunc-15-i386.d: Likewise.
	* testsuite/ld-ifunc/ifunc-15-x86-64.d: Likewise.
	* testsuite/ld-x86-64/pr13082-5a.d: Likewise.
	* testsuite/ld-x86-64/pr13082-5b.d: Likewise.
	* testsuite/ld-x86-64/pr13082-6a.d: Likewise.
	* testsuite/ld-x86-64/pr13082-6b.d: Likewise.
	* testsuite/ld-i386/pr20244-2a.d: Remove .plt section.
	* testsuite/ld-ifunc/ifunc-21-i386.d: Likewise.
	* testsuite/ld-ifunc/ifunc-21-x86-64.d: Likewise.
	* testsuite/ld-ifunc/ifunc-22-i386.d: Likewise.
	* testsuite/ld-ifunc/ifunc-22-x86-64.d: Likewise.
	* testsuite/ld-i386/pr20244-2b.d: Updated.
	* testsuite/ld-i386/pr20244-2c.d: Likewise.
	* testsuite/ld-ifunc/ifunc-18a-i386.d: Likewise.
	* testsuite/ld-ifunc/ifunc-18a-x86-64.d: Likewise.
	* testsuite/ld-ifunc/ifunc-18b-i386.d: Likewise.
	* testsuite/ld-ifunc/ifunc-18b-x86-64.d: Likewise.
	* testsuite/ld-i386/pr20253-1a.c: New file.
	* testsuite/ld-i386/pr20253-1b.S: Likewise.
	* testsuite/ld-i386/pr20253-1c.S: Likewise.
	* testsuite/ld-i386/pr20253-1d.S: Likewise.
	* testsuite/ld-i386/pr20253-2a.c: Likewise.
	* testsuite/ld-i386/pr20253-2b.S: Likewise.
	* testsuite/ld-i386/pr20253-2c.S: Likewise.
	* testsuite/ld-i386/pr20253-2d.S: Likewise.
	* testsuite/ld-i386/pr20253-3.d: Likewise.
	* testsuite/ld-i386/pr20253-3.s: Likewise.
	* testsuite/ld-i386/pr20253-4.s: Likewise.
	* testsuite/ld-i386/pr20253-4a.d: Likewise.
	* testsuite/ld-i386/pr20253-4b.d: Likewise.
	* testsuite/ld-i386/pr20253-4c.d: Likewise.
	* testsuite/ld-i386/pr20253-5.d: Likewise.
	* testsuite/ld-i386/pr20253-5.s: Likewise.
	* testsuite/ld-ifunc/ifunc-23-x86.s: Likewise.
	* testsuite/ld-ifunc/ifunc-23a-x86.d: Likewise.
	* testsuite/ld-ifunc/ifunc-23b-x86.d: Likewise.
	* testsuite/ld-ifunc/ifunc-23c-x86.d: Likewise.
	* testsuite/ld-ifunc/ifunc-24-x86.s: Likewise.
	* testsuite/ld-ifunc/ifunc-24a-x86.d: Likewise.
	* testsuite/ld-ifunc/ifunc-24b-x86.d: Likewise.
	* testsuite/ld-ifunc/ifunc-24c-x86.d: Likewise.
	* testsuite/ld-ifunc/ifunc-25-x86.s: Likewise.
	* testsuite/ld-ifunc/ifunc-25a-x86.d: Likewise.
	* testsuite/ld-ifunc/ifunc-25b-x86.d: Likewise.
	* testsuite/ld-ifunc/ifunc-25c-x86.d: Likewise.
	* testsuite/ld-x86-64/pr20253-1.s: Likewise.
	* testsuite/ld-x86-64/pr20253-1a.d: Likewise.
	* testsuite/ld-x86-64/pr20253-1b.d: Likewise.
	* testsuite/ld-x86-64/pr20253-1c.d: Likewise.
	* testsuite/ld-x86-64/pr20253-1d.d: Likewise.
	* testsuite/ld-x86-64/pr20253-1e.d: Likewise.
	* testsuite/ld-x86-64/pr20253-1f.d: Likewise.
	* testsuite/ld-x86-64/pr20253-1g.d: Likewise.
	* testsuite/ld-x86-64/pr20253-1h.d: Likewise.
	* testsuite/ld-x86-64/pr20253-1i.d: Likewise.
	* testsuite/ld-x86-64/pr20253-1j.d: Likewise.
	* testsuite/ld-x86-64/pr20253-1k.d: Likewise.
	* testsuite/ld-x86-64/pr20253-1l.d: Likewise.
	* testsuite/ld-x86-64/pr20253-2a.c: Likewise.
	* testsuite/ld-x86-64/pr20253-2b.S: Likewise.
	* testsuite/ld-x86-64/pr20253-2c.S: Likewise.
	* testsuite/ld-x86-64/pr20253-2d.S: Likewise.
	* testsuite/ld-x86-64/pr20253-3.d: Likewise.
	* testsuite/ld-x86-64/pr20253-3.s: Likewise.
	* testsuite/ld-x86-64/pr20253-4.s: Likewise.
	* testsuite/ld-x86-64/pr20253-4a.d: Likewise.
	* testsuite/ld-x86-64/pr20253-4b.d: Likewise.
	* testsuite/ld-x86-64/pr20253-4c.d: Likewise.
	* testsuite/ld-x86-64/pr20253-4d.d: Likewise.
	* testsuite/ld-x86-64/pr20253-4e.d: Likewise.
	* testsuite/ld-x86-64/pr20253-4f.d: Likewise.
	* testsuite/ld-x86-64/pr20253-5.s: Likewise.
	* testsuite/ld-x86-64/pr20253-5a.d: Likewise.
	* testsuite/ld-x86-64/pr20253-5b.d: Likewise.
	* testsuite/ld-ifunc/ifunc-18a-i386.d: Remove extra IRELATIVE
	relocation.
	* testsuite/ld-ifunc/ifunc-18a-x86-64.d: Likewise.
	* testsuite/ld-ifunc/ifunc-18b-i386.d: Likewise.
	* testsuite/ld-ifunc/ifunc-18b-x86-64.d: Likewise.
	* testsuite/ld-ifunc/ifunc-18a.s: Fix a typo.
	* testsuite/ld-x86-64/x86-64.exp: Run pr20253-1 tests.
2016-06-18 09:17:25 -07:00
GDB Administrator 854594f5ce Automatic date update in version.in 2016-06-18 00:00:20 +00:00
Thomas Preud'homme 80c135e554 Add support for Thumb-2 long branch veneers
2016-06-17  Thomas Preud'homme  <thomas.preudhomme@arm.com>
	    Tony Wang  <tony.wang@arm.com>

bfd/
	* elf32-arm.c (elf32_arm_stub_long_branch_thumb2_only): Define stub
	sequence.
	(stub_long_branch_thumb2_only): Define stub.
	(arm_stub_is_thumb): Add case for arm_stub_long_branch_thumb2_only.
	(arm_stub_long_branch_thumb2_only): Likewise.
	(arm_type_of_stub): Use arm_stub_long_branch_thumb2_only for Thumb-2
	capable targets.

ld/
	* testsuite/ld-arm/arm-elf.exp (Thumb-Thumb farcall M profile):
	Assemble for ARMv6-M.
	(Thumb2-Thumb2 farcall M profile): New testcase.
	* testsuite/ld-arm/farcall-thumb2-thumb2-m.d: New file.
	* testsuite/ld-arm/jump-reloc-veneers-cond-long-backward.d: Update to
	reflect the use of Thumb-2 veneers for Thumb-2 capable targets.
	* testsuite/ld-arm/jump-reloc-veneers-cond-long.d: Likewise.
2016-06-17 18:28:08 +01:00
Jose E. Marchesi 4f26fb3a1b bfd,opcodes: sparc: new opcode v9{c,d,e,v,m} architectures and bfd machine numbers.
This patch adds support for the opcode architectures
SPARC_OPCODE_ARCH_V9{C,D,E,V,M} and its associated BFD machine numbers
bfd_mach_sparc_v9{c,d,e,v,m} and bfd_mach_sparc_v8plus{c,d,e,v,m}.

Note that for arches up to v9b (UltraSPARC III), the detection of the
BFD machine type was based on the bits in the e_machine field of the ELF
header.  However, there are no more available bits in that field, so
this patch takes the approach of using the hardware capabilities stored
in the object attributes HWCAPS/HWCAPS2 in order to characterize the
machine the object was built for.

bfd/ChangeLog:

2016-06-17  Jose E. Marchesi  <jose.marchesi@oracle.com>

	* archures.c (bfd_mach_sparc_v8plusc): Define.
	(bfd_mach_sparc_v9c): Likewise.
	(bfd_mach_sparc_v8plusd): Likewise.
	(bfd_mach_sparc_v9d): Likewise.
	(bfd_mach_sparc_v8pluse): Likewise.
	(bfd_mach_sparc_v9e): Likewise.
	(bfd_mach_sparc_v8plusv): Likewise
	(bfd_mach_sparc_v9v): Likewise.
	(bfd_mach_sparc_v8plusm): Likewise.
	(bfd_mach_sparc_v9m): Likewise.
	(bfd_mach_sparc_v9_p): Adapt to v8plusm and v9m.
	(bfd_mach_sparc_64bit_p): Likewise.
	* bfd-in2.h: Regenerate.
	* cpu-sparc.c (arch_info_struct): Add entries for
	bfd_mach_sparc_v8plus{c,d,e,v,m} and bfd_mach_sparc_v9{c,d,e,v,m}.
	* aoutx.h (machine_type): Handle bfd_mach_sparc_v8plus{c,d,e,v,m}
	and bfd_mach_sparc_v9{c,d,e,v,m}.
	* elf32-sparc.c (elf32_sparc_final_write_processing): Likewise.
	* elfxx-sparc.c (_bfd_sparc_elf_object_p): Likewise.

include/ChangeLog:

2016-06-17  Jose E. Marchesi  <jose.marchesi@oracle.com>

	* opcode/sparc.h (enum sparc_opcode_arch_val): Add
	SPARC_OPCODE_ARCH_V9C, SPARC_OPCODE_ARCH_V9D,
	SPARC_OPCODE_ARCH_V9E, SPARC_OPCODE_ARCH_V9V and
	SPARC_OPCODE_ARCH_V9M.

opcodes/ChangeLog:

2016-06-17  Jose E. Marchesi  <jose.marchesi@oracle.com>

	* sparc-dis.c (MASK_V9): Add SPARC_OPCODE_ARCH_V9{C,D,E,V,M}.
	(compute_arch_mask): Handle bfd_mach_sparc_v8plus{c,d,e,v,m} and
	bfd_mach_sparc_v9{c,d,e,v,m}.
	* sparc-opc.c (MASK_V9C): Define.
	(MASK_V9D): Likewise.
	(MASK_V9E): Likewise.
	(MASK_V9V): Likewise.
	(MASK_V9M): Likewise.
	(v6): Add MASK_V9{C,D,E,V,M}.
	(v6notlet): Likewise.
	(v7): Likewise.
	(v8): Likewise.
	(v9): Likewise.
	(v9andleon): Likewise.
	(v9a): Likewise.
	(v9b): Likewise.
	(v9c): Define.
	(v9d): Likewise.
	(v9e): Likewise.
	(v9v): Likewise.
	(v9m): Likewise.
	(sparc_opcode_archs): Add entry for v9{c,d,e,v,m}.
2016-06-17 02:12:48 -07:00
GDB Administrator e7622e5214 Automatic date update in version.in 2016-06-17 00:00:20 +00:00
H.J. Lu ca45f6e990 Add missing ChangeLog entries
commit bf52d7c720
Author: H.J. Lu <hjl.tools@gmail.com>
Date:   Wed Jun 15 10:35:38 2016 -0700

    Don't check undefined symbol for IFUNC reloc
2016-06-16 12:38:34 -07:00
H.J. Lu bf52d7c720 Don't check undefined symbol for IFUNC reloc
Since x86 elf_*_check_relocs is called after all symbols have been
resolved, there is no need to check undefined symbols for relocations
against IFUNC symbols.

bfd/

	* elf32-i386.c (elf_i386_check_relocs): Don't check undefined
	symbols for relocations against IFUNC symbols.
	* elf64-x86-64.c (elf_x86_64_check_relocs): Likewise.

ld/

	* testsuite/ld-i386/i386.exp: Run pr19636-2e-nacl.
	* testsuite/ld-i386/pr19636-2e.d: Skip for NaCl targets.
	Remove .rel.plt section.
	* testsuite/ld-i386/pr19636-2e-nacl.d: New file.
2016-06-16 11:28:29 -07:00
Marcin Kościelnicki f92339b8f3 bfd/s390: Fix DT_PLTRELSZ in presence of R_390_IRELATIVE.
This was broken by 4ade44b727,
which changed the calculation to use the .rela.plt linker section
instead of its output section - thus skipping .rela.iplt .
Fix the calculations to include it.

bfd/ChangeLog:

	* elf32-s390.c (elf_s390_finish_dynamic_sections): Include
	.rela.iplt in DT_PLTRELSZ.
	* elf64-s390.c (elf_s390_finish_dynamic_sections): Likewise,
	for DT_PLTRELSZ and DT_RELASZ as well.
2016-06-16 17:22:14 +02:00
H.J. Lu 081b1afe5a Skip relocations in non-loaded, non-alloced sections
Don't do anything special with non-loaded, non-alloced sections.
In particular, any relocs in such sections should not affect GOT
and PLT reference counting (ie. we don't allow them to create GOT
or PLT entries), there's no possibility or desire to optimize TLS
relocs, and there's not much point in propagating relocs to shared
libs that the dynamic linker won't relocate.

	* elf32-i386.c (elf_i386_check_relocs): Skip relocations in
	non-loaded, non-alloced sections.
	* elf64-x86-64.c (elf_x86_64_check_relocs): Likewise.
2016-06-16 05:52:34 -07:00
H.J. Lu 4c23f2ffa8 Check SEC_ALLOC before allocating dynamic relocation
* elf32-i386.c (elf_i386_check_relocs): Check SEC_ALLOC before
	allocating dynamic relocation.
	* elf64-x86-64.c (elf_x86_64_check_relocs): Likewise.
2016-06-15 18:42:56 -07:00
GDB Administrator 77b1142d4e Automatic date update in version.in 2016-06-16 00:00:19 +00:00
Senthil Kumar Selvaraj 31eef93e71 Fix PR ld/20254
This patch fixes another edge case related to alignment property
records - reloc offsets adjacent to property record offsets were not
getting adjusted during relaxation.

bfd/

	PR ld/20254
	* elf32-avr.c (elf32_avr_relax_delete_bytes): Adjust reloc
	offsets until reloc_toaddr.

ld/

	PR ld/20254
	* testsuite/ld-avr/avr-prop-6.d: New test.
	* testsuite/ld-avr/avr-prop-6.s: New test.
2016-06-15 12:47:46 +05:30
GDB Administrator 2a1d8bb347 Automatic date update in version.in 2016-06-15 00:00:21 +00:00
H.J. Lu c428ce9d90 Check R_*_IRELATIVE in x86 reloc_type_class
elf_{i386|x86_64}_reloc_type_class should return reloc_class_ifunc for
R_386_IRELATIVE/R_X86_64_IRELATIVE relocations.  There is no need to
check symbol type for STN_UNDEF symbol index.

	* elf32-i386.c (elf_i386_reloc_type_class): Check R_386_IRELATIVE.
	Don't check symbol type for STN_UNDEF symbol index.
	* elf64-x86-64.c (elf_x86_64_reloc_type_class): Check
	R_X86_64_IRELATIVE.  Don't check symbol type for STN_UNDEF symbol
	index.
2016-06-14 10:18:26 -07:00
H.J. Lu 897463b12b Fix elf_x86_64_reloc_type_class 2016-06-14 10:10:45 -07:00
Thomas Preud'homme 60a019a089 Fix feature checks based on ARM architecture value
2016-06-14  Thomas Preud'homme  <thomas.preudhomme@arm.com>

bfd/
	* elf32-arm.c (using_thumb_only): Force review of arch check logic for
	new architecture.
	(using_thumb2): Try Tag_THUMB_ISA_use first and check
	for exact arch value then.  Force review of arch check logic for new
	architecture.
	(arch_has_arm_nop): Update and fix arch check logic.  Force review of
	that logic for new architecture.
	(arch_has_thumb2_nop): Remove.
	(elf32_arm_tls_relax): Use using_thumb2 instead of above function.
	(elf32_arm_final_link_relocate): Likewise but using thumb2.
2016-06-14 12:02:53 +01:00
Alan Modra 3860d2b4b7 Delete bfd_my_archive macro
Many more places use abfd->my_archive rather than bfd_my_archive (abfd),
so let's make the code consistently use the first idiom.

bfd/
	* bfd-in.h (bfd_my_archive): Delete.
	* bfd-in2.h: Regenerate.
binutils/
	* ar.c: Expand uses of bfd_my_archive.
	* size.c: Likewise.
ld/
	* ldlang.c: Expand uses of bfd_my_archive.
	* ldmain.c: Likewise.
	* ldmisc.c: Likewise.
	* plugin.c: Likewise.
2016-06-14 13:24:37 +09:30
Alan Modra b0cffb4767 Set my_archive for thin archives
LTO plugin support in plugin_maybe_claim wants to close the IR bfd
after replacing it with the recompiled object, but can't do so for
archive elements due to various pointers that access the archive bfd.
Thin archives have the same problem.  They too cannot have their
element bfds closed.

	PR ld/20241
bfd/
	* archive.c (open_nested_file): Set my_archive.
	* bfd.c (_bfd_default_error_handler <%B>): Exclude archive file name
	for thin archives.
	* bfdio.c (bfd_tell): Don't adjust origin for thin archives.
	(bfd_seek): Likewise.
	* bfdwin.c (bfd_get_file_window): Likewise.
	* cache.c (cache_bmmap): Likewise.
	(bfd_cache_lookup_worker): Don't look in my_archive for thin archives.
	* mach-o.c (bfd_mach_o_follow_dsym): Don't open my_archive for
	thin archives.
	* plugin.c (try_claim): Likewise.
	* xcofflink.c (xcoff_link_add_dynamic_symbols): Use import path of
	file within thin archive, not the archive.
binutils/
	* bucomm.c (bfd_get_archive_filename): Return file name within thin
	archive.
ld/
	* ldmain.c (add_archive_element): Just print file name of file within
	thin archives.
	* ldmisc.c (vfinfo): Likewise.
	* plugin.c (plugin_object_p): Open file within thin archives.
	(plugin_maybe_claim): Expand comment.
2016-06-14 13:12:00 +09:30
GDB Administrator 57bc0e78e9 Automatic date update in version.in 2016-06-14 00:00:19 +00:00
H.J. Lu 712ec27916 Add the GOT base for GOT32 relocs against IFUNC
Add the GOT base for R_386_GOT32/R_386_GOT32X relocations against IFUNC
symbols if there is no base register and disallow them for PIC.

bfd/

	PR ld/20244
	* elf32-i386.c (elf_i386_relocate_section): Add the .got.plt
	section address for R_386_GOT32/R_386_GOT32X relocations against
	IFUNC symbols if there is no base register and return error for
	PIC.

ld/

	PR ld/20244
	* testsuite/ld-i386/i386.exp: Run pr20244-2a, pr20244-2b,
	pr20244-2c and pr20244-2d.
	* testsuite/ld-i386/no-plt.exp: Run pr20244-3a and pr20244-3b.
	* testsuite/ld-i386/pr20244-2.s: New file.
	* testsuite/ld-i386/pr20244-2a.d: Likewise.
	* testsuite/ld-i386/pr20244-2b.d: Likewise.
	* testsuite/ld-i386/pr20244-2c.d: Likewise.
	* testsuite/ld-i386/pr20244-2d.d: Likewise.
	* testsuite/ld-i386/pr20244-3a.c: Likewise.
	* testsuite/ld-i386/pr20244-3b.S: Likewise.
	* testsuite/ld-i386/pr20244-3c.S: Likewise.
	* testsuite/ld-i386/pr20244-3d.S: Likewise.
2016-06-13 11:11:23 -07:00
H.J. Lu ca8c86efe7 Add 2 i386 tests to call IFUNC functions via GOT
bfd/

	* elf32-i386.c (elf_i386_relocate_section): Simplify IFUNC
	GOT32 adjustment for static executables.

ld/

2016-06-13  H.J. Lu  <hongjiu.lu@intel.com>

	* testsuite/ld-i386/i386.exp: Run ifunc-1a and ifunc-1b.
	* testsuite/ld-i386/ifunc-1a.c: New file.
	* testsuite/ld-i386/ifunc-1b.S: Likewise.
	* testsuite/ld-i386/ifunc-1c.S: Likewise.
	* testsuite/ld-i386/ifunc-1d.S: Likewise.
2016-06-13 09:27:12 -07:00
Maciej W. Rozycki 0c9663cbd4 MIPS/BFD: Update outdated comment about o32 R_MIPS_PC32 reloc support
Complement:

commit b47468a6db
Author: Catherine Moore <clm@redhat.com>
Date:   Mon May 6 15:25:45 2013 +0000

and the return of support for R_MIPS_PC32 there.

	bfd/
	* elf32-mips.c (elf_mips_gnu_pcrel32): Update comment.
2016-06-13 16:59:37 +01:00
Claudiu Zissulescu 815dc1bcdc [ARC] Fix condition.
bfd/
2016-06-13  Cupertino Miranda  <cmiranda@synospsy.com>

	* elf32-arc.c (elf_arc_relocate_section): Fixed condition.
2016-06-13 17:45:38 +02:00
Cupertino Miranda 3b63d2cee1 [ARC] Fixes related to reordering of .got and .got.plt
- Correctly solved relocations on the .got header.
- This bug arrised from enabling RELRO (-z combreloc).
  Because the .got and .got.plt sections were split in new linker
  scripts the header is no longer part of sgotplt contents.
  Changed the patch to sgot contents instead.
- Latest fix to .got header relocs.

bfd/
2016-06-13  Cupertino Miranda  <cmiranda@synospsy.com>

	* elf32-arc.c (elf_arc_finish_dynamic_sections): Changed.
2016-06-13 16:10:00 +02:00
Cupertino Miranda 2ab2f40d58 [ARC] General bug fixes
Fail safe for trying to reloc GOT and PLT on non dynamic linker.  Fix
issue with dynamic relocs not being generated with -pie.  Removed some
structures that were not being used.  Fixed typo changing RELENT to
RELAENT.  Fix for all SECTOFF relocations.

bfd/
2016-06-13  Cupertino Miranda  <cmiranda@synospsy.com>

	* elf32-arc.c (arc_local_data, arc_local_data): Removed.
	(SECTSTART): Changed.
	(elf_arc_relocate_section): Fixed mistake in PIE related
	condition.
	(elf_arc_size_dynamic_sections): Changed DT_RELENT to DT_RELAENT.
2016-06-13 16:07:02 +02:00
Cupertino Miranda 0f7f3789ca [ARC] Generate DT_RELACOUNT.
bfd/
2016-06-13  Cupertino Miranda  <cmiranda@synospsy.com>

	* elf32-arc.c (elf32_arc_reloc_type_class): Defined function to
	enable support for "-z combreloc" and DT_RELACOUNT.
	(elf_backend_reloc_type_class): Likewise
2016-06-13 16:04:04 +02:00
GDB Administrator 1d3843e0b7 Automatic date update in version.in 2016-06-13 00:00:15 +00:00
H.J. Lu 74d7f0aa5b Subtract GOT base only with a base register
When relocating R_386_GOT32 in "op $0, bar@GOT", we shouldn't subtract
GOT base without a base register and we should disallow it without a
base register for PIC.

bfd/

	PR ld/20244
	* elf32-i386.c (elf_i386_relocate_section): When relocating
	R_386_GOT32, return error without a base register for PIC and
	subtract the .got.plt section address only with a base register.

ld/

	PR ld/20244
	* testsuite/ld-i386/i386.exp: Run pr20244-1a and pr20244-1b.
	* testsuite/ld-i386/pr20244-1.s: New file.
	* testsuite/ld-i386/pr20244-1a.d: Likewise.
	* testsuite/ld-i386/pr20244-1b.d: Likewise.
	* testsuite/ld-i386/pr20244-1c.d: Likewise.
2016-06-11 21:24:01 -07:00
GDB Administrator 0a41a307ca Automatic date update in version.in 2016-06-12 00:00:17 +00:00
Alan Modra ef53be8916 Use size_t rather than bfd_size_type
I noticed when writing _bfd_elf_strtab_save/restore that size_t would
be better than bfd_size_type for a number of things in elf-strtab.c.
Using a 64-bit bfd_size_type on a 32-bit host doesn't make much sense
for array sizes and indices.

	* elf-strtab.c (struct strtab_save): Use size_t for "size".
	(struct elf_strtab_hash): Likewise for "size" and "alloced".
	(_bfd_elf_strtab_init): Formatting.
	(_bfd_elf_strtab_add): Return size_t rather than bfd_size_type.
	(_bfd_elf_strtab_addref): Take size_t idx param.
	(_bfd_elf_strtab_delref, _bfd_elf_strtab_refcount): Likewise.
	(_bfd_elf_strtab_offset): Likewise.
	(_bfd_elf_strtab_clear_all_refs): Use size_t idx.
	(_bfd_elf_strtab_save): Use size_t "idx" and "size" vars.
	(_bfd_elf_strtab_restore, _bfd_elf_strtab_emit): Similarly.
	(_bfd_elf_strtab_finalize): Similarly.
	* elf-bfd.h (_bfd_elf_strtab_add): Update prototypes.
	(_bfd_elf_strtab_addref, _bfd_elf_strtab_delref): Likewise.
	(_bfd_elf_strtab_refcount, _bfd_elf_strtab_offset): Likewise.
	* elf.c (bfd_elf_get_elf_syms): Calculate symbol buffer size
	using bfd_size_type.
	(bfd_section_from_shdr): Delete amt.
	(_bfd_elf_init_reloc_shdr): Likewise.
	(_bfd_elf_link_assign_sym_version): Likewise.
	(assign_section_numbers): Use size_t reloc_count.
	* elflink.c (struct elf_symbuf_head): Use size_t "count".
	(bfd_elf_link_record_dynamic_symbol): Use size_t for some vars.
	(elf_link_is_defined_archive_symbol): Likewise.
	(elf_add_dt_needed_tag): Likewise.
	(elf_finalize_dynstr): Likewise.
	(elf_link_add_object_symbols): Likewise.
	(bfd_elf_size_dynamic_sections): Likewise.
	(elf_create_symbuf): Similarly.
	(bfd_elf_match_symbols_in_sections): Likewise.
	(elf_link_swap_symbols_out): Likewise.
	(elf_link_check_versioned_symbol): Likewise.
	(bfd_elf_gc_record_vtinherit): Likewise.
	(bfd_elf_gc_common_finalize_got_offsets): Likewise.
2016-06-11 17:24:56 +09:30
GDB Administrator de5b02b698 Automatic date update in version.in 2016-06-11 00:00:19 +00:00
GDB Administrator 936f2d3c42 Automatic date update in version.in 2016-06-10 00:00:18 +00:00
Denis Chertykov 5c41dbc302 Fix PR 20221 - adjust syms and relocs only if relax shrunk section.
This patch fixes an edge case in linker relaxation that causes symbol
values to be computed incorrectly in the presence of align directives
in input source code.

bfd/
	* elf32-avr.c (elf32_avr_relax_delete_bytes): Adjust syms
	and relocs only if shrinking occurred.

ld/
	* testsuite/ld-avr/avr-prop-5.d: New.
	* testsuite/ld-avr/avr-prop-5.s: New.
2016-06-09 19:17:43 +03:00
GDB Administrator 6b10ba223f Automatic date update in version.in 2016-06-09 00:00:15 +00:00
H.J. Lu 6eaa7fb59b Support i386 TLS code sequences without PLT
We can generate i386 TLS code sequences for general and local dynamic
models without PLT, which uses indirect call via GOT:

call *___tls_get_addr@GOT(%reg)

where EBX register isn't required as GOT base, instead of direct call:

call ___tls_get_addr[@PLT]

which requires EBX register as GOT base.

Since direct call is 4-byte long and indirect call, is 5-byte long, the
extra one byte must be handled properly.

For general dynamic model, 7-byte lea instruction before call instruction
is replaced by 6-byte one to make room for indirect call.  For local
dynamic model, we simply use 5-byte indirect call.

TLS linker optimization is updated to recognize new instruction patterns.
For local dynamic model to local exec model transition, we generate
a 6-byte lea instruction as nop, instead of a 1-byte nop plus a 4-byte
lea instruction.  Since linker may convert

call ___tls_get_addr[@PLT]

to

addr32 call ____tls_get_addr

when producing static executable, both patterns are recognized.

bfd/

	* elf64-i386.c (elf_i386_link_hash_entry): Add tls_get_addr.
	(elf_i386_link_hash_newfunc): Initialize tls_get_addr to 2.
	(elf_i386_check_tls_transition): Check indirect call and direct
	call with the addr32 prefix for general and local dynamic models.
	Set the tls_get_addr feild.
	(elf_i386_convert_load_reloc): Always use addr32 prefix for
	indirect ___tls_get_addr call via GOT.
	(elf_i386_relocate_section): Handle GD->LE, GD->IE and LD->LE
	transitions with indirect call and direct call with the addr32
	prefix.

ld/

	* testsuite/ld-i386/i386.exp: Run libtlspic2.so, tlsbin2,
	tlsgd3, tlsld2, tlsgd4, tlspie3a, tlspie3b and tlspie3c.
	* testsuite/ld-i386/pass.out: New file.
	* testsuite/ld-i386/tls-def1.c: Likewise.
	* testsuite/ld-i386/tls-gd1.S: Likewise.
	* testsuite/ld-i386/tls-ld1.S: Likewise.
	* testsuite/ld-i386/tls-main1.c: Likewise.
	* testsuite/ld-i386/tls.exp: Likewise.
	* testsuite/ld-i386/tlsbin2-nacl.rd: Likewise.
	* testsuite/ld-i386/tlsbin2.dd: Likewise.
	* testsuite/ld-i386/tlsbin2.rd: Likewise.
	* testsuite/ld-i386/tlsbin2.sd: Likewise.
	* testsuite/ld-i386/tlsbin2.td: Likewise.
	* testsuite/ld-i386/tlsbinpic2.s: Likewise.
	* testsuite/ld-i386/tlsgd3.dd: Likewise.
	* testsuite/ld-i386/tlsgd3.s: Likewise.
	* testsuite/ld-i386/tlsgd4.d: Likewise.
	* testsuite/ld-i386/tlsgd4.s: Likewise.
	* testsuite/ld-i386/tlsld2.s: Likewise.
	* testsuite/ld-i386/tlspic2-nacl.rd: Likewise.
	* testsuite/ld-i386/tlspic2.dd: Likewise.
	* testsuite/ld-i386/tlspic2.rd: Likewise.
	* testsuite/ld-i386/tlspic2.sd: Likewise.
	* testsuite/ld-i386/tlspic2.td: Likewise.
	* testsuite/ld-i386/tlspic3.s: Likewise.
	* testsuite/ld-i386/tlspie3.s: Likewise.
	* testsuite/ld-i386/tlspie3a.d: Likewise.
	* testsuite/ld-i386/tlspie3b.d: Likewise.
	* testsuite/ld-i386/tlspie3c.d: Likewise.
2016-06-08 12:01:50 -07:00
GDB Administrator 33c2b983b4 Automatic date update in version.in 2016-06-08 00:00:19 +00:00
Marcin Kościelnicki 3b67f09464 bfd/s390: Misc minor fixes.
The only non-comment fix here is in the code writing out the 3 fixed
.got.plt entries - it mistakenly put a 64-bit 0 at offsets 8 and 12
instead of 8 and 16.

bfd/ChangeLog:

	* elf32-s390.c (elf_s390_finish_dynamic_symbol): Fix comment.
	* elf64-s390.c (elf_s390x_plt_entry): Fix comment.
	(elf_s390_relocate_section): Fix comment.
	(elf_s390_finish_dynamic_sections): Fix initialization of fixed
	.got.plt entries.
2016-06-07 18:14:15 +02:00
Andreas Krebbel 161db27905 Fix PLT first entry GOT operand calculation.
Embedding the .plt section in another revealed a bug in the way the
larl operand of the first magic plt entry is being calculated.  Fixed
with the attached patch.

bfd/ChangeLog:

	* elf64-s390.c (elf_s390_finish_dynamic_sections): Subtract plt
	section offset when calculation the larl operand in the first PLT
	entry.

ld/ChangeLog:

	* testsuite/ld-s390/pltoffset-1.dd: New test.
	* testsuite/ld-s390/pltoffset-1.ld: New test.
	* testsuite/ld-s390/pltoffset-1.s: New test.
	* testsuite/ld-s390/s390.exp: Run new test.
2016-06-07 16:47:10 +02:00
Alan Modra 14b57c7c6a PowerPC VLE
VLE is an encoding, not a particular processor architecture, so it
isn't really proper to select insns based on PPC_OPCODE_VLE.  For
example
{"evaddw",  VX (4, 512), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
{"vaddubs", VX (4, 512), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
shows two insns that have the same encoding, both available with VLE.
Enabling both with VLE means we can't disassemble the second variant
even if -Maltivec is given rather than -Mspe.  Also, we don't check
user assembly against the processor type as well as we could.

Another problem is that when using the VLE encoding, insns from the
main ppc opcode table are not available, except those using opcode 4
and 31.  Correcting this revealed two errors in the ld testsuite,
use of "nop" and "rfmci" when -mvle.

This patch fixes those problems in the opcode table, and removes
PPCNONE.  I find a plain 0 distracts less from other values.

In addition, I've implemented code to recognize some machine values
from the apuinfo note present in ppc32 objects.  It's not a complete
disambiguation since we're lacking info to detect newer chips, but
what we have should help with disassembly.

include/
	* elf/ppc.h (APUINFO_SECTION_NAME, APUINFO_LABEL, PPC_APUINFO_ISEL,
	PPC_APUINFO_PMR, PPC_APUINFO_RFMCI, PPC_APUINFO_CACHELCK,
	PPC_APUINFO_SPE, PPC_APUINFO_EFS, PPC_APUINFO_BRLOCK,
	PPC_APUINFO_VLE: Define.
opcodes/
	* ppc-dis.c (ppc_opts): Delete extraneous parentheses.  Default
	cpu for "vle" to e500.
	* ppc-opc.c (ALLOW8_SPRG): Remove PPC_OPCODE_VLE.
	(NO371, PPCSPE, PPCISEL, PPCEFS, MULHW, DCBT_EO): Likewise.
	(PPCNONE): Delete, substitute throughout.
	(powerpc_opcodes): Remove PPCVLE from "flags".  Add to "deprecated"
	except for major opcode 4 and 31.
	(vle_opcodes <se_rfmci>): Add PPCRFMCI to flags.
bfd/
	* cpu-powerpc.c (powerpc_compatible): Allow bfd_mach_ppc_vle entry
	to match other 32-bit archs.
	* elf32-ppc.c (_bfd_elf_ppc_set_arch): New function.
	(ppc_elf_object_p): Call it.
	(ppc_elf_special_sections): Use APUINFO_SECTION_NAME.  Fix
	overlong line.
	(APUINFO_SECTION_NAME, APUINFO_LABEL): Don't define here.
	* elf64-ppc.c (ppc64_elf_object_p): Call _bfd_elf_ppc_set_arch.
	* bfd-in.h (_bfd_elf_ppc_at_tls_transform,
	_bfd_elf_ppc_at_tprel_transform): Move to..
	* elf-bfd.h: ..here.
	(_bfd_elf_ppc_set_arch): Declare.
	* bfd-in2.h: Regenerate.
gas/
	* config/tc-ppc.c (PPC_APUINFO_ISEL, PPC_APUINFO_PMR,
	PPC_APUINFO_RFMCI, PPC_APUINFO_CACHELCK, PPC_APUINFO_SPE,
	PPC_APUINFO_EFS, PPC_APUINFO_BRLOCK, PPC_APUINFO_VLE): Don't define.
	(ppc_setup_opcodes): Check vle disables powerpc_opcodes overridden
	by vle_opcodes, and that vle flag doesn't enable opcodes.  Don't
	add vle_opcodes twice.
	(ppc_cleanup): Use APUINFO_SECTION_NAME and APUINFO_LABEL.
ld/
	* testsuite/ld-powerpc/apuinfo1.s: Delete nop.
	* testsuite/ld-powerpc/apuinfo-vle2.s: New.
	* testsuite/ld-powerpc/powerpc.exp: Use apuinfo-vle2.s.
2016-06-07 22:04:38 +09:30
GDB Administrator e5f5f1fc49 Automatic date update in version.in 2016-06-07 00:00:16 +00:00
H.J. Lu e2cbcd9156 Support x86-64 TLS code sequences without PLT
We can generate x86-64 TLS code sequences for general and local dynamic
models without PLT, which uses indirect call via GOT:

call *__tls_get_addr@GOTPCREL(%rip)

instead of direct call:

call __tls_get_addr[@PLT]

Since direct call is 4-byte long and indirect call, is 5-byte long, the
extra one byte must be handled properly.

For general dynamic model, one 0x66 prefix before call instruction is
removed to make room for indirect call.  For local dynamic model, we
simply use 5-byte indirect call.

TLS linker optimization is updated to recognize new instruction patterns.
For local dynamic model to local exec model transition, we generate
4 0x66 prefixes, instead of 3, before mov instruction in 64-bit and
generate a 5-byte nop, instead of 4-byte, before mov instruction in
32-bit.  Since linker may convert

call *__tls_get_addr@GOTPCREL(%rip)

to

addr32 call __tls_get_addr

when producing static executable, both patterns are recognized.

bfd/

	* elf64-x86-64.c (elf_x86_64_link_hash_entry): Add tls_get_addr.
	(elf_x86_64_link_hash_newfunc): Initialize tls_get_addr to 2.
	(elf_x86_64_check_tls_transition): Check indirect call and
	direct call with the addr32 prefix for general and local dynamic
	models.  Set the tls_get_addr feild.
	(elf_x86_64_convert_load_reloc): Always use addr32 prefix for
	indirect __tls_get_addr call via GOT.
	(elf_x86_64_relocate_section): Handle GD->LE, GD->IE and LD->LE
	transitions with indirect call and direct call with the addr32
	prefix.

ld/

	* testsuite/ld-x86-64/pass.out: New file.
	* testsuite/ld-x86-64/tls-def1.c: Likewise.
	* testsuite/ld-x86-64/tls-gd1.S: Likewise.
	* testsuite/ld-x86-64/tls-ld1.S: Likewise.
	* testsuite/ld-x86-64/tls-main1.c: Likewise.
	* testsuite/ld-x86-64/tls.exp: Likewise.
	* testsuite/ld-x86-64/tlsbin2-nacl.rd: Likewise.
	* testsuite/ld-x86-64/tlsbin2.dd: Likewise.
	* testsuite/ld-x86-64/tlsbin2.rd: Likewise.
	* testsuite/ld-x86-64/tlsbin2.sd: Likewise.
	* testsuite/ld-x86-64/tlsbin2.td: Likewise.
	* testsuite/ld-x86-64/tlsbinpic2.s: Likewise.
	* testsuite/ld-x86-64/tlsgd10.dd: Likewise.
	* testsuite/ld-x86-64/tlsgd10.s: Likewise.
	* testsuite/ld-x86-64/tlsgd11.dd: Likewise.
	* testsuite/ld-x86-64/tlsgd11.s: Likewise.
	* testsuite/ld-x86-64/tlsgd12.d: Likewise.
	* testsuite/ld-x86-64/tlsgd12.s: Likewise.
	* testsuite/ld-x86-64/tlsgd13.d: Likewise.
	* testsuite/ld-x86-64/tlsgd13.s: Likewise.
	* testsuite/ld-x86-64/tlsgd14.dd: Likewise.
	* testsuite/ld-x86-64/tlsgd14.s: Likewise.
	* testsuite/ld-x86-64/tlsgd5c.s: Likewise.
	* testsuite/ld-x86-64/tlsgd6c.s: Likewise.
	* testsuite/ld-x86-64/tlsgd9.dd: Likewise.
	* testsuite/ld-x86-64/tlsgd9.s: Likewise.
	* testsuite/ld-x86-64/tlsld4.dd: Likewise.
	* testsuite/ld-x86-64/tlsld4.s: Likewise.
	* testsuite/ld-x86-64/tlsld5.dd: Likewise.
	* testsuite/ld-x86-64/tlsld5.s: Likewise.
	* testsuite/ld-x86-64/tlsld6.dd: Likewise.
	* testsuite/ld-x86-64/tlsld6.s: Likewise.
	* testsuite/ld-x86-64/tlspic2-nacl.rd: Likewise.
	* testsuite/ld-x86-64/tlspic2.dd: Likewise.
	* testsuite/ld-x86-64/tlspic2.rd: Likewise.
	* testsuite/ld-x86-64/tlspic2.sd: Likewise.
	* testsuite/ld-x86-64/tlspic2.td: Likewise.
	* testsuite/ld-x86-64/tlspic3.s: Likewise.
	* testsuite/ld-x86-64/tlspie2.s: Likewise.
	* testsuite/ld-x86-64/tlspie2a.d: Likewise.
	* testsuite/ld-x86-64/tlspie2b.d: Likewise.
	* testsuite/ld-x86-64/tlspie2c.d: Likewise.
	* testsuite/ld-x86-64/tlsgd5.dd: Updated.
	* testsuite/ld-x86-64/tlsgd6.dd: Likewise.
	* testsuite/ld-x86-64/x86-64.exp: Run libtlspic2.so, tlsbin2,
	tlsgd5b, tlsgd6b, tlsld4, tlsld5, tlsld6, tlsgd9, tlsgd10,
	tlsgd11, tlsgd14, tlsgd12, tlsgd13, tlspie2a, tlspie2b and
	tlspie2c.
2016-06-06 11:07:16 -07:00
GDB Administrator b5966800ea Automatic date update in version.in 2016-06-06 00:00:15 +00:00
GDB Administrator 1704fca7da Automatic date update in version.in 2016-06-05 00:00:19 +00:00
Christian Groessler 2ac27cd3c1 Add z8k ld testsuite and fix range check in coff-z8k.c
bfd/
	* coff-z8k.c (extra_case): Fix range check for R_JR relocation.

ld/
	* ld/testsuite/ld-z8k/0filler.s: New file.
	* ld/testsuite/ld-z8k/branch-target.s: New file.
	* ld/testsuite/ld-z8k/branch-target2.s: New file.
	* ld/testsuite/ld-z8k/calr-back-8001.d: New file.
	* ld/testsuite/ld-z8k/calr-back-8002.d: New file.
	* ld/testsuite/ld-z8k/calr-back-fail-8001.d: New file.
	* ld/testsuite/ld-z8k/calr-back-fail-8002.d: New file.
	* ld/testsuite/ld-z8k/calr-forw-8001.d: New file.
	* ld/testsuite/ld-z8k/calr-forw-8002.d: New file.
	* ld/testsuite/ld-z8k/calr-forw-fail-8001.d: New file.
	* ld/testsuite/ld-z8k/calr-forw-fail-8002.d: New file.
	* ld/testsuite/ld-z8k/calr-opcode.s: New file.
	* ld/testsuite/ld-z8k/dbjnz-forw-8001.d: New file.
	* ld/testsuite/ld-z8k/dbjnz-forw-8002.d: New file.
	* ld/testsuite/ld-z8k/dbjnz-forw-fail-8001.d: New file.
	* ld/testsuite/ld-z8k/dbjnz-forw-fail-8002.d: New file.
	* ld/testsuite/ld-z8k/dbjnz-opcode.s: New file.
	* ld/testsuite/ld-z8k/djnz-back-8001.d: New file.
	* ld/testsuite/ld-z8k/djnz-back-8002.d: New file.
	* ld/testsuite/ld-z8k/djnz-back-fail-8001.d: New file.
	* ld/testsuite/ld-z8k/djnz-back-fail-8002.d: New file.
	* ld/testsuite/ld-z8k/djnz-forw-8001.d: New file.
	* ld/testsuite/ld-z8k/djnz-forw-8002.d: New file.
	* ld/testsuite/ld-z8k/djnz-forw-fail-8001.d: New file.
	* ld/testsuite/ld-z8k/djnz-forw-fail-8002.d: New file.
	* ld/testsuite/ld-z8k/djnz-opcode.s: New file.
	* ld/testsuite/ld-z8k/filler.s: New file.
	* ld/testsuite/ld-z8k/jr-back-8001.d: New file.
	* ld/testsuite/ld-z8k/jr-back-8002.d: New file.
	* ld/testsuite/ld-z8k/jr-back-fail-8001.d: New file.
	* ld/testsuite/ld-z8k/jr-back-fail-8002.d: New file.
	* ld/testsuite/ld-z8k/jr-forw-8001.d: New file.
	* ld/testsuite/ld-z8k/jr-forw-8002.d: New file.
	* ld/testsuite/ld-z8k/jr-forw-fail-8001.d: New file.
	* ld/testsuite/ld-z8k/jr-forw-fail-8002.d: New file.
	* ld/testsuite/ld-z8k/jr-opcode.s: New file.
	* ld/testsuite/ld-z8k/ldr-back-8001.d: New file.
	* ld/testsuite/ld-z8k/ldr-back-8002.d: New file.
	* ld/testsuite/ld-z8k/ldr-back-fail-8001.d: New file.
	* ld/testsuite/ld-z8k/ldr-back-fail-8002.d: New file.
	* ld/testsuite/ld-z8k/ldr-forw-8001.d: New file.
	* ld/testsuite/ld-z8k/ldr-forw-8002.d: New file.
	* ld/testsuite/ld-z8k/ldr-forw-fail-8001.d: New file.
	* ld/testsuite/ld-z8k/ldr-forw-fail-8002.d: New file.
	* ld/testsuite/ld-z8k/ldr-opcode.s: New file.
	* ld/testsuite/ld-z8k/ldrb-forw-8001.d: New file.
	* ld/testsuite/ld-z8k/ldrb-forw-8002.d: New file.
	* ld/testsuite/ld-z8k/ldrb-forw-fail-8001.d: New file.
	* ld/testsuite/ld-z8k/ldrb-forw-fail-8002.d: New file.
	* ld/testsuite/ld-z8k/ldrb-opcode.s: New file.
	* ld/testsuite/ld-z8k/ldrb-opcode2.s: New file.
	* ld/testsuite/ld-z8k/other-file.s: New file.
	* ld/testsuite/ld-z8k/reloc.dd: New file.
	* ld/testsuite/ld-z8k/reloc.ld: New file.
	* ld/testsuite/ld-z8k/relocseg.dd: New file.
	* ld/testsuite/ld-z8k/relocseg.ld: New file.
	* ld/testsuite/ld-z8k/relocseg1.dd: New file.
	* ld/testsuite/ld-z8k/test-ld.sh: New file.
	* ld/testsuite/ld-z8k/this-file.s: New file.
	* ld/testsuite/ld-z8k/z8k.exp: New file.
2016-06-04 22:15:52 +02:00
GDB Administrator de3da64574 Automatic date update in version.in 2016-06-04 00:00:18 +00:00
GDB Administrator e94321588d Automatic date update in version.in 2016-06-03 00:00:18 +00:00
Nick Clifton 99914dfd71 Add "arm_any" architecture type to allow -m option to various binutils to match any ARM architecture.
PR target/20088
	* cpu-arm.c (processors): Add "arm_any" type to match any ARM
	architecture.
	(arch_info_struct): Likewise.
	(architectures): Likewise.
2016-06-02 17:17:03 +01:00
Vineet Gupta 4ad0bb5f3a Allow ARC Linux targets that do not use uclibc.
bfd    * config.bfd: Replace -uclibc with *.

gas    * configure.tgt: Replace -uclibc with *.

ld     * configure.tgt: Replace -uclibc with *.
2016-06-02 15:03:47 +01:00
H.J. Lu 3ddf1bdd42 Replace data32 with data16 in comments
The 0x66 prefix is data16, not data32 in 64-bit.

	* elf64-x86-64.c: Replace data32 with data16 in comments.
2016-06-02 06:50:45 -07:00
Alan Modra 5b677558bc Revert PR16467 change
This reverts the pr16467 change, which was incorrect due to faulty
analysis of the pr16467 testcase.  The failure was not due to a
mismatch in symbol type (ifunc/non-ifunc) but due to a symbol loop
being set up.

See https://sourceware.org/ml/binutils/2016-06/msg00013.html for some
rambling on versioned symbols and ELF shared library symbol overriding
that explain this patch.

bfd/
	PR ld/20159
	PR ld/16467
	* elflink.c (_bfd_elf_merge_symbol): Revert PR16467 change.
	(_bfd_elf_add_default_symbol): Don't indirect to/from defined
	symbol given a version by a script different to the version
	of the symbol being added.
	(elf_link_add_object_symbols): Use _bfd_elf_strtab_save and
	_bfd_elf_strtab_restore.  Don't fudge dynstr references.
	* elf-strtab.c (_bfd_elf_strtab_restore_size): Delete.
	(struct strtab_save): New.
	(_bfd_elf_strtab_save, _bfd_elf_strtab_restore): New functions.
	* elf-bfd.h (_bfd_elf_strtab_restore_size): Delete.
	(_bfd_elf_strtab_save, _bfd_elf_strtab_restore): Declare.
2016-06-02 12:28:39 +09:30
Trevor Saunders 1fe0971e41 add more extern C
opcodes/ChangeLog:

2016-06-01  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>

	* nds32-asm.h: Add extern "C".
	* sh-opc.h: Likewise.

bfd/ChangeLog:

2016-06-01  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>

	* elf32-hppa.h: Add extern "C".
	* elf32-nds32.h: Likewise.
	* elf32-tic6x.h: Likewise.

include/ChangeLog:

2016-06-01  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>

	* elf/mips.h: Likewise.
	* elf/sh.h: Likewise.
	* opcode/d10v.h: Likewise.
	* opcode/d30v.h: Likewise.
	* opcode/ia64.h: Likewise.
	* opcode/mips.h: Likewise.
	* opcode/ppc.h: Likewise.
	* opcode/sparc.h: Likewise.
	* opcode/tic6x.h: Likewise.
	* opcode/v850.h: Likewise.
2016-06-01 21:26:32 -04:00
GDB Administrator 65ce606bc4 Automatic date update in version.in 2016-06-02 00:00:19 +00:00
Nick Clifton 885a10879e Add new Serbian translation for the bfd library.
* po/sr.po: New Serbian translation.
	* configure.ac (ALL_LINGUAS): Add sr.
	* configure: Regenerate.
2016-06-01 16:51:55 +01:00
GDB Administrator 75c039be62 Automatic date update in version.in 2016-06-01 00:00:18 +00:00
GDB Administrator c7022704e9 Automatic date update in version.in 2016-05-31 00:00:16 +00:00
GDB Administrator 2adb06b571 Automatic date update in version.in 2016-05-30 00:00:15 +00:00
GDB Administrator bb69990f86 Automatic date update in version.in 2016-05-29 00:00:19 +00:00
Maciej W. Rozycki 99aefae681 MIPS/BFD: Correctly handle `bfd_reloc_outofrange' with branches
Fix internal errors like:

ld: BFD (GNU Binutils) 2.26.51.20160526 internal error, aborting at .../bfd/elfxx-mips.c:10278 in _bfd_mips_elf_relocate_section

ld: Please report this bug.

triggered by the `bfd_reloc_outofrange' condition on branch relocations.

	bfd/
	* elfxx-mips.c (b_reloc_p): New function.
	(_bfd_mips_elf_relocate_section) <bfd_reloc_outofrange>: Handle
	branch relocations.

	ld/
	* testsuite/ld-mips-elf/unaligned-branch.d: New test.
	* testsuite/ld-mips-elf/unaligned-branch.s: New test source.
	* testsuite/ld-mips-elf/unaligned-text.s: New test source.
	* testsuite/ld-mips-elf/mips-elf.exp: Run the new test.
2016-05-28 10:59:45 +01:00
Maciej W. Rozycki 7743482350 MIPS/BFD: Enable local R_MIPS_26 overflow detection
The original MIPS SVR4 psABI defines the calculation for the R_MIPS_26
relocation in a complex way, as follows[1]:

Name        Value Field    Symbol   Calculation
R_MIPS_26     4   T-targ26 local    (((A << 2) | \
                                      (P & 0xf0000000)) + S) >> 2
              4   T-targ26 external (sign-extend(A << 2) + S) >> 2

This is further clarified, by correcting typos (already applied in the
excerpt above) in the 64-bit psABI extension[2].  A note is included in
both documents to specify that for the purpose of relocation processing
a local symbol is one with binding STB_LOCAL and type STT_SECTION, and
otherwise, a symbol is external.

We have both calculations implemented for the R_MIPS_26 relocation, and
by extension also for the R_MIPS16_26 and R_MICROMIPS_26_S1 relocations,
from now on collectively called jump relocations.  However our code uses
a different condition to tell local and external symbols apart, that is
it only checks for the STB_LOCAL binding and ignores the symbol type,
however for REL relocations only.  The external calculation is used for
all RELA jump relocations.

In reality the difference matters for jump relocations referring local
MIPS16 and, as from recent commit 44d3da2338 ("MIPS/GAS: Treat local
jump relocs the same no matter if REL or RELA"), also local microMIPS
symbols.  Such relocations are not converted to refer to corresponding
section symbols instead and retain the original local symbol reference.

It can be inferred from the relocation calculation definitions that the
addend is effectively unsigned for the local case and explicitly signed
for the external case.  With the REL relocation format it makes sense
given the limited range provided for by the field being relocated: the
use of an unsigned addend expands the range by one bit for the local
case, because a negative offset from a section symbol makes no sense,
and any usable negative offset from the original local symbol will have
worked out positive if converted to a section-relative reference.  In
the external case a signed addend gives more flexibility as offsets both
negative and positive can be used with a symbol.  Any such offsets will
typically have a small value.

The inclusion of the (P & 0xf0000000) component, ORed in the calculation
in the local case, seems questionable as bits 31:28 are not included in
the relocatable field and are masked out as the relocation is applied.
Their value is therefore irrelevant for output processing, the relocated
field ends up the same regardless of their value.  They could be used
for overflow detection, however this is precluded by adding them to bits
31:28 of the symbol referred, as the sum will not correspond to the
value calculated by the processor at run time whenever bits 31:28 of the
symbol referred are not all zeros, even though it is valid as long they
are the same as bits 31:28 of P.

We deal with this problem by ignoring any overflow resulting from the
local calculation.  This however makes us miss genuine overflow cases,
where 31:28 of the symbol referred are different from bits 31:28 of P,
and non-functional code is produced.

Given the situation, for the purpose of overflow detection we can change
our code to follow the original psABI and only treat the in-place addend
as unsigned in the section symbol case, permitting jumps to offsets
128MiB and above into section.  Sections so large may be uncommon, but
still a reasonable use case.  On the other hand such large offsets from
regular local symbols are not expected and it makes sense to support
(possibly small) negative offsets instead, also in consistency with what
we do for global symbols.

Drop the (P & 0xf0000000) component then, treat the addend as signed
with local non-section symbols and also detect an overflow in the result
of such calculation with local symbols.  NB it does not affect the value
computed for the relocatable field, it only affects overflow detection.

References:

[1] "SYSTEM V APPLICATION BINARY INTERFACE, MIPS RISC Processor
    Supplement, 3rd Edition", Figure 4-11: "Relocation Types", p. 4-19
    <http://www.linux-mips.org/pub/linux/mips/doc/ABI/mipsabi.pdf>

[2] "64-bit ELF Object File Specification, Draft Version 2.5", Table 32
    "Relocation Types", p. 45
    <http://techpubs.sgi.com/library/manuals/4000/007-4658-001/pdf/007-4658-001.pdf>

	bfd/
	* elfxx-mips.c (mips_elf_calculate_relocation): <R_MIPS16_26>
	<R_MIPS_26, R_MICROMIPS_26_S1>: Drop the region bits of the
	reloc location from calculation, treat the addend as signed with
	local non-section symbols and enable overflow detection.

	ld/
	* testsuite/ld-mips-elf/jal-global-overflow-0.d: New test.
	* testsuite/ld-mips-elf/jal-global-overflow-1.d: New test.
	* testsuite/ld-mips-elf/jal-local-overflow-0.d: New test.
	* testsuite/ld-mips-elf/jal-local-overflow-1.d: New test.
	* testsuite/ld-mips-elf/jal-global-overflow.s: New test source.
	* testsuite/ld-mips-elf/jal-local-overflow.s: New test source.
	* testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.
2016-05-28 10:33:54 +01:00
Alan Modra 1a72702bb3 Return void from linker callbacks
The ldmain.c implementation of these linker callback functions always
return true, so any code handling a false return is dead.  What's
more, some of the bfd backends abort if ever a false return is seen,
and there seems to be some confusion in gdb's compile-object-load.c.
The return value was never meant to be "oh yes, a multiple_definition
error occurred", but rather "out of memory or other catastrophic
failure".

This patch removes the status return on the callbacks that always
return true.  I kept the return status for "notice" because that one
does happen to need to return "out of memory".

include/
	* bfdlink.h (struct bfd_link_callbacks): Update comments.
	Return void from multiple_definition, multiple_common,
	add_to_set, constructor, warning, undefined_symbol,
	reloc_overflow, reloc_dangerous and unattached_reloc.
bfd/
	* aoutx.h: Adjust linker callback calls throughout file,
	removing dead code.
	* bout.c: Likewise.
	* coff-alpha.c: Likewise.
	* coff-arm.c: Likewise.
	* coff-h8300.c: Likewise.
	* coff-h8500.c: Likewise.
	* coff-i960.c: Likewise.
	* coff-mcore.c: Likewise.
	* coff-mips.c: Likewise.
	* coff-ppc.c: Likewise.
	* coff-rs6000.c: Likewise.
	* coff-sh.c: Likewise.
	* coff-tic80.c: Likewise.
	* coff-w65.c: Likewise.
	* coff-z80.c: Likewise.
	* coff-z8k.c: Likewise.
	* coff64-rs6000.c: Likewise.
	* cofflink.c: Likewise.
	* ecoff.c: Likewise.
	* elf-bfd.h: Likewise.
	* elf-m10200.c: Likewise.
	* elf-m10300.c: Likewise.
	* elf32-arc.c: Likewise.
	* elf32-arm.c: Likewise.
	* elf32-avr.c: Likewise.
	* elf32-bfin.c: Likewise.
	* elf32-cr16.c: Likewise.
	* elf32-cr16c.c: Likewise.
	* elf32-cris.c: Likewise.
	* elf32-crx.c: Likewise.
	* elf32-d10v.c: Likewise.
	* elf32-epiphany.c: Likewise.
	* elf32-fr30.c: Likewise.
	* elf32-frv.c: Likewise.
	* elf32-ft32.c: Likewise.
	* elf32-h8300.c: Likewise.
	* elf32-hppa.c: Likewise.
	* elf32-i370.c: Likewise.
	* elf32-i386.c: Likewise.
	* elf32-i860.c: Likewise.
	* elf32-ip2k.c: Likewise.
	* elf32-iq2000.c: Likewise.
	* elf32-lm32.c: Likewise.
	* elf32-m32c.c: Likewise.
	* elf32-m32r.c: Likewise.
	* elf32-m68hc1x.c: Likewise.
	* elf32-m68k.c: Likewise.
	* elf32-mep.c: Likewise.
	* elf32-metag.c: Likewise.
	* elf32-microblaze.c: Likewise.
	* elf32-moxie.c: Likewise.
	* elf32-msp430.c: Likewise.
	* elf32-mt.c: Likewise.
	* elf32-nds32.c: Likewise.
	* elf32-nios2.c: Likewise.
	* elf32-or1k.c: Likewise.
	* elf32-ppc.c: Likewise.
	* elf32-s390.c: Likewise.
	* elf32-score.c: Likewise.
	* elf32-score7.c: Likewise.
	* elf32-sh.c: Likewise.
	* elf32-sh64.c: Likewise.
	* elf32-spu.c: Likewise.
	* elf32-tic6x.c: Likewise.
	* elf32-tilepro.c: Likewise.
	* elf32-v850.c: Likewise.
	* elf32-vax.c: Likewise.
	* elf32-visium.c: Likewise.
	* elf32-xstormy16.c: Likewise.
	* elf32-xtensa.c: Likewise.
	* elf64-alpha.c: Likewise.
	* elf64-hppa.c: Likewise.
	* elf64-ia64-vms.c: Likewise.
	* elf64-mmix.c: Likewise.
	* elf64-ppc.c: Likewise.
	* elf64-s390.c: Likewise.
	* elf64-sh64.c: Likewise.
	* elf64-x86-64.c: Likewise.
	* elflink.c: Likewise.
	* elfnn-aarch64.c: Likewise.
	* elfnn-ia64.c: Likewise.
	* elfxx-mips.c: Likewise.
	* elfxx-sparc.c: Likewise.
	* elfxx-tilegx.c: Likewise.
	* linker.c: Likewise.
	* pdp11.c: Likewise.
	* pe-mips.c: Likewise.
	* reloc.c: Likewise.
	* reloc16.c: Likewise.
	* simple.c: Likewise.
	* vms-alpha.c: Likewise.
	* xcofflink.c: Likewise.
	* elf32-rl78.c (get_symbol_value, get_romstart, get_ramstart): Delete
	status param.  Adjust calls to these and linker callbacks throughout.
	* elf32-rx.c: (get_symbol_value, get_gp, get_romstart,
	get_ramstart): Delete status param.  Adjust calls to these and
	linker callbacks throughout.
ld/
	* ldmain.c (multiple_definition, multiple_common, add_to_set,
	constructor_callback, warning_callback, undefined_symbol,
	reloc_overflow, reloc_dangerous, unattached_reloc): Return void.
	* emultempl/elf32.em: Adjust callback calls.
gdb/
	* compile/compile-object-load.c (link_callbacks_multiple_definition,
	link_callbacks_warning, link_callbacks_undefined_symbol,
	link_callbacks_undefined_symbol, link_callbacks_reloc_overflow,
	link_callbacks_reloc_dangerous,
	link_callbacks_unattached_reloc): Return void.
2016-05-28 11:17:20 +09:30
GDB Administrator d5dca95ffc Automatic date update in version.in 2016-05-28 00:00:19 +00:00
Maciej W. Rozycki bc27bb0573 MIPS/BFD: Include the addend in JALX's target alignment verification
On RELA targets the addend can affect JALX target's alignment, so only
verify it once the whole relocation calculation has completed.

	bfd/
	* elfxx-mips.c (mips_elf_calculate_relocation) <R_MIPS16_26>
	<R_MIPS_26, R_MICROMIPS_26_S1>: Include the addend in JALX's
	target alignment verification.

	ld/
	* testsuite/ld-mips-elf/unaligned-jalx-addend-0.d: New test.
	* testsuite/ld-mips-elf/unaligned-jalx-addend-1.d: New test.
	* testsuite/ld-mips-elf/unaligned-jalx-addend-mips16-0.d: New
	test.
	* testsuite/ld-mips-elf/unaligned-jalx-addend-mips16-1.d: New
	test.
	* testsuite/ld-mips-elf/unaligned-jalx-addend-micromips-0.d: New
	test.
	* testsuite/ld-mips-elf/unaligned-jalx-addend-micromips-1.d: New
	test.
	* testsuite/ld-mips-elf/unaligned-jalx-addend-0.s: New test
	source.
	* testsuite/ld-mips-elf/unaligned-jalx-addend-1.s: New test
	source.
	* testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.
2016-05-27 22:31:29 +01:00
Maciej W. Rozycki ceab86af75 MIPS/BFD: Fix section symbol name fetching in relocation
Symbol table entries for section symbols are different between IRIX and
traditional MIPS ELF targets in that IRIX entries have their `st_name'
member pointing at the section's name in the string table section, while
traditional entries have 0 there and the section header string table has
to be referred via the relevant section header's `shn_name' member
instead.

This is chosen with the `elf_backend_name_local_section_symbols' backend
and can be observed with `readelf -s' output for an IRIX object:

Symbol table '.symtab' contains 12 entries:
   Num:    Value  Size Type    Bind   Vis      Ndx Name
     0: 00000000     0 NOTYPE  LOCAL  DEFAULT  UND
     1: 00000000     0 SECTION LOCAL  DEFAULT    1 .text
     2: 00000000     0 SECTION LOCAL  DEFAULT    3 .data
     3: 00000000     0 SECTION LOCAL  DEFAULT    4 .bss
     4: 00000000     0 SECTION LOCAL  DEFAULT    5 .reginfo
     5: 00000000     0 SECTION LOCAL  DEFAULT    6 .MIPS.abiflags
     6: 00000000     0 SECTION LOCAL  DEFAULT    7 .pdr
     7: 00000000     0 SECTION LOCAL  DEFAULT    9 .gnu.attributes
     8: 00002000    16 FUNC    GLOBAL DEFAULT    1 foo
     9: 00004008     0 FUNC    LOCAL  DEFAULT    1 abar
    10: 00002008     0 FUNC    LOCAL  DEFAULT    1 afoo
    11: 00004000    16 FUNC    GLOBAL DEFAULT    1 bar

and a corresponding traditional object:

Symbol table '.symtab' contains 12 entries:
   Num:    Value  Size Type    Bind   Vis      Ndx Name
     0: 00000000     0 NOTYPE  LOCAL  DEFAULT  UND
     1: 00000000     0 SECTION LOCAL  DEFAULT    1
     2: 00000000     0 SECTION LOCAL  DEFAULT    3
     3: 00000000     0 SECTION LOCAL  DEFAULT    4
     4: 00004008     0 FUNC    LOCAL  DEFAULT    1 abar
     5: 00002008     0 FUNC    LOCAL  DEFAULT    1 afoo
     6: 00000000     0 SECTION LOCAL  DEFAULT    5
     7: 00000000     0 SECTION LOCAL  DEFAULT    6
     8: 00000000     0 SECTION LOCAL  DEFAULT    7
     9: 00000000     0 SECTION LOCAL  DEFAULT    9
    10: 00002000    16 FUNC    GLOBAL DEFAULT    1 foo
    11: 00004000    16 FUNC    GLOBAL DEFAULT    1 bar

respectively.  Consequently the right way to retrieve a section symbol's
name has to be chosen in `mips_elf_calculate_relocation' for the purpose
of error reporting.

Originally we produced symbol tables in the traditional object format
only and we handled it correctly until it was lost in a rewrite with:

commit 7403cb6305
Author: Mark Mitchell <mark@codesourcery.com>
Date:   Wed Jun 30 20:13:43 1999 +0000

probably because of the extra pointer indirection added which made the
same expression have a different meaning.

With the addition of IRIX symbol table format with:

commit 174fd7f955
Author: Richard Sandiford <rdsandiford@googlemail.com>
Date:   Mon Feb 9 08:04:00 2004 +0000

the bug has been partially covered and now when a relocation error is
triggered with an IRIX object the offending section symbol is correctly
reported:

tmpdir/dump0.o: In function `foo':
(.text+0x2000): relocation truncated to fit: R_MIPS_26 against `.text'
tmpdir/dump0.o: In function `bar':
(.text+0x4000): relocation truncated to fit: R_MIPS_26 against `.text'

because `bfd_elf_string_from_elf_section' retrieves the name from the
string table section.  With a traditional object however the function
returns an empty string and consequently `no symbol' is printed instead:

tmpdir/dump0.o: In function `foo':
(.text+0x2000): relocation truncated to fit: R_MIPS_26 against `no symbol'
tmpdir/dump0.o: In function `bar':
(.text+0x4000): relocation truncated to fit: R_MIPS_26 against `no symbol'

Restore the original semantics so that the section name is always
correctly retrieved.

	bfd/
	* elfxx-mips.c (mips_elf_calculate_relocation): Also use the
	section name if `bfd_elf_string_from_elf_section' returns an
	empty string.

	ld/
	* testsuite/ld-mips-elf/reloc-local-overflow.d: New test.
	* testsuite/ld-mips-elf/reloc-local-overflow.s: Source for the
	new test.
	* testsuite/ld-mips-elf/mips-elf.exp: Run the new test.
2016-05-27 22:25:42 +01:00
GDB Administrator 5e0bc41893 Automatic date update in version.in 2016-05-27 00:00:20 +00:00
Maciej W. Rozycki ed53407eec MIPS/BFD: Don't stop processing on `bfd_reloc_outofrange'
Upon a `bfd_reloc_outofrange' error continue processing so that any
further issues are also reported, similarly to how `bfd_reloc_overflow'
is handled.  Adjust message formatting accordingly, using `%X' to abort
processing at conclusion.

Reduce the number of test cases by grouping relocations the handling of
which can now be verified together with a single source and dump.

	bfd/
	* elfxx-mips.c (_bfd_mips_elf_relocate_section)
	<bfd_reloc_outofrange>: Use the `%X%H' rather than `%C' format
	for message.  Continue processing rather than returning failure.

	ld/
	* testsuite/ld-mips-elf/unaligned-jalx-0.d: Fold
	`unaligned-jalx-2' here.
	* testsuite/ld-mips-elf/unaligned-jalx-mips16-0.d: Fold
	`unaligned-jalx-mips16-2' here.
	* testsuite/ld-mips-elf/unaligned-jalx-micromips-0.d: Fold
	`unaligned-jalx-micromips-2' here.
	* testsuite/ld-mips-elf/unaligned-jalx-0.s: Update accordingly.
	* testsuite/ld-mips-elf/unaligned-jalx-1.d: Update error
	message.
	* testsuite/ld-mips-elf/unaligned-jalx-mips16-1.d: Likewise.
	* testsuite/ld-mips-elf/unaligned-jalx-micromips-1.d: Likewise.
	* testsuite/ld-mips-elf/unaligned-jalx-2.d: Remove test.
	* testsuite/ld-mips-elf/unaligned-jalx-mips16-2.d: Remove test.
	* testsuite/ld-mips-elf/unaligned-jalx-micromips-2.d: Remove
	test.
	* testsuite/ld-mips-elf/unaligned-jalx-2.s: Remove test source.
	* testsuite/ld-mips-elf/unaligned-lwpc-0.d: Fold
	`unaligned-lwpc-3' here.
	* testsuite/ld-mips-elf/unaligned-lwpc-0.s: Update accordingly.
	* testsuite/ld-mips-elf/unaligned-lwpc-1.d: Fold
	`unaligned-lwpc-2' here.
	* testsuite/ld-mips-elf/unaligned-lwpc-1.s: Update accordingly.
	* testsuite/ld-mips-elf/unaligned-lwpc-2.d: Remove test.
	* testsuite/ld-mips-elf/unaligned-lwpc-2.s: Remove test source.
	* testsuite/ld-mips-elf/unaligned-lwpc-3.d: Remove test.
	* testsuite/ld-mips-elf/unaligned-lwpc-3.s: Remove test source.
	* testsuite/ld-mips-elf/unaligned-ldpc-0.d: Fold
	`unaligned-ldpc-4' here.
	* testsuite/ld-mips-elf/unaligned-ldpc-0.s: Update accordingly.
	* testsuite/ld-mips-elf/unaligned-ldpc-1.d: Update error
	message.  Fold `unaligned-ldpc-2' and `unaligned-ldpc-3' here.
	* testsuite/ld-mips-elf/unaligned-ldpc-1.s: Update accordingly.
	* testsuite/ld-mips-elf/unaligned-ldpc-2.d: Remove test.
	* testsuite/ld-mips-elf/unaligned-ldpc-2.s: Remove test source.
	* testsuite/ld-mips-elf/unaligned-ldpc-3.d: Remove test.
	* testsuite/ld-mips-elf/unaligned-ldpc-3.s: Remove test source.
	* testsuite/ld-mips-elf/unaligned-ldpc-4.d: Remove test.
	* testsuite/ld-mips-elf/unaligned-ldpc-4.s: Remove test source.
	* testsuite/ld-mips-elf/mips-elf.exp: Delete removed tests.
2016-05-26 12:28:59 +01:00
GDB Administrator d7b61136f9 Automatic date update in version.in 2016-05-26 00:00:20 +00:00
Maciej W. Rozycki de341542a6 MIPS/BFD: Report `bfd_reloc_outofrange' errors as such
A `bfd_reloc_outofrange' condition from `mips_elf_calculate_relocation'
currently triggers the warning callback, which in the case of LD prints
messages like:

foo.o: In function `foo':
(.text+0x0): warning: JALX to a non-word-aligned address

or:

foo.o: In function `foo':
(.text+0x0): warning: PC-relative load from unaligned address

and nothing else, which suggests this is a benign condition and link has
otherwise successfully run to completion.  This is however not the case,
the link terminates right away with no further messages and no output
produced.

Use the general error or warning info callback then, preserving the
message format.  Also set a BFD error condition so that a failure is
unambiguously reported.  Complement the change with a set of suitable
test suite additions.

	bfd/
	* elfxx-mips.c (_bfd_mips_elf_relocate_section)
	<bfd_reloc_outofrange>: Call `->einfo' rather than `->warning'.
	Call `bfd_set_error'.

	ld/
	* testsuite/ld-mips-elf/unaligned-jalx-0.d: New test.
	* testsuite/ld-mips-elf/unaligned-jalx-1.d: New test.
	* testsuite/ld-mips-elf/unaligned-jalx-2.d: New test.
	* testsuite/ld-mips-elf/unaligned-jalx-mips16-0.d: New test.
	* testsuite/ld-mips-elf/unaligned-jalx-mips16-1.d: New test.
	* testsuite/ld-mips-elf/unaligned-jalx-mips16-2.d: New test.
	* testsuite/ld-mips-elf/unaligned-jalx-micromips-0.d: New test.
	* testsuite/ld-mips-elf/unaligned-jalx-micromips-1.d: New test.
	* testsuite/ld-mips-elf/unaligned-jalx-micromips-2.d: New test.
	* testsuite/ld-mips-elf/unaligned-lwpc-0.d: New test.
	* testsuite/ld-mips-elf/unaligned-lwpc-1.d: New test.
	* testsuite/ld-mips-elf/unaligned-lwpc-2.d: New test.
	* testsuite/ld-mips-elf/unaligned-lwpc-3.d: New test.
	* testsuite/ld-mips-elf/unaligned-ldpc-0.d: New test.
	* testsuite/ld-mips-elf/unaligned-ldpc-1.d: New test.
	* testsuite/ld-mips-elf/unaligned-ldpc-2.d: New test.
	* testsuite/ld-mips-elf/unaligned-ldpc-3.d: New test.
	* testsuite/ld-mips-elf/unaligned-ldpc-4.d: New test.
	* testsuite/ld-mips-elf/unaligned-jalx-0.s: New test source.
	* testsuite/ld-mips-elf/unaligned-jalx-1.s: New test source.
	* testsuite/ld-mips-elf/unaligned-jalx-2.s: New test source.
	* testsuite/ld-mips-elf/unaligned-insn.s: New test source.
	* testsuite/ld-mips-elf/unaligned-lwpc-0.s: New test source.
	* testsuite/ld-mips-elf/unaligned-lwpc-1.s: New test source.
	* testsuite/ld-mips-elf/unaligned-lwpc-2.s: New test source.
	* testsuite/ld-mips-elf/unaligned-lwpc-3.s: New test source.
	* testsuite/ld-mips-elf/unaligned-ldpc-0.s: New test source.
	* testsuite/ld-mips-elf/unaligned-ldpc-1.s: New test source.
	* testsuite/ld-mips-elf/unaligned-ldpc-2.s: New test source.
	* testsuite/ld-mips-elf/unaligned-ldpc-3.s: New test source.
	* testsuite/ld-mips-elf/unaligned-ldpc-4.s: New test source.
	* testsuite/ld-mips-elf/unaligned-syms.s: New test source.
	* testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.
2016-05-25 21:03:22 +01:00
H.J. Lu e6cc316af9 Enable 64-bit archives in ar and ranlib
Since existing ld and gold support the 64-bit (MIPS) ELF archives, we
can use the 64-bit (MIPS) ELF archives as 64-bit archives.  Since the
plugin target is used to create archive in plugin-enabled ar, we need
a way to enable 64-bit archives in the plugin target.  This patch adds
--enable-64-bit-archive to bfd to force 64-bit archives in ar and
ranlib.  Since both 64-bit MIPS and s390 ELF targets currently use
64-bit archives, 64-bit archives are enabled by default for them.
64-bit archive is generated automatically if the archive is too big.

Tested on Linux/x86 and Linux/x86-64 with existing ld and gold.

bfd/

	PR binutils/14625
	* archive.c (bfd_slurp_armap): Replace
	bfd_elf64_archive_slurp_armap with
	_bfd_archive_64_bit_slurp_armap.
	(bsd_write_armap): Call _bfd_archive_64_bit_write_armap if
	BFD64 is defined and the archive is too big.
	(coff_write_armap): Likewise.
	* archive64.c (bfd_elf64_archive_slurp_armap): Renamed to ...
	(_bfd_archive_64_bit_slurp_armap): This.
	(bfd_elf64_archive_write_armap): Renamed to ...
	(_bfd_archive_64_bit_write_armap): This.
	* configure.ac: Add --enable-64-bit-archive.
	(want_64_bit_archive): New.  Set to true by default for 64-bit
	MIPS and s390 ELF targets.
	(USE_64_BIT_ARCHIVE): New AC_DEFINE.
	* config.in: Regenerated.
	* configure: Likewise.
	* elf64-mips.c (bfd_elf64_archive_functions): Removed.
	(bfd_elf64_archive_slurp_armap): Likewise.
	(bfd_elf64_archive_write_armap): Likewise.
	(bfd_elf64_archive_slurp_extended_name_table): Likewise.
	(bfd_elf64_archive_construct_extended_name_table): Likewise.
	(bfd_elf64_archive_truncate_arname): Likewise.
	(bfd_elf64_archive_read_ar_hdr): Likewise.
	(bfd_elf64_archive_write_ar_hdr): Likewise.
	(bfd_elf64_archive_openr_next_archived_file): Likewise.
	(bfd_elf64_archive_get_elt_at_index): Likewise.
	(bfd_elf64_archive_generic_stat_arch_elt): Likewise.
	(bfd_elf64_archive_update_armap_timestamp): Likewise.
	* elf64-s390.c (bfd_elf64_archive_functions): Removed.
	(bfd_elf64_archive_slurp_armap): Likewise.
	(bfd_elf64_archive_write_armap): Likewise.
	(bfd_elf64_archive_slurp_extended_name_table): Likewise.
	(bfd_elf64_archive_construct_extended_name_table): Likewise.
	(bfd_elf64_archive_truncate_arname): Likewise.
	(bfd_elf64_archive_read_ar_hdr): Likewise.
	(bfd_elf64_archive_write_ar_hdr): Likewise.
	(bfd_elf64_archive_openr_next_archived_file): Likewise.
	(bfd_elf64_archive_get_elt_at_index): Likewise.
	(bfd_elf64_archive_generic_stat_arch_elt): Likewise.
	(bfd_elf64_archive_update_armap_timestamp): Likewise.
	* elfxx-target.h (TARGET_BIG_SYM): Use _bfd_archive_64_bit on
	BFD_JUMP_TABLE_ARCHIVE if USE_64_BIT_ARCHIVE is defined and
	bfd_elfNN_archive_functions isn't defined.
	(TARGET_LITTLE_SYM): Likewise.
	* libbfd-in.h (_bfd_archive_64_bit_slurp_armap): New prototype.
	(_bfd_archive_64_bit_write_armap): Likewise.
	(_bfd_archive_64_bit_slurp_extended_name_table): New macro.
	(_bfd_archive_64_bit_construct_extended_name_table): Likewise.
	(_bfd_archive_64_bit_truncate_arname): Likewise.
	(_bfd_archive_64_bit_read_ar_hdr): Likewise.
	(_bfd_archive_64_bit_write_ar_hdr): Likewise.
	(_bfd_archive_64_bit_openr_next_archived_file): Likewise.
	(_bfd_archive_64_bit_get_elt_at_index): Likewise.
	(_bfd_archive_64_bit_generic_stat_arch_elt): Likewise.
	(_bfd_archive_64_bit_update_armap_timestamp): Likewise.
	* libbfd.h: Regenerated.
	* plugin.c (plugin_vec): Use _bfd_archive_64_bit on
	BFD_JUMP_TABLE_ARCHIVE if USE_64_BIT_ARCHIVE is defined.

binutils/

	PR binutils/14625
	* NEWS: Mention --enable-64-bit-archive.
2016-05-25 09:47:03 -07:00
H.J. Lu b95a0a3177 Skip an archive element if not added by linker
During archive rescan to resolve symbol references for files added by
LTO, linker add_archive_element callback is called to check if an
archive element should added.  After all IR symbols have been claimed,
linker won't claim new IR symbols and shouldn't add the LTO archive
element.  This patch updates linker add_archive_element callback to
return FALSE when seeing an LTO archive element during rescan and
changes ELF linker to skip such archive element.

bfd/

	PR ld/20103
	* cofflink.c (coff_link_check_archive_element): Return TRUE if
	linker add_archive_element callback returns FALSE.
	* ecoff.c (ecoff_link_check_archive_element): Likewise.
	* elf64-ia64-vms.c (elf64_vms_link_add_archive_symbols): Skip
	archive element if linker add_archive_element callback returns
	FALSE.
	* elflink.c (elf_link_add_archive_symbols): Likewise.
	* pdp11.c (aout_link_check_ar_symbols): Likewise.
	* vms-alpha.c (alpha_vms_link_add_archive_symbols): Likewise.
	* xcofflink.c (xcoff_link_check_dynamic_ar_symbols): Likewise.
	(xcoff_link_check_ar_symbols): Likewise.

ld/

	PR ld/20103
	* ldmain.c (add_archive_element): Don't claim new IR symbols
	after all IR symbols have been claimed.
	* plugin.c (plugin_call_claim_file): Remove no_more_claiming
	check.
	* testsuite/ld-plugin/lto.exp (pr20103): New proc.
	Run PR ld/20103 tests.
	* testsuite/ld-plugin/pr20103a.c: New file.
	* testsuite/ld-plugin/pr20103b.c: Likewise.
	* testsuite/ld-plugin/pr20103c.c: Likewise.
2016-05-25 08:41:05 -07:00
GDB Administrator e4c1704d7a Automatic date update in version.in 2016-05-25 00:00:17 +00:00
Maciej W. Rozycki 7db9a74e9f MIPS/BFD: Unify `bfd_reloc_outofrange' error reporting code
bfd/
	* elfxx-mips.c (_bfd_mips_elf_relocate_section)
	<bfd_reloc_outofrange>: Unify error reporting code.
2016-05-24 20:48:14 +01:00
GDB Administrator c17cd11248 Automatic date update in version.in 2016-05-24 00:00:18 +00:00
Jim Wilson b7f28d873c Enable R_AARCH64_NONE for 64-bit code.
* elfnn-aarch64.c: Unconditionally enable R_AARCH64_NULL and
	R_AARCH64_NONE.  Use HOWTO64 for R_AARCH64_NULL.
	* relocs.c: Add BFD_RELOC_AARCH64_NULL.
	* bfd-in2.h: Regenerate.
	* libbfd.h: Likewise.
2016-05-23 16:38:21 -07:00
Kuba Sejdak a2bea3245e Add support for configuring for the ARM Phoenix target.
bfd	* config.bfd: Add entry for arm-phoenix.

gas	* configuse.tgt: Add entry for arm-phoenix.

ld	* Makefile.am: Add earmelf_phoenix.c.
	* Makefile.in: Regenerate.
	* configure.tgt: Add entry for arm-phoenix.
	* emulparams/armelf_phoenix.sh: New file.
2016-05-23 13:53:07 +01:00
Thomas Preud'homme d7c5bd02f7 Support for dedicated ARM stub section with padding
2016-05-23  Thomas Preud'homme  <thomas.preudhomme@arm.com>

bfd/
	* elf32-arm.c (arm_dedicated_stub_section_padding): New function.
	(elf32_arm_size_stubs): Declare stub_type in a more outer scope and
	account for padding for stub section requiring one.
	(elf32_arm_build_stubs): Add comment to stress the importance of
	zeroing veneer section content.
2016-05-23 09:41:36 +01:00
Thomas Preud'homme daa4adae63 Support for dedicated output section for some ARM veneer types
2016-05-23  Thomas Preud'homme  <thomas.preudhomme@arm.com>

bfd/
	* bfd-in.h (bfd_elf32_arm_keep_private_stub_output_sections): Declare
	bfd hook.
	* bfd-in2.h: Regenerate.
	* elf32-arm.c (arm_dedicated_stub_output_section_required): New
	function.
	(arm_dedicated_stub_output_section_required_alignment): Likewise.
	(arm_dedicated_stub_output_section_name): Likewise.
	(arm_dedicated_stub_input_section_ptr): Likewise.
	(elf32_arm_create_or_find_stub_sec): Add stub type parameter and
	function description comment. Add support for dedicated output stub
	section to given stub types.
	(elf32_arm_add_stub): Add a stub type parameter and pass it down to
	elf32_arm_create_or_find_stub_sec.
	(elf32_arm_create_stub): Pass stub type down to elf32_arm_add_stub.
	(elf32_arm_size_stubs): Pass stub type when calling
	elf32_arm_create_or_find_stub_sec for Cortex-A8 erratum veneers.
	(bfd_elf32_arm_keep_private_stub_output_sections): New function.

ld/
	* emultempl/armelf.em (arm_elf_before_allocation): Call
	bfd_elf32_arm_keep_private_stub_output_sections before generic
	before_allocation function.
2016-05-23 09:38:32 +01:00
GDB Administrator 82418e18f8 Automatic date update in version.in 2016-05-23 00:00:19 +00:00
GDB Administrator 666a13303c Automatic date update in version.in 2016-05-22 00:00:19 +00:00
GDB Administrator c8eaca27ff Automatic date update in version.in 2016-05-21 00:00:22 +00:00
H.J. Lu 52bf37dd91 Don't check R_386_GOT32 when setting need_convert_load
Since we no longer convert R_386_GOT32, don't check R_386_GOT32 when
setting need_convert_load.

	* elf32-i386.c (elf_i386_check_relocs): Don't check R_386_GOT32
	when setting need_convert_load.
2016-05-20 09:36:48 -07:00
Maciej W. Rozycki 17c6c9d9f3 MIPS: Fix the encoding of immediates with microMIPS JALX
The microMIPS JALX instruction shares the R_MICROMIPS_26_S1 relocation
with microMIPS J/JAL/JALS instructions, however unlike the latters its
encoded immediate argument is unusually shifted left by 2 rather than 1
in calculating the value used for the operation requested.

We already handle this exception in `mips_elf_calculate_relocation' in
LD, in a scenario where JALX is produced as a result of relaxing JAL for
the purpose of making a cross-mode jump.  We also get it right in the
disassembler in `decode_micromips_operand'.

What we don't correctly do however is processing microMIPS JALX produced
by GAS from an assembly source, where a non-zero constant argument or a
symbol reference with a non-zero in-place addend has been used.  In this
case the same calculation is made as for microMIPS J/JAL/JALS, causing
the wrong encoding to be produced by GAS on making an object file, and
then again by LD in the final link.  The latter in particular causes the
calculation, where the addend fits in the relocatable field, to produce
different final addresses for the same source code depending on whether
REL or RELA relocations are used.

Correct these issues by special-casing microMIPS JALX in the places that
have been previously missed.

	bfd/
	* elfxx-mips.c (mips_elf_read_rel_addend): Adjust the addend for
	microMIPS JALX.

	gas/
	* config/tc-mips.c (append_insn): Correct the encoding of a
	constant argument for microMIPS JALX.
	(tc_gen_reloc): Correct the encoding of an in-place addend for
	microMIPS JALX.
	* testsuite/gas/mips/jalx-addend.d: New test.
	* testsuite/gas/mips/jalx-addend-n32.d: New test.
	* testsuite/gas/mips/jalx-addend-n64.d: New test.
	* testsuite/gas/mips/jalx-imm.d: New test.
	* testsuite/gas/mips/jalx-imm-n32.d: New test.
	* testsuite/gas/mips/jalx-imm-n64.d: New test.
	* testsuite/gas/mips/jalx-addend.s: New test source.
	* testsuite/gas/mips/jalx-imm.s: New test source.
	* testsuite/gas/mips/mips.exp: Run the new tests.

	ld/
	* testsuite/ld-mips-elf/jalx-addend.d: New test.
	* testsuite/ld-mips-elf/jalx-addend-n32.d: New test.
	* testsuite/ld-mips-elf/jalx-addend-n64.d: New test.
	* testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.
2016-05-20 13:38:48 +01:00
GDB Administrator d310f46e33 Automatic date update in version.in 2016-05-20 00:00:10 +00:00
H.J. Lu 7d4d970973 Don't convert R_386_GOT32 relocation
Don't convert R_386_GOT32 since we can't tell if it is applied
to "mov $foo@GOT, %reg" which isn't a load via GOT.

bfd/

	PR ld/20117
	* elf32-i386.c (elf_i386_convert_load_reloc): Don't check
	R_386_GOT32X.
	(elf_i386_convert_load): Don't convert R_386_GOT32.

ld/

	PR ld/20117
	* testsuite/ld-i386/i386.exp: Run pr20117.
	* testsuite/ld-i386/pr19609-1i.d: Updated.
	* testsuite/ld-i386/pr20117.d: New file.
	* testsuite/ld-i386/pr20117.s: Likewise.
2016-05-19 12:57:11 -07:00
Alan Modra 606851fbf6 Set sh_entsize for .init_array and similar.
PR gas/20118
	* elf.c (elf_fake_sections): Set sh_entsize for SHT_INIT_ARRAY,
	SHT_FINI_ARRAY, and SHT_PREINIT_ARRAY.
2016-05-20 00:35:24 +09:30
Claudiu Zissulescu 3c8adacaf9 [ARC] BFD fixes.
2016-05-19  Cupertino Miranda  <cmiranda@synopsys.com>

	* elf32-arc.c (arc_elf_final_write_processing): Changed.
	(debug_arc_reloc): Likewise.
	(elf_arc_relocate_section): Likewise.
	(elf_arc_check_relocs): Likewise.
	(elf_arc_adjust_dynamic_symbol): Likewise.
	(elf_arc_add_symbol_hook): Likewise.
2016-05-19 15:06:49 +02:00
Maciej W. Rozycki 6b200de0f7 Remove unsupported `am34-*-linux*' target triplet
The `am34-*-linux*' target cannot be configured for, `am34' is not a CPU
name recognized by `config.sub'.  It has never been, required code has
not been contributed to GNU config, neither before nor since the
addition of the target triplet to our configury with commit bfff164249
("Add MN10300 linker relaxation support for symbol differences") back in
2007.  Also there is no difference in actual tool configuration between
the `am34-*-linux*' and `am33_2.0-*-linux*' targets, except from a
different executable prefix and tooldir name.

Given the above remove the target triplet from our configuration.

	bfd/
	* config.bfd: Remove `am34-*-linux*' support.

	ld/
	* configure.tgt: Remove `am34-*-linux*' support.
2016-05-19 11:13:10 +01:00
Alan Modra 57e7d11848 Allocate ppc64 got and dynrelocs before plt
The idea being to make undefined weak syms dynamic, before deciding
whether a sym needs a plt entry.  Fixes pr19719 ld testcase.

	* elf64-ppc.c (allocate_dynrelocs): Allocate got and other dynamic
	relocs before plt relocs.
2016-05-19 14:06:56 +09:30
Alan Modra 9f284bf9da Fix ppc64le S-record test fail
Segfaults on --defsym symbol (__stack_chk_fail in this instance).

	* elf64-ppc.c (ppc64_elf_branch_reloc): Check for NULL owner
	before dereferencing.
2016-05-19 13:40:12 +09:30
GDB Administrator 6472871146 Automatic date update in version.in 2016-05-19 00:00:09 +00:00
Nick Clifton 5049806017 Updated Swedish translations for bfd and binutils 2016-05-18 12:44:43 +01:00
Alan Modra 7f9919700d elf32-arm.c build breakage
* elf32-arm.c (elf32_arm_size_stubs): Free or cache local syms
	for each BFD.  Don't goto error_ret_free_local from outside loop.
2016-05-18 15:46:34 +09:30
GDB Administrator dec880ee27 Automatic date update in version.in 2016-05-18 00:00:18 +00:00
Maciej W. Rozycki a43942db49 LD/ELF: Unify STB_GNU_UNIQUE handling
Take STB_GNU_UNIQUE handling scattered across targets and gather it in
the generic ELF linker.  Update test suite infrastructure accordingly.

	bfd/
	* elf-s390-common.c (elf_s390_add_symbol_hook): Remove
	STB_GNU_UNIQUE handling.
	* elf32-arc.c (elf_arc_add_symbol_hook): Likewise.
	* elf32-arm.c (elf32_arm_add_symbol_hook): Likewise.
	* elf32-m68k.c (elf_m68k_add_symbol_hook): Likewise.
	* elf32-ppc.c (ppc_elf_add_symbol_hook): Likewise.
	* elf32-sparc.c (elf32_sparc_add_symbol_hook): Likewise.
	* elf64-ppc.c (ppc64_elf_add_symbol_hook): Likewise.
	* elf64-sparc.c (elf64_sparc_add_symbol_hook): Likewise.
	* elf64-x86-64.c (elf_x86_64_add_symbol_hook): Likewise.
	* elfxx-aarch64.c (_bfd_aarch64_elf_add_symbol_hook): Likewise.
	* elfxx-mips.c (_bfd_mips_elf_add_symbol_hook): Likewise.
	* elf32-i386.c (elf_i386_add_symbol_hook): Remove function.
	(elf_backend_add_symbol_hook): Remove macro.
	* elflink.c (elf_link_add_object_symbols): Set `has_gnu_symbols'
	for STB_GNU_UNIQUE symbols.

	binutils/
	* testsuite/lib/binutils-common.exp (supports_gnu_unique): New
	procedure.
	* testsuite/binutils-all/objcopy.exp: Use `supports_gnu_unique'
	with the `strip-10' test.

	ld/
	* testsuite/ld-unique/unique.exp: Use `is_elf_format' and
	`supports_gnu_unique' to qualify testing.
2016-05-17 12:21:40 +01:00
GDB Administrator acac2e457a Automatic date update in version.in 2016-05-17 00:00:18 +00:00
Maciej W. Rozycki 71de341392 V850/BFD: Call `_bfd_elf_copy_private_bfd_data' again
Correct a regression introduced with commit 685080f210 ("Adds support
for generating notes in V850 binaries.") which replaced rather than
extending the call to `_bfd_elf_copy_private_bfd_data' with
`v850_elf_copy_private_bfd_data'.  Consequently ELFOSABI_GNU marking is
not propagated to output by `objcopy' from objects containing
STB_GNU_UNIQUE symbols.

	bfd/
	* elf32-v850.c (v850_elf_copy_notes): New function, factored out
	from...
	(v850_elf_copy_private_bfd_data): ... here.  Call the new
	function and `_bfd_elf_copy_private_bfd_data'.

	binutils/
	* testsuite/binutils-all/objcopy.exp: Don't skip the `strip-10'
	test for the V850.
2016-05-16 13:31:20 +01:00
GDB Administrator 558e50badb Automatic date update in version.in 2016-05-16 00:00:08 +00:00
GDB Administrator ea0ebc4fd8 Automatic date update in version.in 2016-05-15 00:00:08 +00:00
GDB Administrator 34ac9af335 Automatic date update in version.in 2016-05-14 00:00:14 +00:00
H.J. Lu 2168b2688a Don't convert GOTPCREL relocation against large section
bfd/

	PR ld/20093
	* elf64-x86-64.c (elf_x86_64_convert_load_reloc): Don't convert
	GOTPCREL relocation against large section.

ld/

	PR ld/20093
	* testsuite/ld-x86-64/pr20093-1.d: New file.
	* testsuite/ld-x86-64/pr20093-1.s: Likewise.
	* testsuite/ld-x86-64/pr20093-2.d: Likewise.
	* testsuite/ld-x86-64/pr20093-2.s: Likewise.
	* testsuite/ld-x86-64/x86-64.exp: Run pr20093-1 and pr20093-2.
2016-05-13 11:07:02 -07:00
Alan Modra 4ade44b727 Set dynamic tag VMA and size from dynamic section when possible
Rather than searching the output for a specific named section, it's
better, where possible, to use a linker created dynamic section to set
a dynamic tag's value.  That way ld doesn't depend on the output
section name, making it possibile to map dynamic sections differently.

bfd/
	* elf-m10300.c (_bfd_mn10300_elf_finish_dynamic_sections): Use
	linker dynamic sections in calculating size and address of
	* dynamic tags rather than using output sections.  Remove asserts.
	* elf32-arm.c (elf32_arm_finish_dynamic_sections): Likewise.
	* elf32-cr16.c (_bfd_cr16_elf_finish_dynamic_sections): Likewise.
	* elf32-cris.c (elf_cris_finish_dynamic_sections): Likewise.
	* elf32-i370.c (i370_elf_finish_dynamic_sections): Likewise.
	* elf32-lm32.c (lm32_elf_finish_dynamic_sections): Likewise.
	* elf32-m32r.c (m32r_elf_finish_dynamic_sections): Likewise.
	* elf32-m68k.c (elf_m68k_finish_dynamic_sections): Likewise.
	* elf32-metag.c (elf_metag_finish_dynamic_sections): Likewise.
	* elf32-microblaze.c (microblaze_elf_finish_dynamic_sections): Likewise.
	* elf32-nds32.c (nds32_elf_finish_dynamic_sections): Likewise.
	* elf32-nios2.c (nios2_elf32_finish_dynamic_sections): Likewise.
	* elf32-or1k.c (or1k_elf_finish_dynamic_sections): Likewise.
	* elf32-s390.c (elf_s390_finish_dynamic_sections): Likewise.
	* elf32-score.c (s3_bfd_score_elf_finish_dynamic_sections): Likewise.
	* elf32-score7.c (s7_bfd_score_elf_finish_dynamic_sections): Likewise.
	* elf32-vax.c (elf_vax_finish_dynamic_sections): Likewise.
	* elf32-xtensa.c (elf_xtensa_finish_dynamic_sections): Likewise.
	* elf64-alpha.c (elf64_alpha_finish_dynamic_sections): Likewise.
	* elf64-s390.c (elf_s390_finish_dynamic_sections): Likewise.
	* elf64-sh64.c (sh64_elf64_finish_dynamic_sections): Likewise.
	* elflink.c (bfd_elf_final_link): Likewise.
	* elfxx-mips.c (_bfd_mips_elf_finish_dynamic_sections): Likewise.
	* elfxx-sparc.c (sparc_finish_dyn): Likewise.  Adjust error message.
	* elf32-arc.c (GET_SYMBOL_OR_SECTION): Remove ASSERT arg and
	don't set doit.  Look up dynobj section.
	(elf_arc_finish_dynamic_sections): Adjust GET_SYMBOL_OR_SECTION
	invocation and dynamic tag vma calculation.  Don't test
	boolean var == TRUE.
	* elfnn-aarch64.c (elfNN_aarch64_finish_dynamic_sections): Fix
	DT_JMPREL calc.
ld/
	* testsuite/ld-arm/arm-elf.exp: Adjust for arm-no-rel-plt now passing.
	Use different output file name for static app without .rel.plt.
	* testsuite/ld-arm/arm-no-rel-plt.ld: Align .rel.dyn and .rela.dyn.
	* testsuite/ld-arm/arm-no-rel-plt.out: Delete.
	* testsuite/ld-arm/arm-no-rel-plt.r: New.
	* testsuite/ld-arm/arm-static-app.d: Don't check file name.
	* testsuite/ld-arm/arm-static-app.r: Likewise.
2016-05-13 14:34:45 +09:30
Alan Modra c8e44c6d16 ld -z combreloc elf_link_sort_relocs
A linker script may put .rela.plt in with other .rela.dyn relocs.
The change to elf_reloc_type_class puts any PLT relocs last.  This
patch makes the input section layout better match the sorted relocs.

	* elflink.c (elf_link_sort_relocs): Wrap overlong lines.  Fix
	octets_per_byte.  Put dynamic .rela.plt last in link orders.
	Assign output_offset for reloc sections rather than writing
	sorted relocs from block corresponding to output_offset.
2016-05-13 14:34:45 +09:30
GDB Administrator 59441ccdbd Automatic date update in version.in 2016-05-13 00:00:12 +00:00
Alan Modra 1997c9943a ld -z combreloc reloc sorting
PLT relocs don't appear in .rela.dyn, at least not when using
normal linker scripts.  However, if they do, then they ought to be
placed last rather than in the middle of other relocs.

	* elf-bfd.h (elf_reloc_type_class): Put reloc_class_plt last.
2016-05-13 00:17:19 +09:30
GDB Administrator 001c250f57 Automatic date update in version.in 2016-05-12 00:00:11 +00:00
Matthew Fortune 8f4f9071ad Add MIPS32 DSPr3 support.
bfd/

	* elfxx-mips.c (print_mips_ases): Add DSPR3.

binutils/

	* readelf.c (print_mips_ases): Add DSPR3.

gas/

	* config/tc-mips.c (options): Add OPTION_DSPR3 and
	OPTION_NO_DSPR3.
	(md_longopts): Likewise.
	(md_show_usage): Add help for -mdspr3 and -mno-dspr3.
	(mips_ases): Define availability for DSPr3.
	(mips_ase_groups): Add ASE_DSPR3 to the DSP group.
	(mips_convert_ase_flags): Map ASE_DSPR3 to AFL_ASE_DSPR3.
	* doc/as.texinfo: Document -mdspr3, -mno-dspr3.  Fix -mdspr2
	formatting.
	* doc/c-mips.texi: Document -mdspr3, -mno-dspr3, .set dspr3 and
	.set nodspr3.  Fix -mdspr2 formatting.
	* testsuite/gas/mips/mips32-dspr3.d: New file.
	* testsuite/gas/mips/mips32-dspr3.s: Likewise.
	* testsuite/gas/mips/mips.exp: Run mips32-dspr3 test.

include/

	* elf/mips.h (AFL_ASE_DSPR3): New macro.
	(AFL_ASE_MASK): Update to include AFL_ASE_DSPR3.
	* opcode/mips.h (ASE_DSPR3): New macro.

opcodes/

	* mips-dis.c (mips_arch_choices): Add ASE_DSPR3 to mips32r6 and
	mips64r6.
	* mips-opc.c (D34): New macro.
	(mips_builtin_opcodes): Define bposge32c for DSPr3.
2016-05-11 17:06:13 +01:00
Alan Modra a464198b01 [HPPA] Attach linker created dynamic sections to stub bfd
bfd/
	* elf32-hppa.c (elf32_hppa_init_stub_bfd): New function.
	(elf32_hppa_check_relocs): Don't set dynobj.
	(elf32_hppa_size_stubs): Test !SEC_LINKER_CREATED for stub sections.
	(elf32_hppa_build_stubs): Likewise.
	* elf32-hppa.h (elf32_hppa_init_stub_bfd): Declare.
ld/
	* emultempl/hppaelf.em (hppaelf_create_output_section_statements):
	Call elf32_hppa_init_stub_bfd.
2016-05-11 22:51:14 +09:30
Alan Modra 3bd43ebcb6 ld --gc-sections fail with __tls_get_addr_opt
When --gc-sections is active, __tls_get_addr_opt is marked as not
needed and forced local before ppc*_elf_tls_setup is run.

bfd/
	PR 20060
	* elf64-ppc.c (ppc64_elf_tls_setup): Clear forced_local.
	* elf32-ppc.c (ppc_elf_tls_setup): Likewise.
ld/
	PR 20060
	* testsuite/ld-powerpc/powerpc.exp: Run new tests.
	* testsuite/ld-powerpc/tlsdll.s: New.
	* testsuite/ld-powerpc/tlsdll.ver: New.
	* testsuite/ld-powerpc/tlsdll_32.s: New.
	* testsuite/ld-powerpc/tlsopt5.d: New.
	* testsuite/ld-powerpc/tlsopt5.s: New.
	* testsuite/ld-powerpc/tlsopt5_32.d: New.
	* testsuite/ld-powerpc/tlsopt5_32.s: New.
2016-05-11 22:40:09 +09:30
Jiong Wang 4e7fbb34f0 [AArch64] Remove redundant tls relax in elfNN_aarch64_final_link_relocate
bfd/
  * elfnn-aarch64.c (elfNN_aarch64_final_link_relocate): Remove redundant
  aarch64_tls_transition check.
2016-05-11 11:55:02 +01:00
GDB Administrator aa79adb05d Automatic date update in version.in 2016-05-11 00:00:18 +00:00
Thomas Preud'homme 4f4faa4d43 Allow veneers to claim veneered symbols
2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>

bfd/
	* elf32-arm.c (enum elf32_arm_stub_type): New max_stub_type
	enumerator.
	(arm_stub_sym_claimed): New function.
	(elf32_arm_create_stub): Use veneered symbol name and section if
	veneer needs to claim its symbol, and keep logic unchanged otherwise.
	(arm_stub_claim_sym): New function.
	(arm_map_one_stub): Call arm_stub_claim_sym if veneer needs to claim
	veneered symbol, otherwise create local symbol as before.
2016-05-10 16:20:19 +01:00
Thomas Preud'homme 39d911fc3c Use getters/setters to access ARM branch type
2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>

bfd/
	* elf32-arm.c (elf32_arm_size_stubs): Use new macros
	ARM_GET_SYM_BRANCH_TYPE and ARM_SET_SYM_BRANCH_TYPE to respectively get
	and set branch type of a symbol.
	(bfd_elf32_arm_process_before_allocation): Likewise.
	(elf32_arm_relocate_section): Likewise and fix identation along the
	way.
	(allocate_dynrelocs_for_symbol): Likewise.
	(elf32_arm_finish_dynamic_symbol): Likewise.
	(elf32_arm_swap_symbol_in): Likewise.
	(elf32_arm_swap_symbol_out): Likewise.

gas/
	* config/tc-arm.c (arm_adjust_symtab): Use ARM_SET_SYM_BRANCH_TYPE to
	set branch type of a symbol.

gdb/
	* arm-tdep.c (arm_elf_make_msymbol_special): Use
	ARM_GET_SYM_BRANCH_TYPE to get branch type of a symbol.

include/
	* arm.h (enum arm_st_branch_type): Add new ST_BRANCH_ENUM_SIZE
	enumerator.
	(NUM_ENUM_ARM_ST_BRANCH_TYPE_BITS): New macro.
	(ENUM_ARM_ST_BRANCH_TYPE_BITMASK): Likewise.
	(ARM_SYM_BRANCH_TYPE): Replace by ...
	(ARM_GET_SYM_BRANCH_TYPE): This and ...
	(ARM_SET_SYM_BRANCH_TYPE): This in two versions depending on whether
	BFD_ASSERT is defined or not.

ld/
	* emultempl/armelf.em (gld${EMULATION_NAME}_finish): Use
	ARM_GET_SYM_BRANCH_TYPE to get branch type of a symbol.

opcodes/
	* arm-dis.c (get_sym_code_type): Use ARM_GET_SYM_BRANCH_TYPE to get
	branch type of a symbol.
	(print_insn): Likewise.
2016-05-10 16:17:04 +01:00
Thomas Preud'homme 6bde4c52fb Allow stubs without associated input section in ARM backend
2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>

bfd/
	* bfd-in.h (elf32_arm_size_stubs): Add an output section parameter.
	* bfd-in2.h: Regenerated.
	* elf32-arm.c (struct elf32_arm_link_hash_table): Add an output section
	parameter to add_stub_section callback.
	(elf32_arm_create_or_find_stub_sec): Get output section from link_sec
	and pass it down to add_stub_section.
	(elf32_arm_add_stub): Set section to stub_sec if NULL before using it
	for error message.
	(elf32_arm_size_stubs): Add output section parameter to
	add_stub_section function pointer parameter.

ld/
	* emultempl/armelf.em (elf32_arm_add_stub_section): Add output_section
	parameter and rename input_section parameter to after_input_section.
	Append input stub section to the output section if after_input_section
	is NULL.
2016-05-10 15:45:01 +01:00
Thomas Preud'homme b715f643ef Factor our stub creation in ARM backend
2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>

bfd/
	* elf32-arm.c (elf32_arm_create_stub): New function.
	(elf32_arm_size_stubs): Use elf32_arm_create_stub for stub creation.
2016-05-10 15:42:20 +01:00
Thomas Preud'homme 8d9d949014 Refactor Cortex-A8 erratum workaround in preparation
2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>

bfd/
	* elf32-arm.c (enum elf32_arm_stub_type): Delete
	arm_stub_a8_veneer_lwm enumerator.
	(arm_stub_a8_veneer_lwm): New unsigned constant to replace
	aforementioned enumerator.
	(struct elf32_arm_stub_hash_entry): Delete target_addend
	field and add source_value.
	(struct a8_erratum_fix): Delete addend field and add target_offset.
	(stub_hash_newfunc): Initialize source_value field amd remove
	initialization for target_addend.
	(arm_build_one_stub): Stop special casing Thumb relocations: promote
	the else to being always executed, moving the
	arm_stub_a8_veneer_b_cond specific code in it.  Remove
	stub_entry->target_addend from points_to computation.
	(cortex_a8_erratum_scan): Store in a8_erratum_fix structure the offset
	to target symbol from start of section rather than the offset from the
	stub address.
	(elf32_arm_size_stubs): Set stub_entry's source_value and target_value
	fields from struct a8_erratum_fix's offset and target_offset
	respectively.
	(make_branch_to_a8_stub): Rename target variable to loc.  Compute
	veneered_insn_loc and loc using stub_entry's source_value.
2016-05-10 15:28:10 +01:00
Thomas Preud'homme 15afaa63f3 Add support for ARMv8-M Mainline with DSP extension
2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>

bfd/
	(elf32_arm_merge_eabi_attributes): Add merging logic for
	Tag_DSP_extension.

binutils/
	* readelf.c (display_arm_attribute): Add output for Tag_DSP_extension.
	(arm_attr_public_tags): Define DSP_extension attribute.

gas/
	* NEWS: Document ARMv8-M and ARMv8-M Security and DSP Extensions.
	* config/tc-arm.c (arm_ext_dsp): New feature for Thumb DSP
	instructions.
	(arm_extensions): Add dsp extension for ARMv8-M Mainline.
	(aeabi_set_public_attributes): Memorize the feature bits of the
	architecture selected for Tag_CPU_arch.  Use it to set
	Tag_DSP_extension to 1 for ARMv8-M Mainline with DSP extension.
	(arm_convert_symbolic_attribute): Define Tag_DSP_extension.
	* testsuite/gas/arm/arch7em-bad.d: Rename to ...
	* testsuite/gas/arm/arch7em-bad-1.d: This.
	* testsuite/gas/arm/arch7em-bad-2.d: New file.
	* testsuite/gas/arm/arch7em-bad-3.d: Likewise.
	* testsuite/gas/arm/archv8m-main-dsp-1.d: Likewise.
	* testsuite/gas/arm/archv8m-main-dsp-2.d: Likewise.
	* testsuite/gas/arm/archv8m-main-dsp-3.d: Likewise.
	* testsuite/gas/arm/archv8m-main-dsp-4.d: Likewise.
	* testsuite/gas/arm/archv8m-main-dsp-5.d: Likewise.
	* testsuite/gas/arm/attr-march-armv8m.main.dsp.d: Likewise.

include/
	* elf/arm.h (Tag_DSP_extension): Define.

ld/
	* testsuite/ld-arm/arm-elf.exp (EABI attribute merging 10 (DSP)): New
	test.
	* testsuite/ld-arm/attr-merge-10b-dsp.s: New file.
	* testsuite/ld-arm/attr-merge-10-dsp.attr: Likewise.
2016-05-10 15:24:10 +01:00
Pip Cet 66a368220c PR 20059 _bfd_elf_copy_link_hash_symbol_type segfault
PR ld/20059
	* elfxx-target.h (bfd_elfNN_bfd_copy_link_hash_symbol_type):
	Define as _bfd_generic_copy_link_hash_symbol_type when using
	generic hash table.
2016-05-10 11:04:55 +09:30
GDB Administrator a932d108b1 Automatic date update in version.in 2016-05-10 00:00:17 +00:00
Nick Clifton 315350be65 Fix seg fault objdumping a corrupt binary with an invalid sh_link field.
PR binutils/20063
	* elf.c (bfd_elf_get_elf_syms): Check for out of range sh_link
	field before accessing sections array.

	* readelf.c (get_32bit_section_headers): Warn if an out of range
	sh_link or sh_info field is encountered.
	(get_64bit_section_headers): Likewise.
2016-05-09 17:31:07 +01:00
Christophe Monat 9239bbd3a6 [ARM/STM32L4XX] PR 20030: --fix-stm32l4xx-629360 fails to create vldm/vpop veneers for double-precision registers
bfd/
	PR ld/20030
	* elf32-arm.c (is_thumb2_vldm): Account for T1 (DP) encoding.
	(stm32l4xx_need_create_replacing_stub): Rename ambiguous nb_regs
	to nb_words.
	(create_instruction_vldmia): Add is_dp to disambiguate SP/DP
	encoding.
	(create_instruction_vldmdb): Likewise.
	(stm32l4xx_create_replacing_stub_vldm): is_dp detects DP encoding,
	uses it to re-encode.

ld/
	PR ld/20030
	* testsuite/ld-arm/arm-elf.exp: Run new stm32l4xx-fix-vldm-dp
	tests. Fix misnamed stm32l4xx-fix-all.
	* testsuite/ld-arm/stm32l4xx-fix-vldm-dp.s: New tests for multiple
	loads with DP registers.
	* testsuite/ld-arm/stm32l4xx-fix-vldm-dp.d: New reference file.
	* testsuite/ld-arm/stm32l4xx-fix-vldm.s: Add missing comment.
	* testsuite/ld-arm/stm32l4xx-fix-all.s: Add tests for multiple
	loads with DP registers.
	* testsuite/ld-arm/stm32l4xx-fix-all.d: Update reference.
2016-05-09 15:10:37 +02:00
Nick Clifton 73597c183c Revert accidental commit.
PR 19938
	* elf32-arm.c (elf32_arm_adjust_dynamic_symbol): Revert accidental
	commit.
2016-05-09 12:07:32 +01:00
Alan Modra 6eb7d83039 Regenerate configure 2016-05-09 17:24:30 +09:30
Alan Modra ae1bb19726 Redundant hash table check
* elf64-ppc.c (ppc64_elf_init_stub_bfd): Remove redundant NULL check.
2016-05-09 17:08:35 +09:30
GDB Administrator 4612fb8101 Automatic date update in version.in 2016-05-09 00:00:20 +00:00
GDB Administrator 9852e3081f Automatic date update in version.in 2016-05-08 00:00:19 +00:00
GDB Administrator 9c088cc059 Automatic date update in version.in 2016-05-07 00:00:19 +00:00
H.J. Lu 97196564c7 Strip global symbol defined in discarded section
When a global symbol is defined in COMDAT group, we shouldn't leave an
undefined symbol in symbol table when the symbol section is discarded
unless there is a reference to the symbol outside of COMDAT group.

bfd/

	PR ld/17550
	* elf-bfd.h (elf_link_hash_entry): Update comments for indx,
	documenting that indx == -3 if symbol is defined in a discarded
	section.
	* elflink.c (elf_link_add_object_symbols): Set indx to -3 if
	symbol is defined in a discarded section.
	(elf_link_output_extsym): Strip a global symbol defined in a
	discarded section.

ld/

	PR ld/17550
	* testsuite/ld-elf/pr17550-1.s: New file.
	* testsuite/ld-elf/pr17550-2.s: Likewise.
	* testsuite/ld-elf/pr17550-3.s: Likewise.
	* testsuite/ld-elf/pr17550-4.s: Likewise.
	* testsuite/ld-elf/pr17550a.d: Likewise.
	* testsuite/ld-elf/pr17550b.d: Likewise.
	* testsuite/ld-elf/pr17550c.d: Likewise.
	* testsuite/ld-elf/pr17550d.d: Likewise.
2016-05-06 09:46:50 -07:00
H.J. Lu 030e823caf Define elf_backend_add_symbol_hook for Intel MCU
elf_backend_add_symbol_hook is undefined for FreeBSD.  Define it for
Intel MCU to support STB_GNU_UNIQUE for Intel MCU and NaCl.

	* elf32-i386.c (elf_backend_add_symbol_hook): Defined for Intel
	MCU.
2016-05-06 08:28:27 -07:00
GDB Administrator 405b757bdf Automatic date update in version.in 2016-05-06 00:00:19 +00:00
H.J. Lu c175a65796 Extract convert_load_reloc from x86 convert_load
* elf32-i386.c (elf_i386_convert_load): Extract the GOT load
	conversion to ...
	(elf_i386_convert_load_reloc): This.  New function.
	* elf64-x86-64.c (elf_x86_64_convert_load): Extract the GOT load
	conversion to ...
	(elf_x86_64_convert_load_reloc): This.  New function.
2016-05-05 04:14:00 -07:00
H.J. Lu bedfd056d4 Cache the section contents in x86 check_relocs
Cache the section contents in x86 check_relocs for sections without
TLS relocations.

	* elf32-i386.c (elf_i386_check_tls_transition): Remove abfd.
	Don't check if contents == NULL.
	(elf_i386_tls_transition): Add from_relocate_section.  Check
	from_relocate_section instead of contents != NULL.  Update
	elf_i386_check_tls_transition call.
	(elf_i386_check_relocs): Cache the section contents if
	keep_memory is FALSE.  Pass FALSE as from_relocate_section to
	elf_i386_tls_transition.
	(elf_i386_relocate_section): Pass TRUE as from_relocate_section
	to elf_i386_tls_transition.
	(elf_backend_caches_rawsize): New.
	* elf64-x86-64.c (elf_x86_64_check_tls_transition): Don't check
	if contents == NULL.
	(elf_x86_64_tls_transition): Add from_relocate_section.  Check
	from_relocate_section instead of contents != NULL.
	(elf_x86_64_check_relocs): Cache the section contents if
	keep_memory is FALSE.  Pass FALSE as from_relocate_section to
	elf_x86_64_tls_transition.
	(elf_x86_64_relocate_section): Pass TRUE as from_relocate_section
	to elf_x86_64_tls_transition.
	(elf_backend_caches_rawsize): New.
2016-05-05 04:12:16 -07:00
GDB Administrator d286e29293 Automatic date update in version.in 2016-05-05 00:00:24 +00:00
GDB Administrator 1d2a41dbbd Automatic date update in version.in 2016-05-04 00:00:19 +00:00
Maciej W. Rozycki 6d6a648c07 PR 10549: MIPS/LD: Handle OSABI setting for STB_GNU_UNIQUE
Add missing OSABI handling for MIPS/LD, complementing:

commit f64b2e8d60
Author: Nick Clifton <nickc@redhat.com>
Date:   Mon Apr 11 08:13:22 2011 +0000

Adjust test coverage accordingly.

	bfd/
	PR 10549
	* elfxx-mips.c (_bfd_mips_elf_add_symbol_hook): Handle
	STB_GNU_UNIQUE.

	ld/
	PR 10549
	* testsuite/ld-unique/unique.exp: Also run for `mips*-*-*'.
2016-05-03 23:51:33 +01:00
Jiong Wang 1f56df9d0d [AArch64] Also puts value in place for R_AARCH64_RELATIVE
When handling absolute relocations for global symbols bind within the
shared object, AArch64 will generate one dynamic RELATIVE relocation,
but won't apply the value for this absolution relocations at static
linking stage. This is different from AArch64 gold linker and x86-64.

This is not a bug as AArch64 is RELA, there is only guarantee that
relocation addend is placed in the relocation entry.  But some
system softwares originally writen for x86-64 might assume AArch64
bfd linker gets the same behavior as x86-64, then they could take
advantage of this buy skipping those RELATIVE dynamic relocations
if the load address is the same as the static linking address.

This patch makes AArch64 BFD linker applies absolution relocations at
static linking stage for scenario described above.  Meanwhile old AArch64
android loader has a bug (PR19163) which relies on current linker behavior
as a workaround, so the same option --no-apply-dynamic-relocs added.
2016-05-03 11:59:37 +01:00
GDB Administrator a1da4399c7 Automatic date update in version.in 2016-05-03 00:00:09 +00:00
GDB Administrator 2e1fb61c58 Automatic date update in version.in 2016-05-02 00:00:18 +00:00
GDB Administrator 7d8e7981db Automatic date update in version.in 2016-05-01 00:00:20 +00:00
GDB Administrator 94af22593b Automatic date update in version.in 2016-04-30 00:00:19 +00:00
H.J. Lu 493f652c95 Set interpreter in x86 create_dynamic_sections
Set interpreter in x86 create_dynamic_sections to make this information
available to x86 check_relocs.

	* elf32-i386.c (elf_i386_size_dynamic_sections): Move interp
	setting to ...
	(elf_i386_create_dynamic_sections): Here.
	* elf64-x86-64.c (elf_x86_64_size_dynamic_sections): Move
	interp setting to ...
	(elf_x86_64_create_dynamic_sections): Here.
2016-04-29 08:27:29 -07:00
H.J. Lu e62b9723fd Pass GOT_RELOC to UNDEFINED_WEAK_RESOLVED_TO_ZERO
When UNDEFINED_WEAK_RESOLVED_TO_ZERO is checked to convert load via
GOT, has_got_reloc is always TRUE.  This patch adds GOT_RELOC, which
is TRUE in x86 convert_load, to UNDEFINED_WEAK_RESOLVED_TO_ZERO.

	* elf32-i386.c (UNDEFINED_WEAK_RESOLVED_TO_ZERO): Take GOT_RELOC
	and replace (EH)->has_got_reloc with GOT_RELOC.
	(elf_i386_fixup_symbol): Pass has_got_reloc to
	UNDEFINED_WEAK_RESOLVED_TO_ZERO.
	(elf_i386_allocate_dynrelocs): Likewise.
	(elf_i386_relocate_section): Likewise.
	(elf_i386_finish_dynamic_symbol): Likewise.
	(elf_i386_convert_load): Pass TRUE to
	UNDEFINED_WEAK_RESOLVED_TO_ZERO.
	* elf64-x86-64.c (UNDEFINED_WEAK_RESOLVED_TO_ZERO): Take
	GOT_RELOC and replace (EH)->has_got_reloc with GOT_RELOC.
	(elf_x86_64_fixup_symbol): Pass has_got_reloc to
	UNDEFINED_WEAK_RESOLVED_TO_ZERO.
	(elf_x86_64_allocate_dynrelocs): Likewise.
	(elf_x86_64_relocate_section): Likewise.
	(elf_x86_64_finish_dynamic_symbol): Likewise.
	(elf_x86_64_convert_load): Pass TRUE to
	UNDEFINED_WEAK_RESOLVED_TO_ZERO.
2016-04-29 08:21:51 -07:00
H.J. Lu c337a1627c i386: Don't relocate section when check_relocs failed
No need to relocate section when check_relocs failed.

	* elf32-i386.c (check_relocs_failed): New.
	(elf_i386_check_relocs): Set check_relocs_failed on error.
	(elf_i386_relocate_section): Skip if check_relocs failed.
2016-04-29 04:31:54 -07:00
H.J. Lu afd9acee15 X86-64: Set check_relocs_failed on error
When checking relocations, set check_relocs_failed on error.

	* elf64-x86-64.c (elf_x86_64_check_relocs): Set
	check_relocs_failed on error.
2016-04-29 04:29:38 -07:00
Nick Clifton 5522f910cb Enhance support for copying and stripping Solaris and ARM binaries.
PR 19938
bfd	* elf-bfd.h (struct elf_backend_data): Rename
	elf_backend_set_special_section_info_and_link to
	elf_backend_copy_special_section_fields.
	* elfxx-target.h: Likewise.
	* elf.c (section_match): Ignore the SHF_INFO_LINK flag when
	comparing section flags.
	(copy_special_section_fields): New function.
	(_bfd_elf_copy_private_bfd_data): Copy the EI_ABIVERSION field.
	Perform two scans over special sections.  The first one looks for
	a direct mapping between the output section and an input section.
	The second scan looks for a possible match based upon section
	characteristics.
	* elf32-arm.c (elf32_arm_copy_special_section_fields): New
	function.  Handle setting the sh_link field of SHT_ARM_EXIDX
	sections.
	* elf32-i386.c (elf32_i386_set_special_info_link): Rename to
	elf32_i386_copy_solaris_special_section_fields.
	* elf32-sparc.c (elf32_sparc_set_special_section_info_link):
	Rename to elf32_sparc_copy_solaris_special_section_fields.
	* elf64-x86-64.c (elf64_x86_64_set_special_info_link): Rename to
	elf64_x86_64_copy_solaris_special_section_fields.

binutils* readelf.c (get_solaris_segment_type): New function.
	(get_segment_type): Call it.
2016-04-29 09:24:42 +01:00
GDB Administrator 2deb93c7a7 Automatic date update in version.in 2016-04-29 00:00:17 +00:00
Nick Clifton 786a118cdf Updated Chinese (simplified) translations for bfd, binutils and gold. 2016-04-28 14:09:49 +01:00
GDB Administrator a3a65e6e1d Automatic date update in version.in 2016-04-28 00:00:22 +00:00
H.J. Lu 91f8bf69a5 Skip debug sections when estimating distances
Skip debug sections when estimating distances between output sections
since compressed_size is used to compress debug sections and debug
sections aren't excluded from distances between output sections.

bfd/

	PR ld/20006
	* elf64-x86-64.c (elf_x86_64_convert_load): Skip debug sections
	when estimating distances between output sections.

ld/

	PR ld/20006
	* testsuite/ld-elfvsb/elfvsb.exp (COMPRESS_LDFLAG): New.
	(visibility_run): Pass COMPRESS_LDFLAG to visibility_test on
	ELF targets.
2016-04-27 09:13:10 -07:00
Alan Modra a6a4679fc0 Cache result of scan for __start_* and __stop_* sections
include/
	* bfdlink.h (struct bfd_link_hash_entry): Add "section" field to
	undef.  Formatting.
bfd/
	* elflink.c (_bfd_elf_is_start_stop): New function.
	(_bfd_elf_gc_mark_rsec): Use it.
	* elf-bfd.h (_bfd_elf_is_start_stop): Declare.
2016-04-27 17:05:26 +09:30
Trevor Saunders 28cc9170c3 add casts to avoid arithmetic on void *
arithmetic on void * is undefined in ISO C, so we should avoid it.  In
GNU C sizeof void * is defined as 1, and that is pretty clearly what
this code wants, so change it to do arithmetic on bfd_byte *.
Unfortunately most of the argument types come from virtual function
interfaces so changing the types to bfd_byte * isn't trivial though it
might make the code clearer.  So for the moment its easiest to leave the
variable types as void * and cast before doing arithmetic.

bfd/ChangeLog:

2016-04-26  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>

	* elf32-rx.c (rx_set_section_contents): Avoid arithmetic on void *.
	* mmo.c (mmo_get_section_contents): Likewise.
	(mmo_set_section_contents): Likewise.
2016-04-26 20:09:57 -04:00
GDB Administrator ffbad59e36 Automatic date update in version.in 2016-04-27 00:00:19 +00:00
H.J. Lu d5486c4372 Always count the NULL entry in dynamic symbol table
There is an unused NULL entry at the head of dynamic symbol table which
we must account for in our count even if the table is empty or unused
since it is intended for the mandatory DT_SYMTAB tag (.dynsym section)
in .dynamic section.

	* elf-bfd.h (elf_link_hash_table): Update comments for
	dynsymcount.
	* elflink.c (_bfd_elf_link_renumber_dynsyms): Always count for
	the unused NULL entry at the head of dynamic symbol table.
	(bfd_elf_size_dynsym_hash_dynstr): Remove dynsymcount != 0
	checks.
2016-04-26 03:53:23 -07:00
GDB Administrator 3283f4fb4c Automatic date update in version.in 2016-04-26 00:00:10 +00:00
GDB Administrator 101ae4cd31 Automatic date update in version.in 2016-04-25 00:00:19 +00:00
GDB Administrator 08ff610491 Automatic date update in version.in 2016-04-24 00:00:19 +00:00
GDB Administrator 0ca76ec3e5 Automatic date update in version.in 2016-04-23 00:00:09 +00:00
H.J. Lu 6645479e9d Exclude linker created file from dynobj
Some ELF targets create a "linker stubs" fake bfd.  Don't use it to
set dynobj.

	* elflink.c (_bfd_elf_link_create_dynstrtab): Exclude linker
	created file from dynobj.
2016-04-21 21:45:57 -07:00
H.J. Lu 6cd255ca1f Set dynobj to a normal input file if possible
When check_relocs is called after gc-sections has run,
_bfd_elf_link_create_dynstrtab may be called with an dynamic object
and hash_table->dynobj may be NULL.  We may not set dynobj, an input
file holding linker created dynamic sections to the dynamic object,
which has its own dynamic sections.  We need to find a normal input
file to hold linker created sections if possible.  Otherwise ld will
crash during LTO input rescan when linker created dynamic section
overrides input dynamic section.

	* elflink.c (_bfd_elf_link_create_dynstrtab): Set dynobj to a
	normal input file if possible.
2016-04-21 19:14:28 -07:00
GDB Administrator cdf5d16da5 Automatic date update in version.in 2016-04-22 00:00:21 +00:00
Nick Clifton 4f3b23b390 Add support for non-ELF targets to check their relocs.
bfd	* aout-adobe.c: Use _bfd_generic_link_check_relocs.
	* aout-target.h: Likewise.
	* aout-tic30.c: Likewise.
	* binary.c: Likewise.
	* bout.c: Likewise.
	* coff-alpha.c: Likewise.
	* coff-rs6000.c: Likewise.
	* coff64-rs6000.c: Likewise.
	* coffcode.h: Likewise.
	* i386msdos.c: Likewise.
	* i386os9k.c: Likewise.
	* ieee.c: Likewise.
	* ihex.c: Likewise.
	* libbfd-in.h: Likewise.
	* libecoff.h: Likewise.
	* mach-o-target.c: Likewise.
	* mmo.c: Likewise.
	* nlm-target.h: Likewise.
	* oasys.c: Likewise.
	* pef.c: Likewise.
	* plugin.c: Likewise.
	* ppcboot.c: Likewise.
	* som.c: Likewise.
	* srec.c: Likewise.
	* tekhex.c: Likewise.
	* versados.c: Likewise.
	* vms-alpha.c: Likewise.
	* xsym.c: Likewise.
	* elfxx-target.h: Use _bfd_elf_link_check_relocs.
	* linker.c (bfd_link_check_relocs): New function.
	(_bfd_generic_link_check_relocs): New function.
	* targets.c (BFD_JUMP_TABLE_LINK): Add initialization of
	_bfd_link_check_relocs field.
	(struct bfd_target)L Add _bfd_link_check_relocs field.
	* bfd-in2.h: Regenerate.
	* libbfd.h: Regenerate.

ld	* ldlang.c (lang_check_relocs): Use bfd_link_check_relocs in
	prefernce to _bfd_elf_link_check_relocs.  Drop test for ELF
	targets.  Do not stop the checks when problems are encountered.

include	* bfdlink.h: Add prototype for bfd_link_check_relocs.
2016-04-21 15:43:00 +01:00
H.J. Lu e66cdd681f Remove x86 gc_sweep_hook
Since x86 backends never see the removed sections, there is no need
for gc_sweep_hook.

	* elf32-i386.c (elf_i386_gc_sweep_hook): Removed.
	(elf_backend_gc_sweep_hook): Likewise.
	* elf64-x86-64.c (elf_x86_64_gc_sweep_hook): Likewise.
	(elf_backend_gc_sweep_hook): Likewise.
2016-04-20 17:14:02 -07:00
H.J. Lu 5ce03cea78 Don't check relocations in excluded sections
When checking relocations after gc-sections has run, the unused sections
have been removed.  Don't check relocations in excluded sections.

	* elflink.c (_bfd_elf_link_check_relocs): Don't check relocations
	in excluded sections
2016-04-20 17:11:04 -07:00
GDB Administrator 1a7272c0f9 Automatic date update in version.in 2016-04-21 00:00:10 +00:00
H.J. Lu 338c190a92 Check run-time R_X86_64_32 relocation overflow
Since elf_x86_64_check_relocs is called after opening all input files,
we can detect dynamic R_X86_64_32 relocation overflow there.

bfd/

	PR ld/19969
	* elf64-x86-64.c (check_relocs_failed): New.
	(elf_x86_64_need_pic): Moved before elf_x86_64_check_relocs.
	Support relocation agaist local symbol.  Set check_relocs_failed.
	(elf_x86_64_check_relocs): Use elf_x86_64_need_pic.  Check
	R_X86_64_32 relocation overflow.
	(elf_x86_64_relocate_section): Skip if check_relocs failed.
	Update one elf_x86_64_need_pic and remove one elf_x86_64_need_pic.

ld/

	PR ld/19969
	* testsuite/ld-x86-64/pr19969.d: New file.
	* testsuite/ld-x86-64/pr19969a.S: Likewise.
	* testsuite/ld-x86-64/pr19969b.S: Likewise.
	* testsuite/ld-x86-64/x86-64.exp: Run pr19969 tests.
2016-04-20 11:10:38 -07:00
H.J. Lu 466ee2af4a Call _bfd_elf_create_ifunc_sections only for ifunc
Since x86 check_relocs is called after opening all input files, we
need to call _bfd_elf_create_ifunc_sections only for STT_GNU_IFUNC
symbols.

	* elf32-i386.c (elf_i386_check_relocs): Call
	_bfd_elf_create_ifunc_sections only for STT_GNU_IFUNC symbol.
	* elf64-x86-64.c (elf_x86_64_check_relocs): Likewise.
2016-04-20 05:34:15 -07:00
H.J. Lu d968975277 Check ELF relocs after opening all input files
Delaying checking ELF relocations until opening all input files so
that symbol information is final when relocations are checked.  This
is only enabled for x86 targets.

bfd/

	* elf-bfd.h (_bfd_elf_link_check_relocs): New.
	* elflink.c (_bfd_elf_link_check_relocs): New function.
	(elf_link_add_object_symbols): Call _bfd_elf_link_check_relocs
	if check_relocs_after_open_input is FALSE.

include/

	* bfdlink.h (bfd_link_info): Add check_relocs_after_open_input.

ld/

	* emulparams/elf32_x86_64.sh (CHECK_RELOCS_AFTER_OPEN_INPUT):
	New.
	* emulparams/elf_i386.sh (CHECK_RELOCS_AFTER_OPEN_INPUT):
	Likewise.
	* emulparams/elf_i386_be.sh (CHECK_RELOCS_AFTER_OPEN_INPUT):
	Likewise.
	* emulparams/elf_i386_chaos.sh (CHECK_RELOCS_AFTER_OPEN_INPUT):
	Likewise.
	* emulparams/elf_i386_ldso.sh (CHECK_RELOCS_AFTER_OPEN_INPUT):
	Likewise.
	* emulparams/elf_i386_vxworks.sh (CHECK_RELOCS_AFTER_OPEN_INPUT):
	Likewise.
	* emulparams/elf_x86_64.sh (CHECK_RELOCS_AFTER_OPEN_INPUT):
	Likewise.
	* emulparams/i386nto.sh (CHECK_RELOCS_AFTER_OPEN_INPUT):
	Likewise.
	* emultempl/elf32.em (gld${EMULATION_NAME}_before_parse):
	Set check_relocs_after_open_input to TRUE if
	CHECK_RELOCS_AFTER_OPEN_INPUT is yes.
	(gld${EMULATION_NAME}_after_open): Call
	_bfd_elf_link_check_relocs on all inputs if
	check_relocs_after_open_input is TRUE.
2016-04-20 05:26:51 -07:00
Trevor Saunders e6c7cdec06 update many old style function definitions
This includes regenerating a bunch of files in opcodes/ with trunk cgen.

gprof/ChangeLog:

2016-04-20  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>

	* basic_blocks.c: Update old style function definitions.
	* cg_arcs.c: Likewise.
	* cg_print.c: Likewise.
	* gen-c-prog.awk: Likewise.
	* gmon_io.c: Likewise.
	* hertz.c: Likewise.
	* hist.c: Likewise.
	* sym_ids.c: Likewise.

bfd/ChangeLog:

2016-04-20  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>

	* cache.c: Update old style function definitions.
	* elf32-m68k.c: Likewise.
	* elf64-mmix.c: Likewise.
	* stab-syms.c: Likewise.

opcodes/ChangeLog:

2016-04-20  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>

	* alpha-dis.c: Regenerate.
	* crx-dis.c: Likewise.
	* disassemble.c: Likewise.
	* epiphany-opc.c: Likewise.
	* fr30-opc.c: Likewise.
	* frv-opc.c: Likewise.
	* ip2k-opc.c: Likewise.
	* iq2000-opc.c: Likewise.
	* lm32-opc.c: Likewise.
	* lm32-opinst.c: Likewise.
	* m32c-opc.c: Likewise.
	* m32r-opc.c: Likewise.
	* m32r-opinst.c: Likewise.
	* mep-opc.c: Likewise.
	* mt-opc.c: Likewise.
	* or1k-opc.c: Likewise.
	* or1k-opinst.c: Likewise.
	* tic80-opc.c: Likewise.
	* xc16x-opc.c: Likewise.
	* xstormy16-opc.c: Likewise.

ld/ChangeLog:

2016-04-20  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>

	* emultempl/scoreelf.em: Likewise.

binutils/ChangeLog:

2016-04-20  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>

	* resres.c: Likewise.

gas/ChangeLog:

2016-04-20  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>

	* cgen.c: Likewise.
	* config/tc-bfin.c: Likewise.
	* config/tc-ia64.c: Likewise.
	* config/tc-mep.c: Likewise.
	* config/tc-metag.c: Likewise.
	* config/tc-nios2.c: Likewise.
	* config/tc-rl78.c: Likewise.
2016-04-20 07:04:49 -04:00
Trevor Saunders b98e687124 change argument type to bfd_byte
We operate on the pointer's target as a set of bytes, and this avoids doing
arithmetic on void * which is undefined in ISO C.

bfd/ChangeLog:

2016-04-20  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>

	* elf32-arm.c (put_thumb2_insn): Change argument type to bfd_byte *.
2016-04-20 06:57:44 -04:00
GDB Administrator b73bf8516f Automatic date update in version.in 2016-04-20 00:00:09 +00:00
GDB Administrator eabc9d9f96 Automatic date update in version.in 2016-04-19 00:00:25 +00:00
GDB Administrator 5c3c7aa89b Automatic date update in version.in 2016-04-18 00:00:18 +00:00
GDB Administrator 35cf27b027 Automatic date update in version.in 2016-04-17 00:00:20 +00:00
GDB Administrator 0480fa1f33 Automatic date update in version.in 2016-04-16 00:00:20 +00:00
H.J. Lu 6fd8e7c249 Regenerate Makefile.in/aclocal.m4 automake 1.11.6
bfd/

	* Makefile.in: Regenerated with automake 1.11.6.
	* aclocal.m4: Likewise.
	* doc/Makefile.in: Likewise.

binutils/

	* Makefile.in: Regenerated with automake 1.11.6.
	* aclocal.m4: Likewise.
	* doc/Makefile.in: Likewise.

gas/

	* Makefile.in: Regenerated with automake 1.11.6.
	* aclocal.m4: Likewise.
	* doc/Makefile.in: Likewise.

gold/

	* Makefile.in: Regenerated with automake 1.11.6.
	* aclocal.m4: Likewise.
	* testsuite/Makefile.in: Likewise.

gprof/

	* Makefile.in: Regenerated with automake 1.11.6.
	* aclocal.m4: Likewise.

ld/

	* Makefile.in: Regenerated with automake 1.11.6.
	* aclocal.m4: Likewise.

opcodes/

	* Makefile.in: Regenerated with automake 1.11.6.
	* aclocal.m4: Likewise.
2016-04-15 16:20:55 -07:00
GDB Administrator 17416a2cb1 Automatic date update in version.in 2016-04-15 00:00:20 +00:00
Andrew Burgess 4b0c052e45 arc/nps400 : New cmem instructions and associated relocation
Add support for arc/nps400 cmem instructions, these load and store
instructions are hard-wired to access "0x57f00000 + 16-bit-offset".

Supporting this relocation required some additions to the arc relocation
handling in the bfd library, as well as the standard changes required to
add a new relocation type.

There's a test of the new instructions in the assembler, and a test of
the relocation in the linker.

bfd/ChangeLog:

	* reloc.c: Add BFD_RELOC_ARC_NPS_CMEM16 entry.
	* bfd-in2.h: Regenerate.
	* libbfd.h: Regenerate.
	* elf32-arc.c: Add 'opcode/arc.h' include.
	(struct arc_relocation_data): Add symbol_name.
	(arc_special_overflow_checks): New function.
	(arc_do_relocation): Use arc_special_overflow_checks, reindent as
	required, add an extra comment.
	(elf_arc_relocate_section): Setup symbol_name in reloc_data.

gas/ChangeLog:

	* testsuite/gas/arc/nps400-3.d: New file.
	* testsuite/gas/arc/nps400-3.s: New file.

include/ChangeLog:

	* elf/arc-reloc.def: Add ARC_NPS_CMEM16 reloc.
	* opcode/arc.h (NPS_CMEM_HIGH_VALUE): Define.

ld/ChangeLog:

	* testsuite/ld-arc/arc.exp: New file.
	* testsuite/ld-arc/nps-1.s: New file.
	* testsuite/ld-arc/nps-1a.d: New file.
	* testsuite/ld-arc/nps-1b.d: New file.
	* testsuite/ld-arc/nps-1b.err: New file.

opcodes/ChangeLog:

	* arc-nps400-tbl.h: Add xldb, xldw, xld, xstb, xstw, and xst
	instructions.
	* arc-opc.c (insert_nps_cmem_uimm16): New function.
	(extract_nps_cmem_uimm16): New function.
	(arc_operands): Add NPS_XLDST_UIMM16 operand.
2016-04-14 17:16:46 +01:00
Andrew Burgess 33cbe6c07e bfd/arc: Rename enum entries to avoid conflicts
In bfd/elf32-arc.c an enum is created that contains entries with generic
names like 'NONE' and 'OFF'.  This has been fine for now, but I had a
need to include opcode/arc.h into bfd/elf32-arc.c.  Unfortunately
opcode/arc.h includes a different enum with identical generic names.

Given that changing the enum in the header file could mean wide-ranging
changes, while changing the enum in the .c file is limited to only
changing the one file, I've added a prefix to the enum in the .c file.

This commit does not add the new include, that will come later.  There
should be no functional change with this commit.

bfd/ChangeLog:

	* elf32-arc.c (tls_got_entries): Add 'TLS_GOT_' prefix to all
	entries.
	(elf_arc_relocate_section): Update enum uses.
	(elf_arc_check_relocs): Likewise.
	(elf_arc_finish_dynamic_symbol): Likewise.
2016-04-14 17:15:42 +01:00
H.J. Lu 7634c4e679 Replace "link" with "sh_link"
On Linux/x86, GCC 4.2 issues a warning:

bfd/elf.c: In function ‘_bfd_elf_copy_private_bfd_data’:
bfd/elf.c:1334: warning: declaration of ‘link’ shadows a global declaration
/usr/include/unistd.h:757: warning: shadowed declaration is here
make[6]: *** [elf.lo] Error 1

Replace "link" with "sh_link" fixes it.

	* elf.c (_bfd_elf_copy_private_bfd_data): Replace "link" with
	"sh_link".
2016-04-14 08:36:32 -07:00
Nick Clifton 8486501545 Fix copying Solaris binaries with objcopy.
PR target/19938
bfd	* elf-bbfd.h (struct elf_backend_data): New field:
	elf_strtab_flags.
	New field: elf_backend_set_special_section_info_and_link
	* elfxx-target.h (elf_backend_strtab_flags): Define if not already
	defined.
	(elf_backend_set_special_section_info_and_link): Define if not
	already defined.
	(elfNN_bed): Use elf_backend_set_special_section_info_and_link and
	elf_backend_strtab_flags macros to initialise fields in structure.
	* elf.c (_bfd_elf_make_section_from_shdr): Check for SHF_STRINGS
	being set even if SHF_MERGE is not set.
	(elf_fake_sections): Likewise.
	(section_match): New function.  Matches two ELF sections based
	upon fixed characteristics.
	(find_link): New function.  Locates a section in a BFD that
	matches a section in a different BFD.
	(_bfd_elf_copy_private_bfd_data): Copy the sh_info and sh_link
	fields of reserved sections.
	(bfd_elf_compute_section_file_positions): Set the flags for the
	.shstrtab section based upon the elf_strtab_flags field in the
	elf_backend_data structure.
	(swap_out_syms): Likewise for the .strtab section.
	* elflink.c (bfd_elf_final_link): Set the flags for the
	.strtab section based upon the elf_strtab_flags field in the
	elf_backend_data structure.
	* elf32-i386.c (elf32_i386_set_special_info_link): New function.
	(elf_backend_strtab_flags): Set to SHF_STRINGS for Solaris
	targets.
	(elf_backend_set_special_section_info_and_link): Define for
	Solaris targets.
	* elf32-sparc.c: Likewise.
	* elf64-x86-64.c: Likewise.

binutils* testsuite/binutils-all/i386/compressed-1b.d: Allow for the
	string sections possibly having the SHF_STRINGS flag bit set.
	* testsuite/binutils-all/i386/compressed-1c.d: Likewise.
	* testsuite/binutils-all/readelf.s: Likewise.
	* testsuite/binutils-all/readelf.s-64: Likewise.
	* testsuite/binutils-all/x86-64/compressed-1b.d: Likewise.
	* testsuite/binutils-all/x86-64/compressed-1c.d: Likewise.

gas	* testsuite/gas/i386/ilp32/x86-64-unwind.d: Allow for the string
	sections possibly having the SHF_STRINGS flag bit set.
	* testsuite/gas/i386/x86-64-unwind.d: Likewise.
2016-04-14 12:04:09 +01:00
GDB Administrator 392f059f41 Automatic date update in version.in 2016-04-14 00:00:18 +00:00
GDB Administrator c1b719e994 Automatic date update in version.in 2016-04-13 00:00:08 +00:00
H.J. Lu 2df3368d85 Properly handle dynamic reloc against normal symbol
We shouldn't issue an error for read-only segment with dynamic IFUNC
relocations when dynamic relocations are against normal symbols.

bfd/

	PR ld/19939
	* elf-bfd.h (_bfd_elf_allocate_ifunc_dyn_relocs): Add a pointer
	to bfd_boolean.
	* elf-ifunc.c (_bfd_elf_allocate_ifunc_dyn_relocs): Updated.
	Set *readonly_dynrelocs_against_ifunc_p to TRUE if dynamic reloc
	applies to read-only section.
	* elf32-i386.c (elf_i386_link_hash_table): Add
	readonly_dynrelocs_against_ifunc.
	(elf_i386_allocate_dynrelocs): Updated.
	(elf_i386_size_dynamic_sections): Issue an error for read-only
	segment with dynamic IFUNC relocations only if
	readonly_dynrelocs_against_ifunc is TRUE.
	* elf64-x86-64.c (elf_x86_64_link_hash_table): Add
	readonly_dynrelocs_against_ifunc.
	(elf_x86_64_allocate_dynrelocs): Updated.
	(elf_x86_64_size_dynamic_sections): Issue an error for read-only
	segment with dynamic IFUNC relocations only if
	readonly_dynrelocs_against_ifunc is TRUE.
	* elfnn-aarch64.c (elfNN_aarch64_allocate_ifunc_dynrelocs):
	Updated.

ld/

	PR ld/19939
	* testsuite/ld-i386/i386.exp: Run PR ld/19939 tests.
	* testsuite/ld-x86-64/x86-64.exp: Likewise.
	* testsuite/ld-i386/pr19939.s: New file.
	* testsuite/ld-i386/pr19939a.d: Likewise.
	* testsuite/ld-i386/pr19939b.d: Likewise.
	* testsuite/ld-x86-64/pr19939.s: Likewise.
	* testsuite/ld-x86-64/pr19939a.d: Likewise.
	* testsuite/ld-x86-64/pr19939b.d: Likewise.
2016-04-11 19:41:52 -07:00
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Thomas Preud'homme 15dd01b120 Fix memory leak in ld ARM backend
2016-04-06  Thomas Preud'homme  <thomas.preudhomme@arm.com>

	bfd/
	* elf32-arm.c (elf32_arm_size_stubs): Move error_ret_free_local to be
	a fall through from error_ret_free_internal.  Free local_syms in
	error_ret_free_local if allocated from bfd_elf_get_elf_syms ().
2016-04-06 09:28:12 +01:00
GDB Administrator c078c9d954 Automatic date update in version.in 2016-04-06 00:00:19 +00:00
Claudiu Zissulescu 1e5885b72e [ARC] PLT content endianess awareness.
bfd/
2016-04-05  Cupertino Miranda  <cmiranda@synopsys.com>

	* elf32-arc.c (plt_do_relocs_for_symbol): Changed.
	(relocate_plt_for_entry): Likewise.
2016-04-05 17:24:18 +02:00
Claudiu Zissulescu b3aee8396f [ARC] Fix to pass ld-elf-ehdr_start-shared.
bfd/
2016-04-05  Cupertino Miranda  <cmiranda@synopsys.com>

	* elf32-arc.c (elf_arc_check_relocs): Changed
2016-04-05 17:14:03 +02:00