* elf32-arm.c (create_instruction_branch_absolute): Replace
pointer parameters with a simple integer parameter.
(stm32l4xx_create_replacing_stub_ldmia): Update calls to
create_instruction_branch_absolute.
(stm32l4xx_create_replacing_stub_ldmdb): Likewise.
(stm32l4xx_create_replacing_stub_vldm): Likewise.
(elf32_arm_write_section): Use pointer type for veneer addresses.
If given input sections with differing flags, we'd like to place the
section according to the final output section flags.
bfd/
PR ld/19162
* elflink.c (_bfd_elf_gc_mark_reloc): Move code iterating over
linker input bfds..
* section.c (bfd_get_next_section_by_name): ..to here. Add ibfd param.
(bfd_get_linker_section): Adjust bfd_get_next_section_by_name call.
* tekhex.c (first_phase): Likewise.
* elflink.c (bfd_elf_gc_sections): Likewise.
* bfd-in2.h: Regenerate.
ld/
PR ld/19162
* emultempl/elf32.em (gld${EMULATION_NAME}_place_orphan): Check flags
before calling _bfd_elf_match_sections_by_type. Merge flags for
any other input sections that might match a new output section to
decide placement.
bfd * bfd-in2.h: Regenerate.
* bfd-in.h (bfd_arm_stm32l4xx_fix): New enum. Specify how
STM32L4XX instruction scanning should be done.
(bfd_elf32_arm_set_stm32l4xx_fix)
(bfd_elf32_arm_stm32l4xx_erratum_scan)
(bfd_elf32_arm_stm32l4xx_fix_veneer_locations): Add prototypes.
(bfd_elf32_arm_set_target_relocs): Add stm32l4xx fix type argument
to prototype.
* elf32-arm.c (STM32L4XX_ERRATUM_VENEER_SECTION_NAME)
(STM32L4XX_ERRATUM_VENEER_ENTRY_NAME): Define macros.
(elf32_stm32l4xx_erratum_type): New enum.
(elf32_stm32l4xx_erratum_list): New struct. List of veneers or
jumps to veneers.
(_arm_elf_section_data): Add stm32l4xx_erratumcount,
stm32l4xx_erratumlist.
(elf32_arm_link_hash_table): Add stm32l4xx_erratum_glue_size,
stm32l4xx_fix and num_stm32l4xx_fixes fields.
(ctz): New function.
(popcount): New function.
(elf32_arm_link_hash_table_create): Initialize stm32l4xx_fix.
(put_thumb2_insn): New function.
(STM32L4XX_ERRATUM_LDM_VENEER_SIZE): Define. Size of a veneer for
LDM instructions.
(STM32L4XX_ERRATUM_VLDM_VENEER_SIZE): Define. Size of a veneer for
VLDM instructions.
(bfd_elf32_arm_allocate_interworking_sections): Initialise erratum
glue section.
(record_stm32l4xx_erratum_veneer) : New function. Create a single
veneer, and its associated symbols.
(bfd_elf32_arm_add_glue_sections_to_bfd): Add STM32L4XX erratum glue.
(bfd_elf32_arm_set_stm32l4xx_fix): New function. Set the type of
erratum workaround required.
(bfd_elf32_arm_stm32l4xx_fix_veneer_locations): New function. Find
out where veneers and branches to veneers have been placed in
virtual memory after layout.
(is_thumb2_ldmia): New function.
(is_thumb2_ldmdb): Likewise.
(is_thumb2_vldm ): Likewise.
(stm32l4xx_need_create_replacing_stub): New function. Decide if a
veneer must be emitted.
(bfd_elf32_arm_stm32l4xx_erratum_scan): Scan the sections of an
input BFD for potential erratum-triggering insns. Record results.
(bfd_elf32_arm_set_target_relocs): Set stm32l4xx_fix field in
global hash table.
(elf32_arm_size_dynamic_sections): Collect glue information.
(create_instruction_branch_absolute): New function.
(create_instruction_ldmia): Likewise.
(create_instruction_ldmdb): Likewise.
(create_instruction_mov): Likewise.
(create_instruction_sub): Likewise.
(create_instruction_vldmia): Likewise.
(create_instruction_vldmdb): Likewise.
(create_instruction_udf_w): Likewise.
(create_instruction_udf): Likewise.
(push_thumb2_insn32): Likewise.
(push_thumb2_insn16): Likewise.
(stm32l4xx_fill_stub_udf): Likewise.
(stm32l4xx_create_replacing_stub_ldmia): New function. Expands the
replacing stub for ldmia instructions.
(stm32l4xx_create_replacing_stub_ldmdb): Likewise for ldmdb.
(stm32l4xx_create_replacing_stub_vldm): Likewise for vldm.
(stm32l4xx_create_replacing_stub): New function. Dispatches the
stub emission to the appropriate functions.
(elf32_arm_write_section): Output veneers, and branches to veneers.
ld * ld.texinfo: Description of the STM32L4xx erratum workaround.
* emultempl/armelf.em (stm32l4xx_fix): New.
(arm_elf_before_allocation): Choose the type of fix, scan for
erratum.
(gld${EMULATION_NAME}_finish): Fix veneer locations.
(arm_elf_create_output_section_statements): Propagate
stm32l4xx_fix value.
(PARSE_AND_LIST_PROLOGUE): Define OPTION_STM32L4XX_FIX.
(PARSE_AND_LIST_LONGOPTS): Add entry for handling
--fix-stm32l4xx-629360.
(PARSE_AND_LIST_OPTION): Add entry for helping on
--fix-stm32l4xx-629360.
(PARSE_AND_LIST_ARGS_CASES): Treat OPTION_STM32L4XX_FIX.
tests * ld-arm/arm-elf.exp (armelftests_common): Add STM32L4XX
tests.
* ld-arm/stm32l4xx-cannot-fix-far-ldm.d: New.
* ld-arm/stm32l4xx-cannot-fix-far-ldm.s: Likewise.
* ld-arm/stm32l4xx-cannot-fix-it-block.d: Likewise.
* ld-arm/stm32l4xx-cannot-fix-it-block.s: Likewise.
* ld-arm/stm32l4xx-fix-all.d: Likewise.
* ld-arm/stm32l4xx-fix-all.s: Likewise.
* ld-arm/stm32l4xx-fix-it-block.d: Likewise.
* ld-arm/stm32l4xx-fix-it-block.s: Likewise.
* ld-arm/stm32l4xx-fix-ldm.d: Likewise.
* ld-arm/stm32l4xx-fix-ldm.s: Likewise.
* ld-arm/stm32l4xx-fix-vldm.d: Likewise.
* ld-arm/stm32l4xx-fix-vldm.s: Likewise.
* configure.ac (powerpc64-*-aix[5-9].*): Match powerpc64 running
aix for core file support.
* configure: Regenerate.
* rs6000-core.c: Check for __ld_info64 if compiling 64-bit gdb.
Added BFD64 check if we are using old core file format for 32-bit gdb.
Set sizeof CORE_COMMONSZ appropriately in case of either new or
old core file format.
(read_hdr): Added BFD64 check for 64-bit support.
(rs6000coff_core_p): Likewise.
(rs6000coff_core_file_matches_executable_p): Likewise.
(rs6000coff_core_file_failing_command): Likewise.
(rs6000coff_core_file_failing_signal): Likewise.
Add support for debugging core files generated by binaries in
Large Memory model.
(rs6000coff_core_p): If Large Memory Model is used, then the .data
segment should start from BDATAORG which has been defined in the
system header files.
Symbol symbol defined by an assignment in a linker script has type
bfd_link_hash_new. elf_i386_convert_load and elf_x86_64_convert_load
should check bfd_link_hash_new to see if a symbol is defined by a linker
script.
bfd/
PR ld/19175
* elf32-i386.c (elf_i386_convert_load): Check bfd_link_hash_new
instead of calling bfd_link_get_defined_symbol.
* elf64-x86-64.c (elf_x86_64_convert_load): Likewise. Skip
relocation overflow for bfd_link_hash_new.
* linker.c (bfd_link_get_defined_symbol): Removed.
* bfd-in2.h: Regenerated.
ld/testsuite/
PR ld/19175
* ld-i386/i386.exp: Run pr19175.
* ld-x86-64/x86-64.exp: Likewise.
* ld-i386/pr19175.d: New file.
* ld-i386/pr19175.s: Likewise.
* ld-i386/pr19175.t: Likewise.
* ld-x86-64/pr19175.d: Likewise.
* ld-x86-64/pr19175.s: Likewise.
* ld-x86-64/pr19175.t: Likewise.
Since __start_XXX and __stop_XXX symbols aren't defined when address
load is being converted, we need to check if there is an XXX output
section to get their section and value. This patch adds a new function,
bfd_link_get_defined_symbol, to search for the XXX output section to
check if __start_XXX and __stop_XXX symbols are defined.
bfd/
PR ld/19171
* elf32-i386.c (elf_i386_convert_load): Call
bfd_link_get_defined_symbol to check if a symbol is defined.
* elf64-x86-64.c (elf_x86_64_convert_load): Call
bfd_link_get_defined_symbol to get defined symbol section and
value.
* linker.c (bfd_link_get_defined_symbol): New function.
* bfd-in2.h: Regenerated.
ld/testsuite/
PR ld/19171
* ld-i386/lea1.s: Add tests for address load of __start_XXX
and __stop_XXX.
* ld-i386/mov1.s: Likewise.
* ld-x86-64/lea1.s: Likewise.
* ld-x86-64/mov1.s: Likewise.
* ld-i386/lea1a.d: Updated.
* ld-i386/lea1b.d: Likewise.
* ld-i386/lea1c.d: Likewise.
* ld-i386/mov1a.d: Likewise.
* ld-i386/mov1b.d: Likewise.
* ld-x86-64/lea1a.d: Likewise.
* ld-x86-64/lea1b.d: Likewise.
* ld-x86-64/lea1c.d: Likewise.
* ld-x86-64/lea1d.d: Likewise.
* ld-x86-64/lea1e.d: Likewise.
* ld-x86-64/lea1f.d: Likewise.
* ld-x86-64/mov1a.d: Likewise.
* ld-x86-64/mov1b.d: Likewise.
* ld-x86-64/mov1c.d: Likewise.
* ld-x86-64/mov1d.d: Likewise.
Revert bba037e0, it breaks the gc-sections model. Instead fix the
underlying problem which is that _bfd_elf_gc_mark_hook is too late to
be setting SEC_KEEP.
PR ld/11133
PR ld/19161
* elflink.c (elf_gc_sweep): Revert last patch.
(_bfd_elf_gc_mark_hook): Don't set SEC_KEEP here.
SEC_KEEP check in elf_gc_sweep was missing in commit:
commit bde6f3eb6d
Author: H.J. Lu <hjl.tools@gmail.com>
Date: Fri Jan 8 01:43:23 2010 +0000
Set SEC_KEEP on section XXX for undefined __start_XXX/__stop_XXX
bfd/
2010-01-07 H.J. Lu <hongjiu.lu@intel.com>
PR ld/11133
* elflink.c (_bfd_elf_gc_mark_hook): Check section XXX for
undefined __start_XXX/__stop_XXX in all input files and set
SEC_KEEP.
This patch adds SEC_KEEP check to elf_gc_sweep.
bfd/
PR ld/19161
* elflink.c (elf_gc_sweep): Always keep sections marked with
SEC_KEEP.
ld/testsuite/
PR ld/19161
* ld-gc/gc.exp: Run pr19161 test.
* ld-gc/pr19161-1.c: New file.
* ld-gc/pr19161-2.c: Likewise.
* ld-gc/pr19161.d: Likewise.
bfd:
* mmo.c (struct mmo_data_struct): New members
symbol_consistency_override_calculated and ignore_symbol_consistency.
(mmo_section_has_contents, mmo_ignore_symbol_consistency): New
functions.
(mmo_create_symbol): Check with mmo_ignore_symbol_consistency if to
report an error for unexpected value of Main.
(mmo_write_symbols_and_terminator): Similar.
This patch adds support for the R_X86_64_GOTPCRELX and
R_X86_64_REX_GOTPCRELX relocations proposed in
https://groups.google.com/forum/#!topic/x86-64-abi/n9AWHogmVY0
to gas and ld. It updates gas to generate R_X86_64_GOTPCRELX,
R_X86_64_REX_GOTPCRELX if there is a REX prefix, relocation for memory
operand, foo@GOTPCREL(%rip). With the locally defined symbol, foo, we
convert
mov foo@GOTPCREL(%rip), %reg
to
lea foo(%rip), %reg
and convert
call/jmp *foo@GOTPCREL(%rip)
to
nop call foo/jmp foo nop
When PIC is false, convert
test %reg, foo@GOTPCREL(%rip)
to
test $foo, %reg
and convert
binop foo@GOTPCREL(%rip), %reg
to
binop $foo, %reg
where binop is one of adc, add, and, cmp, or, sbb, sub, xor instructions.
bfd/
* elf64-x86-64.c: Include opcode/i386.h.
(x86_64_elf_howto_table): Add R_X86_64_GOTPCRELX and
R_X86_64_REX_GOTPCRELX.
(R_X86_64_standard): Replace R_X86_64_PLT32_BND with
R_X86_64_REX_GOTPCRELX.
(x86_64_reloc_map): Add BFD_RELOC_X86_64_GOTPCRELX and
BFD_RELOC_X86_64_REX_GOTPCRELX.
(need_convert_mov_to_lea): Renamed to ...
(need_convert_load): This.
(elf_x86_64_check_relocs): Handle R_X86_64_GOTPCRELX and
R_X86_64_REX_GOTPCRELX. Replace need_convert_mov_to_lea with
need_convert_load.
(elf_x86_64_gc_sweep_hook): Handle R_X86_64_GOTPCRELX and
R_X86_64_REX_GOTPCRELX.
(elf_x86_64_size_dynamic_sections): Likewise.
(elf_x86_64_relocate_section): Likewise.
(elf_x86_64_convert_mov_to_lea): Renamed to ...
(elf_x86_64_convert_load): This. Replace need_convert_mov_to_lea
with need_convert_load. Support R_X86_64_GOTPCRELX and
R_X86_64_REX_GOTPCRELX transformations.
* reloc.c (BFD_RELOC_X86_64_GOTPCRELX): New.
(BFD_RELOC_X86_64_REX_GOTPCRELX): Likewise.
* bfd-in2.h: Regenerated.
* libbfd.h: Likewise.
gas/
* config/tc-i386.c (tc_i386_fix_adjustable): Handle
BFD_RELOC_X86_64_GOTPCRELX and BFD_RELOC_X86_64_REX_GOTPCRELX.
(tc_gen_reloc): Likewise.
(i386_validate_fix): Generate BFD_RELOC_X86_64_GOTPCRELX or
BFD_RELOC_X86_64_REX_GOTPCRELX if fx_tcbit2 is set.
* config/tc-i386.h (TC_FORCE_RELOCATION_LOCAL): Also return
true for BFD_RELOC_X86_64_GOTPCRELX and
BFD_RELOC_X86_64_REX_GOTPCRELX.
gas/testsuite/
* gas/i386/i386.exp: Run x86-64-gotpcrel.
* gas/i386/x86-64-gotpcrel.d: New file.
* gas/i386/x86-64-gotpcrel.s: Likewise.
* gas/i386/ilp32/x86-64-gotpcrel.d: Likewise.
* gas/i386/x86-64-localpic.d: Replace R_X86_64_GOTPCREL with
R_X86_64_REX_GOTPCRELX.
* gas/i386/ilp32/x86-64-localpic.d: Likewise.
include/elf/
* x86-64.h (R_X86_64_GOTPCRELX): New.
(R_X86_64_REX_GOTPCRELX): Likewise.
ld/testsuite/
* ld-ifunc/ifunc-5r-local-x86-64.d: Replace R_X86_64_GOTPCREL
with R_X86_64_REX_GOTPCRELX.
* ld-x86-64/plt-main1.rd: Likewise.
* ld-x86-64/plt-main3.rd: Likewise.
* ld-x86-64/plt-main4.rd: Likewise.
* ld-x86-64/gotpcrel1.dd: New file.
* ld-x86-64/gotpcrel1.out: Likewise.
* ld-x86-64/gotpcrel1a.S: Likewise.
* ld-x86-64/gotpcrel1b.c: Likewise.
* ld-x86-64/gotpcrel1c.c: Likewise.
* ld-x86-64/gotpcrel1d.S: Likewise.
* ld-x86-64/load1.s: Likewise.
* ld-x86-64/load1a.d: Likewise.
* ld-x86-64/load1b.d: Likewise.
* ld-x86-64/load1c.d: Likewise.
* ld-x86-64/load1d.d: Likewise.
* ld-x86-64/x86-64.exp: Run load1a, load1b, load1c and load1d
tests. Run gotpcrel1 test.
This patch adds support for the R_386_GOT32X relocation proposed in
https://groups.google.com/forum/#!topic/ia32-abi/GbJJskkid4I
to gas and ld. It updates gas to generate R_386_GOT32X relocation for
memory operand, foo@GOT[(%reg)]. We must encode "mov foo@GOT, %eax"
with the 0x8b opcode, instead of the 0xb8 opcode, so that it can be
transformed to "lea foo, %eax". With the locally defined symbol, foo,
we convert
mov foo@GOT[(%reg1)], %reg2
to
lea foo[@GOTOFF(%reg1)], %reg2
and convert
call/jmp *foo@GOT[(%reg)]
to
nop call foo/jmp foo nop
When PIC is false, convert
test %reg1, foo@GOT[(%reg2)]
to
test $foo, %reg1
and convert
binop foo@GOT[(%reg1)], %reg2
to
binop $foo, %reg2
where binop is one of adc, add, and, cmp, or, sbb, sub, xor instructions.
bfd/
* elf32-i386.c: Include opcode/i386.h.
(elf_howto_table): Add R_386_GOT32X.
(R_386_ext2): Replace R_386_IRELATIVE with R_386_GOT32X.
(elf_i386_reloc_type_lookup): Handle BFD_RELOC_386_GOT32X.
(need_convert_mov_to_lea): Renamed to ...
(need_convert_load): This.
(elf_i386_check_relocs): Handle R_386_GOT32X. Replace
need_convert_mov_to_lea with need_convert_load.
(elf_i386_gc_sweep_hook): Handle R_386_GOT32X.
(elf_i386_size_dynamic_sections): Likewise.
(elf_i386_relocate_section): Likewise.
(elf_i386_convert_mov_to_lea): Renamed to ...
(elf_i386_convert_load): This. Replace need_convert_mov_to_lea
with need_convert_load. Support R_386_GOT32X transformations.
* reloc.c (BFD_RELOC_386_GOT32X): New.
* bfd-in2.h: Regenerated.
* libbfd.h: Likewise.
gas/
* config/tc-i386.c (tc_i386_fix_adjustable): Handle
BFD_RELOC_386_GOT32X.
(tc_gen_reloc): Likewise.
(match_template): Force 0x8b encoding for "mov foo@GOT, %eax".
(output_disp): Check for "call/jmp *mem", "mov mem, %reg",
"test %reg, mem" and "binop mem, %reg" where binop is one of
adc, add, and, cmp, or, sbb, sub, xor instructions. Set
fx_tcbit if the REX prefix is generated. Set fx_tcbit2 if
BFD_RELOC_386_GOT32X should be generated.
(i386_validate_fix): Generate BFD_RELOC_386_GOT32X if fx_tcbit2
is set.
gas/testsuite/
* gas/i386/got.d: New file.
* gas/i386/got.s: Likewise.
* gas/i386/i386.exp: Run got.
* gas/i386/localpic.d: Replace R_386_GOT32 with R_386_GOT32X.
* gas/i386/mixed-mode-reloc32.d: Likewise.
* gas/i386/reloc32.d: Likewise.
include/elf/
* i386.h (R_386_GOT32X): New relocation.
ld/testsuite/
* ld-i386/branch1.d: New file.
* ld-i386/branch1.s: Likewise.
* ld-i386/call1.d: Likewise.
* ld-i386/call1.s: Likewise.
* ld-i386/call2.d: Likewise.
* ld-i386/call2.s: Likewise.
* ld-i386/got1.dd: Likewise.
* ld-i386/got1.out: Likewise.
* ld-i386/got1a.S: Likewise.
* ld-i386/got1b.c: Likewise.
* ld-i386/got1c.c: Likewise.
* ld-i386/got1d.S: Likewise.
* ld-i386/jmp1.d: Likewise.
* ld-i386/jmp1.s: Likewise.
* ld-i386/jmp2.d: Likewise.
* ld-i386/jmp2.s: Likewise.
* ld-i386/load1.d: Likewise.
* ld-i386/load1.s: Likewise.
* ld-i386/load2.d: Likewise.
* ld-i386/load2.s: Likewise.
* ld-i386/load3.d: Likewise.
* ld-i386/load3.s: Likewise.
* ld-i386/load4.s: Likewise.
* ld-i386/load4a.d: Likewise.
* ld-i386/load4b.d: Likewise.
* ld-i386/load5.s: Likewise.
* ld-i386/load5a.d: Likewise.
* ld-i386/load5b.d: Likewise.
* ld-i386/load6.d: Likewise.
* ld-i386/load6.s: Likewise.
* ld-i386/i386.exp: Run branch1, call1, call2, jmp1, jmp2,
load1, load2, load3, load4a, load4b, load5a, load5b and load6
tests. Run got1 test.
bfd/ChangeLog:
* elf32-s390.c (elf_s390_check_relocs): Set the non_got_ref marker
only when linking an executable.
(elf_s390_relocate_section): Redirect PC-relative relocs to a IPLT
slot.
* elf64-s390.c (elf_s390_check_relocs): Set the non_got_ref marker
only when linking an executable.
(elf_s390_relocate_section): Redirect PC-relative relocs to a IPLT
slot.
bfd/ChangeLog:
* elf32-s390.c (elf_s390_adjust_dynamic_symbol): Set the PLT
reference counters for local IFUNC calls.
* elf64-s390.c (elf_s390_adjust_dynamic_symbol): Likewise.
Normally a GOTOFF reloc only uses the GOT pointer to address something
relativ to it without actually requiring a GOT or PLT slot. Things
change if the target is an ifunc symbol though.
bfd/ChangeLog:
* elf32-s390.c (elf_s390_check_relocs): Fallthrough to the PLT
slot allocating code for GOTOFF relocs on ifunc symbols.
(elf_s390_gc_sweep_hook): Decrement plt refcount for GOTOFF relocs
on ifunc symbols.
(elf_s390_relocate_section): Redirect a GOTOFF reloc to an iplt
slot.
In order to get the ifunc relocs properly sorted the correct class
needs to be returned. The code mimics what has been done for x86.
bfd/ChangeLog:
PR ld/18841
* elf32-s390.c (elf_s390_reloc_type_class): Return
reloc_class_ifunc for ifunc symbols.
* elf64-s390.c (elf_s390_reloc_type_class): Likewise.
bfd/ChangeLog:
* elf32-s390.c (elf_s390_finish_dynamic_symbol): Call
elf_s390_finish_ifunc_symbol only for actually defined symbols.
* elf64-s390.c (elf_s390_finish_dynamic_symbol): Likewise.
We need to check if symbol is defined when converting mov to lea since
SYMBOL_REFERENCES_LOCAL may return true on hidden undefined symbols.
* elf32-i386.c (elf_i386_convert_mov_to_lea): Check if symbol
is defined.
* elf64-x86-64.c (elf_x86_64_convert_mov_to_lea): Likewise.
There is no need to check def_regular when converting mov to lea for
loading address of local symbols since def_regular may be false for
common symbols and SYMBOL_REFERENCES_LOCAL is sufficient.
bfd/
* elf32-i386.c (elf_i386_convert_mov_to_lea): Don't check
def_regular.
* elf64-x86-64.c (elf_x86_64_convert_mov_to_lea): Likewise.
ld/testsuite/
* ld-i386/lea1.s: Add a test for loading address of local common
symbol.
* ld-x86-64/lea1.s: Likewise.
* ld-i386/lea1a.d: Updated.
* ld-i386/lea1b.d: Likewise.
* ld-i386/lea1c.d: Likewise.
* ld-x86-64/lea1a.d: Likewise.
* ld-x86-64/lea1b.d: Likewise.
* ld-x86-64/lea1c.d: Likewise.
* ld-x86-64/lea1d.d: Likewise.
* ld-x86-64/lea1e.d: Likewise.
* ld-x86-64/lea1f.d: Likewise.
Calling bfd_copy_private_bfd_data is necessary to copy ELF file header
info.
binutils/
* objcopy.c (copy_object): Don't omit bfd_copy_private_bfd_data
call when extract_symbol.
bfd/
* elf32-v850.c (v850_elf_copy_private_bfd_data): Remove assertion
that input and output .note.renesas sections are same size.
Instead, only copy input to output if they are.
No functional changes here.
* elf.c (_bfd_elf_map_sections_to_segments): Don't set
PT_GNU_RELRO p_flags.
(assign_file_positions_for_non_load_sections): Set PT_GNU_RELRO
flags to PF_R here.
We may see an unversioned definition after the default version. We
should skip the unversioned definition in this case.
bfd/
PR ld/19073
* elflink.c (_bfd_elf_add_default_symbol): Skip the unversioned
definition after the default version.
ld/testsuite/
PR ld/19073
* ld-elf/pr19073.map: New file.
* ld-elf/pr19073.rd: Likewise.
* ld-elf/pr19073.s: Likewise.
* ld-elf/shared.exp (build_tests): Add tests for PR ld/19073.
bfd/ChangeLog:
2015-10-12 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
PR ld/19083
* elf32-s390.c (elf_s390_gc_sweep_hook): Do not reduce got
refcount for relocs not really requiring a got slot.
* elf64-s390.c (elf_s390_gc_sweep_hook): Likewise.
It is better to clear the ch_reserved field of Elf64_External_Chdr
in 64-bit output.
* bfd.c (bfd_update_compression_header): Clear the ch_reserved
field in 64-bit output.
(bfd_convert_section_contents): Likewise.
For ELF linker, a common symbol isn't a definition. When we decide if a
symbol should be re-exported, we should check if the symbol isn't
undefined, not if it is a definition.
bfd/
PR ld/18914
* elflink.c (elf_link_add_object_symbols): Don't re-export a
symbol if it isn't undefined.
ld/testsuite/
PR ld/18914
* ld-elf/exclude.exp: Also check exclude_common.
* ld-elf/exclude2.s: Add exclude_common.
bfd/
2015-10-02 Renlin Li <renlin.li@arm.com>
* elfnn-aarch64.c (IS_AARCH64_TLS_RELAX_RELOC): Add
TLSIE_MOVW_GOTTPREL_G1.
(aarch64_tls_transition_without_check): Add
TLSIE_MOVW_GOTTPREL_G1 to TLSLE_MOVW_TPREL_G2
transition for local symbol.
(elfNN_aarch64_tls_relax): Add a argument to pass tp offset.
Add TLSIE_MOVW_GOTTPREL_G1 relaxation.
(elfNN_aarch64_relocate_section): Call elfNN_aarch64_tls_relax
with new argument.
ld/testsuite/
2015-10-02 Renlin Li <renlin.li@arm.com>
* ld-aarch64/aarch64-elf.exp (tls-relax-large-le-ie): Run new test.
* ld-aarch64/tls-relax-large-ie-le.d: New.
* ld-aarch64/tls-relax-large-ie-le.s: New.
bfd/
2015-10-02 Renlin Li <renlin.li@arm.com>
* elfnn-aarch64.c(IS_AARCH64_TLS_RELAX_RELOC):
Add relaxation support for TLSGD_MOVW_G0_NC and TLSGD_MOVW_G1.
(aarch64_tls_transition_without_check): Likewise
(elfNN_aarch64_tls_relax): Likwise.
ld/testsuite/
2015-10-02 Renlin Li <renlin.li@arm.com>
* ld-aarch64/aarch64-elf.exp: run new test
* ld-aarch64/tls-relax-large-gd-ie.d: New.
* ld-aarch64/tls-relax-large-gd-ie.s: New.
* ld-aarch64/tls-relax-large-gd-le.d: New.
* ld-aarch64/tls-relax-large-gd-le.s: New.
Since something like ".long foo - ." may be used as pointer, we make
sure that PLT is used if foo is a function defined in a shared library.
bfd/
PR ld/19031
* elf64-x86-64.c (elf_x86_64_check_relocs): Set
pointer_equality_needed for R_X86_64_PC32 reloc in non-code
sections.
ld/testsuite/
PR ld/19031
* ld-x86-64/x86-64.exp: Run PR ld/19031 test.
* ld-x86-64/pr19031.out: New file.
* ld-x86-64/pr19031a.c: Likewise.
* ld-x86-64/pr19031b.S: Likewise.
* ld-x86-64/pr19031c.c: Likewise.
Since something like ".long foo - ." may be used as pointer, we make
sure that PLT is used if foo is a function defined in a shared library.
bfd/
PR ld/19031
* elf32-i386.c (elf_i386_check_relocs): Set
pointer_equality_needed for R_386_PC32 reloc in non-code
sections.
ld/testsuite/
PR ld/19031
* ld-i386/i386.exp: Run PR ld/19031 test.
* ld/testsuite/ld-i386/pr19031.out: New file.
* ld/testsuite/ld-i386/pr19031a.c: Likewise.
* ld/testsuite/ld-i386/pr19031b.S: Likewise.
* ld/testsuite/ld-i386/pr19031c.c: Likewise.
When we check consistency for merge ELF sections, we should not only
check EI_CLASS, but also compatible e_machine.
bfd/
PR ld/19013
* elflink.c (_bfd_elf_merge_sections): Only merge input bfds
that have the compatible ELF machine code with the output bfd.
ld/testsuite/
PR ld/19013
* ld-x86-64/pr19013-nacl.d: New file.
* ld-x86-64/pr19013-x32.d: Likewise.
* ld-x86-64/pr19013.d: Likewise.
* ld-x86-64/pr19013.s: Likewise.
* ld-x86-64/x86-64.exp: Run PR ld/19013 tests.
We can't allow sections to be merged and sized by the ELF linker
backend and then later be output by the generic linker backend. The
generic linker backend doesn't understand merge sections.
PR ld/19013
* elflink.c (_bfd_elf_merge_sections): Only merge input bfds that
will be handled by elf_link_input_bfd. Rename abfd param to obfd.
We can't use the output section size to copy input section since
--interleave will shrink the output section. Instead, we change
bfd_convert_section_contents to return the updated input section
size. When we do that, we don't need to adjust the output section
size to skip gap fills.
bfd/
PR binutils/19020
* bfd.c (bfd_convert_section_contents): Add ptr_size parameter.
* bfd-in2.h: Regenerated.
binutils/
PR binutils/19020
* objcopy.c (copy_object): Don't adjust the output section size
when copying from input sections.
(copy_section): Use input section size for the copy. Get the
updated section size from bfd_convert_section_contents.
binutils/testsuite/
PR binutils/19020
* binutils-all/objcopy.exp: Run pr19020a and pr19020b.
* lib/utils-lib.exp (run_dump_test): Support binary input.
* binutils-all/pr19020.in: New file.
* binutils-all/pr19020a.d: Likewise.
* binutils-all/pr19020b.d: Likewise.
gas PR ld/18759
* config/tc-or1k.c (tc_gen_reloc): Correct computation of PC
relative relocs.
* config/tc-or1k.h (GAS_CGEN_PRCEL_R_TYPE): Delete.
bfd * elf32-or1k.c (R_OR1K_32_PCREL): Set pcrel_offset to TRUE.
(R_OR1K_16_PCREL): Likewise.
(R_OR1K_8_PCREL): Likewise.
ld/tests * ld-elf/eh-frame-hdr: Expect to pass on the or1k-linux target.
binutils PR binutils/15835
* readelf.c (struct elf_section_list): New structure.
(symtab_shndx_hdr): Replace with symtab_shndx_list.
(get_32bit_elf_symbols): Scan for a symbol index table matching
the symbol table in use.
(get_64bit_elf_symbols): Likewise.
(process_section_headers): Handle multiple symbol index sections.
bfd * elf-bfd.h (struct elf_section_list): New structure.
(struct elf_obj_tdata): Replace symtab_shndx_hdr with
symtab_shndx_list. Delete symtab_shndx_section.
(elf_symtab_shndx): Replace macro with elf_symtab_shndx_list.
* elf.c (bfd_elf_get_syms): If symtab index sections are present,
scan them for the section that matches the provided symbol table.
(bfd_section_from_shdr): Record all SHT_SYMTAB_SHNDX sections.
(assign_section_numbers): Use the first symtab index table in the
list.
(_bfd_elf_compute_section_file_positions): Replace use of
symtab_shndx_hdr with use of symtab_shndx_list.
(find_section_in_list): New function.
(assign_file_postions_except_relocs): Use new function.
(_bfd_elf_copy_private_symbol_data): Likewise.
(swap_out_syms): Handle multiple symbol table index sections.
* elf32-m32c.c (m32c_elf_relax_section): Replace use of
symtab_shndx_hdr with use of symtab_shndx_list.
* elf32-rl78.c (rl78_elf_relax_section): Likewise.
* elf32-rx.c (rx_relax_section): Likewise.
* elf32-v850.c (v850_elf_relax_delete_bytes): Likewise.
* elflink.c (bfd_elf_final_link): Likewise.
The ch_type field in Elf64_External_Chdr is 4 bytes. We should use
bfd_get_32 and bfd_put_32 to access it.
* bfd.c (bfd_update_compression_header): Use bfd_put_32 on
ch_type.
(bfd_check_compression_header): Use bfd_get_32 on ch_type.
(bfd_convert_section_contents): Use bfd_get_32 and bfd_put_32
on ch_type.
bfd/ChangeLog:
* targets.c (enum bfd_flavour): Add comment.
(bfd_flavour_name): New function.
* bfd-in2.h: Regenerate.
gdb/ChangeLog:
* findvar.c (default_read_var_value) <LOC_UNRESOLVED>: Include the
kind of minimal symbol in the error message.
* objfiles.c (objfile_flavour_name): New function.
* objfiles.h (objfile_flavour_name): Declare.
gdb/testsuite/ChangeLog:
* gdb.dwarf2/dw2-bad-unresolved.c: New file.
* gdb.dwarf2/dw2-bad-unresolved.exp: New file.
Sometimes it may be of benefit to force use of the __tls_get_addr_opt
call stub even when the glibc being used during linking does not
advertise __tls_get_addr_opt.
bfd/
* elf64-ppc.h (struct ppc64_elf_params <tls_get_addr_opt>): Rename
from no_tls_get_addr_opt.
* elf64-ppc.c: Update for rename and inversion of tls_get_addr_opt.
(ppc64_elf_tls_setup): Set tls_get_addr_opt to 0 only when at
default of -1.
ld/
* emultempl/ppc64elf.em (params): Init tls_get_addr_opt field to -1.
(OPTION_TLS_GET_ADDR_OPT): Define.
(PARSE_AND_LIST_LONGOPTS): Handle --tls-get-addr-opt.
(PARSE_AND_LIST_OPTIONS, PARSE_AND_LIST_ARGS_CASES): Likewise.
* ld.texinfo: Document --tls-get-addr-optimize and
--no-tls-get-addr-optimize.
I chose insertion sort since relocs are mostly sorted, but there is a
common case we can handle better; A run of relocs put out of order
due to not linking input files in order.
PR 18867
* elflink.c (elf_link_adjust_relocs): Modify insertion sort to
insert a run. Return status in case of malloc failure.
Adjust callers.
2015-09-15 Max Filippov <jcmvbkbc@gmail.com>
bfd/
* elf32-xtensa.c (elf_xtensa_be_plt_entry)
(elf_xtensa_le_plt_entry): Emit 'entry' instruction only for
windowed ABI.
(elf_xtensa_create_plt_entry): Generate 'l32r' offsets and fix
up instructions according to ABI.
Fix it so that it's compatible with the kernel and other FDPIC targets.
* elf32-sh.c (sh_elf_relocate_section): Set EF_SH_PIC flag
instead of clearing it on cross-section relocations.
(sh_elf_merge_private_data): Clear EF_SH_PIC flag by default.
This can also speedup the check as TLSDESC is the default model for
global/local dynamic that the big "||" check can finish more quickly
than putting them at the bottom.
2015-09-09 Jiong. Wang <jiong.wang@arm.com>
bfd/
* elfnn-aarch64.c (IS_AARCH64_TLS_RELAX_RELOC): Sort alphabetically.
We use its PLT entry to initialize function pointer at run-time. If
there is no other usage for the PLT entry, we can generate run-time
function pointer relocations in read-write section, which can be
resolved by dynamic linker, to initialize function pointers. It avoids
the extra indirect branch overhead in PLT.
bfd/
PR ld/18900
* elf32-i386.c (elf_i386_link_hash_entry): Add
func_pointer_refcount.
(elf_i386_link_hash_newfunc): Clear func_pointer_refcount.
(elf_i386_get_local_sym_hash): Likewise.
(elf_i386_copy_indirect_symbol): Also copy
func_pointer_refcount.
(elf_i386_check_relocs): Increment func_pointer_refcount.
(elf_i386_gc_sweep_hook): Decrement func_pointer_refcount.
(elf_i386_allocate_dynrelocs): Don't create the PLT entry if
there are only function pointer relocations which can be
resolved at run-time. Keep dynanamic relocations for run-time
function pointer initialization.
(elf_i386_relocate_section): Copy dynamic function pointer
relocations.
* elf64-x86-64.c (elf_x86_64_link_hash_entry): Add
func_pointer_refcount.
(elf_x86_64_link_hash_newfunc): Clear func_pointer_refcount.
(elf_x86_64_get_local_sym_hash): Likewise.
(elf_x86_64_copy_indirect_symbol): Also copy
func_pointer_refcount.
(elf_x86_64_check_relocs): Increment func_pointer_refcount.
(elf_x86_64_gc_sweep_hook): Decrement func_pointer_refcount.
(elf_x86_64_allocate_dynrelocs): Don't create the PLT entry if
there are only function pointer relocations which can be
resolved at run-time. Keep dynanamic relocations for run-time
function pointer initialization.
(elf_x86_64_relocate_section): Copy dynamic function pointer
relocations.
ld/testsuite/
PR ld/18900
* ld-i386/i386.exp: Run tests for PR ld/18900.
* ld-x86-64/x86-64.exp: Likewise.
* ld-i386/pr18900.out: New file.
* ld-i386/pr18900a.c: Likewise.
* ld-i386/pr18900a.c: Likewise.
* ld-i386/pr18900a.rd: Likewise.
* ld-i386/pr18900b.c: Likewise.
* ld-i386/pr18900b.rd: Likewise.
* ld-i386/pr18900c.c: Likewise.
* ld-x86-64/pr18900.out: Likewise.
* ld-x86-64/pr18900a.c: Likewise.
* ld-x86-64/pr18900a.rd: Likewise.
* ld-x86-64/pr18900b.c: Likewise.
* ld-x86-64/pr18900b.rd: Likewise.
* ld-x86-64/pr18900c.c: Likewise.
* ld-x86-64/mpx3.dd: Updated.
OPD lookup goes awry when .opd has been shuffled to remove unused
functions.
* elf64-ppc.c (ppc64_elf_maybe_function_sym): Adjust symbol value
if .opd section has been edited.
Don't emit long branch or plt branch stubs to save/restore functions.
Copy them instead. The problem is that plt branch stubs currently
trash r12, one of the parameters to some of the save/restore
functions, and there is no free register available to use instead of
r12.
6f20ed8a is prerequisite for this patch.
PR 18878
* elf64-ppc.c (ARRAY_SIZE): Define. Use throughout.
(enum ppc_stub_type): Add ppc_stub_save_res.
(struct map_stub): Add "next" and "needs_save_res".
(struct ppc_link_hash_entry): Add "save_res" flag.
(struct ppc_link_hash_table): Add "group".
(sfpr_define): Add stub_sec param. Define symbol in stub_sec if
stub_sec is non-null. Set "save_res".
(save_res_funcs): Make file scope, rename from funcs. Adjust uses.
(ppc64_elf_adjust_dynamic_symbol): Prohibit plt call to save_res syms.
(ppc_build_one_stub): Handle ppc_stub_save_res.
(ppc_size_one_stub): Set stub type to ppc_size_one_stub on finding
stub for linker defined save_res sym.
(group_sections): Init new fields of struct map_stub.
(ppc64_elf_size_stubs): Reserve space for save/restore func copy.
(ppc64_elf_build_stubs): Copy save/restore funcs to groups. Emit
alias syms too.
(ppc64_elf_relocate_section): Set destination for ppc_stub_save_res.
Sometimes these stubs don't need to change the low 16-bits of r2, so in
that case omit a useless addi r2,r2,0 insn. Also, change the get_r2off
error return from 0 to -1 since 0 is a valid return for ELFv2 -R objects.
* elf64-ppc.c (get_r2off): Return -1 on error.
(ppc_build_one_stub): Adjust for get_r2off change. Don't emit
addi r2,r2,0 on r2off stubs when the low 16-bit delta is zero.
(ppc_size_one_stub): Corresponding size changes for r2off stubs.
Add condition in test for -R objects.
Two organizational changes to the array of additional info kept for
sections.
1) Move group info into a per-group allocated struct, in preparation
for future changes that need per-group accounting.
2) Expand the array to include output sections, which simplifies
sizing and removes the need for a separate output section array.
* section.c (section_id): Make file scope.
(bfd_get_next_section_id): New function.
* elf64-ppc.c (struct map_stub): Remove toc_off field. Move decl.
(struct ppc_stub_hash_entry): Delete stub_sec and id_sec. Add
group. Update all uses.
(struct ppc_link_hash_table): Delete top_id, top_index, and
input_list. Add sec_info_arr_size. Rename stub_group to
sec_info, and make group info indirect. Update stub_group refs
throughout file.
(ppc_add_stub): Don't look for stub_sec on link_sec stub_group
entry.
(ppc_build_one_stub): Delete FIXME.
(ppc64_elf_setup_section_lists): Size htab->sec_info for all
sections, not just input sections. Don't create htab->input_list.
(ppc64_elf_next_input_section): Update to use sec_info union as
list pointer.
(PREV_SEC): Delete.
(group_sections): Pass "info" param rather than "htab". Iterate
over output sections rather than input_list. Use sec_info union
as list pointers. Alloc atruct map_stub, and return fail status.
* bfd-in2.h: Regenerate.
These int vars are really unsigned, so make them so.
* section.c (struct bfd_section): Make "id" and "index" unsigned.
* coff-rs6000.c (_bfd_xcoff_sizeof_headers): Adjust local var to suit.
* elf.c (elf_map_symbols): Likewise.
* elf64-ppc.c (sym_exists_at): Make "id" param unsigned.
(struct ppc_link_hash_table): Make "top_id" and "top_index" unsigned.
(ppc64_elf_setup_section_lists): Ditto for local vars.
* elf32-arm.c: Similarly to elf64-ppc.c.
* elf32-avr.c: Likewise.
* elf32-hppa.c: Likewise.
* elf32-m68hc1x.c: Likewise.
* elf32-metag.c: Likewise.
* elf32-nios2.c: Likewise.
* elfnn-aarch64.c: Likewise.
* simple.c (struct saved_offsets): Make "section_count" unsigned.
* bfd-in2.h: Regenerate.
H.J. Lu