6347aad80c
* frv.cpu (mabshs): Explicitly sign-extend arguments of abs to DI.
...
(DI-ext-HI, DI-ext-UHI, DI-ext-DI): New pmacros.
(media-arith-sat-semantics): Explicitly sign- or zero-extend
arguments of "operation" to DI using "mode" and the new pmacros.
2009-01-07 01:09:24 +00:00
2c06b7a648
* cris.cpu (cris-implemented-writable-specregs-v32): Correct size
...
of number 2, PID.
2009-01-03 17:51:12 +00:00
84e94c9023
Add LM32 port.
2008-12-23 19:10:25 +00:00
90518ff484
* mt.opc (parse_imm16): Apply 2007-09-26 opcodes/mt-asm.c change
...
to source.
2008-01-29 03:50:23 +00:00
a69f60de1a
* cris.cpu (movs, movu): Use result of extension operation when
...
updating flags.
2007-10-22 16:04:43 +00:00
9b201bb5e5
Change source files over to GPLv3.
2007-07-05 09:49:03 +00:00
53289dcddc
Support new FR-V SPRs
2007-04-30 13:21:52 +00:00
f6da2ec281
Changelog entry for previous delta
2007-04-20 13:05:18 +00:00
98693b73e9
Restore from version 1.1
2007-04-20 12:57:02 +00:00
144f4bc66d
* m32c.cpu (Imm-8-s4n): Fix print hook.
...
(Lab-24-8, Lab-32-8, Lab-40-8): Fix.
(arith-jnz-imm4-dst-defn): Make relaxable.
(arith-jnz16-imm4-dst-defn): Fix encodings.
* m32c-desc.c: Regenerate.
* m32c-dis.c: Regenerate.
* m32c-opc.c: Regenerate.
* config/tc-m32c.c (rl_for, relaxable): Protect argument.
(md_relax_table): Add entries for ADJNZ macros.
(M32C_Macros): Add ADJNZ macros.
(subtype_mappings): Add entries for ADJNZ macros.
(insn_to_subtype): Check for adjnz and sbjnz insns.
(md_estimate_size_before_relax): Pass insn to insn_to_subtype.
(md_convert_frag): Convert adjnz and sbjnz.
2007-03-29 23:56:39 +00:00
75b06e7b7a
* m32c.cpu (f-dsp-40-u20, f-dsp-48-u20, Dsp-40-u20, Dsp-40-u20,
...
mem20): New.
(src16-16-20-An-relative-*): New.
(dst16-*-20-An-relative-*): New.
(dst16-16-16sa-*): New
(dst16-16-16ar-*): New
(dst32-16-16sa-Unprefixed-*): New
(jsri): Fix operands.
(setzx): Fix encoding.
* m32c-asm.c: Regenerate.
* m32c-desc.c: Regenerate.
* m32c-desc.h: Regenerate.
* m32c-dis.h: Regenerate.
* m32c-ibld.c: Regenerate.
* m32c-opc.c: Regenerate.
* m32c-opc.h: Regenerate.
2007-03-21 02:53:50 +00:00
a5da764d0c
* m32r.opc: Formatting.
2007-03-08 06:56:20 +00:00
b497d0b027
* iq2000.cpu: Fix include paths for iq2000m.cpu and iq10.cpu.
2006-05-22 09:07:20 +00:00
e78efa90d6
* m32c.opc (parse_unsigned_bitbase): Take a new parameter which
...
decides if this function accepts symbolic constants or not.
(parse_signed_bitbase): Likewise.
(parse_unsigned_bitbase8): Pass the new parameter.
(parse_unsigned_bitbase11): Likewise.
(parse_unsigned_bitbase16): Likewise.
(parse_unsigned_bitbase19): Likewise.
(parse_unsigned_bitbase27): Likewise.
(parse_signed_bitbase8): Likewise.
(parse_signed_bitbase11): Likewise.
(parse_signed_bitbase19): Likewise.
* m32c-asm.c: Regenerate.
2006-04-10 21:19:14 +00:00
43aa3bb1d4
* m32c.cpu (Bit3-S): New.
...
(btst:s): New.
* m32c.opc (parse_bit3_S): New.
2006-03-14 04:20:53 +00:00
8d0e267915
* m32c.cpu (decimal-subtraction16-insn): Add second operand.
...
(btst): Add optional :G suffix for MACH32.
(or.b:S): New.
(pop.w:G): Add optional :G suffix for MACH16.
(push.b.imm): Fix syntax.
2006-03-14 00:29:59 +00:00
253d272cfc
* m32c.cpu (mul.l): New.
...
(mulu.l): New.
* m32c-desc.c: Regenerate with mul.l, mulu.l.
* m32c-opc.c: Likewise.
* m32c-opc.h: Likewise.
2006-03-11 02:23:19 +00:00
c7d41dc5a0
Fix parseing functions to return an error message if the parse failed
2006-03-03 15:57:43 +00:00
6772dd07c4
[include/elf]
...
* m32c.h: Add relax relocs.
[cpu]
* m32c.cpu (RL_TYPE): New attribute, with macros.
(Lab-8-24): Add RELAX.
(unary-insn-defn-g, binary-arith-imm-dst-defn,
binary-arith-imm4-dst-defn): Add 1ADDR attribute.
(binary-arith-src-dst-defn): Add 2ADDR attribute.
(jcnd16-5, jcnd16, jcnd32, jmp16.s, jmp16.b, jmp16.w, jmp16.a,
jmp32.s, jmp32.b, jmp32.w, jmp32.a, jsr16.w, jsr16.a): Add JUMP
attribute.
(jsri16, jsri32): Add 1ADDR attribute.
(jsr32.w, jsr32.a): Add JUMP attribute.
[opcodes]
* m32c-desc.c: Regenerate with linker relaxation attributes.
* m32c-desc.h: Likewise.
* m32c-dis.c: Likewise.
* m32c-opc.c: Likewise.
[gas]
* config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
(tc_gen_reloc): Don't define.
* config/tc-m32c.c (rl_for, relaxable): New convenience macros.
(OPTION_LINKRELAX): New.
(md_longopts): Add it.
(m32c_relax): New.
(md_parse_options): Set it.
(md_assemble): Emit relaxation relocs as needed.
(md_convert_frag): Emit relaxation relocs as needed.
(md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
(m32c_apply_fix): New.
(tc_gen_reloc): New.
(m32c_force_relocation): Force out jump relocs when relaxing.
(m32c_fix_adjustable): Return false if relaxing.
[bfd]
* elf32-m32c.c (m32c_elf_howto_table): Add relaxation relocs.
(m32c_elf_relocate_section): Don't relocate them.
(compare_reloc): New.
(relax_reloc): Remove.
(m32c_offset_for_reloc): New.
(m16c_addr_encodings): New.
(m16c_jmpaddr_encodings): New.
(m32c_addr_encodings): New.
(m32c_elf_relax_section): Relax jumps and address displacements.
(m32c_elf_relax_delete_bytes): Adjust for internal syms. Fix up
short jumps.
* reloc.c: Add m32c relax relocs.
* libbfd.h: Regenerate.
2006-02-24 22:10:36 +00:00
d70c5fc7c5
Add support for the Infineon XC16X.
2006-02-17 14:36:28 +00:00
8536c657ff
Fix %hi() operator for 64-bit hosts.
2006-02-10 12:05:12 +00:00
458f77708d
* m32c.cpu (mov.w:q): Fix mode.
...
(push32.b.imm): Likewise, for the comment.
2006-01-06 23:25:53 +00:00
d031aafbfe
Second part of ms1 to mt renaming.
...
* bfd/archures.c (bfd_arch_mt): Renamed.
(bfd_mt_arch): Renamed.
(bfd_archures_list): Adjusted.
* bfd/bfd-in2.h: Rebuilt.
* bfd/config.bfd (mt): Remove special case targ_archs.
(mt-*-elf): Rename bfd_elf32_mt_vec.
* bfd/configure: Rebuilt.
* bfd/configure.in (bfd_elf32_mt_vec): Renamed.
(selarchs) Remove mt special case.
* bfd/cpu-mt.c (arch_info_struct): Adjust.
(bfd_mt_arch): Renamed, adjust.
* bfd/elf32-mt.c (mt_reloc_type_lookup, mt_info_to_howto_rela,
mt_elf_relocate_hi16, mt_final_link_relocate, mt_relocate_section,
mt_elf_howto_table): Renamed, adjusted.
(mt_elf_gc_mark_hook, mt_elf_gc_sweep_hook, mt_elf_check_relocs,
elf32_mt_machine, mt_elf_object_p, mt_elf_set_private_flags,
mt_elf_copy_private_bfd_data, mt_elf_merge_private_bfd_data,
mt_elf_print_private_bfd_data): Renamed, adjusted.
(TARGET_BIG_SYM, TARGET_BIG_NAME, ELF_ARCH, ELF_MACHINE_CODE,
ELF_MAXPAGESIZE, elf_info_to_howto, elf_backend_relocate_section,
bfd_elf32_bfd_reloc_type_lookup, elf_backend_gc_mark_hook,
elf_backend_gc_sweep_hook, elf_backend_check_relocs,
eld_backend_object_p, bfd_elf32_bfd_set_private_flags,
bfd_elf32_bfd_copy_private_bfd_data,
bfd_elf32_bfd_merge_private_bfd_data,
bfd_elf32_bfd_print_private_bfd_data): Adjusted.
* bfd/libbfd.h: Regenerated.
* bfd/reloc.c (BFD_RELOC_MT_PC16, BFD_RELOC_MT_HI16,
BFD_RELOC_MT_LO16, BFD_RELOC_MT_GNU_VTINHERIT,
BFD_RELOC_MT_GNU_VTENTRY, BFD_RELOC_MT_PCINSN8): Renamed.
* bfd/targets.c (bfd_elf32_mt_vec): Renamed.
(_bfd_target_vector): Adjusted.
* binutils/readelf.c (guess_is_rela): Use EM_MT.
(dump_relocations, get_machine_name): Adjust.
* cpu/mt.cpu (define-arch, define-isa): Set name to mt.
(define-mach): Adjust.
* cpu/mt.opc (CGEN_ASM_HASH): Update.
(mt_asm_hash, mt_cgen_insn_supported): Renamed.
(parse_loopsize, parse_imm16): Adjust.
* gas/configure: Rebuilt.
* gas/configure.in (mt): Remove special case.
* gas/config/tc-mt.c (opcodes/mt-desc.h, opcodes/mt-opc.h): Change
#includes.
(mt_insn, mt_mach, mt_mach_bitmask, mt_flags, mt_architectures):
Rename, adjust.
(md_parse_option, md_show_usage, md_begin, md_assemble,
md_cgen_lookup_reloc, md_atof): Adjust.
(mt_force_relocation, mt_apply_fix, mt_fix_adjustable): Rename, adjust.
* gas/config/tc-mt.h (TC_MT): Rename.
(LISTING_HEADER, TARGET_ARCH, TARGET_FORMAT): Adjust.
(md_apply_fix): Adjust.
(mt_apply_fix, mt_fix_adjustable, mt_force_relocation): Rename.
(TC_FORCE_RELOCATION, tc_fix_adjustable): Adjust.
* gdb/mt-tdep.c (mt_arch_constants, mt_gdb_regnums): Rename, adjust.
(mt_register_name, mt_register_type, mt_register_reggroup_p,
mt_return_value, mt_skip_prologue, mt_breapoint_from_pc,
mt_pseudo_register_read, mt_pseudo_register_write, mt_frame_align,
mt_registers_info, mt_push_dummy_call, mt_unwind_cache,
mt_frame_unwind_cache, mt_unwind_pc, mt_unwind_dummy_id,
mt_frame_this_id, mt_frame_prev_register, mt_frame_base_address,
mt_frame_unwind, mt_frame_sniffer, mt_frame_base, mt_gdbarch_init,
_initialize_mt_tdep): Rename & adjust.
* include/dis-asm.h (print_insn_mt): Renamed.
* include/elf/common.h (EM_MT): Renamed.
* include/elf/mt.h: Rename relocs, cpu & other defines.
* ld/emulparams/elf32mt.sh (ARCH, OUTPUT_FORMAT): Adjust.
* opcodes/Makefile.am (HFILES, CFILES, ALL_MACHINES): Adjust.
(stamp-mt): Adjust rule.
(mt-asm.lo, mt-desc.lo, mt-dis.lo, mt-ibld.lo, mt-opc.lo): Rename &
adjust.
* opcodes/Makefile.in: Rebuilt.
* opcodes/configure: Rebuilt.
* opcodes/configure.in (bfd_mt_arch): Rename & adjust.
* opcodes/disassemble.c (ARCH_mt): Renamed.
(disassembler): Adjust.
* opcodes/mt-asm.c: Renamed, rebuilt.
* opcodes/mt-desc.c: Renamed, rebuilt.
* opcodes/mt-desc.h: Renamed, rebuilt.
* opcodes/mt-dis.c: Renamed, rebuilt.
* opcodes/mt-ibld.c: Renamed, rebuilt.
* opcodes/mt-opc.c: Renamed, rebuilt.
* opcodes/mt-opc.h: Renamed, rebuilt.
* sid/Makefile.in: Rebuilt.
* sid/aclocal.m4: Rebuilt.
* sid/configure: Rebuilt.
* sid/sid.spec: Adjust.
* sid/bsp/Makefile.am: Adjust.
* sid/bsp/Makefile.in: Rebuilt.
* sid/bsp/aclocal.m4: Rebuilt.
* sid/bsp/configrun-sid.in: Adjust.
* sid/bsp/pregen/Makefile.in: Rebuilt.
* sid/bsp/pregen/mt-gdb.conf: Renamed & rebuilt.
* sid/bsp/pregen/mt-gloss.conf: Renamed & rebuilt.
* sid/bsp/pregen/pregen-configs.in: Adjust.
* sid/component/aclocal.m4: Rebuilt.
* sid/component/configure: Rebuilt.
* sid/component/tconfig.in: Adjust.
* sid/component/bochs/aclocal.m4: Rebuilt.
* sid/component/cache/Makefile.in: Rebuilt.
* sid/component/cgen-cpu/Makefile.in: Rebuilt.
* sid/component/cgen-cpu/aclocal.m4: Rebuilt.
* sid/component/cgen-cpu/compCGEN.cxx: Adjust.
* sid/component/cgen-cpu/configure: Rebuilt.
* sid/component/cgen-cpu/configure.in: Rebult.
* sid/component/cgen-cpu/mt/Makefile.am: Adjust.
* sid/component/cgen-cpu/mt/Makefile.in: Rebuilt.
* sid/component/cgen-cpu/mt/hw-cpu-mt.txt: Adjust.
* sid/component/cgen-cpu/mt/mt-cpu.h: Rebuilt.
* sid/component/cgen-cpu/mt/mt-decode.cxx: Rebuilt.
* sid/component/cgen-cpu/mt/mt-decode.h: Rebuilt.
* sid/component/cgen-cpu/mt/mt-defs.h: Rebuilt.
* sid/component/cgen-cpu/mt/mt-desc.h: Rebuilt.
* sid/component/cgen-cpu/mt/mt-sem.cxx: Rebuilt.
* sid/component/cgen-cpu/mt/mt-write.cxx: Rebuilt.
* sid/component/cgen-cpu/mt/mt.cxx: Adjust.
* sid/component/cgen-cpu/mt/mt.h: Adjust.
* sid/component/consoles/Makefile.in: Rebuilt.
* sid/component/families/aclocal.m4: Rebuilt.
* sid/component/families/configure: Rebuilt.
* sid/component/gdb/Makefile.in: Rebuilt.
* sid/component/gloss/Makefile.in: Rebuilt.
* sid/component/glue/Makefile.in: Rebuilt.
* sid/component/ide/Makefile.in: Rebuilt.
* sid/component/interrupt/Makefile.in: Rebuilt.
* sid/component/lcd/Makefile.in: Rebuilt.
* sid/component/lcd/testsuite/Makefile.in: Rebuilt.
* sid/component/loader/Makefile.am: Rebuilt.
* sid/component/loader/Makefile.in: Rebuilt.
* sid/component/mapper/Makefile.in: Rebuilt.
* sid/component/mapper/testsuite/Makefile.in: Rebuilt.
* sid/component/memory/Makefile.in: Rebuilt.
* sid/component/mmu/Makefile.in: Rebuilt.
* sid/component/parport/Makefile.in: Rebuilt.
* sid/component/profiling/Makefile.in: Rebuilt.
* sid/component/rtc/Makefile.in: Rebuilt.
* sid/component/sched/Makefile.in: Rebuilt.
* sid/component/testsuite/Makefile.in: Rebuilt.
* sid/component/timers/aclocal.m4: Rebuilt.
* sid/component/timers/configure: Rebuilt.
* sid/component/uart/Makefile.in: Rebuilt.
* sid/component/uart/testsuite/Makefile.in: Rebuilt.
* sid/config/config.sub: Adjust.
* sid/config/info.tcl.in: Adjust.
* sid/config/sidtargets.m4: Adjust.
* sid/doc/Makefile.in: Rebuilt.
* sid/main/dynamic/Makefile.am: Rebuilt.
* sid/main/dynamic/Makefile.in: Rebuilt.
* sid/main/dynamic/aclocal.m4: Rebuilt.
* sid/main/dynamic/configure: Rebuilt.
2005-12-16 10:23:12 +00:00
eda87aba05
* m32c.cpu (jsri): Fix order so register names aren't treated as
...
symbols.
(indexb, indexbd, indexbs, indexl, indexld, indexls, indexw,
indexwd, indexws): Fix encodings.
* m32c-desc.c: Regenerate.
* m32c-opc.c: Regenerate.
* m32c-opc.h: Regenerate.
2005-12-14 03:30:07 +00:00
4970f871a7
Rename ms1 to mt, part 1
...
* config.sub: Replace ms1 arch with mt. Allow ms1 as alias.
* configure.in: Replace ms1 arch with mt.
* configure: Rebuilt.
* bfd/Makefile.am (ALL_MACHINES, ALL_MACHINES_CFILES,
BFD32_BACKENDS, BFD32_BACKENDS_CFILES): Replace ms1 with mt.
(cpu_mt.lo, elf32-mt.lo): Update target and dependency names.
* bfd/Makefile.in: Rebuilt.
* bfd/config.bfd: Replace ms1 arch with mt.
* bfd/configure.in: Replace ms1 files with mt files.
* bfd/configure: Rebuilt.
* bfd/elf32-mt.c: Renamed from elf32-ms1.c. Update include files.
* bfd/cpu-mt.c: Renamed from cpu-ms1.c.
* cpu/mt.cpu: Rename from ms1.cpu.
* cpu/mt.opc: Rename from ms1.opc.
* binutils/Makefile.am: Replace ms1 files with mt files.
* binutils/Makefile.in: Rebuilt.
* binutils/readelf.c (elf/mt.h): Adjust #include.
* gas/configure.in: Replace ms1 arch with mt arch.
* gas/configure: Rebuilt.
* gas/configure.tgt: Replace ms1 arch with mt arch.
* gas/config/tc-mt.c: Renamed from tc-ms1.c: Update include files.
* gas/doc/Makefile.am (CPU_DOCS): Replace ms1 files with mt files.
* gas/doc/Makefile.in: Rebuilt.
* gas/testsuite/gas/mt: Renamed from ms1 dir. Update file names as
needed.
* gas/testsuite/gas/mt/errors.exp: Replace ms1 arch with mt arch.
* gas/testsuite/gas/mt/mt.exp: Replace ms1 arch with mt arch.
* gas/testsuite/gas/mt/relocs.exp: Replace ms1 arch with mt arch.
* gdb/configure.tgt: Replace ms1 arch with mt arch.
* gdb/config/mt: Renamed from ms1 dir. Update file names as needed.
* gdb/config/mt/mt.mt (TDEPFILES): Replace ms1 file with mt file.
* include/elf/mt.h: Renamed from ms1.h
* ld/Makefile.am (ALL_EMULATIONS): Replace ms1 files with mt files.
(eelf32mt.c): Update target name and dependencies.
* ld/Makefile.in: Rebuilt.
* ld/configure.tgt: Replace ms1 arch with mt arch.
* ld/emulparams/elf32mt.sh: Renamed from elf32ms1.sh. Update
comment.
* libgloss/configure.in: Replace ms1 arch with mt arch.
* libgloss/configure: Rebuilt.
* libgloss/mt: Renamed from ms1 dir.
* newlib/configure.host: Replace ms1 arch with mt arch.
* newlib/libc/machine/mt: Renamed from ms1 dir.
* opcodes/Makefile.am (CLEANFILES, CGEN_CPUS, MT_DEPS): Replace ms1
with mt.
* opcodes/Makefile.in: Rebuilt.
* opcodes/configure.in: Replace ms1 files with mt files.
* opcodes/configure: Rebuilt.
* sid/component/cgen-cpu/mt: Renamed from ms1 dir. Update file
names as appropriate.
* sid/component/cgen-cpu/mt/Makefile.am: Replace ms1 files with mt
files.
* sid/component/cgen-cpu/mt/Makefile.in: Rebuilt.
2005-12-12 11:25:08 +00:00
787121fc40
Rename ms1 files to mt files (part 1 -- renames only)
2005-12-12 11:16:41 +00:00
48ad829861
* cris.cpu (simplecris-common-writable-specregs)
...
(simplecris-common-readable-specregs): Split from
simplecris-common-specregs. All users changed.
(cris-implemented-writable-specregs-v0)
(cris-implemented-readable-specregs-v0): Similar from
cris-implemented-specregs-v0.
(cris-implemented-writable-specregs-v3)
(cris-implemented-readable-specregs-v3)
(cris-implemented-writable-specregs-v8)
(cris-implemented-readable-specregs-v8)
(cris-implemented-writable-specregs-v10)
(cris-implemented-readable-specregs-v10)
(cris-implemented-writable-specregs-v32)
(cris-implemented-readable-specregs-v32): Similar.
(bdap-32-pc, move-m-pcplus-p0, move-m-spplus-p8): New
insns and specializations.
2005-12-06 21:48:28 +00:00
6f84a2a649
bfd:
...
Add ms2.
* archures.c (bfd_mach_ms2): Define.
* cpu-ms1.c (arch_info_struct): Add ms2 stanza.
* elf32-ms1.c (elf32_ms1_machine): Add ms2 case.
(ms1_elf_merge_private_bfd_data): Remove unused variables. Add
correct merging logic, with workaround.
(ms1_elf_print_private_bfd_data): Add ms2 case.
* reloc.c (BFD_RELOC_MS1_PCINSN8): Add ms2 specific reloc.
* libbfd.h: Regenerated.
* bfd-in2.h: Regenerated.
cpu:
Add ms2
* ms1.cpu (ms2, ms2bf): New architecture variant, cpu, machine and
model.
(f-uu8, f-uu1, f-imm16l, f-loopo, f-cb1sel, f-cb2sel, f-cb1incr,
f-cb2incr, f-rc3): New fields.
(LOOP): New instruction.
(JAL-HAZARD): New hazard.
(imm16o, loopsize, imm16l, rc3, cb1sel, cb2sel, cb1incr, cb2incr):
New operands.
(mul, muli, dbnz, iflush): Enable for ms2
(jal, reti): Has JAL-HAZARD.
(ldctxt, ldfb, stfb): Only ms1.
(fbcb): Only ms1,ms1-003.
(wfbinc, mefbinc, wfbincr, mwfbincr, fbcbincs, mfbcbincs,
fbcbincrs, mfbcbincrs): Enable for ms2.
(loop, loopu, dfbc, dwfb, fbwfb, dfbr): New ms2 insns.
* ms1.opc (parse_loopsize): New.
(parse_imm16): hi16/lo16 relocs are applicable to IMM16L.
(print_pcrel): New.
gas:
Add ms2.
* config/tc-ms1.c (ms1_mach_bitmask): Initialize to MS1.
(ms1_architectures): Add ms2.
(md_parse_option): Add ms2.
(md_show_usage): Add ms2.
(md_assemble): Add JAL_HAZARD detection logic.
(md_cgen_lookup_reloc): Add MS1_OPERAND_LOOPSIZE case.
* doc/c-ms1.texi: New.
* doc/all.texi: Add MS1.
* doc/Makefile.am (CPU_DOCS): Add c-ms1.texi.
* doc/Makefile.in: Rebuilt.
* doc/Makefile: Rebuilt.
gas/testsuite:
Add ms2.
* gas/ms1/allinsn.d: Adjust pcrel disassembly.
* gas/ms1/errors.exp: Fix target triplet.
* gas/ms1/ms1-16-003.d: Adjust pcrel disassembly.
* gas/ms1/ms1-16-003.s: Tweak label.
* gas/ms1/ms1.exp: Adjust target triplet. Add ms2 test.
* gas/ms1/ms2.d, gas/ms1/ms2.s: New.
* gas/ms1/relocs.d: Adjust expected machine name and pcrel
disassembly.
* gas/ms1/relocs.exp: Adjust target triplet.
include:
Add ms2.
* elf/ms1.h (EF_MS1_CPU_MS2): New.
opcodes:
Add ms2.
* ms1-asm.c, ms1-desc.c, ms1-desc.h, ms1-dis.c, ms1-ibld.c,
ms1-opc.c, ms1-opc.h: Regenerated.
2005-11-08 11:15:13 +00:00
95b965212b
2005-10-28 Dave Brolley <brolley@redhat.com>
...
Contribute the following change:
2003-09-24 Dave Brolley <brolley@redhat.com>
* frv.opc: Use CGEN_ATTR_VALUE_ENUM_TYPE in place of
CGEN_ATTR_VALUE_TYPE.
* m32c.opc (m32c_cgen_insn_supported): Use CGEN_INSN_BITSET_ATTR_VALUE.
Use cgen_bitset_intersect_p.
2005-10-28 19:33:06 +00:00
c6552317c1
* m32c.cpu (Imm-8-s4n, Imm-12-s4n): New.
...
(arith-jnz16-imm4-dst-defn, arith-jnz32-imm4-dst-defn,
arith-jnz-imm4-dst-mach, arith-jnz-imm4-dst): Keep track of which
imm operand is needed.
(adjnz, sbjnz): Pass the right operands.
(unary-insn-defn, unary16-defn, unary32-defn, unary-insn-mach,
unary-insn): Add -g variants for opcodes that need to support :G.
(not.BW:G, push.BW:G): Call it.
(stzx16-imm8-imm8-dsp8sb, stzx16-imm8-imm8-dsp8fb,
stzx16-imm8-imm8-abs16): Fix operand typos.
* m32c.opc (m32c_asm_hash): Support bnCND.
(parse_signed4n, print_signed4n): New.
* m32c-asm.c: Regenerate.
* m32c-desc.c: Regenerate.
* m32c-desc.h: Regenerate.
* m32c-dis.c: Regenerate.
* m32c-ibld.c: Regenerate.
* m32c-opc.c: Regenerate.
* m32c-opc.h: Regenerate.
2005-10-27 23:54:17 +00:00
f75eb1c004
* m32c.cpu (f-dsp-8-s24, Dsp-8-s24): New.
...
(mov-dspsp-dst-defn, mov-src-dspsp-defn, mov16-dspsp-dst-defn,
mov16-src-dspsp-defn, mov32-dspsp-dst-defn, mov32-src-dspsp-defn):
dsp8[sp] is signed.
(mov.WL:S #imm,A0/A1): dsp24 is signed (i.e. -0x800000..0xffffff).
(mov.BW:S r0,r1): Fix typo r1l->r1.
(tst): Allow :G suffix.
* m32c.opc (parse_signed24): New, for -0x800000..0xffffff.
* m32c-asm.c: Regenerate.
* m32c-desc.c: Regenerate.
* m32c-desc.h: Regenerate.
* m32c-dis.c: Regenerate.
* m32c-ibld.c: Regenerate.
* m32c-opc.c: Regenerate.
* m32c-opc.h: Regenerate.
2005-10-26 14:59:12 +00:00
e277c00b2d
* m32r.opc (parse_hi16): Do not assume a 32-bit host word size.
2005-10-26 07:49:05 +00:00
92e0a9414c
* m32c.cpu (add16-bQ-sp,add16-wQ-sp): Fix to allow either width by
...
making one a macro of the other.
* m32c-asm.c: Regenerate.
* m32c-desc.c: Regenerate.
* m32c-desc.h: Regenerate.
* m32c-dis.c: Regenerate.
* m32c-ibld.c: Regenerate.
* m32c-opc.c: Regenerate.
* m32c-opc.h: Regenerate.
2005-10-25 18:52:02 +00:00
a1a280bb84
[cpu]
...
* m32c.cpu (lde, ste): Add dsp[a0] and [a1a] addressing.
(indexb, indexbd, indexbs, indexw, indexwd, indexws, indexl,
indexld, indexls): .w variants have `1' bit.
(rot32.b): QI, not SI.
(rot32.w): HI, not SI.
(xchg16): HI for .w variant.
[opcodes]
* m32c-asm.c: Regenerate.
* m32c-desc.c: Regenerate.
* m32c-desc.h: Regenerate.
* m32c-dis.c: Regenerate.
* m32c-ibld.c: Regenerate.
* m32c-opc.c: Regenerate.
* m32c-opc.h: Regenerate.
2005-10-22 00:03:13 +00:00
e74eb924c2
* m32r.opc (parse_slo16): Fix bad application of previous patch.
2005-10-19 14:44:17 +00:00
5e03663f3d
m32r.opc (parse_slo16): Better version of previous patch.
2005-10-18 07:53:17 +00:00
ab7c9a26e5
m32r.opc (parse_slo16): Do not assume a 32-bit host word size.
2005-10-14 08:33:27 +00:00
fd54057a29
[bfd]
...
* reloc.c: Remove unused M32C relocs, add BFD_RELOC_M32C_HI8.
* libbfd.h: Regenerate.
* bfd-in2.h: Regenerate.
* elf32-m32c.c (m32c_elf_howto_table): Add R_M32C_8, R_M32C_LO16,
R_M32C_HI8, R_M32C_HI16.
(m32c_reloc_map): Likewise.
(m32c_elf_relocate_section): Add R_M32C_HI8 and R_M32C_HI16.
[cpu]
* m32c.opc (parse_unsigned8): Add %dsp8().
(parse_signed8): Add %hi8().
(parse_unsigned16): Add %dsp16().
(parse_signed16): Add %lo16() and %hi16().
(parse_lab_5_3): Make valuep a bfd_vma *.
[gas]
* config/tc-m32c.c (md_cgen_lookup_reloc): Add 8 bit operands.
Support %mod() modifiers from opcodes.
* doc/c-m32c.texi (M32C-Modifiers): New section.
[include/elf]
* m32c.h: Add R_M32C_8, R_M32C_LO16, R_M32C_HI8, and R_M32C_HI16.
[opcodes]
* m32c-asm.c Regenerate.
* m32c-dis.c Regenerate.
2005-07-26 03:21:53 +00:00
85da3a565d
Add ChangeLog entries for yesterdays deltas (oops!)
2005-07-19 10:01:32 +00:00
e729279b04
Fix building for MS1 and M32C.
...
Restore alpha- sorting to the architecture tables.
2005-07-18 14:13:36 +00:00
aa2608541f
* m32c.opc (m32c_cgen_insn_supported): Use int, not CGEN_BITSET,
...
to represent isa sets.
2005-07-16 18:43:55 +00:00
0a665bfd86
* m32c.cpu, m32c.opc: Fix copyright.
2005-07-15 20:31:17 +00:00
49f58d10f8
ChangeLog:
...
2005-07-14 Jim Blandy <jimb@redhat.com>
* configure.in: Add cases for Renesas m32c.
* configure: Regenerated.
bfd/ChangeLog:
2005-07-14 Jim Blandy <jimb@redhat.com>
Add support for m32c-*-elf (Renesas m32c and m16c).
* Makefile.am (ALL_MACHINES): Add cpu-m32c.lo.
(ALL_MACHINES_CFILES): Add cpu-m32c.c.
(BFD32_BACKENDS): Add elf32-m32c.lo.
(BFD32_BACKENDS_CFILES): Add elf32-m32c.c.
(cpu-m32c.lo, elf32-m32c.lo): New rules, generated by 'make dep-am'.
* Makefile.in: Regenerated.
* archures.c (bfd_arch_m32c, bfd_mach_m16c, bfd_mach_m32c): New
arch and mach codes.
(bfd_m32c_arch): New arch info object.
(bfd_archures_list): List bfd_m32c_arch.
* bfd-in2.h: Regenerated.
* config.bfd: Add case for the m32c.
* configure.in: Add case for the m32c.
* configure: Regenerated.
* cpu-m32c.c, elf32-m32c.c: New files.
* libbfd.h: Regenerated.
* targets.c (bfd_elf32_m32c_vec): Declare.
(_bfd_target_vector): List bfd_elf32_m32c_vec.
binutils/ChangeLog:
2005-07-14 Jim Blandy <jimb@redhat.com>
* readelf.c: #include "elf/m32c.h"
(guess_is_rela, dump_relocations, get_machine_name): Add cases for
EM_M32C.
* Makefile.am (readelf.o): Update dependencies.
* Makefile.in: Regenerated.
cpu/ChangeLog:
2005-07-14 Jim Blandy <jimb@redhat.com>
* m32c.cpu, m32c.opc: Machine description for the Renesas M32C.
gas/ChangeLog:
2005-07-14 Jim Blandy <jimb@redhat.com>
Add support for the Renesas M32C.
* Makefile.am (CPU_TYPES): List m32c.
(TARGET_CPU_CFILES): List config/tc-m32c.c.
(TARGET_CPU_HFILES): List config/tc-m32c.h.
* configure.in: Add case for m32c.
* configure.tgt: Add cases for m32c and m32c-*-elf.
* configure: Regenerated.
* config/tc-m32c.c, config/tc-m32c.h: New files.
* doc/Makefile.am (CPU_DOCS): Add c-m32c.texi.
* doc/Makefile.in: Regenerated.
* doc/all.texi: Set M32C.
* doc/as.texinfo: Add text for the M32C-specific options and line
comment characters, and refer to c-m32c.texi.
* doc/c-m32c.texi: New file.
include/ChangeLog:
2005-07-14 Jim Blandy <jimb@redhat.com>
* dis-asm.h (print_insn_m32c): New declaration.
include/elf/ChangeLog:
2005-07-14 Jim Blandy <jimb@redhat.com>
Add support for Renesas M32C and M16C.
* common.h (EM_M32C): New machine number.
* m32c.h: New file.
ld/ChangeLog:
2005-07-14 Jim Blandy <jimb@redhat.com>
Add support for the Renesas M32C and M16C.
* Makefile.am (ALL_EMULATIONS): Add eelf32m32c.o.
(eelf32m32c.c): New target.
* Makefile.in: Regenerated.
* configure.tgt: Add case for m32c-*-elf.
* emulparams/elf32m32c.sh: New file.
opcodes/ChangeLog:
2005-07-14 Jim Blandy <jimb@redhat.com>
Add support for the Renesas M32C and M16C.
* m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c: New.
* m32c-desc.h, m32c-opc.h: New.
* Makefile.am (HFILES): List m32c-desc.h and m32c-opc.h.
(CFILES): List m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c,
m32c-opc.c.
(ALL_MACHINES): List m32c-asm.lo, m32c-desc.lo, m32c-dis.lo,
m32c-ibld.lo, m32c-opc.lo.
(CLEANFILES): List stamp-m32c.
(M32C_DEPS): List stamp-m32c, if CGEN_MAINT.
(CGEN_CPUS): Add m32c.
(m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c)
(m32c-desc.h, m32c-opc.h): Depend on M32C_DEPS.
(m32c_opc_h): New variable.
(stamp-m32c, m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo)
(m32c-opc.lo): New rules.
* Makefile.in: Regenerated.
* configure.in: Add case for bfd_m32c_arch.
* configure: Regenerated.
* disassemble.c (ARCH_m32c): New.
[ARCH_m32c]: #include "m32c-desc.h".
(disassembler) [ARCH_m32c]: Add case for bfd_arch_m32c.
(disassemble_init_for_target) [ARCH_m32c]: Same.
* cgen-ops.h, cgen-types.h: New files.
* Makefile.am (HFILES): List them.
* Makefile.in: Regenerated.
2005-07-14 22:52:28 +00:00
0e6b69beb9
* ms1.opc (print_dollarhex): Correct format string.
2005-07-14 13:59:51 +00:00
f9210e37b0
* iq2000.cpu: Include from binutils cpu dir.
2005-07-06 08:18:52 +00:00
3ec2b351bd
Fix compile time warnings from a GCC 4.0 compiler
2005-07-05 15:07:46 +00:00
47b0e7ad8c
Update function declarations to ISO C90 formatting
2005-07-01 11:16:33 +00:00
b081650bb6
2005-06-15 Dave Brolley <brolley@redhat.com>
...
Contributed by Red Hat.
* ms1.cpu: New file. Written by Nick Clifton, Stan Cox.
* ms1.opc: New file. Written by Stan Cox.
2005-06-15 15:33:07 +00:00
e172dbf8aa
Update the address and phone number of the FSF organization
2005-05-10 10:21:13 +00:00
b2d52a4828
* frv.opc (parse_A): Warning fix.
2005-02-24 13:36:46 +00:00
Hans-Peter Nilsson
Nick Clifton
Alan Modra
Mark Salter
DJ Delorie
Nathan Sidwell
Dave Brolley
Jim Blandy