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840 Commits

Author SHA1 Message Date
H.J. Lu
85064c7906 2005-03-23 H.J. Lu <hongjiu.lu@intel.com> 
* cris-dis.c (print_with_operands): Use ~31L for long instead
	of ~31.
 2005-03-23 19:21:16 +00:00
H.J. Lu
de7141c7b1 2005-03-20 H.J. Lu <hongjiu.lu@intel.com> 
* mmix-opc.c (O): Revert the last change.
	(Z): Likewise.
 2005-03-20 17:12:16 +00:00
H.J. Lu
e493ab45b1 2005-03-19 H.J. Lu <hongjiu.lu@intel.com> 
* mmix-opc.c (O): Use 24UL instead of 24 for unsigned long.
	(Z): Likewise.
 2005-03-19 18:29:14 +00:00
Hans-Peter Nilsson
d8d7c45959 * mmix-opc.c (O, Z): Force expression as unsigned long. 2005-03-19 04:23:24 +00:00
Nick Clifton
ebdb038304 Change wording of error message to "percent-operand" from "%operand" as the 
latter confuses xgettext into thinking that it is a C printf formating directive,
which	prevents proper translation.
 2005-03-18 16:12:38 +00:00
Nick Clifton
569acd2ce2 Rename switch to enable/disable -Werror to --enable-werror/--disable-werror 
for compatibility with gcc.
 2005-03-16 17:18:17 +00:00
Nick Clifton
1ad12f975f Enable -Werror by default 2005-03-16 16:17:14 +00:00
Alan Modra
4eb30afc41 * ppc-dis.c (powerpc_dialect): Don't set PPC_OPCODE_ALTIVEC when 
BOOKE.
 2005-03-16 02:38:39 +00:00
Alan Modra
729ae8d20e Commit new Spanish translation. 2005-03-15 05:25:37 +00:00
Alan Modra
ea8409f729 Commit new French translation. 2005-03-14 23:39:09 +00:00
Nick Clifton
4f495e616d Use ".word 0x0012 # Entry mask: r1 r2 >" instead of just "Entry mask: < r1 ... >" 2005-03-14 09:35:26 +00:00
Zack Weinberg
885fc2570f gas: 
* config/tc-arm.c (tinsns): Add ARMv6K instructions sev, wfe,
	wfi, yield.
opcodes:
	* arm-dis.c (thumb_opcodes): Add ARMv6K instructions nop, sev,
	wfe, wfi, yield.
gas/testsuite:
	* gas/arm/thumbv6k.d, gas/arm/thumbv6k.s: New dump test.
	* gas/arm/arm.exp: Run it.
 2005-03-12 18:25:47 +00:00
Zack Weinberg
b9fd58c7eb Revert accidental commit of V6K ops 2005-03-12 18:17:42 +00:00
Zack Weinberg
0a003adc41 include: 
* opcode/arm.h: Adjust comments for ARM_EXT_V4T and ARM_EXT_V5T.
	Add ARM_EXT_V6T2, ARM_ARCH_V6T2, ARM_ARCH_V6KT2, ARM_ARCH_V6ZT2,
	and ARM_ARCH_V6ZKT2.
opcodes:
	* arm-dis.c (arm_opcodes): Document %E and %V.
	Add entries for v6T2 ARM instructions:
	bfc bfi mls strht ldrht ldrsht ldrsbt movw movt rbit ubfx sbfx.
	(print_insn_arm): Add support for %E and %V.
 2005-03-12 18:14:05 +00:00
Alan Modra
da99ee721e opcodes/ 
* ppc-opc.c (insert_sprg, extract_sprg): New Functions.
	(powerpc_operands <SPRG>): Call the above.  Bit field is 5 bits.
	(SPRG_MASK): Delete.
	(XSPRG_MASK): Mask off extra bits now part of sprg field.
        (powerpc_opcodes): Asjust mfsprg and mtsprg to suit new mask.  Move
	mfsprg4..7 after msprg and consolidate.

gas/testsuite
	* gas/ppc/booke.s: Add new m[t,f]sprg testcases.
	* gas/ppc/booke.d: Likewise.
 2005-03-10 12:52:30 +00:00
Alan Modra
220abb21d1 * vax-dis.c (entry_mask_bit): New array. 
(print_insn_vax): Decode function entry mask.
 2005-03-09 13:08:26 +00:00
Aldy Hernandez
0e06657a9a * ppc-opc.c (powerpc_opcodes): Fix encoding of efscfd. 2005-03-07 20:05:44 +00:00
Alan Modra
06647dfdde Regenerate .pot files 2005-03-05 12:14:34 +00:00
Ramana Radhakrishnan
82b829a7d3 2005-03-03 Ramana Radhakrishnan <ramana.radhakrishnan@codito.com> 
* opcodes/arc-dis.c:Add enum a4_decoding_class.
	  (dsmOneArcInst): Use the enum values for the decoding class
	  Remove redundant case in the switch for decodingClass value 11
 2005-03-03 15:42:05 +00:00
Alan Modra
aef6203bd6 update copyright dates 2005-03-03 11:52:12 +00:00
Jan Beulich
c4a530c529 gas/ 
2005-03-02  Jan Beulich  <jbeulich@novell.com>

	* config/tc-i386.c (build_modrm_byte): Add lock prefix for cr8...15
	accesses.
	(parse_register): Allow cr8...15 in all modes.

gas/testsuite/
2005-03-02  Jan Beulich  <jbeulich@novell.com>

	* gas/i386/cr-err.[ls]: New.
	* gas/i386/crx.[ds]: New.
	* gas/i386/i386.exp: Run new tests.

opcodes/
2005-03-02  Jan Beulich  <jbeulich@novell.com>

	* i386-dis.c (print_insn): Suppress lock prefix printing for cr8...15
	accesses.
	(OP_C): Consider lock prefix in non-64-bit modes.
 2005-03-02 08:01:32 +00:00
Alan Modra
47d8304e88 * cris-dis.c (format_hex): Remove ineffective warning fix. 
* crx-dis.c (make_instruction): Warning fix.
	* frv-asm.c: Regenerate.
 2005-02-24 13:38:01 +00:00
Nick Clifton
33b71eeb2e Fix compile time warnings generated by gcc 4.0 2005-02-23 16:04:40 +00:00
Nick Clifton
ec36c4a4d6 (make_instruction): Move argument structure into inner scope and ensure that 
all of its fields are initialised before they are used.
 2005-02-23 11:53:31 +00:00
Alan Modra
53c9ebc5f1 * arc-ext.c: Warning fixes. 
* arc-ext.h: Likewise.
	* cgen-opc.c: Likewise.
	* ia64-gen.c: Likewise.
	* maxq-dis.c: Likewise.
	* ns32k-dis.c: Likewise.
	* w65-dis.c: Likewise.
	* ia64-asmtab.c: Regenerate.
 2005-02-22 13:01:53 +00:00
Alan Modra
610ad19b95 Regenerate cgen files 2005-02-22 00:33:20 +00:00
Alan Modra
db9db6f27e * Makefile.am: Run "make dep-am" 
* Makefile.in: Regenerate.
 2005-02-21 11:48:33 +00:00
Nick Clifton
bf143b25e9 Fix compile time warning messages 2005-02-15 12:52:03 +00:00
H.J. Lu
d60988980f 2005-02-14 H.J. Lu <hongjiu.lu@intel.com> 
* dis-buf.c (perror_memory): Use sprintf_vma to print out
	address.
 2005-02-14 15:47:19 +00:00
Nick Clifton
bc18c937be Fix compile time warning building iq2000-asm.c 2005-02-11 16:09:30 +00:00
Nick Clifton
5a84f3e0d2 Regenerate frv-dis.c in order to fix a compile time warning. 2005-02-11 16:04:06 +00:00
Jim Blandy
0a40490e6a cgen/ChangeLog: 
2005-02-07  Jim Blandy  <jimb@redhat.com>

	* cgen-opc.scm: Don't load fixup.scm here.  (See corresponding
	changes in the opcodes directory.)

opcodes/ChangeLog:
2005-02-07  Jim Blandy  <jimb@redhat.com>

	* Makefile.am (CGEN): Load guile.scm before calling the main
	application script.
	* Makefile.in: Regenerated.
	* cgen.sh: Be prepared for the 'cgen' argument to contain spaces.
	Simply pass the cgen-opc.scm path to ${cgen} as its first
	argument; ${cgen} itself now contains the '-s', or whatever is
	appropriate for the Scheme being used.
 2005-02-08 04:52:24 +00:00
Andrew Cagney
c46f8c5116 2005-01-31 Andrew Cagney <cagney@gnu.org> 
* gettext.m4: Only set ENABLE_NLS when gettext is present.
 2005-01-31 20:32:45 +00:00
Jan Beulich
60b9a61772 gas/ 
2005-01-31  Jan Beulich  <jbeulich@novell.com>

	* config/tc-ia64.c (parse_operands): Also handle alloc without first
	input being ar.pfs.

gas/testsuite/
2005-01-31  Jan Beulich  <jbeulich@novell.com>

	* gas/ia64/pseudo.[ds]: New.
	* gas/ia64/ia64.exp: Run new test.

opcodes/
2005-01-31  Jan Beulich  <jbeulich@novell.com>

	* ia64-gen.c (NELEMS): Define.
	(shrink): Generate alias with missing second predicate register when
	opcode has two outputs and these are both predicates.
	* ia64-opc-i.c (FULL17): Define.
	(ia64_opcodes_i): Add mov-to-pr alias without second input. Use FULL17
	here to generate output template.
	(TBITCM, TNATCM): Undefine after use.
	* ia64-opc-m.c (ia64_opcodes_i): Add alloc alias without ar.pfs as
	first input. Add ld16 aliases without ar.csd as second output. Add
	st16 aliases without ar.csd as second input. Add cmpxchg aliases
	without ar.ccv as third input. Add cmp8xchg16 aliases without ar.csd/
	ar.ccv as third/fourth inputs. Consolidate through...
	(CMPXCHG_acq, CMPXCHG_rel, CMPXCHG_1, CMPXCHG_2, CMPXCHG_4, CMPXCHG_8,
	CMPXCHGn, CMP8XCHG16, CMPXCHG_ALL): Define.
	* ia64-asmtab.c: Regenerate.
 2005-01-31 08:48:32 +00:00
Andrew Cagney
a53bf50624 2005-01-27 Andrew Cagney <cagney@gnu.org> 
* gettext.m4: Don't use NONE as a default for CATOBJEXT.
 2005-01-27 14:48:23 +00:00
Alexandre Oliva
90219bd0f3 bfd/ChangeLog: 
2004-12-10  Alexandre Oliva  <aoliva@redhat.com>
* elf32-frv.c (elf32_frv_relocate_section): Force local binding
for TLSMOFF.
* reloc.c: Add R_FRV_TLSMOFF.
* elf32-frv.c (elf32_frv_howto_table): Likewise.
(frv_reloc_map, frv_reloc_type_lookup): Map it.
(elf32_frv_relocate_section): Handle it.
(elf32_frv_check_relocs): Likewise.
* libbfd.h, bfd-in2.h: Rebuilt.
2004-11-26  Alexandre Oliva  <aoliva@redhat.com>
* elf32-frv.c (_frvfdpic_emit_got_relocs_plt_entries): Don't crash
when given an undefweak TLS symbol.  Fix constant TLS PLT entries
such that they return the constant in gr9.
(_frvfdpic_relax_tls_entries): Don't crash for undefweak TLS
symbols.
(_frvfdpic_size_got_plt): Set _cooked_size of dynamic sections.
too, such that they shrink on relaxation.
(elf32_frvfdpic_finish_dynamic_sections): Check __ROFIXUP_END__ as
marking the position right past the _GLOBAL_OFFSET_TABLE_ value.
(_frvfdpic_assign_plt_entries): Shrink constant TLS PLT entries
if we can guarantee the use of 16-bit constants.
2004-11-10  Alexandre Oliva  <aoliva@redhat.com>
Introduce TLS support for FR-V FDPIC.
* reloc.c: Add TLS relocations.
* elf32-frv.c (elf32_frv_howto_table): Add TLS relocations.
(elf32_frv_rel_tlsdesc_value_howto): New.
(elf32_frv_rel_tlsoff_howto): New.
(frv_reloc_map): Add new mappings.
(struct frvfdpic_elf_link_hash_table): Add pointer to summary
reloc information.
(frvfdpic_dynamic_got_plt_info): New.
(frvfdpic_plt_tls_ret_offset): New.
(ELF_DYNAMIC_INTERPRETER, DEFAULT_STACK_SIZE): Move earlier.
(struct _frvfdpic_dynamic_got_info): Likewise.  Add TLS members.
(struct _frvfdpic_dynamic_got_plt_info): Likewise.
(FRVFDPIC_SYM_LOCAL): Regard symbols defined in the absolute
section as local.
(struct frvfdpic_relocs_info): Add TLS fields.
(frvfdpic_relocs_info_hash): Warning clean up.
(frvfdpic_relocs_info_find): Initialize tlsplt_entry.
(frvfdpic_pic_merge_early_relocs_info): Merge TLS fields.
(FRVFDPIC_TLS_BIAS): Define.
(tls_biased_base): New.
(_frvfdpic_emit_got_relocs_plt_entries): Deal with TLS
relocations.
(frv_reloc_type_lookup): Likewise.
(frvfdpic_info_to_howto_rel): Likewise.
(elf32_frv_relocate_section): Likewise.
(_frv_create_got_section): Create the PLT section here.
(elf32_frvfdpic_create_dynamic_sections): Not here.
(_frvfdpic_count_nontls_entries): Move out of...
(_frvfdpic_count_got_plt_entries): ... here.
(_frvfdpic_count_tls_entries): Likewise.  Add TLS support.
(_frvfdpic_count_relocs_fixups): Likewise.  Add relaxation
support.
(_frvfdpic_relax_tls_entries): New.
(_frvfdpic_compute_got_alloc_data): Add TLS support.
(_frvfdpic_get_tlsdesc_entry): New.
(_frvfdpic_assign_got_entries): Add TLS support.
(_frvfdpic_assign_plt_entries): Likewise.
(_frvfdpic_reset_got_plt_entries): New.
(_frvfdpic_size_got_plt): Move out of...
(elf32_frvfdpic_size_dynamic_sections): ... here.
(_frvfdpic_relax_got_plt_entries): New.
(elf32_frvfdpic_relax_section): New.
(elf32_frvfdpic_finish_dynamic_sections): Add TLS sanity check.
(elf32_frv_check_relocs): Add TLS support.
(bfd_elf32_bfd_relax_section): Define for FDPIC.
* libbfd.h, bfd-in2.h: Rebuilt.
cpu/ChangeLog:
2004-11-10  Alexandre Oliva  <aoliva@redhat.com>
* frv.cpu: Add support for TLS annotations in loads and calll.
* frv.opc (parse_symbolic_address): New.
(parse_ldd_annotation): New.
(parse_call_annotation): New.
(parse_ld_annotation): New.
(parse_ulo16, parse_uslo16): Use parse_symbolic_address.
Introduce TLS relocations.
(parse_d12, parse_s12, parse_u12): Likewise.
(parse_uhi16): Likewise.  Fix constant checking on 64-bit host.
(parse_call_label, print_at): New.
gas/ChangeLog:
* config/tc-frv.c (md_apply_fix3): Mark TLS symbols as such.
2004-12-10  Alexandre Oliva  <aoliva@redhat.com>
* config/tc-frv.c (frv_pic_ptr): Add tlsmoff support.
2004-11-10  Alexandre Oliva  <aoliva@redhat.com>
* cgen.c (gas_cgen_parse_operand): Handle
CGEN_PARSE_OPERAND_SYMBOLIC.
* config/tc-frv.c (md_cgen_lookup_reloc): Handle TLS relocations.
(frv_force_relocation): Likewise.  Fix handling of PIC
relocations.
(md_apply_fix3): Likewise.
include/elf/ChangeLog:
2004-12-10  Alexandre Oliva  <aoliva@redhat.com>
* frv.h: Add R_FRV_TLSMOFF.
2004-11-10  Alexandre Oliva  <aoliva@redhat.com>
* frv.h: Add TLS relocations.
include/opcode/ChangeLog:
2004-11-10  Alexandre Oliva  <aoliva@redhat.com>
* cgen.h (enum cgen_parse_operand_type): Add
CGEN_PARSE_OPERAND_SYMBOLIC.
ld/testsuite/ChangeLog:
* ld-frv/fdpic.exp: Add -mfdpic to ASFLAGS.
* ld-frv/tls.exp: Likewise.
2004-11-26  Alexandre Oliva  <aoliva@redhat.com>
* ld-frv/tls-3.s: New.
* ld-frv/tls-static-3.d: New.
* ld-frv/tls-dynamic-3.d: New.
* ld-frv/tls-pie-3.d: New.
* ld-frv/tls-shared-3.d: New.
* ld-frv/tls-relax-static-3.d: New.
* ld-frv/tls-relax-dynamic-3.d: New.
* ld-frv/tls-relax-pie-3.d: New.
* ld-frv/tls-relax-shared-3.d: New.
* ld-frv/tls.exp: Run the new tests.
* ld-frv/tls-dynamic-2.d: Adjust for improved relaxation.
* ld-frv/tls-relax-dynamic-2.d: Likewise.
* ld-frv/tls-relax-initial-shared-2.d: Likewise.
2004-11-10  Alexandre Oliva  <aoliva@redhat.com>
* ld-frv/tls-1-dep.s: New.
* ld-frv/tls-1-shared.lds: New.
* ld-frv/tls-1.s: New.
* ld-frv/tls-2.s: New.
* ld-frv/tls-dynamic-1.d: New.
* ld-frv/tls-dynamic-2.d: New.
* ld-frv/tls-initial-shared-2.d: New.
* ld-frv/tls-pie-1.d: New.
* ld-frv/tls-relax-dynamic-1.d: New.
* ld-frv/tls-relax-dynamic-2.d: New.
* ld-frv/tls-relax-initial-shared-2.d: New.
* ld-frv/tls-relax-pie-1.d: New.
* ld-frv/tls-relax-shared-1.d: New.
* ld-frv/tls-relax-shared-2.d: New.
* ld-frv/tls-relax-static-1.d: New.
* ld-frv/tls-shared-1-fail.d: New.
* ld-frv/tls-shared-1.d: New.
* ld-frv/tls-shared-2.d: New.
* ld-frv/tls-static-1.d: New.
* ld-frv/tls.exp: New.
* ld-frv/fdpic-pie-1.d: Adjust for 64-bit host.
* ld-frv/fdpic-pie-2.d: Likewise.
* ld-frv/fdpic-pie-6.d: Likewise.
* ld-frv/fdpic-pie-7.d: Likewise.
* ld-frv/fdpic-pie-8.d: Likewise.
* ld-frv/fdpic-shared-1.d: Likewise.
* ld-frv/fdpic-shared-2.d: Likewise.
* ld-frv/fdpic-shared-3.d: Likewise.
* ld-frv/fdpic-shared-4.d: Likewise.
* ld-frv/fdpic-shared-5.d: Likewise.
* ld-frv/fdpic-shared-6.d: Likewise.
* ld-frv/fdpic-shared-7.d: Likewise.
* ld-frv/fdpic-shared-8.d: Likewise.
* ld-frv/fdpic-shared-local-2.d: Likewise.
* ld-frv/fdpic-shared-local-8.d: Likewise.
* ld-frv/fdpic-static-1.d: Likewise.
* ld-frv/fdpic-static-2.d: Likewise.
* ld-frv/fdpic-static-6.d: Likewise.
* ld-frv/fdpic-static-7.d: Likewise.
* ld-frv/fdpic-static-8.d: Likewise.
opcodes/ChangeLog:
2004-11-10  Alexandre Oliva  <aoliva@redhat.com>
* frv-asm.c: Rebuilt.
* frv-desc.c: Rebuilt.
* frv-desc.h: Rebuilt.
* frv-dis.c: Rebuilt.
* frv-ibld.c: Rebuilt.
* frv-opc.c: Rebuilt.
* frv-opc.h: Rebuilt.
 2005-01-25 20:22:41 +00:00
Andrew Cagney
45181ed16d 2005-01-24 Andrew Cagney <cagney@gnu.org> 
* gettext.m4: Only fall back to ../intl/ when it's present.
 2005-01-24 20:01:09 +00:00
Fred Fish
9e836e3d9d 2005-01-21 Fred Fish <fnf@specifixinc.com> 
* mips-opc.c:  Change INSN_ALIAS to INSN2_ALIAS.
	Change INSN_WRITE_MDMX_ACC to INSN2_WRITE_MDMX_ACC.
	Change INSN_READ_MDMX_ACC to INSN2_READ_MDMX_ACC.
	* mips-dis.c: Ditto.
 2005-01-21 19:43:05 +00:00
Alan Modra
5e8cb02113 * ppc-opc.c (powerpc_opcodes): Add optional 'l' arg to tlbiel. 2005-01-20 06:54:48 +00:00
Fred Fish
986e18a5a9 2005-01-19 Fred Fish <fnf@specifixinc.com> 
* mips-dis.c (no_aliases): New disassembly option flag.
	(set_default_mips_dis_options): Init no_aliases to zero.
	(parse_mips_dis_option): Handle no-aliases option.
	(print_insn_mips): Ignore table entries that are aliases
	if no_aliases is set.
	(print_insn_mips16): Ditto.
	* mips-opc.c (mips_builtin_opcodes): Add initializer column for
	new pinfo2 member and add INSN_ALIAS initializers as needed.  Also
	move WR_MACC and RD_MACC initializers from pinfo to pinfo2.
	* mips16-opc.c (mips16_opcodes): Ditto.
 2005-01-19 23:31:15 +00:00
Nick Clifton
e38bc3b524 Fix SH2A machine variants in order to correctly select instruction inheritance 2005-01-17 14:08:17 +00:00
H.J. Lu
9df48ba9fd 2005-01-12 H.J. Lu <hongjiu.lu@intel.com> 
* i386-dis.c (OP_E): Don't ignore scale in SIB for 64 bit mode.
 2005-01-12 19:40:20 +00:00
H.J. Lu
2033b4b97d gas/testsuite/ 
2005-01-12  H.J. Lu  <hongjiu.lu@intel.com>

	* i386/i386.exp: Run "sib".

	* gas/i386/sib.d: New file.
	* gas/i386/sib.s: Likewise.

opcodes/

2005-01-12  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (OP_E): Ignore scale when index == 0x4 in SIB.
 2005-01-12 19:12:52 +00:00
Andreas Schwab
0bcb06d2f2 binutils/: 
* configure.in: Don't define SKIP_ZEROES.
	* configure: Regenerate.
	* objdump.c (disassemble_data): Set skip_zeroes and
	skip_zeroes_at_end in disasm_info to defaults.
	(DEFAULT_SKIP_ZEROES): Rename from SKIP_ZEROES and always define.
	(DEFAULT_SKIP_ZEROES_AT_END): Rename from SKIP_ZEROES_AT_END and
	always define.
	(disassemble_bytes): Use skip_zeroes and skip_zeroes_at_end from
	objdump_disasm_info.

include/:
	* dis-asm.h (struct disassemble_info): Add skip_zeroes and
	skip_zeroes_at_end.

opcodes/:
	* disassemble.c (disassemble_init_for_target) <case
	bfd_arch_ia64>: Set skip_zeroes to 16.
	<case bfd_arch_tic4x>: Set skip_zeroes to 32.
 2005-01-10 09:54:50 +00:00
Tomer Levi
47add74de7 2004-12-23 Tomer Levi <Tomer.Levi@nsc.com> 
* crx-opc.c: Mark 'bcop' instruction as RELAXABLE.
 2004-12-23 13:52:11 +00:00
Svein Seldal
73f643e98f Added printing of symbols on AVR disasm 2004-12-14 22:30:28 +00:00
Svein Seldal
246f4c05fd Added printing of symbols on AVR disasm 2004-12-14 22:27:05 +00:00
Tomer Levi
0e1200e593 2004-12-05 Tomer Levi <Tomer.Levi@nsc.com> 
* crx-dis.c (print_arg): Use 'info->print_address_func' for address printing.
 2004-12-05 12:29:04 +00:00
Tomer Levi
12855a3654 2004-12-05 Tomer Levi <Tomer.Levi@nsc.com> 
* crx-dis.c: Use 'info->print_address_func' for address printing.
 2004-12-05 12:26:49 +00:00
Tomer Levi
89a649f7ae 2004-11-29 Tomer Levi <Tomer.Levi@nsc.com> 
* crx-opc.c (crx_optab): Mark all rbase_disps* operands as signed.
	(no_op_insn): Initialize array with instructions that have no
	operands.
	* crx-dis.c (make_instruction): Get rid of COP_BRANCH_INS operand swapping.
 2004-11-29 16:34:35 +00:00