Commit Graph

2093 Commits

Author SHA1 Message Date
Stephane Carrez 5f1864472a Missing Makefile.in for 68hc11 simulator 2000-09-12 18:55:37 +00:00
Stephane Carrez 9830501b31 Remove soft reg hack in the 68hc11 simulator 2000-09-10 14:05:29 +00:00
Stephane Carrez a8afa79ab6 Fix clearing of interrupts in 68hc11 simulator 2000-09-10 12:58:53 +00:00
Stephane Carrez 2990a9f484 * sim-main.h: Define cycle_to_string.
* dv-m68hc11tim.c (cycle_to_string): New function to translate
	the cpu cycle into some formatted time string.
	(m68hc11tim_print_timer): Use it.
	* dv-m68hc11sio.c (m68hc11sio_info): Use cycle_to_string.
	* dv-m68hc11spi.c (m68hc11spi_info): Likewise.
	* interrupts.c (interrupts_info): Likewise.
	* m68hc11_sim.c (cpu_info): Likewise.
2000-09-09 21:00:39 +00:00
Stephane Carrez 401493c8d9 Fix 68hc11 timer device (accuracy, io, timer overflow) 2000-09-06 19:33:12 +00:00
Stephane Carrez 4d72d17a49 Fix 68HC11 SPI simulator 2000-09-05 20:49:46 +00:00
Dave Brolley de8f5985d0 2000-08-28 Dave Brolley <brolley@redhat.com>
* Makefile.in: Use of @true confuses VPATH. Remove it.
	* cpu.h: Regenerated.
	* cpux.h: Regenerated.
	* decode.c: Regenerated.
	* decodex.c: Regenerated.
	* model.c: Regenerated.
	* modelx.c: Regenerated.
	* sem-switch.c: Regenerated.
	* sem.c: Regenerated.
	* semx-switch.c: Regenerated.
2000-08-28 18:20:30 +00:00
Dave Brolley e5c590294e 2000-08-28 Dave Brolley <brolley@redhat.com>
* cpu.h: Regenerated.
	* decode.c: Regenerated.
2000-08-28 18:19:41 +00:00
Dave Brolley 0e266e5cc5 2000-08-28 Dave Brolley <brolley@redhat.com>
* cgen-trace.c (sim_cgen_disassemble_insn): Make sure entire insn is
	in insn_value if it will fit.
2000-08-28 18:18:49 +00:00
Dave Brolley 4193618c3c Forgot to check this in with last commit! 2000-08-22 19:27:32 +00:00
Frank Ch. Eigler 604259a086 * Contribute CGEN simulator build support code.
* Patch was posted by bje@redhat.com.
2000-08-21 15:52:39 +00:00
Dave Brolley 80dbae7a49 2000-08-15 Dave Brolley <brolley@redhat.com>
* sim-profile.c (profile_print_speed): Print cpu frequency if not zero.
2000-08-15 18:49:50 +00:00
Dave Brolley 090321281b 2000-08-15 Dave Brolley <brolley@redhat.com>
* sim-profile.h (PROFILE_DATA): Add cpu_freq.
	(PROFILE_CPU_FREQ): New macro.
	* sim-profile.c (OPTION_PROFILE_CPU_FREQUENCY): New enumerator.
	(profile-options): Add profile-cpu-frequency.
	(parse_frequency): New function.
	(profile_option_handler): Handle OPTION_PROFILE_CPU_FREQUENCY.
	(profile_print_speed): Print cpu frequency and simulated execution time.
	Re-indent other items to match.
2000-08-15 18:39:02 +00:00
Nick Clifton 4bc1de7b2d Compute write back value for post increment loads before
performing the load in case the offset register is overwritten.
2000-08-15 00:10:52 +00:00
Stephane Carrez 63348d048f Use address mapping levels for 68hc11 simulator (kill overlap hack) 2000-08-11 18:44:59 +00:00
Kazu Hirata 6d02850247 2000-08-10 Kazu Hirata <kazu@hxi.com>
* compile.c (decode): Clean up the code.
2000-08-11 02:03:02 +00:00
Andrew Cagney 548a3e15c8 Eliminate use of MIN(). 2000-08-11 00:48:51 +00:00
Alexandre Oliva 5425ca992e * am33.igen: Warning clean-up.
(movm): Initialize PC and mask.
(mov, movbu, movhu): Set srcreg2 from RI0.
(bsch): Initialize c.
(sat16_cmp): Actually do the comparison.
(mov_llt): Do not overwrite dstreg with uninitialized variable.
2000-08-09 18:42:04 +00:00
Frank Ch. Eigler fab307a2bc * Usability improvement
2000-07-27  Frank Ch. Eigler  <fche@redhat.com>

	From Maciej W. Rozycki <macro@ds2.pg.gda.pl>
	* Makefile.in (install): Install run.1 man page.
2000-07-27 15:45:20 +00:00
Andrew Cagney 071da00250 Don't clean *.igen. 2000-07-27 12:03:19 +00:00
Andrew Cagney 46a19b74dd 2000-06-23 Doug Evans <dje@casey.transmeta.com>
* Makefile.in (headers,nltvals.def): Merge.
2000-07-27 11:56:34 +00:00
Andrew Cagney f9cbceb6b7 2000-06-25 Stephane Carrez <Stephane.Carrez@worldnet.fr>
* nrun.c (main): Print the simulator statistics only in
        verbose mode.
        * hw-properties.h (hw_find_integer_array_property): Fix
        prototype (use signed_cell).
2000-07-27 11:49:07 +00:00
Andrew Cagney 38e64f358e 2000-06-25 Stephane Carrez <Stephane.Carrez@worldnet.fr>
* sim-events.c (sim_events_remain_time): New function returning
        the time that remains before the event is raised.
        * hw-events.c (hw_event_remain_time): Likewise.
        * sim-events.h (sim_events_remain_time): Declare.
        * hw-events.h (hw_event_remain_time): Declare.
2000-07-27 11:37:34 +00:00
Andrew Cagney 0802cc4008 2000-06-25 Stephane Carrez <Stephane.Carrez@worldnet.fr>
* sim-hw.c: Use <errno.h> instead of <sys/errno.h>
        (OPTION_HW_LIST): New option --hw-list to list the devices.
        (hw_option_handler): List the device tree with 'sim_hw_print'.
2000-07-27 11:34:30 +00:00
Andrew Cagney 5d031c16b8 Add m68hc11 configry. 2000-07-27 11:29:14 +00:00
Andrew Cagney e0709f5044 New simulator. 2000-07-27 11:23:39 +00:00
Andrew Cagney 3c765a5497 From 2000-06-25 Stephane Carrez <Stephane.Carrez@worldnet.fr>:
* sim-bits.h (_MSB_16, _LSB_16): Define for 16-bit targets.
(MASK, LSBIT, MSBIT): Likewise and use _MSB_16 and _LSB_16.
(EXTENDED): Define for 16-bit word size.
* sim-bits.c (LSEXTRACTED, MSEXTRACTED, LSINSERTED,
MSINSERTED, LSSEXT, MSSEXT): Implement for 16-bit word size.
* sim-types.h: Added support for 16-bit targets.
2000-07-27 11:07:01 +00:00
Andrew Cagney 0a17cd5944 * compile.c (decode): Distinguish inc/dec.[wl] and adds/subs
correctly.
2000-07-27 09:39:50 +00:00
Andrew Cagney a28c02cd2b * m16.igen (break): Call SignalException not sim_engine_halt. 2000-07-20 00:02:22 +00:00
Fernando Nasser 0a4321b903 2000-07-14 Fernando Nasser <fnasser@cygnus.com>
* wrapper.c (sim_create_inferior): Fix typo in the previous patch.
2000-07-14 21:27:15 +00:00
Fernando Nasser 64a1067567 2000-07-14 Fernando Nasser <fnasser@cygnus.com>
* wrapper.c (sim_create_inferior): Reset mode to ARM when creating a
        new inferior.
2000-07-14 16:49:46 +00:00
Nick Clifton 0dbdd75378 Change minimum loop size limit to 0x10 (103792) 2000-07-05 21:40:11 +00:00
Alexandre Oliva ae3c7619e1 * armvirt.c (ABORTS): Do not define. 2000-07-04 08:00:19 +00:00
Alexandre Oliva 1e6b544a97 * armdefs.h (struct ARMul_State): Add is_StrongARM.
(ARM_Strong_Prop, STRONGARM): Define.
* arminit.c (ARMul_NewState): Reset is_StrongARM.
(ARMul_SelectProcessor): Set is_StrongARM.
* wrapper.c (sim_create_inferior): Use bfd machine type to
determine processor type to emulate.
* armemu.h (BUSUSEDINCPCS, BUSUSEDINCPCN): Don't increment PC
when emulating StrongARM.
2000-07-04 07:18:18 +00:00
Alexandre Oliva 66210567f0 * armemu.c (ARMul_Emulate, t_undefined): Proceed to next insn. 2000-07-04 06:54:48 +00:00
Alexandre Oliva e063aa3bd8 * armemu.h (INSN_SIZE): New macro.
(SET_ABORT): Save CPSR in SPSR and set LR.
* armemu.c (ARMul_Emulate, isize): Set to INSN_SIZE.
(WriteR15, WriteSR15): Do not discard bit 1 in Thumb mode.
* arminit.c (ARMul_Abort): Use new SETABORT and INSN_SIZE.
2000-07-04 06:52:30 +00:00
Alexandre Oliva 13b6dd6f68 * armemu.c (LoadSMult): Use WriteR15() to discard the least
significant bits of PC.
2000-07-04 06:39:39 +00:00
Alexandre Oliva 892c6b9d8f * armemu.h (WRITEDESTB): New macro.
* armemu.c (ARMul_Emulate26, bl): Use WriteR15Branch() to
modify PC.  Moved the existing logic...
(WriteR15Branch): ... here.  New function.
(WriteR15, WriteSR15): Drop the two least significant bits.
(LoadSMult): Use WriteR15Branch() to modify PC.
(LoadMult): Use WRITEDESTB() instead of WRITEDEST().
2000-07-04 06:35:36 +00:00
Alexandre Oliva cf52c765b0 * armemu.h (GETSPSR): Call ARMul_GetSPSR().
* armsupp.c (ARMul_CPSRAltered): Zero out bits as they're
extracted from state->Cpsr, but preserve the unused bits.
(ARMul_GetCPSR): Get bits preserved in state->Cpsr.
(ARMul_GetSPSR, ARMul_FixCPSR): Use ARMul_GetCPSR() to
get the full CPSR word.
2000-07-04 06:19:29 +00:00
Alexandre Oliva 4ef2594f4e * armemu.h (PSR_FBITS, PSR_SBITS, PSR_XBITS, PSR_CBITS): New.
(SETPSR_F, SETPSR_S, SETPSR_X, SETPSR_C): New macros.
(SETPSR, SET_INTMODE, SETCC): Removed.
* armsupp.c (ARMul_FixCPSR, ARMul_FixSPSR): Do not test bit
mask.  Use SETPSR_* to modify PSR.
(ARMul_SetCPSR): Load all bits from value.
* armemu.c (ARMul_Emulate, msr): Do not test bit mask.
2000-07-04 06:06:30 +00:00
Alexandre Oliva e62263b8ec * armemu.c (ARMul_Emulate): Compute writeback value before
loading, since the offset register may be the destination
register.
2000-07-04 05:30:43 +00:00
Alexandre Oliva b0eae074ca * armdefs.h (SYSTEMBANK): Define as USERBANK.
* armsupp.c (ARMul_SwitchMode): Remove SYSTEMBANK cases.
2000-07-04 05:16:20 +00:00
Andrew Cagney 6c29acca43 TIc80 simulator. 2000-07-04 05:00:54 +00:00
Andrew Cagney 80ee11fa0e Fix MOVN.fmt and MOVZ.fmt, need to test GPR[RT]. 2000-07-04 02:32:58 +00:00
Frank Ch. Eigler 7fb283bce2 * verbosity reduction
2000-06-23  Frank Ch. Eigler  <fche@redhat.com>

	* cgen-trace.h (TRACE_USEFUL_MASK): Remove TRACE_EVENTS_IDX.
2000-06-24 14:47:54 +00:00
Frank Ch. Eigler ab42ee127d * build cleanliness fix
2000-06-24  Frank Ch. Eigler  <fche@redhat.com>

	From Maciej W. Rozycki <macro@ds2.pg.gda.pl>:
	* Makefile.in (distclean): Clean cconfig.h also.
2000-06-24 14:37:57 +00:00
Andrew Cagney 673388c077 Fix printf arguments. 2000-06-23 12:39:41 +00:00
Alexandre Oliva f9c22bc3a4 * armemu.c (Multiply64): Fix computation of flag N. 2000-06-22 20:42:34 +00:00
Alexandre Oliva ee9a777240 * armemu.c (MultiplyAdd64): Fix computation of flag N. 2000-06-22 20:03:32 +00:00
Frank Ch. Eigler 97ee9e5aa9 * build fix
2000-06-20  Frank Ch. Eigler  <fche@redhat.com>

	* compile.c: Don't include "wait.h".
	(sim_resume): Use local SIM_WIFEXITED and SIM_WIFSIGNALED macros
	instead of WIF* from host.
2000-06-20 21:12:33 +00:00