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563 Commits

Author SHA1 Message Date
Doug Evans 37130f1153 * dvp-dis.c, dvp-opc.c: New files. 
* configure.in: Compile them if bfd_dvp_arch, as well as mips.
	* configure: Regenerate.
	* Makefile.am (ALL_MACHINES): Add dvp-{dis,opc}.lo.
	(dvp-dis.lo,dvp-opc.lo): Add rules for.
	(mips-dis.lo): Compile with @archdefs@.
	* Makefile.in: Regenerate.
	* disassemble.c: Define ARCH_mips ifdef ARCH_dvp.
	* mips-dis.c (print_insn_little_mips): Check for DVP insns.
plus delete old txvu stuff
 1998-01-28 21:58:23 +00:00
Nick Clifton 397b3a9d72 Report combined alignment and size overflow errors. 1998-01-28 17:59:52 +00:00
Jeff Law 83af233519 * mips-dis.c (_print_insn_mips): Set target_processor as appropriate. 
Only recognize instructions for the current target_processor.
 1998-01-28 04:51:22 +00:00
Doug Evans f006120d1d * txvu-dis.c (*): Update to use new arguments in 
parse/insert/extract/print fns.
	* txvu-opc.c (*): Likewise.
 1998-01-27 22:11:55 +00:00
Doug Evans 7b5c32cfa1 (lookup_keyword_{value,name}): New functions. 
(scan_symbol): New function.
	(issymchar,SKIP_BLANKS): New macros.
Plus more dma/gpuif support code.
 1998-01-27 02:58:45 +00:00
Doug Evans f31e207296 * txvu-dis.c (print_insn): Extract/print fns take pointer to 
insn now and not insn itself.
	* txvu-opc.c: insert/extract/print fns take pointer to
	insn now and not insn itself.  Add initial dma,pke,gpuif support.
	Parse fn no longer needs to set errmsg = NULL for success.
 1998-01-27 00:27:54 +00:00
Doug Evans 42e6567657 * txvu-opc.c: 
(parse_dest1,insert_luimm12up6): New functions.
	(txvu_operands): New operands LUIMM12UP6, LDEST1.
	(txvu_lower_opcodes): Clean up pass over table.
	(parse_dotdest1): Fix dest calculation.
	(_parse_sdest): Fix typo.
 1998-01-24 02:47:35 +00:00
Doug Evans d1128f738f * txvu-opc.c (txvu_operands, UBC): Add extract entry. 
(txvu_operands, UACCDEST): Not a fake operand.
	(txvu_operands, UXYZ): Move parse entry to insert entry.
	(txvu_operands, LVI01): Not a fake operand.
	(txvu_upper_opcodes): Fix spelling of minii instruction.
	(printf_vfreg): Print register number with "%02ld".
	(print_bcftreg): Likewise.
	(print_accdest): Pass `dest' to _print_dest.
	(insert_xyz): Renamed from parse_xyz.
 1998-01-23 10:06:43 +00:00
Fred Fish fcd533e09e * d10v-dis.c (PC_MASK): Correct value. 
(print_operand): If there's a reloc, don't calculate the
 	address because they could be in different sections.
 1998-01-23 02:36:05 +00:00
Doug Evans 3b7029b185 * cgen.sh: Rewrite to be like simulator's version. 
* Makefile.am (cgen): Update call to cgen.sh.
	* Makefile.in: Regenerate
 1998-01-23 00:22:56 +00:00
Jim Blandy 88d4055cac *** empty log message *** 1998-01-19 20:28:36 +00:00
Doug Evans 853713a768 backout m32rx stuff, not ready to be checked in 1998-01-16 00:26:51 +00:00
Nick Clifton 0d0bb9140b Only look for two parallel instructions when we are at a 32 bit boundary 1998-01-15 18:35:08 +00:00
Nick Clifton 6bbfec6cda generated file imported from cgen 1998-01-15 01:59:10 +00:00
Nick Clifton 23cf992f4a Support for disassembling parallel instructions added. 
Insn attributes hand patched until cgen can generate the correct values.
 1998-01-15 01:48:51 +00:00
Jeff Law b898fc0a3c * mips-opc.c (c.lt.s): Add r5900 variant. 
(c.le.s): Likewise.
pr14594.
 1998-01-13 16:21:45 +00:00
Doug Evans bfc10abe47 * Makefile.am: Add cgen support. 
* Makefile.in: Regenerate.
	* configure.in: Add cgen support.
	* configure: Regenerate.
	* aclocal.m4: Regenerate.
	* cgen.sh, cgen-asm.in, cgen-dis.in: New files.
 1998-01-13 01:37:20 +00:00
Doug Evans c062b1036f * cgen-asm.c (build_asm_hash_table): Traverse compiled in table using 
table provided entry size.  Use CGEN_INSN_MNEMONIC.
	(cgen_parse_keyword): Rewrite.
	* cgen-dis.c (build_dis_hash_table): Traverse compiled in table using
	table provided entry size.  Use CGEN_INSN_MASK_BITSIZE.
	* cgen-opc.c: Clean up pass over `struct foo' usage.
	(cgen_keyword_lookup_value): Handle "" entry.
	(cgen_keyword_add): Likewise.
 1998-01-13 01:36:05 +00:00
Doug Evans 42639e838c * txvu-dis.c (print_insn_txvu): Handle no separator between 
upper and lower insn #ifndef VERTICAL_BAR_SEPARATOR.
 1998-01-06 13:09:00 +00:00
Doug Evans 54cc8ed4db * txvu-dis.c, txvu-opc.c: New files. 
* configure.in: Compile them.
	* configure: Regenerate.
	* Makefile.am (ALL_MACHINES): Add txvu-{dis,opc}.lo.
	(txvu-dis.lo,txvu-opc.lo): Add rules for.
	* Makefile.in: Regenerate.
 1998-01-05 13:46:22 +00:00
Doug Evans 80c396f6cd * configure.in: Add txvu support. 
* configure: Regenerate.
	* disassemble.c: Add txvu support.
 1997-12-22 17:22:11 +00:00
Ian Lance Taylor e3d2cd9f37 * mips-opc.c: Add FP_D to s.d instruction flags. 1997-12-22 09:37:47 +00:00
Fred Fish 47d1c515b0 * tic80-opc.c (tic80_opcodes): Revert change that put the 32 bit 
PC relative offset forms before the 15 bit forms.  An assembler command
	line option now chooses the default.
PR 12927
 1997-12-16 20:01:50 +00:00
Brendan Kehoe f07263913a note that the fix for --enable-shared is not the real way it needs to 
be done; libtool.m4 needs a change of some sort instead
 1997-12-16 16:16:41 +00:00
Jeff Law 0379d9b25c * mips-opc.c: Add many missing r5900 instructions. 1997-12-16 13:32:20 +00:00
Michael Meissner 8f75a0e668 fix tab problem 1997-12-16 12:25:52 +00:00
Michael Meissner 3e367092df Set new d30v opcode flag bits in appropriate instructions. 1997-12-16 12:25:07 +00:00
Brendan Kehoe 6870e2f5e6 * configure: Only build libopcodes shared if --enable-shared's value 
was `yes', or was set to `*opcodes*'.
        * aclocal.m4: Likewise.


so `--enable-shared=libstdc++' doesn't result in building a shared libopcodes

only an interim fix, this is the incorrect formal approach since alocal.m4
itself is generated via what's in devo/libtool/libtool.m4; we need to find
a way to have that somehow hold the real fix.
 1997-12-15 19:59:12 +00:00
Jeff Law 91866cc9be * mips-opc.c (mtpc, mfpc, mtps, mfps): Add r5900 variants. 
Also move 'P' handling out of vr5400 sanitized code so it can be used
on r5900 too.
 1997-12-15 19:43:04 +00:00
Fred Fish c2a45746f8 * tic80-opc.c (OFF_SL_PC, OFF_SL_BR): Minor formatting change. 
(tic80_opcodes): Reorder table entries to put the 32 bit PC relative
      offset forms before the 15 bit forms, to default to the long forms.
PR 12927
 1997-12-13 00:54:33 +00:00
Nick Clifton cd66558c07 Renamed v850eq -> v850ea 1997-12-12 19:05:07 +00:00
Richard Henderson 0483568a24 * alpha-opc.c (cvttq/*u*): Remove, as that suffix is invalid. 1997-12-12 09:34:04 +00:00
Felix Lee 06434f5f16 sanitization fixes. (files not mentioned, fences misspelled) 1997-12-11 04:18:47 +00:00
Andrew Cagney c10ae9ad33 Test/fix d10v RTE instruction. 1997-12-09 05:46:48 +00:00
Nick Clifton 0c4f6dc21a Removed disasm_symaddr() function and switched detection of Arm vs Thumb 
mode over to state of info->symbol, ala the MIPS port.
 1997-12-08 19:26:40 +00:00
Nick Clifton c08a4e6be3 Add support for displaying disassembled Thumb instrucitons. 1997-12-02 18:20:31 +00:00
Nick Clifton 3c8e082494 Display nop pseudo ops alongside equivalent disassembly. 1997-12-02 17:56:03 +00:00
Ian Lance Taylor 1f3880e1f0 Mon Dec 1 12:25:57 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de> 
* m68k-opc.c (btst): Change Dd@s to Dd;b.

	* m68k-dis.c (print_insn_arg): Recognize 'm', 'n', 'o', 'p', 'q',
	and 'v' as operand types.
 1997-12-01 17:34:36 +00:00
Ian Lance Taylor 4df3dd02c1 * m68k-opc.c: Add argument for lpstop. From Olivier Carmona 
<olivier.carmona@di.epfl.ch>.
	* m68k-dis.c (print_insn_m68k): Handle special case of lpstop,
	which has a two word opcode with a one word argument.
 1997-12-01 17:05:40 +00:00
Richard Henderson 04b26b0008 * sh-dis.c (print_insn_shx): Recognize all sh4 additions. 
* sh-opc.h (fmov): Add @<REG_M>+,<DX_REG_N> variant for sh4.
        (ftrv): Slay the cut-and-paste monster.

        * tc-sh.c (parse_reg): Properly quote for fv4.

pr14044
 1997-11-20 22:01:30 +00:00
Joern Rennecke 74f79ec566 * d10v-dis.c (print_operand): 
Split OPERAND_FLAG into OPERAND_FFLAG and OPERAND_CFLAG.
Addendum for PR 13985.
 1997-11-18 23:34:55 +00:00
Joern Rennecke fe00b2ed0f * include/opcode/d10v.h (OPERAND_FLAG): Split into: 
(OPERAND_FFLAG, OPERAND_CFLAG) .
	* opcodes/d10v-opc.c (OPERAND_FLAG): Split into:
	(OPERAND_FFLAG, OPERAND_CFLAG) .
	(FSRC): Split into:
	(FFSRC, CFSRC).
	* gas/config/tc-d10v.c (parallel_ok, find_opcode):
	Split OPERAND_FLAG into OPERAND_FFLAG and OPERAND_CFLAG.
Fix for PR 13985.
 1997-11-18 19:41:44 +00:00
Gavin Romig-Koch cfcbe03ff7 mips-opc.c (sync,cache): These are 3900 insns. 1997-11-12 15:18:56 +00:00
Joern Rennecke 3c7ad09f36 sh-opc.h (sh_table): Remove ftst/nan. 
Fixes gcc/13330.
 1997-11-12 00:02:37 +00:00
Ken Raeburn cfca14e759 make vr5400 disassembly work; fix bugs in some vr5400 insns 1997-11-03 18:28:35 +00:00
Gavin Romig-Koch 0cca41d47a * mips-opc.c (deret,dmult,dmultu,madd,maddu,pref,sdbbp): 
Add tx49 insns and configury.
 1997-10-29 20:33:43 +00:00
Ken Raeburn a0539c6102 * mips-opc.c (ffc, ffs): Fix mask. 1997-10-28 23:03:12 +00:00
Michael Meissner 8357d96073 Add eit_vb, int_s, and int_m control registers 1997-10-28 21:36:04 +00:00
Ken Raeburn a3066d9ac8 Duh. Check in the vr5400 stuff from the directory that doesn't have 
it sanitized out this time...
 1997-10-28 03:44:27 +00:00
Ken Raeburn 581c03af3e added vr5400 stuff, fixed "not" mask 1997-10-28 03:42:29 +00:00