* All CGEN-generated sources: Regenerate.
Contribute the following changes:
2005-09-19 Dave Brolley <brolley@redhat.com>
* disassemble.c (disassemble_init_for_target): Add 'break' to case for
bfd_arch_tic4x. Use cgen_bitset_create and cgen_bitset_set for
bfd_arch_m32c case.
2005-02-16 Dave Brolley <brolley@redhat.com>
* cgen-dis.in: Rename CGEN_ISA_MASK to CGEN_BITSET. Rename
cgen_isa_mask_* to cgen_bitset_*.
* cgen-opc.c: Likewise.
2003-11-28 Richard Sandiford <rsandifo@redhat.com>
* cgen-dis.in (print_insn_@arch@): Fix comparison with cached isas.
* *-dis.c: Regenerate.
2003-06-05 DJ Delorie <dj@redhat.com>
* cgen-dis.in (print_insn_@arch@): Copy prev_isas, don't assign
it, as it may point to a reused buffer. Set prev_isas when we
change cpus.
2002-12-13 Dave Brolley <brolley@redhat.com>
* cgen-opc.c (cgen_isa_mask_create): New support function for
CGEN_ISA_MASK.
(cgen_isa_mask_init): Ditto.
(cgen_isa_mask_clear): Ditto.
(cgen_isa_mask_add): Ditto.
(cgen_isa_mask_set): Ditto.
(cgen_isa_supported): Ditto.
(cgen_isa_mask_compare): Ditto.
(cgen_isa_mask_intersection): Ditto.
(cgen_isa_mask_copy): Ditto.
(cgen_isa_mask_combine): Ditto.
* cgen-dis.in (libiberty.h): #include it.
(isas): Renamed from 'isa' and now (CGEN_ISA_MASK *).
(print_insn_@arch@): Use CGEN_ISA_MASK and support functions.
* Makefile.am (CGENDEPS): Add utils-cgen.scm and attrs.scm.
* Makefile.in: Regenerated.
2005-10-24 Jan Beulich <jbeulich@novell.com>
* ia64.h (enum ia64_opnd): Move memory operand out of set of
indirect operands.
bfd/
2005-10-24 Jan Beulich <jbeulich@novell.com>
* cpu-ia64-opc.c (elf64_ia64_operands): Move memory operand out of
set of indirect operands.
gas/
2005-10-24 Jan Beulich <jbeulich@novell.com>
* config/tc-ia64.c (enum reg_symbol): Delete IND_MEM.
(dot_rot): Change type of num_* variables. Check for positive count.
(ia64_optimize_expr): Re-structure.
(md_operand): Check for general register.
gas/testsuite/
2005-10-24 Jan Beulich <jbeulich@novell.com>
* gas/ia64/index.[sl]: New.
* gas/ia64/rotX.[sl]: New.
* gas/ia64/ia64.exp: Run new tests.
opcodes/
2005-10-24 Jan Beulich <jbeulich@novell.com>
* ia64-asmtab.c: Regenerate.
2005-09-28 Jan Beulich <jbeulich@novell.com>
* gas/i386/x86-64-stack.s, gas/i386/x86-64-stack.d,
gas/i386/x86-64-stack-suffix.d, gas/i386/x86-64-stack-intel.d: New.
* gas/i386/i386.exp: Run new tests.
ld/testsuite/
2005-09-28 Jan Beulich <jbeulich@novell.com>
* ld-x86-64/tlspic.dd: Adjust.
opcodes/
2005-09-28 Jan Beulich <jbeulich@novell.com>
* i386-dis.c (stack_v_mode): Renamed from branch_v_mode.
(indirEv): Use it.
(stackEv): New.
(Ob64, Ov64): Rename to Ob, Ov. Delete unused original definitions.
(dis386): Document and use new 'V' meta character. Use it for
single-byte push/pop opcode forms. Use stackEv for mod-r/m push/pop
opcode forms. Correct typo in 'pop ss'. Replace Ob64/Ov64 by Ob/Ov.
(putop): 'q' suffix for 'T' and 'U' meta depends on DFLAG. Mark
data prefix as used whenever DFLAG was examined. Handle 'V'.
(intel_operand_size): Use stack_v_mode.
(OP_E): Use stack_v_mode, but handle only the special case of
64-bit mode without operand size override here; fall through to
v_mode case otherwise.
(OP_REG): Special case rAX_reg ... rDI_reg only when 64-bit mode
and no operand size override is present.
(OP_J): Use get32s for obtaining the displacement also when rex64
is present.
(mips_builtin_opcodes): Move "bc0f", "bc0fl", "bc0t", "bc0tl" to the
bottom to avoid opcode collision with "mftr" and "mttr".
Add MT instructions.
* mips-dis.c (mips_arch_choices): Enable INSN_MT for mips32r2.
(print_insn_args): Add supports for +t, +T, !, $, *, &, g operand
formats.
bfd/
* libbdf.h: Regenerate.
* bfd-in2.h: Regenerate.
* reloc.c: Add BFD_RELOC_ARM_T32_CP_OFF_IMM and
BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
gas/
* config/tc-arm.c (encode_arm_cp_address): Use
BFD_RELOC_ARM_T32_CP_OFF_IMM in thumb mode.
(do_iwmmxt_wldstbh): Use BFD_RELOC_ARM_T32_CP_OFF_IMM_S2 in thumb
mode.
(md_assemble): Only allow coprocessor instructions when Thumb-2 is
available.
(cCE, cC3): Define.
(insns): Use them for coprocessor instructions.
(md_pcrel_from_section): Handle BFD_RELOC_ARM_T32_CP_OFF_IMM.
(get_thumb32_insn): New function.
(put_thumb32_insn): New function.
(md_apply_fix): Handle BFD_RELOC_ARM_T32_CP_OFF_IMM and
BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
gas/testsuite/
* gas/arm/vfp-bad_t2.d, gas/arm/vfp-bad_t2.l, arm/vfp-bad_t2.s,
gas/arm/vfp1_t2.d, gas/arm/vfp1_t2.s, gas/arm/vfp1xD_t2.d,
gas/arm/vfp1xD_t2.s, gas/arm/vfp2_t2.d, gas/arm/vfp2_t2.s): New files.
opcodes/
* arm-dis.c (coprocessor_opcodes): New.
(arm_opcodes, thumb32_opcodes): Remove coprocessor insns.
(print_insn_coprocessor): New function.
(print_insn_arm): Use print_insn_coprocessor. Remove coprocessor
format characters.
(print_insn_thumb32): Use print_insn_coprocessor.
2005-08-26 Jan Beulich <jbeulich@novell.com>
* i386-dis.c (intel_operand_size): New, broken out from OP_E for
re-use.
(OP_E): Call intel_operand_size, move call site out of mode
dependent code.
(OP_OFF): Call intel_operand_size if suffix_always. Remove
ATTRIBUTE_UNUSED from parameters.
(OP_OFF64): Likewise.
(OP_ESreg): Call intel_operand_size.
(OP_DSreg): Likewise.
(OP_DIR): Use colon rather than semicolon as separator of far
jump/call operands.
gas/testsuite/
2005-08-26 Jan Beulich <jbeulich@novell.com>
* gas/i386/intelok.d: Adjust.
* s390-mkopc.c (s390_opcode_cpu_val): Add support for cpu type z9-109.
(main): Likewise.
* s390-opc.c (I32_16, U32_16, M_16): Add defines 32 bit immediates
and 4 bit optional masks.
(INSTR_RIL_RI, INSTR_RIL_RU, INSTR_RRF_M0RR, INSTR_RSE_CCRD,
INSTR_RSY_CCRD, INSTR_SSF_RRDRD): Add new instruction formats.
(MASK_RIL_RI, MASK_RIL_RU, MASK_RRF_M0RR, MASK_RSE_CCRD,
MASK_RSY_CCRD, MASK_SSF_RRDRD): Likewise.
(s390_opformats): Likewise.
* s390-opc.txt: Add new instructions for cpu type z9-109.
