Commit Graph

149 Commits

Author SHA1 Message Date
Nobody ae2c13e275 Binutils 2.35 with MCST patches 2022-08-11 20:17:07 +03:00
Alan Modra b3adc24a07 Update year range in copyright notice of binutils files 2020-01-01 18:42:54 +10:30
Alan Modra fd3619828e bfd_section_* macros
This large patch removes the unnecessary bfd parameter from various
bfd section macros and functions.  The bfd is hardly ever used and if
needed for the bfd_set_section_* or bfd_rename_section functions can
be found via section->owner except for the com, und, abs, and ind
std_section special sections.  Those sections shouldn't be modified
anyway.

The patch also removes various bfd_get_section_<field> macros,
replacing their use with bfd_section_<field>, and adds
bfd_set_section_lma.  I've also fixed a minor bug in gas where
compressed section renaming was done directly rather than calling
bfd_rename_section.  This would have broken bfd_get_section_by_name
and similar functions, but that hardly mattered at such a late stage
in gas processing.

bfd/
	* bfd-in.h (bfd_get_section_name, bfd_get_section_vma),
	(bfd_get_section_lma, bfd_get_section_alignment),
	(bfd_get_section_size, bfd_get_section_flags),
	(bfd_get_section_userdata): Delete.
	(bfd_section_name, bfd_section_size, bfd_section_vma),
	(bfd_section_lma, bfd_section_alignment): Lose bfd parameter.
	(bfd_section_flags, bfd_section_userdata): New.
	(bfd_is_com_section): Rename parameter.
	* section.c (bfd_set_section_userdata, bfd_set_section_vma),
	(bfd_set_section_alignment, bfd_set_section_flags, bfd_rename_section),
	(bfd_set_section_size): Delete bfd parameter, rename section parameter.
	(bfd_set_section_lma): New.
	* bfd-in2.h: Regenerate.
	* mach-o.c (bfd_mach_o_init_section_from_mach_o): Delete bfd param,
	update callers.
	* aoutx.h, * bfd.c, * coff-alpha.c, * coff-arm.c, * coff-mips.c,
	* coff64-rs6000.c, * coffcode.h, * coffgen.c, * cofflink.c,
	* compress.c, * ecoff.c, * elf-eh-frame.c, * elf-hppa.h,
	* elf-ifunc.c, * elf-m10200.c, * elf-m10300.c, * elf-properties.c,
	* elf-s390-common.c, * elf-vxworks.c, * elf.c, * elf32-arc.c,
	* elf32-arm.c, * elf32-avr.c, * elf32-bfin.c, * elf32-cr16.c,
	* elf32-cr16c.c, * elf32-cris.c, * elf32-crx.c, * elf32-csky.c,
	* elf32-d10v.c, * elf32-epiphany.c, * elf32-fr30.c, * elf32-frv.c,
	* elf32-ft32.c, * elf32-h8300.c, * elf32-hppa.c, * elf32-i386.c,
	* elf32-ip2k.c, * elf32-iq2000.c, * elf32-lm32.c, * elf32-m32c.c,
	* elf32-m32r.c, * elf32-m68hc1x.c, * elf32-m68k.c, * elf32-mcore.c,
	* elf32-mep.c, * elf32-metag.c, * elf32-microblaze.c,
	* elf32-moxie.c, * elf32-msp430.c, * elf32-mt.c, * elf32-nds32.c,
	* elf32-nios2.c, * elf32-or1k.c, * elf32-ppc.c, * elf32-pru.c,
	* elf32-rl78.c, * elf32-rx.c, * elf32-s390.c, * elf32-score.c,
	* elf32-score7.c, * elf32-sh.c, * elf32-spu.c, * elf32-tic6x.c,
	* elf32-tilepro.c, * elf32-v850.c, * elf32-vax.c, * elf32-visium.c,
	* elf32-xstormy16.c, * elf32-xtensa.c, * elf64-alpha.c,
	* elf64-bpf.c, * elf64-hppa.c, * elf64-ia64-vms.c, * elf64-mmix.c,
	* elf64-ppc.c, * elf64-s390.c, * elf64-sparc.c, * elf64-x86-64.c,
	* elflink.c, * elfnn-aarch64.c, * elfnn-ia64.c, * elfnn-riscv.c,
	* elfxx-aarch64.c, * elfxx-mips.c, * elfxx-sparc.c,
	* elfxx-tilegx.c, * elfxx-x86.c, * i386msdos.c, * linker.c,
	* mach-o.c, * mmo.c, * opncls.c, * pdp11.c, * pei-x86_64.c,
	* peicode.h, * reloc.c, * section.c, * syms.c, * vms-alpha.c,
	* xcofflink.c: Update throughout for bfd section macro and function
	changes.
binutils/
	* addr2line.c, * bucomm.c, * coffgrok.c, * dlltool.c, * nm.c,
	* objcopy.c, * objdump.c, * od-elf32_avr.c, * od-macho.c,
	* od-xcoff.c, * prdbg.c, * rdcoff.c, * rddbg.c, * rescoff.c,
	* resres.c, * size.c, * srconv.c, * strings.c, * windmc.c: Update
	throughout for bfd section macro and function changes.
gas/
	* as.c, * as.h, * dw2gencfi.c, * dwarf2dbg.c, * ecoff.c,
	* read.c, * stabs.c, * subsegs.c, * subsegs.h, * write.c,
	* config/obj-coff-seh.c, * config/obj-coff.c, * config/obj-ecoff.c,
	* config/obj-elf.c, * config/obj-macho.c, * config/obj-som.c,
	* config/tc-aarch64.c, * config/tc-alpha.c, * config/tc-arc.c,
	* config/tc-arm.c, * config/tc-avr.c, * config/tc-bfin.c,
	* config/tc-bpf.c, * config/tc-d10v.c, * config/tc-d30v.c,
	* config/tc-epiphany.c, * config/tc-fr30.c, * config/tc-frv.c,
	* config/tc-h8300.c, * config/tc-hppa.c, * config/tc-i386.c,
	* config/tc-ia64.c, * config/tc-ip2k.c, * config/tc-iq2000.c,
	* config/tc-lm32.c, * config/tc-m32c.c, * config/tc-m32r.c,
	* config/tc-m68hc11.c, * config/tc-mep.c, * config/tc-microblaze.c,
	* config/tc-mips.c, * config/tc-mmix.c, * config/tc-mn10200.c,
	* config/tc-mn10300.c, * config/tc-msp430.c, * config/tc-mt.c,
	* config/tc-nds32.c, * config/tc-or1k.c, * config/tc-ppc.c,
	* config/tc-pru.c, * config/tc-rl78.c, * config/tc-rx.c,
	* config/tc-s12z.c, * config/tc-s390.c, * config/tc-score.c,
	* config/tc-score7.c, * config/tc-sh.c, * config/tc-sparc.c,
	* config/tc-spu.c, * config/tc-tic4x.c, * config/tc-tic54x.c,
	* config/tc-tic6x.c, * config/tc-tilegx.c, * config/tc-tilepro.c,
	* config/tc-v850.c, * config/tc-visium.c, * config/tc-wasm32.c,
	* config/tc-xc16x.c, * config/tc-xgate.c, * config/tc-xstormy16.c,
	* config/tc-xtensa.c, * config/tc-z8k.c: Update throughout for
	bfd section macro and function changes.
	* write.c (compress_debug): Use bfd_rename_section.
gdb/
	* aarch64-linux-tdep.c, * arm-tdep.c, * auto-load.c,
	* coff-pe-read.c, * coffread.c, * corelow.c, * dbxread.c,
	* dicos-tdep.c, * dwarf2-frame.c, * dwarf2read.c, * elfread.c,
	* exec.c, * fbsd-tdep.c, * gcore.c, * gdb_bfd.c, * gdb_bfd.h,
	* hppa-tdep.c, * i386-cygwin-tdep.c, * i386-fbsd-tdep.c,
	* i386-linux-tdep.c, * jit.c, * linux-tdep.c, * machoread.c,
	* maint.c, * mdebugread.c, * minidebug.c, * mips-linux-tdep.c,
	* mips-sde-tdep.c, * mips-tdep.c, * mipsread.c, * nto-tdep.c,
	* objfiles.c, * objfiles.h, * osabi.c, * ppc-linux-tdep.c,
	* ppc64-tdep.c, * record-btrace.c, * record-full.c, * remote.c,
	* rs6000-aix-tdep.c, * rs6000-tdep.c, * s390-linux-tdep.c,
	* s390-tdep.c, * solib-aix.c, * solib-dsbt.c, * solib-frv.c,
	* solib-spu.c, * solib-svr4.c, * solib-target.c,
	* spu-linux-nat.c, * spu-tdep.c, * symfile-mem.c, * symfile.c,
	* symmisc.c, * symtab.c, * target.c, * windows-nat.c,
	* xcoffread.c, * cli/cli-dump.c, * compile/compile-object-load.c,
	* mi/mi-interp.c: Update throughout for bfd section macro and
	function changes.
	* gcore (gcore_create_callback): Use bfd_set_section_lma.
	* spu-tdep.c (spu_overlay_new_objfile): Likewise.
gprof/
	* corefile.c, * symtab.c: Update throughout for bfd section
	macro and function changes.
ld/
	* ldcref.c, * ldctor.c, * ldelf.c, * ldlang.c, * pe-dll.c,
	* emultempl/aarch64elf.em, * emultempl/aix.em,
	* emultempl/armcoff.em, * emultempl/armelf.em,
	* emultempl/cr16elf.em, * emultempl/cskyelf.em,
	* emultempl/m68hc1xelf.em, * emultempl/m68kelf.em,
	* emultempl/mipself.em, * emultempl/mmix-elfnmmo.em,
	* emultempl/mmo.em, * emultempl/msp430.em,
	* emultempl/nios2elf.em, * emultempl/pe.em, * emultempl/pep.em,
	* emultempl/ppc64elf.em, * emultempl/xtensaelf.em: Update
	throughout for bfd section macro and function changes.
libctf/
	* ctf-open-bfd.c: Update throughout for bfd section macro changes.
opcodes/
	* arc-ext.c: Update throughout for bfd section macro changes.
sim/
	* common/sim-load.c, * common/sim-utils.c, * cris/sim-if.c,
	* erc32/func.c, * lm32/sim-if.c, * m32c/load.c, * m32c/trace.c,
	* m68hc11/interp.c, * ppc/hw_htab.c, * ppc/hw_init.c,
	* rl78/load.c, * rl78/trace.c, * rx/gdb-if.c, * rx/load.c,
	* rx/trace.c: Update throughout for bfd section macro changes.
2019-09-19 09:40:13 +09:30
Alan Modra 90bd3c903f Make fixup fx_where unsigned
Another field that only stores unsigned values.

	* write.h (struct fix <fx_where>): Make unsigned.
	(fix_new, fix_at_start, fix_new_exp): Adjust prototypes.
	* write.c (fix_new, fix_new_exp, fix_at_start): Make "where" and
	"size" parameters unsigned long.
	(fix_new_internal): Likewise.  Adjust error format string to suit.
	* config/tc-mips.c (md_convert_frag): Remove cast of fx_where.
	* config/tc-sparc.c (md_apply_fix): Likewise.
	* config/tc-score.c (s3_convert_frag): Adjust for unsigned fx_where.
	* config/tc-score7.c (s7_convert_frag): Likewise.
2019-04-16 17:13:04 +09:30
Alan Modra 871a6bd2d8 Make frag fr_fix unsigned
The field only stores unsigned values, so let's make it unsigned to
stop people worrying about the possibility of negative values.

	* frags.h (struct frag <fr_fix>): Use unsigned type.
	* frags.c (frag_new): Assert that current size exceeds
	old_frags_var_max_size.
	* ehopt.c (get_cie_info): Adjust for unsigned fr_fix.
	* listing.c (calc_hex): Likewise.
	* write.c (cvt_frag_to_fill, write_relocs): Likewise.
	* config/tc-arc.c (md_convert_frag): Likewise.
	* config/tc-avr.c (avr_patch_gccisr_frag): Likewise.
	* config/tc-mips.c (md_convert_frag): Likewise.
	* config/tc-rl78.c (md_convert_frag): Likewise.
	* config/tc-rx.c (md_convert_frag): Likewise.
	* config/tc-sparc.c (md_apply_fix): Likewise.
	* config/tc-xtensa.c (next_instrs_are_b_retw): Likewise.
	(unrelaxed_frag_min_insn_count, unrelaxed_frag_has_b_j): Likewise.
2019-04-16 17:12:09 +09:30
Alan Modra 827041555a Update year range in copyright notice of binutils files 2019-01-01 22:06:53 +10:30
Daniel Cederman 618a8fdba6 gas, sparc: Allow non-fpop2 instructions before floating point branches
Sparc V8 does not allow fpop2 instructions (floating point
comparisons) immediately before floating point branches.  From the
SPARC Architecture Manual Version 8, section B.22 "Branch on
Floating-point Condition Codes Instructions":

"If the instruction executed immediately before an FBfcc is an FPop2
instruction, the result of the FBfcc is undefined.  Therefore, at
least one non FPop2 instruction should be executed between the FPop2
instruction and the FBfcc instruction."

The existing check in GAS, however, does not allow any kind of
floating point instruction before the branch.  This patch adds an
extra condition to only disallow fpop2 instructions.

gas/ChangeLog:

2018-09-04  Daniel Cederman  <cederman@gaisler.com>

	* config/tc-sparc.c (md_assemble): Allow non-fpop2 instructions
            before floating point branches for Sparc V8 and earlier.
	* testsuite/gas/sparc/sparc.exp: Execute the new test.
	* testsuite/gas/sparc/v8branch.d: New test.
	* testsuite/gas/sparc/v8branch.s: New test.
2018-09-04 06:25:52 -07:00
Alan Modra c9098af41e Remove sparc-aout and sparc-coff support
bfd/
	* Makefile.am: Remove sparc-aout and sparc-coff support.
	* config.bfd: Likewise.
	* configure.ac: Likewise.
	* targets.c: Likewise.
	* aout-sparcle.c: Delete.
	* aoutf1.h: Delete.
	* cf-sparclynx.c: Delete.
	* coff-sparc.c: Delete.
	* demo64.c: Delete.
	* sparclinux.c: Delete.
	* sparclynx.c: Delete.
	* sparcnetbsd.c: Delete.
	* sunos.c: Delete.
	* Makefile.in: Regenerate.
	* configure: Regenerate.
	* po/SRC-POTFILES.in: Regenerate.
binutils/
	* testsuite/lib/binutils-common.exp: Remove sparc-aout and
	sparc-coff support.
gas/
	* Makefile.am: Remove sparc-aout and sparc-coff support.
	* config/obj-coff.h: Likewise.
	* config/tc-sparc.c: Likewise.
	* config/tc-sparc.h: Likewise.
	* configure.tgt: Likewise.
	* config/te-sparcaout.h: Delete.
	* testsuite/gas/sun4/addend.d: Delete.
	* testsuite/gas/sun4/addend.exp: Delete.
	* testsuite/gas/sun4/addend.s: Delete.
	* Makefile.in: Regenerate.
	* po/POTFILES.in: Regenerate.
ld/
	* Makefile.am: Remove sparc-aout and sparc-coff support.
	* configure.tgt: Likewise.
	* testsuite/ld-elfvers/vers.exp: Likewise.
	* testsuite/ld-elfvsb/elfvsb.exp: Likewise.
	* testsuite/ld-elfweak/elfweak.exp: Likewise.
	* testsuite/ld-shared/shared.exp: Likewise.
	* emulparams/coff_sparc.sh: Delete.
	* emulparams/sparcaout.sh: Delete.
	* emulparams/sparclinux.sh: Delete.
	* emulparams/sparcnbsd.sh: Delete.
	* emulparams/sun4.sh: Delete.
	* scripttempl/sparccoff.sc: Delete.
	* Makefile.in: Regenerate.
	* po/BLD-POTFILES.in: Regenerate.
2018-04-16 15:33:26 +09:30
Alan Modra a8eb42a8b7 Remove i860, i960, bout and aout-adobe targets
Plus remove a few leftovers from the 29k support.

include/
	* aout/adobe.h: Delete.
	* aout/reloc.h: Delete.
	* coff/i860.h: Delete.
	* coff/i960.h: Delete.
	* elf/i860.h: Delete.
	* elf/i960.h: Delete.
	* opcode/i860.h: Delete.
	* opcode/i960.h: Delete.
	* aout/aout64.h (enum reloc_type): Trim off 29k and other unused values.
	* aout/ar.h (ARMAGB): Remove.
	* coff/internal.h (struct internal_aouthdr, struct internal_scnhdr,
	union internal_auxent): Remove i960 support.
bfd/
	* aout-adobe.c: Delete.
	* bout.c: Delete.
	* coff-i860.c: Delete.
	* coff-i960.c: Delete.
	* cpu-i860.c: Delete.
	* cpu-i960.c: Delete.
	* elf32-i860.c: Delete.
	* elf32-i960.c: Delete.
	* hosts/i860mach3.h: Delete.
	* Makefile.am: Remove i860, i960, bout, and adobe support.
	* archures.c: Remove i860 and i960 support.
	* coffcode.h: Likewise.
	* reloc.c: Likewise.
	* aoutx.h: Comment updates.
	* archive.c: Remove BOUT and i960 support.
	* bfd.c: Remove BOUT support.
	* coffswap.h: Remove i960 support.
	* config.bfd: Remove i860, i960 and adobe targets.
	* configure.ac: Remove adode, bout, i860, i960, icoff targets.
	* targets.c: Likewise.
	* ieee.c: Remove i960 support.
	* mach-o.c: Remove i860 support.
	* Makefile.in: Regenerate.
	* bfd-in2.h: Regenerate.
	* configure: Regenerate.
	* libbfd.h: Regenerate.
	* po/SRC-POTFILES.in: Regenerate.
opcodes/
	* opcodes/i860-dis.c: Delete.
	* opcodes/i960-dis.c: Delete.
	* Makefile.am: Remove i860 and i960 support.
	* configure.ac: Likewise.
	* disassemble.c: Likewise.
	* disassemble.h: Likewise.
	* Makefile.in: Regenerate.
	* configure: Regenerate.
	* po/POTFILES.in: Regenerate.
binutils/
	* ieee.c: Remove i960 support.
	* od-macho.c: Remove i860 support.
	* readelf.c: Remove i860 and i960 support.
	* testsuite/binutils-all/objcopy.exp: Likewise.
	* testsuite/binutils-all/objdump.exp: Likewise.
	* testsuite/lib/binutils-common.exp: Likewise.
gas/
	* config/aout_gnu.h: Delete.
	* config/tc-i860.c: Delete.
	* config/tc-i860.h: Delete.
	* config/tc-i960.c: Delete.
	* config/tc-i960.h: Delete.
	* doc/c-i860.texi: Delete.
	* doc/c-i960.texi: Delete.
	* testsuite/gas/i860/README.i860: Delete.
	* testsuite/gas/i860/bitwise.d: Delete.
	* testsuite/gas/i860/bitwise.s: Delete.
	* testsuite/gas/i860/branch.d: Delete.
	* testsuite/gas/i860/branch.s: Delete.
	* testsuite/gas/i860/bte.d: Delete.
	* testsuite/gas/i860/bte.s: Delete.
	* testsuite/gas/i860/dir-align01.d: Delete.
	* testsuite/gas/i860/dir-align01.s: Delete.
	* testsuite/gas/i860/dir-intel01.d: Delete.
	* testsuite/gas/i860/dir-intel01.s: Delete.
	* testsuite/gas/i860/dir-intel02.d: Delete.
	* testsuite/gas/i860/dir-intel02.s: Delete.
	* testsuite/gas/i860/dir-intel03-err.l: Delete.
	* testsuite/gas/i860/dir-intel03-err.s: Delete.
	* testsuite/gas/i860/dual01.d: Delete.
	* testsuite/gas/i860/dual01.s: Delete.
	* testsuite/gas/i860/dual02-err.l: Delete.
	* testsuite/gas/i860/dual02-err.s: Delete.
	* testsuite/gas/i860/dual03.d: Delete.
	* testsuite/gas/i860/dual03.s: Delete.
	* testsuite/gas/i860/fldst01.d: Delete.
	* testsuite/gas/i860/fldst01.s: Delete.
	* testsuite/gas/i860/fldst02.d: Delete.
	* testsuite/gas/i860/fldst02.s: Delete.
	* testsuite/gas/i860/fldst03.d: Delete.
	* testsuite/gas/i860/fldst03.s: Delete.
	* testsuite/gas/i860/fldst04.d: Delete.
	* testsuite/gas/i860/fldst04.s: Delete.
	* testsuite/gas/i860/fldst05.d: Delete.
	* testsuite/gas/i860/fldst05.s: Delete.
	* testsuite/gas/i860/fldst06.d: Delete.
	* testsuite/gas/i860/fldst06.s: Delete.
	* testsuite/gas/i860/fldst07.d: Delete.
	* testsuite/gas/i860/fldst07.s: Delete.
	* testsuite/gas/i860/fldst08.d: Delete.
	* testsuite/gas/i860/fldst08.s: Delete.
	* testsuite/gas/i860/float01.d: Delete.
	* testsuite/gas/i860/float01.s: Delete.
	* testsuite/gas/i860/float02.d: Delete.
	* testsuite/gas/i860/float02.s: Delete.
	* testsuite/gas/i860/float03.d: Delete.
	* testsuite/gas/i860/float03.s: Delete.
	* testsuite/gas/i860/float04.d: Delete.
	* testsuite/gas/i860/float04.s: Delete.
	* testsuite/gas/i860/form.d: Delete.
	* testsuite/gas/i860/form.s: Delete.
	* testsuite/gas/i860/i860.exp: Delete.
	* testsuite/gas/i860/iarith.d: Delete.
	* testsuite/gas/i860/iarith.s: Delete.
	* testsuite/gas/i860/ldst01.d: Delete.
	* testsuite/gas/i860/ldst01.s: Delete.
	* testsuite/gas/i860/ldst02.d: Delete.
	* testsuite/gas/i860/ldst02.s: Delete.
	* testsuite/gas/i860/ldst03.d: Delete.
	* testsuite/gas/i860/ldst03.s: Delete.
	* testsuite/gas/i860/ldst04.d: Delete.
	* testsuite/gas/i860/ldst04.s: Delete.
	* testsuite/gas/i860/ldst05.d: Delete.
	* testsuite/gas/i860/ldst05.s: Delete.
	* testsuite/gas/i860/ldst06.d: Delete.
	* testsuite/gas/i860/ldst06.s: Delete.
	* testsuite/gas/i860/pfam.d: Delete.
	* testsuite/gas/i860/pfam.s: Delete.
	* testsuite/gas/i860/pfmam.d: Delete.
	* testsuite/gas/i860/pfmam.s: Delete.
	* testsuite/gas/i860/pfmsm.d: Delete.
	* testsuite/gas/i860/pfmsm.s: Delete.
	* testsuite/gas/i860/pfsm.d: Delete.
	* testsuite/gas/i860/pfsm.s: Delete.
	* testsuite/gas/i860/pseudo-ops01.d: Delete.
	* testsuite/gas/i860/pseudo-ops01.s: Delete.
	* testsuite/gas/i860/regress01.d: Delete.
	* testsuite/gas/i860/regress01.s: Delete.
	* testsuite/gas/i860/shift.d: Delete.
	* testsuite/gas/i860/shift.s: Delete.
	* testsuite/gas/i860/simd.d: Delete.
	* testsuite/gas/i860/simd.s: Delete.
	* testsuite/gas/i860/system.d: Delete.
	* testsuite/gas/i860/system.s: Delete.
	* testsuite/gas/i860/xp.d: Delete.
	* testsuite/gas/i860/xp.s: Delete.
	* Makefile.am: Remove i860 and i960 support.
	* configure.tgt: Likewise.
	* doc/Makefile.am: Likewise.
	* doc/all.texi: Likewise.
	* testsuite/gas/all/gas.exp
	* config/obj-coff.h: Remove i960 support.
	* doc/internals.texi: Likewise.
	* expr.c: Likewise.
	* read.c: Likewise.
	* write.c: Likewise.
	* write.h: Likewise.
	* testsuite/gas/lns/lns.exp: Likewise.
	* testsuite/gas/symver/symver.exp: Likewise.
	* config/tc-m68k.c: Remove BOUT support.
	* config/tc-score.c: Likewise.
	* config/tc-score7.c: Likewise.
	* config/tc-sparc.c: Likewise.
	* symbols.c: Likewise.
	* doc/h8.texi: Likewise.
	* configure.ac: Remove BOUT and i860 support.
	* doc/as.texinfo: Remove BOUT, i860 and i960 support
	* Makefile.in: Regenerate.
	* config.in: Regenerate.
	* configure: Regenerate.
	* doc/Makefile.in: Regenerate.
	* po/POTFILES.in: Regenerate.
ld/
	* emulparams/coff_i860.sh: Delete.
	* emulparams/elf32_i860.sh: Delete.
	* emulparams/elf32_i960.sh: Delete.
	* emulparams/gld960.sh: Delete.
	* emulparams/gld960coff.sh: Delete.
	* emulparams/lnk960.sh: Delete.
	* emultempl/gld960.em: Delete.
	* emultempl/gld960c.em: Delete.
	* emultempl/lnk960.em: Delete.
	* scripttempl/i860coff.sc: Delete.
	* scripttempl/i960.sc: Delete.
	* ld.texinfo: Remove i960 support.
	* Makefile.am: Remove i860 and i960 support.
	* configure.tgt: Likewise.
	* testsuite/ld-discard/extern.d: Likewise.
	* testsuite/ld-discard/start.d: Likewise.
	* testsuite/ld-discard/static.d: Likewise.
	* testsuite/ld-elf/compressed1d.d: Likewise.
	* testsuite/ld-elf/group1.d: Likewise.
	* testsuite/ld-elf/group3b.d: Likewise.
	* testsuite/ld-elf/group8a.d: Likewise.
	* testsuite/ld-elf/group8b.d: Likewise.
	* testsuite/ld-elf/group9a.d: Likewise.
	* testsuite/ld-elf/group9b.d: Likewise.
	* testsuite/ld-elf/linkonce2.d: Likewise.
	* testsuite/ld-elf/merge.d: Likewise.
	* testsuite/ld-elf/merge2.d: Likewise.
	* testsuite/ld-elf/merge3.d: Likewise.
	* testsuite/ld-elf/orphan-10.d: Likewise.
	* testsuite/ld-elf/orphan-11.d: Likewise.
	* testsuite/ld-elf/orphan-12.d: Likewise.
	* testsuite/ld-elf/orphan-9.d: Likewise.
	* testsuite/ld-elf/orphan-region.d: Likewise.
	* testsuite/ld-elf/orphan.d: Likewise.
	* testsuite/ld-elf/orphan3.d: Likewise.
	* testsuite/ld-elf/pr12851.d: Likewise.
	* testsuite/ld-elf/pr12975.d: Likewise.
	* testsuite/ld-elf/pr13177.d: Likewise.
	* testsuite/ld-elf/pr13195.d: Likewise.
	* testsuite/ld-elf/pr17550a.d: Likewise.
	* testsuite/ld-elf/pr17550b.d: Likewise.
	* testsuite/ld-elf/pr17550c.d: Likewise.
	* testsuite/ld-elf/pr17550d.d: Likewise.
	* testsuite/ld-elf/pr17615.d: Likewise.
	* testsuite/ld-elf/pr20528a.d: Likewise.
	* testsuite/ld-elf/pr20528b.d: Likewise.
	* testsuite/ld-elf/pr21562a.d: Likewise.
	* testsuite/ld-elf/pr21562b.d: Likewise.
	* testsuite/ld-elf/pr21562c.d: Likewise.
	* testsuite/ld-elf/pr21562d.d: Likewise.
	* testsuite/ld-elf/pr21562i.d: Likewise.
	* testsuite/ld-elf/pr21562j.d: Likewise.
	* testsuite/ld-elf/pr21562k.d: Likewise.
	* testsuite/ld-elf/pr21562l.d: Likewise.
	* testsuite/ld-elf/pr21562m.d: Likewise.
	* testsuite/ld-elf/pr21562n.d: Likewise.
	* testsuite/ld-elf/pr22677.d: Likewise.
	* testsuite/ld-elf/pr22836-1a.d: Likewise.
	* testsuite/ld-elf/pr22836-1b.d: Likewise.
	* testsuite/ld-elf/pr349.d: Likewise.
	* testsuite/ld-elf/sec-to-seg.exp: Likewise.
	* testsuite/ld-elf/sec64k.exp: Likewise.
	* testsuite/ld-elf/warn1.d: Likewise.
	* testsuite/ld-elf/warn2.d: Likewise.
	* testsuite/ld-elf/warn3.d: Likewise.
	* testsuite/lib/ld-lib.exp: Likewise.
	* Makefile.in: Regenerate.
	* po/BLD-POTFILES.in: Regenerate.
2018-04-11 21:49:30 +09:30
Eric Botcazou d85815e2d1 Fix PR gas/22738 (.dc.a directive has wrong size on SPARC 64-bit).
The .dc.a directive has wrong size (32 bits) on SPARC 64-bit because
the assembler sets the correct BFD architecture only at the very end
of the processing and it's too late for the directive.  It's fixed by
defining TARGET_MACH and making it return a sensible default value.

gas/
	* config/tc-sparc.h (sparc_mach): Declare.
	(TARGET_MACH): Define to above.
	* config/tc-sparc.c (sparc_mach): New function.
	(sparc_md_end): Minor tweak.
ld/
	* testsuite/ld-elf/pr22450.d: Remove reference to SPARC64.
2018-01-30 00:13:51 +01:00
Alan Modra 219d1afa89 Update year range in copyright notice of binutils files 2018-01-03 17:49:56 +10:30
James Clarke f6a36b0c9e gas: enable PC-relative diff relocations on sparc64
gas/
	* config/tc-sparc.c (tc_gen_reloc): Convert BFD_RELOC_8/16/32/64
	into the corresponding BFD_RELOC_8/16/32/64_PCREL relocation
	when requested.
	* config/tc-sparc.h (DIFF_EXPR_OK): Define to enable PC-relative
	diff relocations.
	(TC_FORCE_RELOCATION_SUB_LOCAL): Define to ensure only supported
	relocations are made PC-relative.
	(CFI_DIFF_EXPR_OK): Define to 0 to force BFD_RELOC_32_PCREL to
	be used directly, since otherwise BFD_RELOC_SPARC_UA32 will be
	used for .eh_frame which cannot in general be converted to a
	BFD_RELOC_32_PCREL due to alignment requirements.
2017-08-23 05:46:45 -07:00
Jose E. Marchesi 6451799480 binutils: support for the SPARC M8 processor
This patch adds support for the new SPARC M8 processor (implementing OSA
2017) to binutils.

New instructions:

- Dictionary Unpack

  + dictunpack

- Partitioned Compare with shifted result

  + Signed variants:   fpcmp{le,gt,eq,ne}{8,16,32}shl
  + Unsigned variants: fpcmpu{le,gt}{8,16,32}shl

- Partitioned Dual-Equal compared, with shifted result

  + fpcmpde{8,16,32}shl

- Partitioned Unsigned Range Compare, with shifted result

  + fpcmpur{8,16,32}shl

- 64-bit shifts on Floating-Point registers

  + fps{ll,ra,rl}64x

- Misaligned loads and stores

  + ldm{sh,uh,sw,uw,x,ux}
  + ldm{sh,uh,sw,uw,x,ux}a
  + ldmf{s,d}
  + ldmf{s,d}a

  + stm{h,w,x}
  + stm{h,w,x}a
  + stmf{s,d}
  + stmf{s,d}a

- Oracle Numbers

  + on{add,sub,mul,div}

- Reverse Bytes/Bits

  + revbitsb
  + revbytes{h,w,x}

- Run-Length instructions

  + rle_burst
  + rle_length

- New crypto instructions

  + sha3

- Instruction to read the new register %entropy

  + rd %entropy

New Alternate Address Identifiers:

- 0x24, #ASI_CORE_COMMIT_COUNT
- 0x24, #ASI_CORE_SELECT_COUNT
- 0x48, #ASI_ARF_ECC_REG
- 0x53, #ASI_ITLB_PROBE
- 0x58, #ASI_DSFAR
- 0x5a, #ASI_DTLB_PROBE_PRIMARY
- 0x5b, #ASI_DTLB_PROBE_REAL
- 0x64, #ASI_CORE_SELECT_COMMIT_NHT

The new assembler command-line options for selecting the M8 architecture
are:

-Av9m8 or -Asparc6 for 64-bit binaries.
-Av8plusm8 for 32-bit (v8+) binaries.

The corresponding disassembler command-line options are:

-msparc:v9m8 for 64-bit binaries.
-msparc:v8plusm8 for 32-bit (v8+) binaries.

Tested for regressions in the following targets:
sparc-aout sparc-linux sparc-vxworks sparc64-linux

bfd/ChangeLog:

2017-05-19  Jose E. Marchesi  <jose.marchesi@oracle.com>

	* archures.c (bfd_mach_sparc_v9m8): Define.
	(bfd_mach_sparc_v8plusm8): Likewise.
	(bfd_mach_sparc_v9_p): Adjust to M8.
	(bfd_mach_sparc_64bit_p): Likewise.
	* aoutx.h (machine_type): Handle bfd_mach_sparc_v9m8 and
	bfd_mach_sparc_v8plusm8.
	* bfd-in2.h: Regenerated.
	* cpu-sparc.c (arch_info_struct): Entries for sparc:v9m8 and
	sparc:v8plusm8.
	* elfxx-sparc.c (_bfd_sparc_elf_object_p): Handle
	bfd_mach_sparc_v8plusm8 and bfd_mach_sparc_v9m8 using the new hw
	capabilities ONADDSUB, ONMUL, ONDIV, DICTUNP, FPCPSHL, RLE and
	SHA3.
	* elf32-sparc.c (elf32_sparc_final_write_processing): Handle
	bfd_mach_sparc_v8plusm8.

binutils/ChangeLog:

2017-05-19  Jose E. Marchesi  <jose.marchesi@oracle.com>

	* NEWS: Mention the SPARC M8 support.

gas/ChangeLog:

2017-05-19  Jose E. Marchesi  <jose.marchesi@oracle.com>

	* config/tc-sparc.c (sparc_arch_table): Entries for `sparc6',
	`v9m8' and `v8plusm8'.
	(sparc_md_end): Handle SPARC_OPCODE_ARCH_M8.
	(get_hwcap_name): Support the M8 hardware capabilities.
	(sparc_ip): Handle new operand types.
	* doc/c-sparc.texi (Sparc-Opts): Document -Av9m8, -Av8plusm8 and
	-Asparc6, and the corresponding -xarch aliases.
	* testsuite/gas/sparc/sparc6.s: New file.
	* testsuite/gas/sparc/sparc6.d: Likewise.
	* testsuite/gas/sparc/sparc6-diag.s: Likewise.
	* testsuite/gas/sparc/sparc6-diag.l: Likewise.
	* testsuite/gas/sparc/fpcmpshl.s: Likewise.
	* testsuite/gas/sparc/fpcmpshl.d: Likewise.
	* testsuite/gas/sparc/fpcmpshl-diag.s: Likewise.
	* testsuite/gas/sparc/fpcmpshl-diag.l: Likewise.
	* testsuite/gas/sparc/ldm-stm.s: Likewise.
	* testsuite/gas/sparc/ldm-stm.d: Likewise.
	* testsuite/gas/sparc/ldm-stm-diag.s: Likewise.
	* testsuite/gas/sparc/ldm-stm-diag.l: Likewise.
	* testsuite/gas/sparc/ldmf-stmf.s: Likewise.
	* testsuite/gas/sparc/ldmf-stmf.d: Likewise.
	* testsuite/gas/sparc/ldmf-stmf-diag.s: Likewise.
	* testsuite/gas/sparc/ldmf-stmf-diag.l: Likewise.
	* testsuite/gas/sparc/on.s: Likewise.
	* testsuite/gas/sparc/on.d: Likewise.
	* testsuite/gas/sparc/on-diag.s: Likewise.
	* testsuite/gas/sparc/on-diag.l: Likewise.
	* testsuite/gas/sparc/rle.s: Likewise.
	* testsuite/gas/sparc/rle.d: Likewise.
	* testsuite/gas/sparc/sparc.exp (gas_64_check): Run new tests.
	* testsuite/gas/sparc/rdasr.s: Add test for RDENTROPY.
	* testsuite/gas/sparc/rdasr.d: Likewise.

include/ChangeLog:

2017-05-19  Jose E. Marchesi  <jose.marchesi@oracle.com>

	* elf/sparc.h (ELF_SPARC_HWCAP2_SPARC6): Define.
	(ELF_SPARC_HWCAP2_ONADDSUB): Likewise.
	(ELF_SPARC_HWCAP2_ONMUL): Likewise.
	(ELF_SPARC_HWCAP2_ONDIV): Likewise.
	(ELF_SPARC_HWCAP2_DICTUNP): Likewise.
	(ELF_SPARC_HWCAP2_FPCMPSHL): Likewise.
	(ELF_SPARC_HWCAP2_RLE): Likewise.
	(ELF_SPARC_HWCAP2_SHA3): Likewise.
	* opcode/sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_M8
	and adjust SPARC_OPCODE_ARCH_MAX.
	(HWCAP2_SPARC6): Define.
	(HWCAP2_ONADDSUB): Likewise.
	(HWCAP2_ONMUL): Likewise.
	(HWCAP2_ONDIV): Likewise.
	(HWCAP2_DICTUNP): Likewise.
	(HWCAP2_FPCMPSHL): Likewise.
	(HWCAP2_RLE): Likewise.
	(HWCAP2_SHA3): Likewise.
	(OPM): Likewise.
	(OPMI): Likewise.
	(ONFCN): Likewise.
	(REVFCN): Likewise.
	(SIMM10): Likewise.

opcodes/ChangeLog:

2017-05-19  Jose E. Marchesi  <jose.marchesi@oracle.com>

	* sparc-dis.c (MASK_V9): Include SPARC_OPCODE_ARCH_M8.
	(X_IMM2): Define.
	(compute_arch_mask): Handle bfd_mach_sparc_v8plusm8 and
	bfd_mach_sparc_v9m8.
	(print_insn_sparc): Handle new operand types.
	* sparc-opc.c (MASK_M8): Define.
	(v6): Add MASK_M8.
	(v6notlet): Likewise.
	(v7): Likewise.
	(v8): Likewise.
	(v9): Likewise.
	(v9a): Likewise.
	(v9b): Likewise.
	(v9c): Likewise.
	(v9d): Likewise.
	(v9e): Likewise.
	(v9v): Likewise.
	(v9m): Likewise.
	(v9andleon): Likewise.
	(m8): Define.
	(HWS_VM8): Define.
	(HWS2_VM8): Likewise.
	(sparc_opcode_archs): Add entry for "m8".
	(sparc_opcodes): Add OSA2017 and M8 instructions
	dictunpack, fpcmp{ule,ugt,eq,ne,de,ur}{8,16,32}shl,
	fpx{ll,ra,rl}64x,
	ldm{sh,uh,sw,uw,x,ux}, ldm{sh,uh,sw,uw,x,ux}a, ldmf{s,d},
	ldmf{s,d}a, on{add,sub,mul,div}, rdentropy, revbitsb,
	revbytes{h,w,x}, rle_burst, rle_length, sha3, stm{h,w,x},
	stm{h,w,x}a, stmf{s,d}, stmf{s,d}a.
	(asi_table): New M8 ASIs ASI_CORE_COMMIT_COUNT,
	ASI_CORE_SELECT_COUNT, ASI_ARF_ECC_REG, ASI_ITLB_PROBE, ASI_DSFAR,
	ASI_DTLB_PROBE_PRIMARY, ASI_DTLB_PROBE_REAL,
	ASI_CORE_SELECT_COMMIT_NHT.
2017-05-19 09:27:08 -07:00
Jose E. Marchesi d28b6364b1 gas: sparc: fix relaxation of CALL instruction into branches in a.out targets
This patch avoids CALL instructions to be optimized into branches if
the symbols referred to in the CALL instruction are not fully resolved
at the time the assembler writes its output.

Tested in sparc64-linux-gnu and sparc-sun-sunos4.1.3 targets.
No regressions.

gas/ChangeLog:

2017-04-25  Jose E. Marchesi  <jose.marchesi@oracle.com>

	PR gas/21407
	* config/tc-sparc.c (md_apply_fix): Do not transform `call'
	instructions into branch instructions in fixups generating
	additional relocations.
	* testsuite/gas/sparc/call-relax.s: New file.
	* testsuite/gas/sparc/call-relax.d: Likewise.
	* testsuite/gas/sparc/call-relax-aout.d: Likewise.
	* testsuite/gas/sparc/sparc.exp: Test call-relax and call-relax-aout.
2017-04-25 02:40:43 -07:00
Sheldon Lobo 1e9d41d49f opcodes,gas: associate SPARC ASIs with an architecture level.
With this change an architecture level bump due to assembly ASIs will show
up as a warning/error depending on options passed to gas.

Tested with sparc64-linux-gnu, and it does not introduce any regressions.

gas/ChangeLog:

	Add support for associating SPARC ASIs with an architecture level.
	* config/tc-sparc.c (parse_sparc_asi): New encode SPARC ASIs.

opcodes/ChangeLog:

	Add support for associating SPARC ASIs with an architecture level.
	* include/opcode/sparc.h (sparc_asi): New sparc_asi struct.
	* opcodes/sparc-opc.c (asi_table): Updated asi_table and encoding/
	decoding of SPARC ASIs.
2017-02-23 07:53:16 -08:00
Nick Clifton 33eaf5de31 Fix spelling mistakes and typos in the GAS sources.
PR gas/21072
	* asintl.h: Fix spelling mistakes and typos.
	* atof-generic.c: Likewise.
	* bit_fix.h: Likewise.
	* config/atof-ieee.c: Likewise.
	* config/bfin-defs.h: Likewise.
	* config/bfin-parse.y: Likewise.
	* config/obj-coff-seh.h: Likewise.
	* config/obj-coff.c: Likewise.
	* config/obj-evax.c: Likewise.
	* config/obj-macho.c: Likewise.
	* config/rx-parse.y: Likewise.
	* config/tc-aarch64.c: Likewise.
	* config/tc-alpha.c: Likewise.
	* config/tc-arc.c: Likewise.
	* config/tc-arm.c: Likewise.
	* config/tc-avr.c: Likewise.
	* config/tc-bfin.c: Likewise.
	* config/tc-cr16.c: Likewise.
	* config/tc-cris.c: Likewise.
	* config/tc-crx.c: Likewise.
	* config/tc-d10v.c: Likewise.
	* config/tc-d30v.c: Likewise.
	* config/tc-dlx.c: Likewise.
	* config/tc-epiphany.c: Likewise.
	* config/tc-frv.c: Likewise.
	* config/tc-hppa.c: Likewise.
	* config/tc-i370.c: Likewise.
	* config/tc-i386-intel.c: Likewise.
	* config/tc-i386.c: Likewise.
	* config/tc-i960.c: Likewise.
	* config/tc-ia64.c: Likewise.
	* config/tc-m32r.c: Likewise.
	* config/tc-m68hc11.c: Likewise.
	* config/tc-m68k.c: Likewise.
	* config/tc-mcore.c: Likewise.
	* config/tc-mep.c: Likewise.
	* config/tc-mep.h: Likewise.
	* config/tc-metag.c: Likewise.
	* config/tc-microblaze.c: Likewise.
	* config/tc-mips.c: Likewise.
	* config/tc-mmix.c: Likewise.
	* config/tc-mn10200.c: Likewise.
	* config/tc-mn10300.c: Likewise.
	* config/tc-msp430.c: Likewise.
	* config/tc-msp430.h: Likewise.
	* config/tc-nds32.c: Likewise.
	* config/tc-nds32.h: Likewise.
	* config/tc-nios2.c: Likewise.
	* config/tc-nios2.h: Likewise.
	* config/tc-ns32k.c: Likewise.
	* config/tc-pdp11.c: Likewise.
	* config/tc-ppc.c: Likewise.
	* config/tc-pru.c: Likewise.
	* config/tc-rx.c: Likewise.
	* config/tc-s390.c: Likewise.
	* config/tc-score.c: Likewise.
	* config/tc-score7.c: Likewise.
	* config/tc-sh.c: Likewise.
	* config/tc-sh64.c: Likewise.
	* config/tc-sparc.c: Likewise.
	* config/tc-tic4x.c: Likewise.
	* config/tc-tic54x.c: Likewise.
	* config/tc-v850.c: Likewise.
	* config/tc-vax.c: Likewise.
	* config/tc-visium.c: Likewise.
	* config/tc-xgate.c: Likewise.
	* config/tc-xtensa.c: Likewise.
	* config/tc-z80.c: Likewise.
	* config/tc-z8k.c: Likewise.
	* config/te-vms.c: Likewise.
	* config/xtensa-relax.c: Likewise.
	* doc/as.texinfo: Likewise.
	* doc/c-arm.texi: Likewise.
	* doc/c-hppa.texi: Likewise.
	* doc/c-i370.texi: Likewise.
	* doc/c-i386.texi: Likewise.
	* doc/c-m32r.texi: Likewise.
	* doc/c-m68k.texi: Likewise.
	* doc/c-mmix.texi: Likewise.
	* doc/c-msp430.texi: Likewise.
	* doc/c-nds32.texi: Likewise.
	* doc/c-ns32k.texi: Likewise.
	* doc/c-riscv.texi: Likewise.
	* doc/c-rx.texi: Likewise.
	* doc/c-s390.texi: Likewise.
	* doc/c-tic6x.texi: Likewise.
	* doc/c-tilegx.texi: Likewise.
	* doc/c-tilepro.texi: Likewise.
	* doc/c-v850.texi: Likewise.
	* doc/c-xgate.texi: Likewise.
	* doc/c-xtensa.texi: Likewise.
	* dwarf2dbg.c: Likewise.
	* ecoff.c: Likewise.
	* itbl-ops.c: Likewise.
	* listing.c: Likewise.
	* macro.c: Likewise.
	* po/gas.pot: Likewise.
	* read.c: Likewise.
	* struc-symbol.h: Likewise.
	* symbols.h: Likewise.
	* testsuite/gas/arc/relocs-errors.err: Likewise.
	* write.c: Likewise.
2017-01-23 15:23:07 +00:00
Alan Modra 2571583aed Update year range in copyright notice of all files. 2017-01-02 14:08:56 +10:30
Ambrogino Modigliani 2b0f37619f Fix spelling in comments in C source files (gas)
* as.h: Fix spelling in comments.
	* config/obj-ecoff.c: Fix spelling in comments.
	* config/obj-macho.c: Fix spelling in comments.
	* config/tc-aarch64.c: Fix spelling in comments.
	* config/tc-arc.c: Fix spelling in comments.
	* config/tc-arm.c: Fix spelling in comments.
	* config/tc-avr.c: Fix spelling in comments.
	* config/tc-cr16.c: Fix spelling in comments.
	* config/tc-epiphany.c: Fix spelling in comments.
	* config/tc-frv.c: Fix spelling in comments.
	* config/tc-hppa.c: Fix spelling in comments.
	* config/tc-hppa.h: Fix spelling in comments.
	* config/tc-i370.c: Fix spelling in comments.
	* config/tc-m68hc11.c: Fix spelling in comments.
	* config/tc-m68k.c: Fix spelling in comments.
	* config/tc-mcore.c: Fix spelling in comments.
	* config/tc-mep.c: Fix spelling in comments.
	* config/tc-metag.c: Fix spelling in comments.
	* config/tc-mips.c: Fix spelling in comments.
	* config/tc-mn10200.c: Fix spelling in comments.
	* config/tc-mn10300.c: Fix spelling in comments.
	* config/tc-nds32.c: Fix spelling in comments.
	* config/tc-nios2.c: Fix spelling in comments.
	* config/tc-ns32k.c: Fix spelling in comments.
	* config/tc-pdp11.c: Fix spelling in comments.
	* config/tc-ppc.c: Fix spelling in comments.
	* config/tc-riscv.c: Fix spelling in comments.
	* config/tc-rx.c: Fix spelling in comments.
	* config/tc-score.c: Fix spelling in comments.
	* config/tc-score7.c: Fix spelling in comments.
	* config/tc-sparc.c: Fix spelling in comments.
	* config/tc-tic54x.c: Fix spelling in comments.
	* config/tc-vax.c: Fix spelling in comments.
	* config/tc-xgate.h: Fix spelling in comments.
	* config/tc-xtensa.c: Fix spelling in comments.
	* config/tc-z80.c: Fix spelling in comments.
	* dwarf2dbg.c: Fix spelling in comments.
	* input-file.h: Fix spelling in comments.
	* itbl-ops.c: Fix spelling in comments.
	* read.c: Fix spelling in comments.
	* stabs.c: Fix spelling in comments.
	* symbols.c: Fix spelling in comments.
	* write.c: Fix spelling in comments.
	* testsuite/gas/all/itbl-test.c: Fix spelling in comments.
	* testsuite/gas/tic4x/opclasses.h: Fix spelling in comments.
2016-11-27 15:02:09 +10:30
Jose E. Marchesi 65d1cff97c gas: fix CBCOND diagnostics for invalid immediate operands.
This patch fixes two problems in the SPARC assembler:

- The diagnostic message

  Error: Illegal operands: Immediate value in cbcond is out of range.

  is incorrectly issued for non-CBCOND instructions that feature a
  simm5 immediate field, such as MPMUL, MONTMUL, etc.

- When an invalid immediate operand is used in a CBCOND
  instruction, two redundant error messages are issued to the
  user, the second due to a stale fixup (this happens since
  commit 85024cd8bc).

Some diagnostic tests for the CBCOND instructions are also
included in the patch.

Tested in both sparc64-linux-gnu and sparcv9-linux-gnu targets.

gas/ChangeLog:

2016-11-25  Jose E. Marchesi  <jose.marchesi@oracle.com>

	* config/tc-sparc.c (sparc_ip): Avoid emitting a cbcond error
	messages for non-cbcond instructions.
	* testsuite/gas/sparc/cbcond-diag.s: New file.
	* testsuite/gas/sparc/cbcond-diag.l: Likewise.
	* testsuite/gas/sparc/sparc.exp (gas_64_check): Run cbcond-diag tests.
2016-11-25 03:40:15 -08:00
Jose E. Marchesi 6884417a0f gas,opcodes: fix hardware capabilities bumping in the sparc assembler.
When the assembler finds an instruction which is part of a higher
opcode architecture it bumps the current opcode architecture.  For
example:

   $ echo "mwait" | as -bump
   {standard input}: Assembler messages:
   {standard input}:1: Warning: architecture bumped from "v6" to "v9m" on "mwait"

However, when two instructions pertaining to the same opcode
architecture but associated to different SPARC hardware capabilities
are found in the input stream, and no GAS architecture is specified in
the command line, the assembler bangs:

   $ echo "mwait; wr %g0,%g1,%mcdper" | as -bump
   {standard input}: Assembler messages:
   {standard input}:1: Warning: architecture bumped from "v6" to "v9m" on "mwait"
   {standard input}:1: Error: Hardware capability "sparc5" not enabled for "wr".

... and it should'nt, as WRMCDPER pertains to the same architecture
level than MWAIT.

This patch fixes this by extending the definition of sparc opcode
architectures to contain a set of hardware capabilities and making the
assembler to take these capabilities into account when updating the
set of allowed hwcaps when an architecture bump is triggered by some
instruction.

This way, hwcaps associated to architecture levels are maintained in
opcodes, while the assembler keeps the flexibiity of defining GAS
architectures including additional hwcaps (like -Asparcfmaf or the
v8plus* variants).

A test covering this failure case is included.

gas/ChangeLog:

2016-11-22  Jose E. Marchesi  <jose.marchesi@oracle.com>

       	* config/tc-sparc.c: Move HWS_* and HWS2_* definitions to
       	opcodes/sparc-opc.c.
       	(sparc_arch): Clarify the new role of the hwcap_allowed and
       	hwcap2_allowed fields.
       	(sparc_arch_table): Remove HWS_* and HWS2_* instances from
       	hwcap_allowed and hwcap2_allowed respectively.
       	(md_parse_option): Include the opcode arch hwcaps when processing
       	-A.
       	(sparc_ip): Use the current opcode arch hwcaps to update
       	hwcap_allowed, as well of the hwcaps of the instruction triggering
       	the bump.
       	* testsuite/gas/sparc/hwcaps-bump.s: New file.
       	* testsuite/gas/sparc/hwcaps-bump.l: Likewise.
       	* testsuite/gas/sparc/sparc.exp (gas_64_check): Run tests in
       	hwcaps-bump.

include/ChangeLog:

2016-11-22  Jose E. Marchesi  <jose.marchesi@oracle.com>

       	* opcode/sparc.h (sparc_opcode_arch): New fields hwcaps and
       	hwcaps2.

opcodes/ChangeLog:

2016-11-22  Jose E. Marchesi  <jose.marchesi@oracle.com>

       	* sparc-opc.c (HWS_V8): Definition moved from
       	gas/config/tc-sparc.c.
       	(HWS_V9): Likewise.
       	(HWS_VA): Likewise.
       	(HWS_VB): Likewise.
       	(HWS_VC): Likewise.
       	(HWS_VD): Likewise.
       	(HWS_VE): Likewise.
       	(HWS_VV): Likewise.
       	(HWS_VM): Likewise.
       	(HWS2_VM): Likewise.
       	(sparc_opcode_archs): Initialize hwcaps and hwcaps2 fields of
       	existing entries.
2016-11-22 04:40:37 -08:00
Nick Clifton 93ca393659 Fix SPARC relocations generated for the .eh_frame section.
PR gas/20803
	* config/tc-sparc.c (cons_fix_new_sparc): Use unaligned relocs in
	the .eh_frame section.
2016-11-15 15:41:27 +00:00
Jose E. Marchesi fc7514d6f2 gas: improve architecture mismatch diagnostics in sparc
Merely dumping the mnemonic name in "architecture mismatch" errors may
not provide enough information to determine what went wrong, as the same
mnemonic can be used for different variants of an instruction pertaining
to different architecture levels.

This little patch makes the assembler to include the instruction
arguments in the error message.

gas/ChangeLog:

2016-09-14  Jose E. Marchesi  <jose.marchesi@oracle.com>

	* config/tc-sparc.c (sparc_ip): Print the instruction arguments
	in "architecture mismatch" error messages.
2016-09-14 07:15:24 -07:00
Jose E. Marchesi 46a2d504dd gas: detect DCTI couples in sparc
Before SPARC V9 the effect of having a delayed branch instruction in the
delay slot of a conditional delayed branch was undefined.

In SPARC V9 DCTI couples are well defined.

However, starting with the UltraSPARC Architecture 2005, DCTI
couples (of all kind) are deprecated and should not be used, as they may
be slow or behave differently to what the programmer expects.

This patch adds a new command line option --dcti-couples-detect to `as',
disabled by default, that makes the assembler to warn the user if an
unpredictable DCTI couple is found.  Tests and documentation are
included.

gas/ChangeLog:

2016-09-14  Jose E. Marchesi  <jose.marchesi@oracle.com>

	* config/tc-sparc.c (md_assemble): Detect and warning on
	unpredictable DCTI couples in certain arches.
	(dcti_couples_detect): New global.
	(md_longopts): Add command line option -dcti-couples-detect.
	(md_show_usage): Document -dcti-couples-detect.
	(md_parse_option): Handle OPTION_DCTI_COUPLES_DETECT.
	* testsuite/gas/sparc/sparc.exp (gas_64_check): Run
	dcti-couples-v8, dcti-couples-v9 and dcti-couples-v9c tests.
	* testsuite/gas/sparc/dcti-couples.s: New file.
	* testsuite/gas/sparc/dcti-couples-v9c.d: Likewise.
	* testsuite/gas/sparc/dcti-couples-v8.d: Likewise.
	* testsuite/gas/sparc/dcti-couples-v9.d: Likewise.
	* testsuite/gas/sparc/dcti-couples-v9c.l: Likewise.
	* testsuite/gas/sparc/dcti-couples-v8.l: Likewise.
	* doc/as.texinfo (Overview): Document --dcti-couples-detect.
	* doc/c-sparc.texi (Sparc-Opts): Likewise.
2016-09-14 07:10:49 -07:00
Stefan Trleman 024425668d Fix generation of relocs for 32-bit Sparc Solaris targets.
PR gas/20427
	* config/tc-sparc.c (cons_fix_new_sparc): Prevent the generation
	of 64-bit relocation types when assembling for a 32-bit Solaris
	target.
2016-08-04 14:57:23 +01:00
Trevor Saunders 9bceab4193 sparc: make a field type bfd_reloc_code_real_type
gas/ChangeLog:

2016-07-19  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>

	* config/tc-sparc.c (struct pop_entry): Make the type of reloc
	bfd_reloc_code_real_type.
2016-07-19 07:50:38 -04:00
Trevor Saunders cf80913ab8 sparc: remove a sentinal
gas/ChangeLog:

2016-07-19  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>

	* config/tc-sparc.c (pop_table): Remove sentinel.
	(NUM_PERC_ENTRIES): Use ARRAY_SIZE on pop_table.
	(md_begin): Adjust.
2016-07-19 07:50:02 -04:00
Jose E. Marchesi 96074adc6a opcodes,gas: sparc: fix rdasr,wrasr,rdpr,wrpr,rdhpr,wrhpr insns.
This patch fixes and expands the definition of the read/write
instructions for ancillary-state, privileged and hyperprivileged
registers in opcodes.

It also adds support for three new v9m hyperprivileged registers:
%hmcdper, %hmcddfr and %hva_mask_nz.

Finally, the patch expands existing tests (and adds several new ones) in
order to cover all the read/write instructions in all its variants.

opcodes/ChangeLog:

2016-06-17  Jose E. Marchesi  <jose.marchesi@oracle.com>

	* sparc-opc.c (rdasr): New macro.
	(wrasr): Likewise.
	(rdpr): Likewise.
	(wrpr): Likewise.
	(rdhpr): Likewise.
	(wrhpr): Likewise.
	(sparc_opcodes): Use the macros above to fix and expand the
	definition of read/write instructions from/to
	asr/privileged/hyperprivileged instructions.
	* sparc-dis.c (v9_hpriv_reg_names): Add %hmcdper, %hmcddfr and
	%hva_mask_nz.  Prefer softint_set and softint_clear over
	set_softint and clear_softint.
	(print_insn_sparc): Support %ver in Rd.

gas/ChangeLog:

2016-06-17  Jose E. Marchesi  <jose.marchesi@oracle.com>

	* config/tc-sparc.c (hpriv_reg_table): Add registers %hmcdper,
	%hmcddfr and %hva_mask_nz.
	(sparc_ip): New handling of asr/privileged/hyperprivileged
	registers, adapted to the new form of the sparc opcodes table.
	* testsuite/gas/sparc/rdasr.s: New file.
	* testsuite/gas/sparc/rdasr.d: Likewise.
	* testsuite/gas/sparc/wrasr.s: Likewise.
	* testsuite/gas/sparc/wrasr.d: Likewise.
	* testsuite/gas/sparc/sparc.exp (sparc_elf_setup): Add rdasr and
	wrasr tests.
	* testsuite/gas/sparc/rdpr.d: Use -Av9m, as some privileged
	registers require it.
	* testsuite/gas/sparc/wrpr.s: Complete to cover all privileged
	registers and write instruction modalities.
	* testsuite/gas/sparc/wrpr.d: Likewise.
	* testsuite/gas/sparc/rdhpr.s: Likewise for hyperprivileged
	registers.
	* testsuite/gas/sparc/rdhpr.d: Likewise.
	* testsuite/gas/sparc/wrhpr.s: Likewise.
	* testsuite/gas/sparc/wrhpr.d: Likewise.
2016-06-17 02:15:43 -07:00
Jose E. Marchesi 7a10c22feb opcodes,gas: adjust sparc insns and make GAS aware of it
This patch marks the SPARC instructions in the opcodes table with their
proper opcode architectures, and makes the assembler aware of them.
This allows the assembler to properly realize when a new instruction
needs a higher architecture (after v9b) and to react accordingly
emitting an error message or bumping the architecture.

It also expands architecture mismatch tests to cover architectures
higher than v9b, and fixes a couple of minor bugs in the GAS testsuite.

opcodes/ChangeLog:

2016-06-17  Jose E. Marchesi  <jose.marchesi@oracle.com>

	* sparc-opc.c (sparc_opcodes): Adjust instructions opcode
	architecture according to the hardware capabilities they require.
	(sparc_priv_regs): New table.
	(sparc_hpriv_regs): Likewise.
	(sparc_asr_regs): Likewise.
	(v9anotv9m): Define.

gas/ChangeLog:

2016-06-17  Jose E. Marchesi  <jose.marchesi@oracle.com>

	* config/tc-sparc.c (sparc_arch_table): adjust the GAS
	architectures to use the right opcode architecture.
	(sparc_md_end): Handle v9{c,d,e,v,m}.
	(sparc_ip): Fix some comments.
	* testsuite/gas/sparc/ldx_efsr.d: Fix the architecture of this
	instruction, which is v9d.
	* testsuite/gas/sparc/mwait.s: Remove the `rd %mwait,%g1'
	instruction from the test, as %mwait is not readable.
	* testsuite/gas/sparc/mwait.d: Likewise.
	* testsuite/gas/sparc/mism-1.s: Expand to check v9b and v9e
	mismatch architecture errors.
	* testsuite/gas/sparc/mism-2.s: New file.
2016-06-17 02:14:18 -07:00
Jose E. Marchesi 8b8c7c9f49 gas: sparc: fix collision of registers and pseudo-ops.
The current sparc assembler breaks when the name of an ancillary-state
register, privileged register or hyperprivileged register has a
%-pseudo-operation name as a prefix.  For example, %hmcdper and %hm(),
or %hintp and %hi().

This patch fixes it by introducing a new table `perc_table' (for
%-table) that contains an entry for every %name supported by the
assembler, other than the general registers.  This table is used to
detect name collisions when the assembler tries to detect a %-pseudo-op.

This patch also fixes a related bug, making sure that v9a_asr_table and
hpriv_reg_table are sorted in reverse lexicographic order, as otherwise
the search code may fail.

gas/ChangeLog:

2016-06-17  Jose E. Marchesi  <jose.marchesi@oracle.com>

	* config/tc-sparc.c (priv_reg_table): Use NULL instead of the
	empty string to mark the end of the array.
	(hpriv_reg_table): Likewise.
	(v9a_asr_table): Likewise.
	(cmp_reg_entry): Handle entries with NULL names.
	(F_POP_V9): Define.
	(F_POP_PCREL): Likewise.
	(F_POP_TLS_CALL): Likewise.
	(F_POP_POSTFIX): Likewise.
	(struct pop_entry): New type.
	(pop_table): New variable.
	(enum pop_entry_type): New type.
	(struct perc_entry): Likewise.
	(NUM_PERC_ENTRIES): Define.
	(perc_table): New variable.
	(cmp_perc_entry): New function.
	(md_begin): Sort hpriv_reg_table and v9a_asr_table, and initialize
	perc_table.
	(sparc_ip): Handle entries with NULL names in priv_reg_table,
	hpriv_reg_table and v9a_asr_table.  Use perc_table to handle
	%-pseudo-ops.
2016-06-17 02:13:30 -07:00
Trevor Saunders add39d2344 use XNEW and related macros more
Its a bit shorter and simpler than raw xmalloc.

gas/ChangeLog:

2016-05-13  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>

	* app.c (app_push): Use XNEW and related macros.
	* as.c (parse_args): Likewise.
	* cgen.c (make_right_shifted_expr): Likewise.
	(gas_cgen_tc_gen_reloc): Likewise.
	* config/bfin-defs.h: Likewise.
	* config/bfin-parse.y: Likewise.
	* config/obj-coff.c (stack_init): Likewise.
	(stack_push): Likewise.
	(coff_obj_symbol_new_hook): Likewise.
	(coff_obj_symbol_clone_hook): Likewise.
	(add_lineno): Likewise.
	(coff_frob_symbol): Likewise.
	* config/obj-elf.c (obj_elf_section_name): Likewise.
	(build_group_lists): Likewise.
	* config/obj-evax.c (evax_symbol_new_hook): Likewise.
	* config/obj-macho.c (obj_mach_o_indirect_symbol): Likewise.
	* config/tc-aarch64.c (insert_reg_alias): Likewise.
	(find_or_make_literal_pool): Likewise.
	(add_to_lit_pool): Likewise.
	(fill_instruction_hash_table): Likewise.
	* config/tc-alpha.c (load_expression): Likewise.
	(emit_jsrjmp): Likewise.
	(s_alpha_ent): Likewise.
	(s_alpha_end): Likewise.
	(s_alpha_linkage): Likewise.
	(md_begin): Likewise.
	(tc_gen_reloc): Likewise.
	* config/tc-arc.c (arc_insert_opcode): Likewise.
	(arc_extcorereg): Likewise.
	* config/tc-bfin.c: Likewise.
	* config/tc-cr16.c: Likewise.
	* config/tc-cris.c: Likewise.
	* config/tc-crx.c (preprocess_reglist): Likewise.
	* config/tc-d10v.c: Likewise.
	* config/tc-frv.c (frv_insert_vliw_insn): Likewise.
	(frv_tomcat_shuffle): Likewise.
	* config/tc-h8300.c: Likewise.
	* config/tc-i370.c (i370_macro): Likewise.
	* config/tc-i386.c (lex_got): Likewise.
	(md_parse_option): Likewise.
	* config/tc-ia64.c (alloc_record): Likewise.
	(set_imask): Likewise.
	(save_prologue_count): Likewise.
	(dot_proc): Likewise.
	(dot_endp): Likewise.
	(ia64_frob_label): Likewise.
	(add_qp_imply): Likewise.
	(add_qp_mutex): Likewise.
	(mark_resource): Likewise.
	(dot_alias): Likewise.
	* config/tc-m68hc11.c: Likewise.
	* config/tc-m68k.c (m68k_frob_label): Likewise.
	(s_save): Likewise.
	(mri_control_label): Likewise.
	(push_mri_control): Likewise.
	(build_mri_control_operand): Likewise.
	(s_mri_else): Likewise.
	(s_mri_break): Likewise.
	(s_mri_next): Likewise.
	(s_mri_for): Likewise.
	(s_mri_endw): Likewise.
	* config/tc-metag.c (create_mnemonic_htab): Likewise.
	* config/tc-microblaze.c: Likewise.
	* config/tc-mmix.c (s_loc): Likewise.
	* config/tc-nds32.c (nds32_relax_hint): Likewise.
	* config/tc-nios2.c (nios2_insn_reloc_new): Likewise.
	* config/tc-rl78.c: Likewise.
	* config/tc-rx.c (rx_include): Likewise.
	* config/tc-sh.c: Likewise.
	* config/tc-sh64.c (shmedia_frob_section_type): Likewise.
	* config/tc-sparc.c: Likewise.
	* config/tc-spu.c: Likewise.
	* config/tc-tic6x.c (static tic6x_unwind_info *tic6x_get_unwind): Likewise.
	(tic6x_start_unwind_section): Likewise.
	* config/tc-tilegx.c: Likewise.
	* config/tc-tilepro.c: Likewise.
	* config/tc-v850.c: Likewise.
	* config/tc-visium.c: Likewise.
	* config/tc-xgate.c: Likewise.
	* config/tc-xtensa.c (xtensa_translate_old_userreg_ops): Likewise.
	(new_resource_table): Likewise.
	(resize_resource_table): Likewise.
	(xtensa_create_trampoline_frag): Likewise.
	(xtensa_maybe_create_literal_pool_frag): Likewise.
	(cache_literal_section): Likewise.
	* config/xtensa-relax.c (append_transition): Likewise.
	(append_condition): Likewise.
	(append_value_condition): Likewise.
	(append_constant_value_condition): Likewise.
	(append_literal_op): Likewise.
	(append_label_op): Likewise.
	(append_constant_op): Likewise.
	(append_field_op): Likewise.
	(append_user_fn_field_op): Likewise.
	(enter_opname_n): Likewise.
	(enter_opname): Likewise.
	(split_string): Likewise.
	(parse_insn_templ): Likewise.
	(clone_req_or_option_list): Likewise.
	(clone_req_option_list): Likewise.
	(parse_option_cond): Likewise.
	(parse_insn_pattern): Likewise.
	(parse_insn_repl): Likewise.
	(build_transition): Likewise.
	(build_transition_table): Likewise.
	* dw2gencfi.c (alloc_fde_entry): Likewise.
	(alloc_cfi_insn_data): Likewise.
	(cfi_add_CFA_remember_state): Likewise.
	(dot_cfi_escape): Likewise.
	(dot_cfi_fde_data): Likewise.
	(select_cie_for_fde): Likewise.
	* dwarf2dbg.c (dwarf2_directive_loc): Likewise.
	* ecoff.c (ecoff_add_bytes): Likewise.
	(ecoff_build_debug): Likewise.
	* input-scrub.c (input_scrub_push): Likewise.
	(input_scrub_begin): Likewise.
	(input_scrub_next_buffer): Likewise.
	* itbl-ops.c (append_insns_as_macros): Likewise.
	(alloc_entry): Likewise.
	(alloc_field): Likewise.
	* listing.c (listing_newline): Likewise.
	(listing_listing): Likewise.
	* macro.c (get_any_string): Likewise.
	(delete_macro): Likewise.
	* stabs.c (generate_asm_file): Likewise.
	(stabs_generate_asm_lineno): Likewise.
	* subsegs.c (subseg_change): Likewise.
	(subseg_get): Likewise.
	* symbols.c (define_dollar_label): Likewise.
	(symbol_relc_make_sym): Likewise.
	* write.c (write_relocs): Likewise.
2016-05-13 00:35:51 -04:00
Trevor Saunders 4f2a7b5121 make a few variables static
They are only used in one file, so we might as well restrict there scope to
that file, and theoretically this might slightly improve compilers ability to
optimize usage of these variables.

gas/ChangeLog:

2016-04-14  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>

	* config/tc-nios2.c (nios2_as_options): Make file static.
	* config/tc-ppc.c (toc_reloc_ypes): Likewise.
	* config/tc-sparc.c (native_op_table): Likewise.
2016-04-14 17:06:26 -04:00
Nick Clifton e140100a5d Allow integer contants to have a U suffix. Improve error reporting for missing closing parentheses.
PR gas/19910
	* config/tc-sparc.c (sparc_ip): Report an error if the expression
	inside a %-macro could not be fully parsed.
	* expr.c (integer_constant): Accept and ignore U suffixes to
	integers.
	(operand): When a missing closing parenthesis is encountered,
	report the character that was found instead.
	* testsuite/gas/mips/tls-ill.l: Update expected error message.
	* testsuite/gas/sparc/pr19910-1.d: New test driver.
	* testsuite/gas/sparc/pr19910-1.s: New test.
	* testsuite/gas/sparc/pr19910-2.l: Expected error output.
	* testsuite/gas/sparc/pr19910-2.s: New test.
	* testsuite/gas/sparc/sparc.exp: Run the new tests.
2016-04-07 12:34:06 +01:00
Alan Modra 6d4af3c269 Constify more
* cgen.c (weak_operand_overflow_check): Return const char*.
	* messages.c (as_internal_value_out_of_range): Formatting.
	(as_warn_value_out_of_range): Consify prefix param.
	(as_bad_value_out_of_range): Likewise.
	* read.c (s_errwarn): Constify msg..
	(s_float_space, float_cons): ..and err.
	* as.h (as_warn_value_out_of_range, as_bad_value_out_of_range,
	ieee_md_atof, vax_md_atof): Update prototypes.
	* tc.h (md_atof): Update prototype.
	* config/atof-ieee.c (ieee_md_atof): Return const char*.
	* config/atof-vax.c (vax_md_atof): Likewise.
	* config/obj-elf.c (obj_elf_parse_section_letters): Constify bad_msg.
	* config/tc-aarch64.c (md_atof): Return const char*.
	* config/tc-alpha.c (s_alpha_section_name): Likewise.
	(s_alpha_comm): Constify sec_name.
	(section_name): Constify.
	(s_alpha_section): Consify name..
	(alpha_elf_section_letter): ..and ptr_msg param..
	(md_atof): ..and return.
	* config/tc-alpha.h (alpha_elf_section_letter): Update prototype.
	* config/tc-arc.c (md_atof): Return const char*.
	* config/tc-arm.c (md_atof): Likewise.
	* config/tc-avr.c (md_atof): Likewise.
	* config/tc-bfin.c (md_atof): Likewise.
	* config/tc-cr16.c (md_atof): Likewise.
	* config/tc-cris.c (md_atof): Likewise.
	* config/tc-crx.c (md_atof): Likewise.
	* config/tc-d10v.c (md_atof): Likewise.
	* config/tc-d30v.c (md_atof): Likewise.
	* config/tc-dlx.c (md_atof): Likewise.
	* config/tc-epiphany.c (md_atof): Likewise.
	* config/tc-fr30.c (md_atof): Likewise.
	* config/tc-frv.c (md_atof): Likewise.
	* config/tc-ft32.c (md_atof): Likewise.
	* config/tc-h8300.c (md_atof): Likewise.
	* config/tc-hppa.c (struct default_subspace_dict): Constify name.
	(struct default_space_dict): Likewise.
	(create_new_space): Constify name param.
	(create_new_subspace): Likewise.
	(is_defined_space, is_defined_subspace): Likewise.
	(pa_parse_space_stmt): Constify space_name param.
	(md_atof): Return const char*.
	(pa_spaces_begin): Constify name.
	* config/tc-i370.c (md_atof): Return const char*.
	* config/tc-i386.c (md_atof): Likewise.
	(x86_64_section_letter): Constify ptr_msg param.
	* config/tc-i386.h (x86_64_section_letter): Update prototype.
	* config/tc-i860.c (struct i860_it): Constify error.
	(md_atof): Return const char*.
	* config/tc-i960.c (md_atof): Likewise.
	* config/tc-ia64.c (md_atof): Likewise.
	(ia64_elf_section_letter): Constify ptr_msg param.
	* config/tc-ia64.h (ia64_elf_section_letter): Update prototype.
	* config/tc-ip2k.c (md_atof): Return const char*.
	* config/tc-iq2000.c (md_atof): Likewise.
	* config/tc-lm32.c (md_atof): Likewise.
	* config/tc-m32c.c (md_atof): Likewise.
	* config/tc-m32r.c (md_atof): Likewise.
	* config/tc-m68hc11.c (md_atof): Likewise.
	* config/tc-m68k.c (md_atof): Likewise.
	* config/tc-mcore.c (md_atof): Likewise.
	* config/tc-mep.c (md_atof): Likewise.
	(mep_elf_section_letter): Constify ptr_msg param.
	* config/tc-mep.h (mep_elf_section_letter): Update prototype.
	* config/tc-metag.c (md_atof): Return const char*.
	* config/tc-microblaze.c (md_atof): Likewise.
	* config/tc-microblaze.h (md_atof): Delete prototype.
	* config/tc-mips.c (mips_parse_argument_token): Constify err.
	(md_atof): Return const char*.
	* config/tc-mmix.c (md_atof): Likewise.
	* config/tc-mn10200.c (md_atof): Likewise.
	* config/tc-mn10300.c (md_atof): Likewise.
	* config/tc-moxie.c (md_atof): Likewise.
	* config/tc-msp430.c (md_atof): Likewise.
	* config/tc-mt.c (md_atof): Likewise.
	* config/tc-nds32.c (md_atof): Likewise.
	* config/tc-nios2.c (md_atof): Likewise.
	(nios2_elf_section_letter): Constify ptr_msg param.
	* config/tc-nios2.h (nios2_elf_section_letter): Update prototype.
	* config/tc-ns32k.c (md_atof): Return const char*.
	* config/tc-or1k.c (md_atof): Likewise.
	* config/tc-pdp11.c (struct pdp11_code): Constify error.
	(md_atof): Return const char*.
	* config/tc-pj.c (md_atof): Likewise.
	* config/tc-ppc.c (md_atof): Likewise.
	* config/tc-rl78.c (md_atof): Likewise.
	* config/tc-rx.c (md_atof): Likewise.
	* config/tc-s390.c (md_atof): Likewise.
	* config/tc-score.c (s3_atof, md_atof): Likewise.
	* config/tc-sh.c (md_atof): Likewise.
	* config/tc-sparc.c (struct sparc_it): Constify error.
	(md_atof): Return const char*.
	* config/tc-spu.c (md_atof): Likewise.
	* config/tc-tic30.c (md_atof): Likewise.
	* config/tc-tic4x.c (md_atof): Likewise.
	* config/tc-tic54x.c (md_atof): Likewise.
	* config/tc-tic6x.c (md_atof): Likewise.
	* config/tc-tilegx.c (md_atof): Likewise.
	* config/tc-tilepro.c (md_atof): Likewise.
	* config/tc-v850.c (parse_register_list, md_atof): Likewise.
	* config/tc-vax.c (md_atof): Likewise.
	* config/tc-visium.c (md_atof): Likewise.
	* config/tc-xc16x.c (md_atof): Likewise.
	* config/tc-xgate.c (md_atof): Likewise.
	* config/tc-xstormy16.c (md_atof): Likewise.
	* config/tc-xtensa.c (md_atof): Likewise.
	* config/tc-z80.c (md_atof): Likewise.
	* config/tc-z8k.c (md_atof): Likewise.
2016-04-01 23:10:50 +10:30
Trevor Saunders e87de5136e work around get_symbol_name () in sparc and ia64
get_symbol_name () returns a char * in a out arg, which means we need to cast
to assign a literal to the variable passed to get_symbol_name ().  It seems
like better APIs than get_symbol_name () could be provided, but that seems like
a fair amount of work so just casting seems to be the betterthing to do for
now.

gas/ChangeLog:

2016-03-31  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>

	* config/tc-ia64.c (md_assemble): Add temporary variable to pass to
	get_symbol_name ().
	* config/tc-sparc.c (s_register): Cast a literal to char * in
	assignment.
2016-03-31 07:27:36 -04:00
Trevor Saunders 17b9d67d4e make md_parse_option () take a const char *
This is mostly just adding const in many places, however there are a couple
interesting things.  We need to add casts in tc-s390.c and tc-cris.c because
they have functions that assign to input_line_pointer an argument that
sometimes comes from md_parse_option.  Presumably this is safe because those
targets never pass literals to md_parse_option (), but this code should
probably be improved in the future.  Also xtensa passes the argument to strtoll
which is a rather odd function, it takes a const char * as argument and returns
a pointer into that string as a char * through an out argument, but we can work
around that by adding more variables.

gas/ChangeLog:

2016-03-29  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>

	* config/tc-aarch64.c (struct aarch64_long_option_table): Ad const
	qualifier.
	* config/tc-alpha.c (md_parse_option): Likewise.
	* config/tc-arc.c (md_parse_option): Likewise.
	* config/tc-arm.c (struct arm_long_option_table): Likewise.
	(md_parse_option): Likewise.
	* config/tc-avr.c (md_parse_option): Likewise.
	* config/tc-bfin.c (md_parse_option): Likewise.
	* config/tc-cr16.c (md_parse_option): Likewise.
	* config/tc-cris.c (s_cris_arch): Likewise.
	(md_parse_option): Likewise.
	* config/tc-crx.c (md_parse_option): Likewise.
	* config/tc-d10v.c (md_parse_option): Likewise.
	* config/tc-d30v.c (md_parse_option): Likewise.
	* config/tc-dlx.c (md_parse_option): Likewise.
	* config/tc-epiphany.c (md_parse_option): Likewise.
	* config/tc-fr30.c (md_parse_option): Likewise.
	* config/tc-frv.c (md_parse_option): Likewise.
	* config/tc-ft32.c (md_parse_option): Likewise.
	* config/tc-h8300.c (md_parse_option): Likewise.
	* config/tc-hppa.c (md_parse_option): Likewise.
	* config/tc-i370.c (md_parse_option): Likewise.
	* config/tc-i386.c (md_parse_option): Likewise.
	* config/tc-i860.c (md_parse_option): Likewise.
	* config/tc-i960.c (md_parse_option): Likewise.
	* config/tc-ia64.c (md_parse_option): Likewise.
	* config/tc-ip2k.c (md_parse_option): Likewise.
	* config/tc-iq2000.c (md_parse_option): Likewise.
	* config/tc-lm32.c (md_parse_option): Likewise.
	* config/tc-m32c.c (md_parse_option): Likewise.
	* config/tc-m32r.c (md_parse_option): Likewise.
	* config/tc-m68hc11.c (md_parse_option): Likewise.
	* config/tc-m68k.c (md_parse_option): Likewise.
	* config/tc-mcore.c (md_parse_option): Likewise.
	* config/tc-mep.c (md_parse_option): Likewise.
	* config/tc-metag.c (struct metag_long_option): Likewise.
	(md_parse_option): Likewise.
	* config/tc-microblaze.c (md_parse_option): Likewise.
	* config/tc-microblaze.h (md_parse_option): Remove prototype.
	* config/tc-mips.c (md_parse_option): Adjust.
	* config/tc-mmix.c (md_parse_option): Likewise.
	* config/tc-mn10200.c (md_parse_option): Likewise.
	* config/tc-mn10300.c (md_parse_option): Likewise.
	* config/tc-moxie.c (md_parse_option): Likewise.
	* config/tc-msp430.c (md_parse_option): Likewise.
	* config/tc-mt.c (md_parse_option): Likewise.
		* config/tc-nds32.c (md_parse_option): Likewise.
		* config/tc-nds32.h (nds32_parse_option): Likewise.
	* config/tc-nios2.c (md_parse_option): Likewise.
	* config/tc-ns32k.c (md_parse_option): Likewise.
	* config/tc-or1k.c (md_parse_option): Likewise.
	* config/tc-pdp11.c (md_parse_option): Likewise.
	* config/tc-pj.c (md_parse_option): Likewise.
	* config/tc-ppc.c (md_parse_option): Likewise.
	* config/tc-rl78.c (md_parse_option): Likewise.
	* config/tc-rx.c (md_parse_option): Likewise.
	* config/tc-s390.c (s390_parse_cpu): Likewise.
	* config/tc-score.c (md_parse_option): Likewise.
	* config/tc-sh.c (md_parse_option): Likewise.
	* config/tc-sparc.c (md_parse_option): Likewise.
	* config/tc-spu.c (md_parse_option): Likewise.
	* config/tc-tic30.c (md_parse_option): Likewise.
	* config/tc-tic4x.c (md_parse_option): Likewise.
	* config/tc-tic54x.c (md_parse_option): Likewise.
	* config/tc-tic6x.c (md_parse_option): Likewise.
	* config/tc-tilegx.c (md_parse_option): Likewise.
	* config/tc-tilepro.c (md_parse_option): Likewise.
	* config/tc-v850.c (md_parse_option): Likewise.
	* config/tc-vax.c (md_parse_option): Likewise.
	* config/tc-visium.c (struct visium_long_option_table): Likewise.
	* config/tc-xc16x.c (md_parse_option): Likewise.
	* config/tc-xgate.c (md_parse_option): Likewise.
	* config/tc-xstormy16.c (md_parse_option): Likewise.
	* config/tc-xtensa.c (md_parse_option): Likewise.
	* config/tc-z80.c (md_parse_option): Likewise.
	* config/tc-z8k.c (md_parse_option): Likewise.
	* tc.h (md_parse_option): Likewise.
2016-03-29 07:43:25 -04:00
Jose E. Marchesi f65c3d1b26 gas: sparc: allow ASR registers in the 0..31 range in V9 and later
In the SPARC V9 (and later) versions of the SPARC specification, the
section C.1.1 "Register Names" specifies that:

"asr_reg.  An asr_reg is an Ancillary State Register name.  It may have
 one of the following values:

  %asr16-%asr31"

The rationale of having this restriction was that the registers from 16
to 31 are reserved to implementations, and are therefore "non-V9".  It
also assumes that the existing ASR registers in the range 0..31 will
have their own names such as %y, that can be used to access such
registers.

However, this is problematic.  When a new ASR register is introduced,
such as %mcdper a.k.a. %asr14, it is useful to be able to use %asr14 in
order to not depend on the latest version of the assembler.

The Solaris assembler is lax and allows to assembly instructions
referring to %asr0 to %asr31.  This patch makes the GNU assembler to
mimic that behavior.

gas/ChangeLog:

  2016-03-24  Jose E. Marchesi  <jose.marchesi@oracle.com>

	* config/tc-sparc.c (sparc_ip): Remove the V9 restriction on ASR
	registers to be in the 16..31 range.
2016-03-24 10:28:41 -07:00
Trevor Saunders 74b4e47aa6 tc-sparc.c: get rid of wierd usage of strchr ()
This lets us avoid assigning a literal to a char *, and perhaps more
importantly makes it clearer what is going on here.

gas/ChangeLog:

2016-03-22  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>

	* config/tc-sparc.c (sparc_regname_to_dw2regnum): Replace strchr ()
	call with a switch.
2016-03-22 19:12:00 -04:00
Trevor Saunders e0471c16c5 Convert more variables to a constant form.
* as.c (select_emulation_mode): Add const qualifiers.
	* as.h: Likewise.
	* config/bfin-defs.h: Likewise.
	* config/bfin-parse.y: Likewise.
	* config/rx-parse.y: Likewise.
	* config/tc-aarch64.c (struct aarch64_option_table): Likewise.
	(struct aarch64_cpu_option_table): Likewise.
	(struct aarch64_arch_option_table): Likewise.
	(struct aarch64_option_cpu_value_table): Likewise.
	(struct aarch64_long_option_table): Likewise.
	(struct aarch64_option_abi_value_table): Likewise.
	* config/tc-arm.c (struct reloc_entry): Likewise.
	(tc_gen_reloc): Likewise.
	(struct arm_option_table): Likewise.
	(struct arm_legacy_option_table): Likewise.
	(struct arm_cpu_option_table): Likewise.
	(struct arm_arch_option_table): Likewise.
	(struct arm_option_extension_value_table): Likewise.
	(struct arm_option_fpu_value_table): Likewise.
	(struct arm_option_value_table): Likewise.
	(struct arm_long_option_table): Likewise.
	* config/tc-avr.c (struct avr_opcodes_s): Likewise.
	(struct mcu_type_s): Likewise.
	(struct exp_mod_s): Likewise.
	(avr_operand): Likewise.
	(avr_operands): Likewise.
	* config/tc-d10v.c (md_begin): Likewise.
	* config/tc-dlx.c: Likewise.
	* config/tc-fr30.c (fr30_is_colon_insn): Likewise.
	* config/tc-ft32.c (parse_condition): Likewise.
	* config/tc-h8300.c (do_a_fix_imm): Likewise.
	* config/tc-hppa.c (pa_ip): Likewise.
	(hppa_regname_to_dw2regnum): Likewise.
	* config/tc-i370.c (i370_elf_suffix): Likewise.
	* config/tc-i960.c (struct tabentry): Likewise.
	* config/tc-m32r.c: Likewise.
	* config/tc-m68k.c: Likewise.
	* config/tc-m68k.h: Likewise.
	* config/tc-mcore.c (parse_psrmod): Likewise.
	* config/tc-metag.c (struct metag_core_option): Likewise.
	(struct metag_long_option): Likewise.
	* config/tc-microblaze.c: Likewise.
	* config/tc-mips.c (macro): Likewise.
	* config/tc-mn10200.c: Likewise.
	* config/tc-mn10300.c: Likewise.
	* config/tc-msp430.c (struct rcodes_s): Likewise.
	(struct hcodes_s): Likewise.
	(md_parse_option): Likewise.
	* config/tc-ns32k.c (struct ns32k_option): Likewise.
	(optlist): Likewise.
	* config/tc-ppc.c (ppc_elf_suffix): Likewise.
	(tc_ppc_regname_to_dw2regnum): Likewise.
	* config/tc-ppc.h: Likewise.
	* config/tc-rl78.c: Likewise.
	* config/tc-rx.c (struct cpu_type): Likewise.
	* config/tc-sh.c (sh_regname_to_dw2regnum): Likewise.
	* config/tc-sparc.c (struct priv_reg_entry): Likewise.
	(sparc_ip): Likewise.
	* config/tc-spu.c (insn_fmt_string): Likewise.
	* config/tc-tic54x.c (tic54x_set_default_include): Likewise.
	* config/tc-v850.c: Likewise.
	* config/tc-visium.c (struct visium_arch_option_table): Likewise.
	(struct visium_long_option_table): Likewise.
	* config/tc-xgate.c: Likewise.
	* config/tc-z8k.c: Likewise.
	* read.c (add_include_dir): Likewise.
	* read.h: Likewise.
2016-02-25 16:55:21 +00:00
Alan Modra 6f2750feaf Copyright update for binutils 2016-01-01 23:00:01 +10:30
Jose E. Marchesi ec892a0718 sparc: support %dN and %qN syntax for FP registers.
The SPARC Refence Manual documents the %dN and %qN syntax to
refer to double and quad-precision floating-point registers,
respectively.  See OSA2015 Appendix C, Assembly Language Syntax,
C1.1 Register Names.

This patch adds support for these names to GAS.  This eases the
porting of software from Solaris to GNU/Linux, as these register
names have been supported by the Solaris linker for a long time
and many assembler require that support.

gas/ChangeLog:

2015-12-09  Jose E. Marchesi  <jose.marchesi@oracle.com>

	* config/tc-sparc.c (sparc_ip): Support %dN and %qN notation for
	double and quad-precision floating-point registers.
2015-12-09 07:34:32 -05:00
Jose E. Marchesi 3807431192 Support for the sparc %pmcdper privileged register.
opcodes/ChangeLog:

2015-08-25  Jose E. Marchesi  <jose.marchesi@oracle.com>

	* sparc-dis.c (print_insn_sparc): Handle the privileged register
	%pmcdper.

gas/ChangeLog:

2015-08-25  Jose E. Marchesi  <jose.marchesi@oracle.com>

	* config/tc-sparc.c (priv_reg_table): New privileged register
	%pmcdper.

gas/testsuite/ChangeLog:

2015-08-25  Jose E. Marchesi  <jose.marchesi@oracle.com>

	* gas/sparc/wrpr.s: Test writing to the privileged %pmcdper
	register.
	* gas/sparc/wrpr.d: ...and the expected result.
	* gas/sparc/rdpr.s: Test reading from the privileged %pmcdper
	register.
	* gas/sparc/rdpr.d: ...and the expected result.
2015-08-25 17:16:34 +02:00
Nick Clifton d02603dc20 Allow symbol and label names to be enclosed in double quotes.
gas	PR gas/18581
	* expr.c (get_symbol_end): Rename to get_symbol_name.  Add a
	return parameter pointing to the start of the symbol.  Allow
	symbol names enclosed in double quotes.
	(restore_line_pointer): New function.  Replace the NUL character
	inserted into the input stream with the given character.  If the
	character was a double quote, advance the input pointer.
	* expr.h (get_symbol_end): Delete.
	(get_symbol_name): Add prototype.
	(restore_line_pointer): Prototype.
	* read.h (SKIP_WHITESPACE_AFTER_NAME): New macro.
	* doc/as.texinfo (Symbol Intro): Document that symbol names can
	now be enclosed in double quotes.
	* cond.c (s_ifdef): Replace get_symbol_end with get_symbol_name.
	Use restore_line_pointer to replace the NUL in the input stream.
	Use SKIP_WHITESPACE_AFTER_NAME to skip past the end of a symbol.
	Check for the use of double quoted symbol names.
	* expr.c: Likewise.
	* config/obj-aout.c: Likewise.
	* config/obj-coff-seh.c: Likewise.
	* config/obj-coff.c: Likewise.
	* config/obj-elf.c: Likewise.
	* config/obj-evax.c: Likewise.
	* config/obj-macho.c: Likewise.
	* config/obj-som.c: Likewise.
	* config/tc-alpha.c: Likewise.
	* config/tc-arc.c: Likewise.
	* config/tc-arm.c: Likewise.
	* config/tc-dlx.c: Likewise.
	* config/tc-h8300.c: Likewise.
	* config/tc-hppa.c: Likewise.
	* config/tc-i370.c: Likewise.
	* config/tc-i386-intel.c: Likewise.
	* config/tc-i386.c: Likewise.
	* config/tc-i960.c: Likewise.
	* config/tc-ia64.c: Likewise.
	* config/tc-iq2000.c: Likewise.
	* config/tc-m32r.c: Likewise.
	* config/tc-m68hc11.c: Likewise.
	* config/tc-m68k.c: Likewise.
	* config/tc-microblaze.c: Likewise.
	* config/tc-mips.c: Likewise.
	* config/tc-mmix.c: Likewise.
	* config/tc-mn10200.c: Likewise.
	* config/tc-mn10300.c: Likewise.
	* config/tc-nios2.c: Likewise.
	* config/tc-ppc.c: Likewise.
	* config/tc-s390.c: Likewise.
	* config/tc-score.c: Likewise.
	* config/tc-score7.c: Likewise.
	* config/tc-sparc.c: Likewise.
	* config/tc-tic4x.c: Likewise.
	* config/tc-tic54x.c: Likewise.
	* config/tc-tic6x.c: Likewise.
	* config/tc-tilegx.c: Likewise.
	* config/tc-tilepro.c: Likewise.
	* config/tc-v850.c: Likewise.
	* config/tc-xtensa.c: Likewise.
	* config/tc-z80.c: Likewise.
	* dw2gencfi.c: Likewise.
	* dwarf2dbgc.: Likewise.
	* ecoff.c: Likewise.
	* read.c: Likewise.
	* stabs.c: Likewise.

tests	PR gas/18581
	* gas/all/byte.d: Disable this test.  Quoted expressions
	are now allowed in .byte directives.
	* gas/all/quoted-sym-names.s: New test.
	* gas/all/quoted-sym-names.d: Expected output.
	* gas/all/gas.exp: Run the new test.
2015-08-21 16:42:14 +01:00
H.J. Lu 3739860c11 Remove trailing spaces in gas 2015-08-12 04:40:42 -07:00
Jose E. Marchesi 0d495746bb gas: typo in comment fixed.
gas/ChangeLog:

2015-05-06  Jose E. Marchesi  <jose.marchesi@oracle.com>

	* config/tc-sparc.c: Typo in comment fixed.
2015-05-06 09:28:22 -07:00
Jose E. Marchesi f9911bebca gas: support for the sparc %ncc condition codes register.
gas/ChangeLog:

2015-05-06  Jose E. Marchesi  <jose.marchesi@oracle.com>

	* config/tc-sparc.c (sparc_ip): Support the %ncc "natural"
	condition codes
	* doc/c-sparc.texi (Sparc-Regs): Document %ncc.

gas/testsuite/ChangeLog:

2015-05-06  Jose E. Marchesi  <jose.marchesi@oracle.com>

	* gas/sparc/natural.s: New file.
	* gas/sparc/natural-32.s: Likewise.
	* gas/sparc/natural.d: Likewise.
	* gas/sparc/natural-32.d: Likewise.
	* gas/sparc/sparc.exp (sparc_elf_setup): Run the tests natural and
	natural-32.
2015-05-06 09:26:23 -07:00
Alan Modra b90efa5b79 ChangeLog rotatation and copyright year update 2015-01-02 00:53:45 +10:30
Alan Modra ed9e98c214 Don't use register keyword
* expr.c (expr_symbol_where): Don't use register keyword.
	* app.c (app_push, app_pop, do_scrub_chars): Likewise.
	* ecoff.c (add_string, add_ecoff_symbol, add_aux_sym_symint,
	add_aux_sym_rndx, add_aux_sym_tir, add_procedure, add_file,
	ecoff_build_lineno, ecoff_setup_ext, allocate_cluster.
	allocate_scope, allocate_vlinks, allocate_shash,
	allocate_thash, allocate_tag, allocate_forward, allocate_thead,
	allocate_lineno_list): Likewise.
	* frags.c (frag_more, frag_var, frag_variant, frag_wane): Likewise.
	* input-file.c (input_file_push, input_file_pop): Likewise.
	* input-scrub.c (input_scrub_push, input_scrub_next_buffer): Likewise.
	* subsegs.c (subseg_change): Likewise.
	* symbols.c (colon, symbol_table_insert, symbol_find_or_make)
	(dollar_label_name, fb_label_name): Likewise.
	* write.c (relax_align): Likewise.
	* config/tc-alpha.c (s_alpha_pdesc): Likewise.
	* config/tc-bfin.c (bfin_s_bss): Likewise.
	* config/tc-i860.c (md_estimate_size_before_relax): Likewise.
	* config/tc-m68hc11.c (md_convert_frag): Likewise.
	* config/tc-m68k.c (m68k_ip, crack_operand): Likewise.
	(md_convert_frag_1, s_even): Likewise.
	* config/tc-mips.c (mips_clear_insn_labels): Likewise.
	* config/tc-mn10200.c (md_begin): Likewise.
	* config/tc-s390.c (s390_setup_opcodes, md_begin): Likewise.
	* config/tc-sh.c (sh_elf_cons): Likewise.
	* config/tc-tic4x.c (tic4x_cons, tic4x_stringer): Likewise.
	* config/m68k-parse.y (m68k_reg_parse): Likewise.  Convert from K&R.
	(yylex, m68k_ip_op, yyerror): Convert from K&R.
2014-11-04 22:40:45 +10:30
Alan Modra daf5e10e4c sparc-aout and sparc-coff breakage
* config/tc-sparc.c (sparc_md_end): Fix unused variable warnings.
2014-10-14 13:52:02 +10:30
Jose E. Marchesi 3d68f91c0f This is a series of patches that add support for the SPARC M7 cpu to
binutils.  They were discussed and approved here:

  https://sourceware.org/ml/binutils/2014-10/msg00038.html
2014-10-09 13:16:53 +01:00
Jose E. Marchesi 75ac3a7f57 gas: fix bumping to architectures >v9 in sparc64-* targets.
This patch fixes two related problems:

- By default gas is supposed to bump the current architecture
  (starting with v6) as it finds "higher" instructions as the
  assembling progresses.  There are four possible cases depending on
  the usage of the -A and -bump options:

  (a) No -A and -bump are specified.  In this case max_architecture
      must be the highest architecture not conflicting with the
      default architecture.  The default opcode architecture is
      indirectly set in configure.tgt and is "v9" in sparc64 systems
      (from "v9-64").  Thus the maximum architecture in sparc64
      systems must be "v9b".  No warnings are echoed when the assembly
      of an instruction bumps the current architecture.

  (b) Only -bump is specified.  This is like (a) but warnings are
      always issued when the assembly of an instruction bumps the
      current architecture.

  (c) Only -A is specified.  In this case bumping to a new
      architecture is an error.

  (d) Both -A and -bump are specified.  In this case max_architecture
      must be the highest architecture not conflicting with the
      default architecture, but warnings are only to be issued when
      bumping to an architecture higher than the architecture selected
      in the -A option.

  `max_architecture' is a global variable defined in tc-sparc.c which
  is initialized to the opcode architecture corresponding to the
  default architecture ("sparclite" for sparc-* targets and "v9" for
  sparc64-* targets).  Then in `md_begin' it is set to the highest
  non-conflicting architecture, but only when both -A and -bump are
  specified.

  Thus (a) does not work:

    $ echo "fzero %f0" | as
    {standard input}: Assembler messages:
    {standard input}:1: Error: Architecture mismatch on "fzero".
    {standard input}:1:  (Requires v9a|v9b; requested architecture is v9.)

  Neither (b):

    $ echo "fzero %f0" | as -bump
    {standard input}: Assembler messages:
    {standard input}:1: Error: Architecture mismatch on "fzero".
    {standard input}:1:  (Requires v9a|v9b; requested architecture is v9.)

  Only (d) does:

    $ echo "fzero %f0" | as -Av9 -bump
    {standard input}: Assembler messages:
    {standard input}:1: Warning: architecture bumped from "v6" to "v9a" on "fzero"

  This patch fixes that function to "upgrade" `max_architecture' also
  in the (a) and (b) cases.

  Note that this problem becomes apparent only in sparc64-* targets
  because in sparc-* targets the default architecture is the "higher"
  among the 32bit architectures ("sparclite").

- Gas maintains a set of hardware capabilities associated with each
  gas architecture, in `sparc_arch_table'.  On the other hand
  libopcodes maintains a set of hardware capabilities needed by each
  individual sparc instruction.

  When an instruction is assembled in `sparc_ip' gas checks for the
  presence of the hardware capabilities required by the instruction,
  emitting an error if some capability is missing.

  However, this mechanism does not work properly if the current
  architecture is bumped due to an instruction requiring new hw
  capabilities not present on either the default architecture or an
  architecture specified with -A:

  $ echo "fzero %f0" | as -bump
  {standard input}: Assembler messages:
  {standard input}:1: Warning: architecture bumped from "v6" to "v9a" on "fzero"
  {standard input}:1: Error: Hardware capability "vis" not enabled for "fzero".

  This patch fixes this by adding the set of required hw caps of an
  instruction if it triggers an architecture bump.

The patch has been tested in sparc64-unknown-linux-gnu.

gas/ChangeLog:

2014-09-12  Jose E. Marchesi  <jose.marchesi@oracle.com>

	* config/tc-sparc.c (sparc_ip): Update the set of allowed hwcaps
	when bumping the current architecture.
	(md_begin): Adjust the highetst architecture level also when a
	specific architecture is not requested.
2014-09-12 15:38:21 +02:00