Commit Graph

1180 Commits

Author SHA1 Message Date
H.J. Lu 6a718ea22c 2007-10-19 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (prefix_table): Use XS on psrldq and pslldq.
2007-10-19 23:24:00 +00:00
Nathan Sidwell 25b07cd9c4 opcodes/
* m68k-opc.c (m68k_opcodes): Correct move sr and ccr masks for
	coldfire.

	gas/testsuite/
	* gas/m68k/mcf-movsr.s: New.
	* gas/m68k/mcf-movsr.d: New.
	* gas/m68k/all.exp: Add mcf-movsr test.
2007-10-17 13:44:09 +00:00
Peter Bergner 91eb7075e3 * ppc-opc.c (powerpc_opcodes): Fix the first two operands of
dquaiq. to use the TE and FRT macros.
2007-10-16 02:55:30 +00:00
Peter Bergner 8dbcd839b1 gas/
* config/tc-ppc.c (ppc_setup_opcodes): Verify instructions are sorted
	according to major opcode number.

opcodes/

	* ppc-opc.c (TE): Correct signedness.
	(powerpc_opcodes): Sort psq_st and psq_stu according to major
	opcode number.
2007-10-16 02:26:30 +00:00
H.J. Lu d5d7db8e2f 2007-10-15 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (dis386_twobyte): Reformat.
	(prefix_table):  Likewise.
	(three_byte_table): Likewise.
2007-10-15 19:13:55 +00:00
Alan Modra 65be13330d * mcore-dis.c (print_insn_mcore): Protect "fprintf" var against
macro expansion.
2007-10-15 02:01:40 +00:00
H.J. Lu e2ec9d29b7 gas/
2007-10-12  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (process_operands): Check the firstxmm0
	field in opcode_modifier for instruction with a implicit
	xmm0 as the first operand.

opcodes/

2007-10-12  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (opcode_modifiers): Add FirstXmm0.

	* i386-opc.h (FirstXmm0): New.
	(IsPrefix): Updated.
	(i386_opcode_modifier): Add firstxmm0.

	* i386-opc.tbl (blendvpd): Replace RegKludge with FirstXmm0.
	(blendvps): Likewise.
	(pblendvb): Likewise.
	* i386-tbl.h: Regenerated.
2007-10-12 21:40:38 +00:00
H.J. Lu 88a94849aa 2007-10-12 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (prefix_table): Reformat pblendvb and blendvps.
2007-10-12 20:37:58 +00:00
H.J. Lu d55ee72f29 2007-10-10 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (v_mode): Defined as previous one + 1.
	(w_mode): Likewise.
	(d_mode): Likewise.
	(q_mode): Likewise.
	(t_mode): Likewise.
	(x_mode): Likewise.
	(m_mode): Likewise.
	(cond_jump_mode): Likewise.
	(loop_jcxz_mode): Likewise.
	(dq_mode): Likewise.
	(dqw_mode): Likewise.
	(f_mode): Likewise.
	(const_1_mode): Likewise.
	(stack_v_mode): Likewise.
	(z_mode): Likewise.
	(o_mode): Likewise.
	(dqb_mode): Likewise.
	(dqd_mode): Likewise.
	(es_reg): Likewise.
	(cs_reg): Likewise.
	(ss_reg): Likewise.
	(ds_reg): Likewise.
	(fs_reg): Likewise.
	(gs_reg): Likewise.
	(eAX_reg): Likewise.
	(eCX_reg): Likewise.
	(eDX_reg): Likewise.
	(eBX_reg): Likewise.
	(eSP_reg): Likewise.
	(eBP_reg): Likewise.
	(eSI_reg): Likewise.
	(eDI_reg): Likewise.
	(al_reg): Likewise.
	(cl_reg): Likewise.
	(dl_reg): Likewise.
	(bl_reg): Likewise.
	(ah_reg): Likewise.
	(ch_reg): Likewise.
	(dh_reg): Likewise.
	(bh_reg): Likewise.
	(ax_reg): Likewise.
	(cx_reg): Likewise.
	(dx_reg): Likewise.
	(bx_reg): Likewise.
	(sp_reg): Likewise.
	(bp_reg): Likewise.
	(si_reg): Likewise.
	(di_reg): Likewise.
	(rAX_reg): Likewise.
	(rCX_reg): Likewise.
	(rDX_reg): Likewise.
	(rBX_reg): Likewise.
	(rSP_reg): Likewise.
	(rBP_reg): Likewise.
	(rSI_reg): Likewise.
	(rDI_reg): Likewise.
	(z_mode_ax_reg): Likewise.
	(indir_dx_reg): Likewise.
	(DREX_OC1): Updated.
	(DREX_NO_OC0): Likewise.
	(DREX_MASK): Likewise.
	(MAX_BYTEMODE): New.  Issue an error if MAX_BYTEMODE is not
	less than DREX_OC1.
2007-10-10 16:25:02 +00:00
H.J. Lu 8a72226ad5 gas/testsuite/
2007-10-08  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/i386.exp: Run simd-suffix and x86-64-simd-suffix.

	* gas/i386/simd-suffix.d: New.
	* gas/i386/x86-64-simd-suffix.d: Likewise.

	* gas/i386/x86-64-opcode.d: Updated.
	* gas/i386/x86-64-simd.d: Likewise.

opcodes/

2007-10-08  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c: Updated comments for 'Y'.
	(putop): Don't add 'q' for 'Y' if suffix_always isn't true.
2007-10-08 19:22:01 +00:00
Maciej W. Rozycki f409fd1e69 opcodes/:
* opcodes/mips-dis.c (mips_cp0_names_r3000): New definition.
(mips_cp0_names_r4000): Likewise.
(mips_arch_choices): Link to the above as appropriate.

gas/testsuite/:
* gas/mips/cp0-names-r3000.d: New test for R3000 CP0 symbolic
disassembly.
* gas/mips/cp0-names-r4000.d: New test for R4000/R4400 symbolic
CP0 disassembly.
* mips/mips.exp: Run the new tests.
2007-10-08 16:41:35 +00:00
Nick Clifton defeac7384 * configure.in (SHARED_DEPENDENCIES): Change non-cygwin dependency to be ../bfd/libbfd.la.
* configure: Regenerate.
2007-10-08 15:40:41 +00:00
H.J. Lu 47dd174cba gas/testsuite/
2007-10-05  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/i386.exp: Run smx.

	* gas/i386/smx.d: New.
	* gas/i386/smx.s: Likewise.

opcodes/

2007-10-05  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (dis386_twobyte): Add getsec.

	* i386-gen.c (cpu_flags): Add CpuSMX.

	* i386-opc.h (CpuSMX): New.
	(CpuSSSE3): Updated.
	(i386_cpu_flags): Add cpusmx.

	* i386-opc.tbl: Add getsec.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.
2007-10-05 19:04:06 +00:00
H.J. Lu 058f233b7a 2007-10-05 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (reg_table): Use "{ XX }" on "(bad)".
	(prefix_table): Likewise.
2007-10-05 16:28:16 +00:00
H.J. Lu f2a421c445 gas/testsuite/
2007-10-04  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/simd.s: Add tests for unpckhpd and unpckhps.
	* gas/i386/x86-64-simd.s: Likewise.

	* gas/i386/simd-intel.d: Updated.
	* gas/i386/simd.d: Likewise.
	* gas/i386/x86-64-simd-intel.d: Likewise.
	* gas/i386/x86-64-simd.d: Likewise.

opcodes/

2007-10-04  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (dis386_twobyte): Use EXx instead of EXq on
	unpckhpX and unpckhpX.
2007-10-04 22:02:10 +00:00
David Daney c8ab98e0eb opcodes/
2007-10-04  David Daney  <ddaney@avtrex.com>

	* mips-opc.c (mips_builtin_opcodes): Mark lwxc1 as working on FP_S
	registers.

gas/testsuite/
2007-10-04  David Daney  <ddaney@avtrex.com>

	* gas/mips/odd-float.d, gas/mips/odd-float.s: New test.
	* gas/mips/mips.exp: Run it.
2007-10-04 21:53:06 +00:00
H.J. Lu df26e7af07 2007-10-04 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (MOD_0F12_PREFIX_0): Use "movlps" and "movhlps"
	instead of "movlpX" and "movhlpX", respectively.
	(MOD_0F16_PREFIX_0): Use "movhps" and "movlhps" instead of
	"movhpX" and "movlhpX", respectively.
2007-10-04 21:02:38 +00:00
Nick Clifton 45d42143d4 * configure.in (WIN32LDFLAGS): Rename to SHARED_LDFLAGS.
(WIN32LIBADD): Rename to SHARED_LIBADD
  (SHARED_DEPENDENCIES): New exported variable.
  (enable_shared): Add dependency upon libbfd.la for non-cygwin based shared library builds.
* Makefile.am (libopcodes_la_DEPENDENCIES): Append SHARED_DEPENDENCIES.
  (libopcodes_la_LIBADD): Rename WIN32LIBADD to SHARED_LIBADD.
  (libopcodes_la_LDFLAGS): Rename WIN32LDFLAGS to SHARED_LDFLAGS.
* configure: Regenerate.
* Makefile.in: Regenerate.
2007-10-04 14:06:40 +00:00
Nick Clifton 9f39ef2bb8 PR gas/5100
* arc-opc.c (insert_offset): Fix spelling mistake in error message.
2007-10-04 13:43:16 +00:00
H.J. Lu 9b60702d0c 2007-10-03 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (OP_REG): Set add to 0 only when needed.
	(OP_C): Likewise.
	(OP_D): Likewise.
	(OP_MMX): Likewise.
	(OP_XMM): Likewise.
	(OP_EM): Likewise.
	(OP_MXC): Likewise.
	(OP_EX): Likewise.
2007-10-03 19:30:44 +00:00
H.J. Lu 458fa39293 2007-10-03 H.J. Lu <hongjiu.lu@intel.com>
* i386-opc.tbl: Update SSE comments.
2007-10-03 19:03:20 +00:00
H.J. Lu 89b66d557a 2007-10-01 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (THREE_BYTE_0FBA): Renamed to ...
	(THREE_BYTE_0F7B): This.
	(dis386_twobyte): Updated.
	(three_byte_table): Updated comments.
2007-10-01 22:23:20 +00:00
Nick Clifton 7fac7ff4ae Various CR16 fixes 2007-10-01 15:55:44 +00:00
H.J. Lu 4584a60d9f 2007-09-30 H.J. Lu <hongjiu.lu@intel.com>
* 386-dis.c (prefix_table): Reformat comment.
2007-09-30 19:14:47 +00:00
H.J. Lu 1ceb70f8ad 2007-09-29 H.J. Lu <hongjiu.lu@intel.com>
* 386-dis.c (USE_GROUPS): Renamed to ...
	(USE_REG_TABLE): This.
	(USE_OPC_EXT_TABLE): Renamed to ...
	(USE_MOD_TABLE): This.
	(USE_OPC_EXT_RM_TABLE): Renamed to ...
	(USE_RM_TABLE): This.
	(USE_XXX_TABLE): Reordered.
	(GRP): Renamed to ...
	(REG_TABLE): This.
	(OPC_EXT_TABLE): Renamed to ...
	(MOD_TABLE): This.
	(OPC_EXT_RM_TABLE): Renamed to ...
	(RM_TABLE): This.
	(GRP_XXX): Renamed to ...
	(REG_XXX): This.
	(PREGRP_XXX): Renamed to ...
	(PREFIX_XXX): This.
	(OPC_EXT_XXX): Renamed to ...
	(MOD_XXX): This.
	(OPC_EXT_RM_XXX): Renamed to ...
	(RM_XXX): This.
	(grps): Renamed to ...
	(reg_table): This
	(prefix_user_table): Renamed to ...
	(prefix_table): This
	(opc_ext_table): Renamed to ...
	(mod_table): This
	(opc_ext_rm_table): Renamed to ...
	(rm_table): This
	(OPC_EXT_RM_XXX): Likewise.
	(dis386): Updated.
	(dis386_twobyte): Likewise.
	(reg_table): Likewise.
	(prefix_table): Likewise.
	(x86_64_table): Likewise.
	(three_byte_table): Likewise.
	(mod_table): Likewise.
	(rm_table): Likewise.
	(get_valid_dis386): Likewise.
2007-09-29 14:43:44 +00:00
H.J. Lu 4e7d34a6c2 2007-09-28 H.J. Lu <hongjiu.lu@intel.com>
* 386-dis.c (USE_PREFIX_USER_TABLE): Renamed to ...
	(USE_PREFIX_TABLE): This.
	(X86_64_SPECIAL): Renamed to ...
	(USE_X86_64_TABLE): This.
	(IS_3BYTE_OPCODE): Renamed to ...
	(USE_3BYTE_TABLE): This.
	(GRPXXX): Removed.
	(PREGRPXXX): Likewise.
	(X86_64_XXX): Likewise.
	(THREE_BYTE_XXX): Likewise.
	(OPC_EXT_XXX): Likewise.
	(OPC_EXT_RM_XXX): Likewise.
	(DIS386): New.
	(GRP): Likewise.
	(PREGRP): Likewise.
	(X86_64_TABLE): Likewise.
	(THREE_BYTE_TABLE): Likewise.
	(OPC_EXT_TABLE): Likewise.
	(OPC_EXT_RM_TABLE): Likewise.
	(GRP_XXX): Likewise.
	(PREGRP_XXX): Likewise.
	(X86_64_XXX): Likewise.
	(THREE_BYTE_XXX): Likewise.
	(OPC_EXT_XXX): Likewise.
	(OPC_EXT_RM_XXX): Likewise.
	(dis386): Updated.
	(dis386_twobyte): Likewise.
	(grps): Likewise.
	(prefix_user_table): Likewise.
	(x86_64_table): Likewise.
	(three_byte_table): Likewise.
	(opc_ext_table): Likewise.
	(opc_ext_rm_table): Likewise.
	(get_valid_dis386): Likewise.
2007-09-28 20:50:59 +00:00
H.J. Lu 6807063ec6 2007-09-27 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (dis386): Swap X86_64_27 with OPC_EXT_2.
	(x86_64_table): Likewise.
	(opc_ext_table): Likewise.
2007-09-27 21:53:28 +00:00
H.J. Lu 7c52e0e865 gas/testsuite/gas/
2007-09-27  H.J. Lu  <hongjiu.lu@intel.com>

	PR binutils/5072
	* gas/i386/i386.exp: Run x86-64-opcode-inval and
	x86-64-opcode-inval-intel.

	* gas/i386/x86-64-opcode-inval-intel.d: New.
	* gas/i386/x86-64-opcode-inval.d: Likewise.
	* gas/i386/x86-64-opcode-inval.s: Likewise.

opcodes/

2007-09-27  H.J. Lu  <hongjiu.lu@intel.com>

	PR binutils/5072
	* i386-dis.c: Update comments on '{', '}' and '|' to support
	only AT&T and Intel modes.
	(X86_64_4...X86_64_27): New.
	(dis386): Updated.  Use X86_64_4...X86_64_21.
	(dis386_twobyte): Updated.
	(float_mem): Likewise.
	(x86_64_table): Add X86_64_4...X86_64_27.
	(opc_ext_table): Updated.  Use X86_64_22 and X86_64_27.
	(putop): Updated handling of '{', '}' and '|' to support only
	AT&T and Intel modes.
2007-09-27 18:31:51 +00:00
Kazu Hirata d0fa13723f gas/
* config/m68k-parse.h (m68k_register): Use MBO instead of MBB.
	(last_movec_reg): Change to MBO.
	* config/tc-m68k.c (fido_ctrl): Use MBO instead of MBB.
	(m68k_ip): Use MBO instead of MBO.
	(init_table): Use MBO instead of MBO.  Add an entry for mbo.

gas/testsuite/
	* gas/m68k/fido.s: Add tests for %mbo.
	* gas/m68k/fido.d: Update accordingly.

opcodes/
	* m68k-dis.c (print_insn_arg): Use %mbo instead of %mbb.
2007-09-27 11:14:10 +00:00
Jim Wilson 7a53bcd4a8 Fix typo in last patch. 2007-09-26 18:11:04 +00:00
Nick Clifton 168411b181 * mt-asm.c (parse_imm16): Reword error message in order to allow it to be translated properly.
* ia64-gen.c (print_dependency_table): Likewise.
* mips-dis.c (print_insn_args): Likewise.
2007-09-26 16:07:18 +00:00
Jan Beulich 8776771175 gas/testsuite/
2007-09-26  Jan Beulich  <jbeulich@novell.com>

	* gas/i386/x86-64-addr32.d: Adjust expectations.

opcodes/
2007-09-26  Jan Beulich  <jbeulich@novell.com>

	* i386-dis.c (OP_E_extended): Distinguish rip- and eip-
	relative addressing. Update used_prefixes based on whether any
	base or index register was printed.
2007-09-26 13:42:14 +00:00
Jan Beulich 9a04903eea gas/
2007-09-26  Jan Beulich  <jbeulich@novell.com>

	* config/tc-i386.c (build_modrm_byte): Also check for RegEip
	when considering IP-relative addressing.

gas/testsuite/
2007-09-26  Jan Beulich  <jbeulich@novell.com>

	* gas/i386/reloc64.s: Adjust for %eip-relative addressing no
	longer generating errors.
	* gas/i386/reloc64.d, gas/i386/reloc64.l: Update.
	* gas/i386/x86-64-addr32.s: Remove explicit addr32 prefix
	for %eip-realtive addressing case.

opcodes/
2007-09-26  Jan Beulich  <jbeulich@novell.com>

	* i386-opc.h (RegEip): Define.
	(RegEiz): Adjust.
	* i386-reg.tbl: Add eip. Mark rip and eip with RegRex64.
	* i386-tbl.h: Re-generate.
2007-09-26 13:40:59 +00:00
H.J. Lu 4dffcebc10 gas/
2007-09-25  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (output_insn): Use i.tm.opcode_length to
	check opcode length.

opcodes/

2007-09-25  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (process_i386_opcodes): Process opcode_length.

	* i386-opc.h (template): Add opcode_length.
	* 386-opc.tbl: Likewise.
	* i386-tbl.h: Regenerated.
2007-09-26 04:42:47 +00:00
H.J. Lu a967d2b76a 2007-09-21 H.J. Lu <hongjiu.lu@intel.com>
* i386-opc.h: Adjust whitespaces.
2007-09-21 20:51:33 +00:00
Dave Brolley c99d3d7aef 2007-09-21 Dave Brolley <brolley@redhat.com>
* mep-desc.c: Regenerated.
2007-09-21 18:58:47 +00:00
H.J. Lu 20afcfb756 gas/testsuite/
2007-09-20  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/sib.s: Add more eiz tests.
	* gas/i386/x86-64-sib.s: Add more riz tests.

	* gas/i386/sib-intel.d: Updated.
	* gas/i386/sib.d: Likewise.
	* gas/i386/x86-64-sib-intel.d: Likewise.
	* gas/i386/x86-64-sib.d: Likewise.

opcodes/

2007-09-20  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (OP_E_extended): Display eiz for [eiz*1 + offset].
2007-09-20 20:13:26 +00:00
H.J. Lu db51cc60e2 gas/
2007-09-20  H.J. Lu  <hongjiu.lu@intel.com>

	PR 658
	* config/tc-i386.c (SCALE1_WHEN_NO_INDEX): Removed.
	(set_allow_index_reg): New.
	(allow_index_reg): Likewise.
	(md_pseudo_table): Add "allow_index_reg" and
	"disallow_index_reg".
	(build_modrm_byte): Set i.sib.index to NO_INDEX_REGISTER for
	fake index registers.
	(i386_scale): Updated.
	(i386_index_check): Support fake index registers.
	(parse_real_register): Return NULL on eiz/riz if fake index
	registers aren't allowed.

gas/testsuite/

2007-09-20  H.J. Lu  <hongjiu.lu@intel.com>

	PR 658
	* gas/i386/i386.exp: Run sib-intel, x86-64-sib and
	x86-64-sib-intel.

	* gas/i386/nops-1-i386-i686.d: Updated.
	* gas/i386/nops-1-i386.d: Likewise.
	* gas/i386/nops-1.d: Likewise.
	* gas/i386/nops-2-i386.d: Likewise.
	* gas/i386/nops-2-merom.d: Likewise.
	* gas/i386/nops-2.d: Likewise.
	* gas/i386/nops-3-i386.d: Likewise.
	* gas/i386/nops-3.d : Likewise.
	* gas/i386/sib.d: Likewise.

	* gas/i386/sib.s: Use %eiz in testcases.

	* gas/i386/sib-intel.d: New.
	* gas/i386/x86-64-sib-intel.d: Likewise.
	* gas/i386/x86-64-sib.d: Likewise.
	* gas/i386/x86-64-sib.s: Likewise.

ld/testsuite/

2007-09-20  H.J. Lu  <hongjiu.lu@intel.com>

	PR 658
	* ld-i386/tlsbin.dd: Updated.
	* ld-i386/tlsld1.dd: Likewise.

opcodes/

2007-09-20  H.J. Lu  <hongjiu.lu@intel.com>

	PR 658
	* 386-dis.c (index64): New.
	(index32): Likewise.
	(intel_index64): Likewise.
	(intel_index32): Likewise.
	(att_index64): Likewise.
	(att_index32): Likewise.
	(print_insn): Set index64 and index32.
	(OP_E_extended): Use index64/index32 for index register for
	SIB with INDEX == 4.

	* i386-opc.h (RegEiz): New.
	(RegRiz): Likewise.

	* i386-reg.tbl: Add eiz and riz.
	* i386-tbl.h: Regenerated.
2007-09-20 17:38:38 +00:00
H.J. Lu 0f7da3979d gas/testsuite/gas/
2007-09-19  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/intelok.s: Add tests for memory without base.
	* gas/i386/intelok.d: Updated.
	* gas/i386/intelok.e: Likewise.

opcodes/

2007-09-19  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (OP_E_extended): Always display scale for memory.
2007-09-19 17:52:21 +00:00
H.J. Lu 20e192ab8d gas/
2007-09-17  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (baseindex): Removed.
	(build_modrm_byte): Check reg_num for RIP register instead of
	reg_type.
	(i386_index_check): Likewise.

opcodes/

2007-09-17  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.h (RegRip): New.

	* i386-reg.tbl (rip): Use RegRip for reg_num.
	* i386-tbl.h: Regenerated.
2007-09-18 00:56:54 +00:00
Nick Clifton 7f396d02ee Updated Spanish translation 2007-09-17 14:06:03 +00:00
H.J. Lu c0e9c2a631 2007-09-14 H.J. Lu <hongjiu.lu@intel.com>
* Makefile.am: Run "make dep-am".
	* Makefile.in: Regenerate.
2007-09-14 19:28:56 +00:00
Michael Meissner 85f10a010c Add AMD SSE5 support 2007-09-14 18:21:09 +00:00
H.J. Lu 8bb1533941 2007-09-13 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (get_valid_dis386): Take a pointer to
	disassemble_info.  Handle IS_3BYTE_OPCODE.
	(print_insn): Updated.  Don't handle IS_3BYTE_OPCODE here.
2007-09-14 00:20:03 +00:00
H.J. Lu 8c6c980951 2007-09-12 H.J. Lu <hongjiu.lu@intel.com>
* i386-opc.h (CpuUnused): Defined with CpuMax.
	(OTUnused): Defined with OTMax.
2007-09-12 18:55:31 +00:00
Jan Beulich ae91ad40e9 gas/testsuite/
2007-09-12  Jan Beulich  <jbeulich@novell.com>
	* gas/i386/sse4_1.s, gas/i386/x86-64-sse4_1.s: Add two-operand forms
	of blendvps, blendvpd, and pblendvb.
	* gas/i386/sse4_1.d, gas/i386/sse4_1-intel.d,
	gas/i386/x86-64-sse4_1.d, gas/i386/x86-64-sse4_1-intel.d: Adjust,
	making last/first operand of blendvps, blendvpd, and pblendvb
	optional.

opcodes/
2007-09-12  Jan Beulich  <jbeulich@novell.com>

	* i386-opc.tbl: Add two-operand forms of blendvps, blendvpd, and
	pblendvb.
	* i386-tbl.h: Regenerate.
2007-09-12 13:20:31 +00:00
H.J. Lu 8b40d5948e 2007-09-09 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (main): Remove the local variable, unused.
2007-09-09 16:02:17 +00:00
H.J. Lu 331699936d 2007-09-08 H.J. Lu <hongjiu.lu@intel.com>
* Makefile.am: Run "make dep-am".
	* Makefile.in: Regenerate.
2007-09-09 01:34:48 +00:00
H.J. Lu 40fb982012 gas/
2007-09-08  H.J. Lu  <hongjiu.lu@intel.com>

	* configure.in (AC_CHECK_HEADERS): Add limits.h.
	* configure: Regenerated.
	* config.in: Likewise.

	* config/tc-i386.c: Include "opcodes/i386-init.h".
	(_i386_insn): Use i386_operand_type for types.
	(cpu_arch_flags): Updated to new types with bitfield.
	(cpu_arch_tune_flags): Likewise.
	(cpu_arch_isa_flags): Likewise.
	(cpu_arch): Likewise.
	(i386_align_code): Likewise.
	(set_code_flag): Likewise.
	(set_16bit_gcc_code_flag): Likewise.
	(set_cpu_arch): Likewise.
	(md_assemble): Likewise.
	(parse_insn): Likewise.
	(process_operands): Likewise.
	(output_branch): Likewise.
	(output_jump): Likewise.
	(parse_real_register): Likewise.
	(mode_from_disp_size): Likewise.
	(smallest_imm_type): Likewise.
	(pi): Likewise.
	(type_names): Likewise.
	(pt): Likewise.
	(pte): Likewise.
	(swap_2_operands): Likewise.
	(optimize_imm): Likewise.
	(optimize_disp): Likewise.
	(match_template): Likewise.
	(check_string): Likewise.
	(process_suffix): Likewise.
	(check_byte_reg): Likewise.
	(check_long_reg): Likewise.
	(check_qword_reg): Likewise.
	(check_word_reg): Likewise.
	(finalize_imm): Likewise.
	(build_modrm_byte): Likewise.
	(output_insn): Likewise.
	(disp_size): Likewise.
	(imm_size): Likewise.
	(output_disp): Likewise.
	(output_imm): Likewise.
	(gotrel): Likewise.
	(i386_immediate): Likewise.
	(i386_displacement): Likewise.
	(i386_index_check): Likewise.
	(i386_operand): Likewise.
	(parse_real_register): Likewise.
	(i386_intel_operand): Likewise.
	(intel_e09): Likewise.
	(intel_bracket_expr): Likewise.
	(intel_e11): Likewise.
	(cpu_arch_flags_not): New.
	(cpu_flags_check_x64): Likewise.
	(cpu_flags_all_zero): Likewise.
	(cpu_flags_not): Likewise.
	(i386_cpu_flags_biop): Likewise.
	(cpu_flags_biop): Likewise.
	(cpu_flags_match); Likewise.
	(acc32): New.
	(acc64): Likewise.
	(control): Likewise.
	(reg16_inoutportreg): Likewise.
	(disp16): Likewise.
	(disp32): Likewise.
	(disp32s): Likewise.
	(disp16_32): Likewise.
	(anydisp): Likewise.
	(baseindex): Likewise.
	(regxmm): Likewise.
	(imm8): Likewise.
	(imm8s): Likewise.
	(imm16): Likewise.
	(imm32): Likewise.
	(imm32s): Likewise.
	(imm64): Likewise.
	(imm16_32): Likewise.
	(imm16_32s): Likewise.
	(imm16_32_32s): Likewise.
	(operand_type): Likewise.
	(operand_type_check): Likewise.
	(operand_type_match): Likewise.
	(operand_type_register_match): Likewise.
	(update_imm): Likewise.
	(set_code_flag): Also update cpu_arch_flags_not.
	(set_16bit_gcc_code_flag): Likewise.
	(md_begin): Likewise.
	(parse_insn): Use cpu_flags_check_x64 to check 64bit support.
	Use cpu_flags_match to match instructions.
	(i386_target_format): Update cpu_arch_isa_flags and
	cpu_arch_tune_flags to i386_cpu_flags type with bitfield.
	(smallest_imm_type): Check cpu_arch_tune to tune for i486.
	(match_template): Don't initialize overlap0, overlap1,
	overlap2, overlap3 and operand_types.
	(process_suffix): Handle crc32 with 64bit register.
	(MATCH): Removed.
	(CONSISTENT_REGISTER_MATCH): Likewise.

	* config/tc-i386.h (arch_entry): Updated to i386_cpu_flags
	type.

opcodes/

2007-09-08  H.J. Lu  <hongjiu.lu@intel.com>

	* configure.in (AC_CHECK_HEADERS): Add limits.h.
	* configure: Regenerated.
	* config.in: Likewise.

	* i386-gen.c: Include "sysdep.h" instead of <stdlib.h> and
	<string.h>.  Use xstrerror instead of strerror.
	(initializer): New.
	(cpu_flag_init): Likewise.
	(bitfield): Likewise.
	(BITFIELD): New.
	(cpu_flags): Likewise.
	(opcode_modifiers): Likewise.
	(operand_types): Likewise.
	(compare): Likewise.
	(set_cpu_flags): Likewise.
	(output_cpu_flags): Likewise.
	(process_i386_cpu_flags): Likewise.
	(output_opcode_modifier): Likewise.
	(process_i386_opcode_modifier): Likewise.
	(output_operand_type): Likewise.
	(process_i386_operand_type): Likewise.
	(set_bitfield): Likewise.
	(operand_type_init): Likewise.
	(process_i386_initializers): Likewise.
	(process_i386_opcodes): Call process_i386_opcode_modifier to
	process opcode_modifier.  Call process_i386_operand_type to
	process operand_types.
	(process_i386_registers): Call process_i386_operand_type to
	process reg_type.
	(main): Check unused bits in i386_cpu_flags and i386_operand_type.
	Sort cpu_flags, opcode_modifiers and operand_types.  Call
	process_i386_initializers.

	* i386-init.h: New.
	* i386-tbl.h: Regenerated.

	* i386-opc.h: Include <limits.h>.
	(CHAR_BIT): Define as 8 if not defined.
	(Cpu186): Changed to position of bitfiled.
	(Cpu286): Likewise.
	(Cpu386): Likewise.
	(Cpu486): Likewise.
	(Cpu586): Likewise.
	(Cpu686): Likewise.
	(CpuP4): Likewise.
	(CpuK6): Likewise.
	(CpuK8): Likewise.
	(CpuMMX): Likewise.
	(CpuMMX2): Likewise.
	(CpuSSE): Likewise.
	(CpuSSE2): Likewise.
	(Cpu3dnow): Likewise.
	(Cpu3dnowA): Likewise.
	(CpuSSE3): Likewise.
	(CpuPadLock): Likewise.
	(CpuSVME): Likewise.
	(CpuVMX): Likewise.
	(CpuSSSE3): Likewise.
	(CpuSSE4a): Likewise.
	(CpuABM): Likewise.
	(CpuSSE4_1): Likewise.
	(CpuSSE4_2): Likewise.
	(Cpu64): Likewise.
	(CpuNo64): Likewise.
	(D): Likewise.
	(W): Likewise.
	(Modrm): Likewise.
	(ShortForm): Likewise.
	(Jump): Likewise.
	(JumpDword): Likewise.
	(JumpByte): Likewise.
	(JumpInterSegment): Likewise.
	(FloatMF): Likewise.
	(FloatR): Likewise.
	(FloatD): Likewise.
	(Size16): Likewise.
	(Size32): Likewise.
	(Size64): Likewise.
	(IgnoreSize): Likewise.
	(DefaultSize): Likewise.
	(No_bSuf): Likewise.
	(No_wSuf): Likewise.
	(No_lSuf): Likewise.
	(No_sSuf): Likewise.
	(No_qSuf): Likewise.
	(No_xSuf): Likewise.
	(FWait): Likewise.
	(IsString): Likewise.
	(RegKludge): Likewise.
	(IsPrefix): Likewise.
	(ImmExt): Likewise.
	(NoRex64): Likewise.
	(Rex64): Likewise.
	(Ugh): Likewise.
	(Reg8): Likewise.
	(Reg16): Likewise.
	(Reg32): Likewise.
	(Reg64): Likewise.
	(FloatReg): Likewise.
	(RegMMX): Likewise.
	(RegXMM): Likewise.
	(Imm8): Likewise.
	(Imm8S): Likewise.
	(Imm16): Likewise.
	(Imm32): Likewise.
	(Imm32S): Likewise.
	(Imm64): Likewise.
	(Imm1): Likewise.
	(BaseIndex): Likewise.
	(Disp8): Likewise.
	(Disp16): Likewise.
	(Disp32): Likewise.
	(Disp32S): Likewise.
	(Disp64): Likewise.
	(InOutPortReg): Likewise.
	(ShiftCount): Likewise.
	(Control): Likewise.
	(Debug): Likewise.
	(Test): Likewise.
	(SReg2): Likewise.
	(SReg3): Likewise.
	(Acc): Likewise.
	(FloatAcc): Likewise.
	(JumpAbsolute): Likewise.
	(EsSeg): Likewise.
	(RegMem): Likewise.
	(OTMax): Likewise.
	(Reg): Commented out.
	(WordReg): Likewise.
	(ImplicitRegister): Likewise.
	(Imm): Likewise.
	(EncImm): Likewise.
	(Disp): Likewise.
	(AnyMem): Likewise.
	(LLongMem): Likewise.
	(LongMem): Likewise.
	(ShortMem): Likewise.
	(WordMem): Likewise.
	(ByteMem): Likewise.
	(CpuMax): New
	(CpuLM): Likewise.
	(CpuNumOfUints): Likewise.
	(CpuNumOfBits): Likewise.
	(CpuUnused): Likewise.
	(OTNumOfUints): Likewise.
	(OTNumOfBits): Likewise.
	(OTUnused): Likewise.
	(i386_cpu_flags): New type.
	(i386_operand_type): Likewise.
	(i386_opcode_modifier): Likewise.
	(CpuSledgehammer): Removed.
	(CpuSSE4): Likewise.
	(CpuUnknownFlags): Likewise.
	(Reg): Likewise.
	(WordReg): Likewise.
	(ImplicitRegister): Likewise.
	(Imm): Likewise.
	(EncImm): Likewise.
	(Disp): Likewise.
	(AnyMem): Likewise.
	(LLongMem): Likewise.
	(LongMem): Likewise.
	(ShortMem): Likewise.
	(WordMem): Likewise.
	(ByteMem): Likewise.
	(template): Use i386_cpu_flags for cpu_flags, use
	i386_opcode_modifier for opcode_modifier, use
	i386_operand_type for operand_types.
	(reg_entry): Use i386_operand_type for reg_type.

	* Makefile.am (HFILES): Add i386-init.h.
	($(srcdir)/i386-init.h): New rule.
	($(srcdir)/i386-tbl.h): Depend on $(srcdir)/i386-init.h
	instead.
	* Makefile.in: Regenerated.
2007-09-09 01:22:57 +00:00
H.J. Lu 93b1ec2cbf 2007-09-06 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (next_field): Updated to take a separator.
	(process_i386_opcodes): Updated.
	(process_i386_registers): Likewise.
2007-09-06 22:55:04 +00:00