Commit Graph

88838 Commits

Author SHA1 Message Date
Yao Qi b2260160f8 gdbarch software_single_step frame_info to regcache: spu
gdb:

2016-11-22  Yao Qi  <yao.qi@linaro.org>

	* spu-tdep.c (spu_software_single_step): Call get_regcache_arch
	instead of get_frame_arch.  Call regcache_read_pc instead of
	get_frame_pc.  Call regcache_raw_get_unsigned instead of
	get_frame_register_unsigned.
2016-11-22 14:05:05 +00:00
Yao Qi fb090cfa15 gdbarch software_single_step frame_info to regcache: tic6x
gdb:

2016-11-22  Yao Qi  <yao.qi@linaro.org>

	* tic6x-tdep.c (tic6x_condition_true): Replace frame with
	regcache.  Call regcache_raw_get_signed instead of
	get_frame_register_signed.
	(tic6x_get_next_pc): Likewise.  Caller updated.
2016-11-22 14:05:05 +00:00
Yao Qi 41e26ad32d gdbarch software_single_step frame_info to regcache: rs6000
gdb:

2016-11-22  Yao Qi  <yao.qi@linaro.org>

	* rs6000-aix-tdep.c (branch_dest): Replace parameter frame with
	regcache.  Call get_regcache_arch instead of get_frame_arch.
	Call regcache_raw_get_unsigned instead of
	get_frame_register_unsigned.
	(rs6000_software_single_step): Likewise.
	* rs6000-tdep.c (ppc_deal_with_atomic_sequence): Call
	get_regcache_arch instead of get_frame_arch.  Call
	regcache_read_pc instead of get_frame_pc.
2016-11-22 14:05:05 +00:00
Yao Qi ad76968956 gdbarch software_single_step frame_info to regcache: s390
gdb:

2016-11-22  Yao Qi  <yao.qi@linaro.org>

	* s390-linux-tdep.c (s390_software_single_step): Call
	get_regcache_arch instead of get_frame_arch.  Call
	regcache_read_pc instead of get_frame_pc.
2016-11-22 14:05:05 +00:00
Yao Qi cd76b525ed gdbarch software_single_step frame_info to regcache: sparc
gdb:

2016-11-22  Yao Qi  <yao.qi@linaro.org>

	* sparc-tdep.c (sparc_analyze_control_transfer): Replace parameter
	frame with regcache.  Call get_current_frame.
	(sparc_software_single_step): Call get_regcache_arch instead of
	get_frame_arch.  Call regcache_raw_get_unsigned instead of
	get_frame_register_unsigned.
2016-11-22 14:05:05 +00:00
Yao Qi 3889f4909e gdbarch software_single_step frame_info to regcache: nios2
gdb:

2016-11-22  Yao Qi  <yao.qi@linaro.org>

	* nios2-tdep.c (nios2_get_next_pc): Replace parameter frame
	with regcache.  Call regcache_raw_get_signed instead of
	get_frame_register_unsigned.
	(nios2_software_single_step): Call get_regcache_arch
	instead of get_frame_arch.
2016-11-22 14:05:05 +00:00
Yao Qi a8f341826d gdbarch software_single_step frame_info to regcache: moxie
gdb:

2016-11-22  Yao Qi  <yao.qi@linaro.org>

	* moxie-tdep.c (moxie_software_single_step): Call
	get_regcache_arch instead of get_frame_arch.  Call
	regcache_read_pc instead of get_frame_pc.
2016-11-22 14:05:05 +00:00
Yao Qi 7113a196ba gdbarch software_single_step frame_info to regcache: mips
gdb:

2016-11-22  Yao Qi  <yao.qi@linaro.org>

	* mips-tdep.c (mips32_bc1_pc): Replace parameter frame with
	regcache.  Call regcache_raw_get_unsigned instead of
	get_frame_register_unsigned.
	(mips32_next_pc): Likewise.
	(micromips_bc1_pc): Likewise.
	(micromips_next_pc): Likewise.
	(extended_mips16_next_pc): Likewise.
	(mips16_next_pc): Likewise.
	(mips_next_pc): Likewise.
	(mips_software_single_step): Call get_regcache_arch instead
	of get_frame_arch.
2016-11-22 14:05:05 +00:00
Yao Qi 5b6e2eee08 gdbarch software_single_step frame_info to regcache: cris
gdb:

2016-11-22  Yao Qi  <yao.qi@linaro.org>

	* cris-tdep.c (find_step_target): Replace parameter frame
	with regcache.  Call get_regcache_arch instead of
	get_frame_arch.  Call regcache_raw_get_unsigned instead of
	get_frame_register_unsigned.
	(cris_software_single_step): Call get_regcache_arch instead
	of get_frame_arch.
2016-11-22 14:05:04 +00:00
Yao Qi 7ab2d08740 gdbarch software_single_step frame_info to regcache: alpha
gdb:

2016-11-22  Yao Qi  <yao.qi@linaro.org>

	* alpha-tdep.c (alpha_deal_with_atomic_sequence): Call
	get_regcache_arch instead of get_frame_arch.  Call
	regcache_read_pc instead of get_frame_pc.
	(alpha_next_pc): Replace parameter frame with regcache.
	Call regcache_raw_get_unsigned instead of
	get_frame_register_unsigned.
2016-11-22 14:05:04 +00:00
Yao Qi 0187a92f57 gdbarch software_single_step frame_info to regcache: aarch64
Use regcache in software_single_step.

gdb:

2016-11-22  Yao Qi  <yao.qi@linaro.org>

	* aarch64-tdep.c (aarch64_software_single_step): Call
	get_regcache_arch instead of get_frame_arch.  Call
	regcache_read_pc instead of get_frame_pc.
2016-11-22 14:05:04 +00:00
Yao Qi 9fd15b2e80 New regcache_raw_get_signed
This patch adds a new regcache api regcache_raw_get_signed.

gdb:

2016-11-22  Yao Qi  <yao.qi@linaro.org>

	* regcache.c (regcache_raw_get_signed): New function.
	* regcache.h (regcache_raw_get_signed): Declare.
2016-11-22 14:05:04 +00:00
Jose E. Marchesi 6884417a0f gas,opcodes: fix hardware capabilities bumping in the sparc assembler.
When the assembler finds an instruction which is part of a higher
opcode architecture it bumps the current opcode architecture.  For
example:

   $ echo "mwait" | as -bump
   {standard input}: Assembler messages:
   {standard input}:1: Warning: architecture bumped from "v6" to "v9m" on "mwait"

However, when two instructions pertaining to the same opcode
architecture but associated to different SPARC hardware capabilities
are found in the input stream, and no GAS architecture is specified in
the command line, the assembler bangs:

   $ echo "mwait; wr %g0,%g1,%mcdper" | as -bump
   {standard input}: Assembler messages:
   {standard input}:1: Warning: architecture bumped from "v6" to "v9m" on "mwait"
   {standard input}:1: Error: Hardware capability "sparc5" not enabled for "wr".

... and it should'nt, as WRMCDPER pertains to the same architecture
level than MWAIT.

This patch fixes this by extending the definition of sparc opcode
architectures to contain a set of hardware capabilities and making the
assembler to take these capabilities into account when updating the
set of allowed hwcaps when an architecture bump is triggered by some
instruction.

This way, hwcaps associated to architecture levels are maintained in
opcodes, while the assembler keeps the flexibiity of defining GAS
architectures including additional hwcaps (like -Asparcfmaf or the
v8plus* variants).

A test covering this failure case is included.

gas/ChangeLog:

2016-11-22  Jose E. Marchesi  <jose.marchesi@oracle.com>

       	* config/tc-sparc.c: Move HWS_* and HWS2_* definitions to
       	opcodes/sparc-opc.c.
       	(sparc_arch): Clarify the new role of the hwcap_allowed and
       	hwcap2_allowed fields.
       	(sparc_arch_table): Remove HWS_* and HWS2_* instances from
       	hwcap_allowed and hwcap2_allowed respectively.
       	(md_parse_option): Include the opcode arch hwcaps when processing
       	-A.
       	(sparc_ip): Use the current opcode arch hwcaps to update
       	hwcap_allowed, as well of the hwcaps of the instruction triggering
       	the bump.
       	* testsuite/gas/sparc/hwcaps-bump.s: New file.
       	* testsuite/gas/sparc/hwcaps-bump.l: Likewise.
       	* testsuite/gas/sparc/sparc.exp (gas_64_check): Run tests in
       	hwcaps-bump.

include/ChangeLog:

2016-11-22  Jose E. Marchesi  <jose.marchesi@oracle.com>

       	* opcode/sparc.h (sparc_opcode_arch): New fields hwcaps and
       	hwcaps2.

opcodes/ChangeLog:

2016-11-22  Jose E. Marchesi  <jose.marchesi@oracle.com>

       	* sparc-opc.c (HWS_V8): Definition moved from
       	gas/config/tc-sparc.c.
       	(HWS_V9): Likewise.
       	(HWS_VA): Likewise.
       	(HWS_VB): Likewise.
       	(HWS_VC): Likewise.
       	(HWS_VD): Likewise.
       	(HWS_VE): Likewise.
       	(HWS_VV): Likewise.
       	(HWS_VM): Likewise.
       	(HWS2_VM): Likewise.
       	(sparc_opcode_archs): Initialize hwcaps and hwcaps2 fields of
       	existing entries.
2016-11-22 04:40:37 -08:00
Claudiu Zissulescu c4b943d7ae [ARC] Fix printing 'b' mnemonics.
gas/
2016-11-22  Claudiu Zissulescu  <claziss@synopsys.com>

	* testsuite/gas/arc/b.d: Update test result.

opcode/
2016-11-22  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-tbl.h: Reorder conditional flags with delay flags for 'b'
	instructions.
2016-11-22 12:34:51 +01:00
Alan Modra 08dc996fed PR20744, Incorrect PowerPC VLE relocs
VLE 16A and 16D relocs were functionally swapped.

	PR 20744
include/
	* opcode/ppc.h: Define VLE insns using 16A and 16D relocs.
bfd/
	* elf32-ppc.h (struct ppc_elf_params): Add vle_reloc_fixup field.
	* elf32-ppc.c: Include opcode/ppc.h.
	(ppc_elf_howto_raw): Correct dst_mask for R_PPC_VLE_LO16A,
	R_PPC_VLE_LO16D, R_PPC_VLE_HI16A, R_PPC_VLE_HI16D, R_PPC_VLE_HA16A,
	R_PPC_VLE_HA16D, R_PPC_VLE_SDAREL_LO16A, R_PPC_VLE_SDAREL_LO16D,
	R_PPC_VLE_SDAREL_HI16A, R_PPC_VLE_SDAREL_HI16D,
	R_PPC_VLE_SDAREL_HA16A, and R_PPC_VLE_SDAREL_HA16D relocs.
	(ppc_elf_link_hash_table_create): Update default_params init.
	(ppc_elf_vle_split16): Correct shift and mask.  Add params.
	Report or fix insn/reloc mismatches.
	(ppc_elf_relocate_section): Pass input_section, offset and fixup
	to ppc_elf_vle_split16.
binutils/
	* NEWS: Mention PowerPC VLE relocation error.
gas/
	* config/tc-ppc.c: Delete VLE insn defines.
	(md_assemble): Swap use_a_reloc and use_d_reloc.
	* testsuite/gas/ppc/vle-reloc.d: Update.
ld/
	* emultempl/ppc32elf.em (params): Update initializer.  Handle
	--vle-reloc-fixup command line arg.
2016-11-22 20:19:29 +10:30
Alan Modra 95f0d0d233 Use input_bfd in relocate_section
It makes just a little more sense to use input_bfd when retrieving
insns for relocation, since the relocations match the endianness of
the input bfd.

	* elf32-ppc.c (ppc64_elf_relocate_section): Calculate d_offset for
	input_bfd.  Replace occurrences of output_bfd as bfd_get_32 and
	bfd_put_32 param with input_bfd.
	* elf32-ppc.c (ppc_elf_relocate_section): Likewise.  Also
	ppc_elf_vle_split16 param.
	(ppc_elf_vle_split16): Rename output_bfd param to input_bfd.
2016-11-22 20:19:29 +10:30
Yao Qi c5acd81596 Use VALUE_NEXT_FRAME_ID in value_from_component
We renamed VALUE_FRAME_ID to VALUE_NEXT_FRAME_ID recently,
https://sourceware.org/ml/gdb-patches/2016-11/msg00018.html
and we should use VALUE_NEXT_FRAME_ID in value_from_component
too.

gdb:

2016-11-22  Yao Qi  <yao.qi@linaro.org>

	* value.c (value_from_component): Use VALUE_NEXT_FRAME_ID
	instead of VALUE_FROM_ID.
2016-11-22 08:53:34 +00:00
GDB Administrator 3063babf7c Automatic date update in version.in 2016-11-22 00:00:15 +00:00
Cary Coutant c13b08dbbc Fix bug where -u option with empty archive results in internal error.
gold/
	PR gold/20693
	* gold.cc (queue_middle_tasks): Force valid target earlier.
2016-11-21 14:06:15 -08:00
Simon Marchi d0de53e251 Add missing POSTCOMPILE step to mi/ file generation rules
A little oversight from my part, it caused the Makefile not to track
the dependencies from mi/*.c files.

gdb/ChangeLog:

	* Makefile.in (%o: $(srcdir)/mi/%.c): Add missing POSTCOMPILE
	step.
2016-11-21 16:05:57 -05:00
Igor Kudrin b32e1756d9 Add --build-id=uuid support for MinGW32.
2016-11-21  Igor Kudrin  <ikudrin@accesssoftek.com>

gold/
	* layout.cc: Include windows.h and rpcdce.h (for MinGW32).
	(Layout::create_build_id): Generate uuid using UuidCreate().
2016-11-21 09:59:37 -08:00
Maciej W. Rozycki b6ddcd85e3 BFD/DWARF2: Correct an `index' global shadowing error
Fix a commit 089e3718bd ("Greatly improve the speed if looking up
DWARF line number information.") build regression:

cc1: warnings being treated as errors
.../bfd/dwarf2.c: In function 'build_line_info_table':
.../bfd/dwarf2.c:1614: warning: declaration of 'index' shadows a global declaration
/usr/include/string.h:304: warning: shadowed declaration is here
.../bfd/dwarf2.c: In function 'build_lookup_funcinfo_table':
.../bfd/dwarf2.c:2262: warning: declaration of 'index' shadows a global declaration
/usr/include/string.h:304: warning: shadowed declaration is here
make[4]: *** [dwarf2.lo] Error 1

in a way following commit 91d6fa6a03 ("Add -Wshadow to the gcc command
line options used when compiling the binutils.").

	bfd/
	* dwarf2.c (build_line_info_table): Rename `index' local
	variable to `line_index'.
	(build_lookup_funcinfo_table): Rename `index' local variable to
	`func_index'.
2016-11-21 16:38:08 +00:00
Yao Qi 3fff9862d5 Create subobject value in pretty printer
Nowadays, we create a value of subobject in pretty printer with 'address'
being used,

  value = value_from_contents_and_address (type, valaddr + embedded_offset,
					   address + embedded_offset);

  set_value_component_location (value, val);
  /* set_value_component_location resets the address, so we may
     need to set it again.  */
  if (VALUE_LVAL (value) != lval_internalvar
      && VALUE_LVAL (value) != lval_internalvar_component
      && VALUE_LVAL (value) != lval_computed)
    set_value_address (value, address + embedded_offset);

value_from_contents_and_address creates a value from memory, but the
value we are pretty-printing may not from memory at all.

Instead of using value_from_contents_and_address, we create a value
of subobject with the same location as object's but different offset.
We avoid using address in this way.  As a result, parameter 'address'
in apply_val_pretty_printer is no longer needed, we can remove it in
next step.

We've already had the location of the 'whole' value, so it is safe
to assume we can create a value of 'component' or 'suboject' value
at the same location but with different offset.

gdb:

2016-11-21  Yao Qi  <yao.qi@linaro.org>

	* guile/scm-pretty-print.c (gdbscm_apply_val_pretty_printer):
	Don't call value_from_contents_and_address and
	set_value_address.  Call value_from_component.
	* python/py-prettyprint.c (gdbpy_apply_val_pretty_printer):
	Likewise.
	* value.c (value_from_component): New function.
	* value.h (value_from_component): Likewise.
	* valarith.c (value_subscripted_rvalue): Call
	value_from_component.
2016-11-21 14:15:06 +00:00
Renlin Li 5689c9424b [GAS][ARM][PR20827]Fix gas error for two register form instruction (pre-UAL syntax).
gas/

2016-11-21  Renlin Li  <renlin.li@arm.com>

	PR gas/20827
	* config/tc-arm.c (encode_arm_shift): Don't assert for operands not
	presented.
	* testsuite/gas/arm/add-shift-two.d: New.
	* testsuite/gas/arm/add-shift-two.s: New.
2016-11-21 12:06:04 +00:00
Alan Modra 2d7f2507d4 Use ACX_PROG_CMP_IGNORE_INITIAL in gas
* configure.ac: Invoke ACX_PROG_CMP_IGNORE_INITIAL.
	* Makefile.am (comparison): Rewrite using do_compare.
	* configure: Regenerate.
	* Makefile.in: Regenerate.
	* doc/Makefile.in: Regenerate.
2016-11-21 21:12:37 +10:30
GDB Administrator 081f6b931d Automatic date update in version.in 2016-11-21 00:00:33 +00:00
GDB Administrator b5fbed8982 Automatic date update in version.in 2016-11-20 00:00:28 +00:00
Joel Brobecker cc188e5fd6 ARI: Add detection of printf_vma and sprintf_vma
We shouldn't be using these, since their output goes straight to
stdout, which doesn't allow redirection. So this patch updates
the ARI to detect any such use.

gdb/ChangeLog:

        * contrib/ari/gdb_ari.sh: Add detection of printf_vma and
        sprintf_vma.
2016-11-19 10:40:17 -08:00
Jose E. Marchesi 0fc9967d0b Revert "bfd: allow negative offsets to _GLOBAL_OFFSET_TABLE_ in elf64 SPARC"
This reverts commit b19753ce31.

As it turns out, GCC (and the assembler) needs additional work in
order to support negative GOT offsets in 64-bit sparc.  This is
breaking TLS Local Dynamic in position-independent code.
2016-11-19 04:39:09 -08:00
Simon Marchi ef787763b9 Makefile: fix typo
Thanks to Patrick Monnerat for reporting this typo.

gdb/ChangeLog:

	* Makefile.in (%.o: $(srcdir)/gdbtk/generic/%.c): Fix typo.
2016-11-18 21:18:48 -05:00
GDB Administrator 3d6d882e29 Automatic date update in version.in 2016-11-19 00:00:32 +00:00
Andreas Arnez 8504e0974c gdb/doc: Add missing comma after xref
Get rid of a warning for missing punctuation after xref.

gdb/doc/ChangeLog:

	* gdb.texinfo (GDB/MI Async Records): Add missing comma after
	xref.
2016-11-18 16:59:00 +01:00
Claudiu Zissulescu bb050a6932 [ARC] Fix and extend features of .cpu directive.
gas/
2016-11-18  Claudiu Zissulescu  <claziss@synopsys.com>

	* testsuite/gas/arc/cl-warn.s: New file.
	* testsuite/gas/arc/cpu-pseudop-1.d: Likewise.
	* testsuite/gas/arc/cpu-pseudop-1.s: Likewise.
	* testsuite/gas/arc/cpu-pseudop-2.d: Likewise.
	* testsuite/gas/arc/cpu-pseudop-2.s: Likewise.
	* testsuite/gas/arc/cpu-warn2.s: Likewise.
	* config/tc-arc.c (selected_cpu): Initialize.
	(feature_type): New struct.
	(feature_list): New variable.
	(arc_check_feature): New function.
	(arc_select_cpu): Check for .cpu duplicates. Don't overwrite the
	current cpu features. Check if a feature is available for a given
	cpu.
	(md_parse_option): Test if features are available for a given cpu.
2016-11-18 14:29:48 +01:00
James Clarke cc133f9f11 bfd: fix negative GOT offsets for non-local references on sparc64
bfd/ChangeLog:

2016-11-18  James Clarke  <jrtc27@jrtc27.com>

	* elfxx-sparc.c (_bfd_sparc_elf_relocate_section): Don't convert
	R_SPARC_GOTDATA_OP_HIX22 and R_SPARC_GOTDATA_OP_LOX10 to
	R_SPARC_GOT* for non-local references. Instead, treat them like
	R_SPARC_GOTDATA_HIX22/R_SPARC_GOTDATA_LOX10 when filling in the
	immediate with the calculated relocation.
2016-11-18 12:51:40 +01:00
Mark Wielaard a85db0a618 cxxfilt: Recognize rust_demangling. 2016-11-18 11:06:18 +01:00
David Tolnay 535aade664 libiberty: Add Rust symbol demangling.
Adds Rust symbol demangler. Rust mangles symbols using GNU_V3 style,
adding a hash and various special character subtitutions. This adds
a new rust style to cplus_demangle and adds 3 helper functions
rust_demangle, rust_demangle_sym and rust_is_mangled.

rust-demangle.c was written by David. Mark did the code formatting to
GNU style and integration into the gcc/libiberty build system and
testsuite.

include/ChangeLog:

2016-11-03  David Tolnay <dtolnay@gmail.com>
           Mark Wielaard  <mark@klomp.org>

       * demangle.h (DMGL_RUST): New macro.
       (DMGL_STYLE_MASK): Add DMGL_RUST.
       (demangling_styles): Add dlang_rust.
       (RUST_DEMANGLING_STYLE_STRING): New macro.
       (RUST_DEMANGLING): New macro.
       (rust_demangle): New prototype.
       (rust_is_mangled): Likewise.
       (rust_demangle_sym): Likewise.

libiberty/ChangeLog:

2016-11-03  David Tolnay <dtolnay@gmail.com>
           Mark Wielaard  <mark@klomp.org>

       * Makefile.in (CFILES): Add rust-demangle.c.
       (REQUIRED_OFILES): Add rust-demangle.o.
       * cplus-dem.c (libiberty_demanglers): Add rust_demangling case.
       (cplus_demangle): Handle RUST_DEMANGLING.
       (rust_demangle): New function.
       * rust-demangle.c: New file.
       * testsuite/Makefile.in (really-check): Add check-rust-demangle.
       (check-rust-demangle): New rule.
       * testsuite/rust-demangle-expected: New file.
2016-11-18 11:06:18 +01:00
Mark Wielaard ddc5804ebd libiberty: demangler crash with missing :? or fold expression component.
When constructing an :? or fold expression that requires a third
expression only the first and second were explicitly checked to
not be NULL. Since the third expression is also required in these
constructs it needs to be explicitly checked and rejected when missing.
Otherwise the demangler will crash once it tries to d_print the
NULL component. Added two examples to demangle-expected of strings
that would crash before this fix.

Found by American Fuzzy Lop (afl) fuzzer.
2016-11-18 11:06:18 +01:00
Mark Wielaard 1706852c3c libiberty: Fix some demangler crashes caused by reading past end of input.
In various situations the cplus_demangle () function could read past the
end of input causing crashes. Add checks in various places to not advance
the demangle string location and fail early when end of string is reached.
Add various examples of input strings to the testsuite that would crash
test-demangle before the fixes.

Found by using the American Fuzzy Lop (afl) fuzzer.

libiberty/ChangeLog:

       * cplus-dem.c (demangle_signature): After 'H', template function,
       no success and don't advance position if end of string reached.
       (demangle_template): After 'z', template name, return zero on
       premature end of string.
       (gnu_special): Guard strchr against searching for zero characters.
       (do_type): If member, only advance mangled string when 'F' found.
       * testsuite/demangle-expected: Add examples of strings that could
       crash the demangler by reading past end of input.
2016-11-18 11:06:18 +01:00
Mark Wielaard 59d2699cfd libiberty: Add -Wshadow=local to warning flags (if supported).
libiberty/ChangeLog:

       * configure.ac (ac_libiberty_warn_cflags): Add -Wshadow=local.
       * configure: Regenerated.
2016-11-18 11:06:18 +01:00
Jason Merrill a4ddf8dc72 Implement P0012R1, Make exception specifications part of the type system.
libiberty/
	* cp-demangle.c (is_fnqual_component_type): New.
	(d_encoding, d_print_comp_inner, d_print_mod_list): Use it.
	(FNQUAL_COMPONENT_CASE): New.
	(d_make_comp, has_return_type, d_print_comp_inner)
	(d_print_function_type): Use it.
	(next_is_type_qual): New.
	(d_cv_qualifiers, d_print_mod): Handle noexcept and throw-spec.
include/
	* demangle.h (enum demangle_component_type): Add
	DEMANGLE_COMPONENT_NOEXCEPT, DEMANGLE_COMPONENT_THROW_SPEC.
2016-11-18 11:06:18 +01:00
Mark Wielaard 4d17eaece8 libiberty: Fix -Wimplicit-fallthrough warnings.
Adjust some comments, add some explicit fall through comments or explicit
returns where necessary to not get implicit-fallthrough warnings.

All fall throughs were deliberate. In one case I added an explicit return
false for clarity instead of falling through a default case (that also
would return false).

libiberty/ChangeLog:

       * cplus-dem.c (demangle_signature): Move fall through comment.
       (demangle_fund_type): Add fall through comment between 'G' and 'I'.
       * hashtab.c (iterative_hash): Add fall through comments.
       * regex.c (regex_compile): Add Fall through comment after '+'/'?'.
       (byte_re_match_2_internal): Add Fall through comment after jump_n.
       Change "Note fall through" to "Fall through".
       (common_op_match_null_string_p): Return false after set_number_at
       instead of fall through.
2016-11-18 11:06:18 +01:00
Jason Merrill ef0f5d7cc3 Implement P0136R1, Rewording inheriting constructors.
libiberty/
	* cp-demangle.c (d_ctor_dtor_name): Handle inheriting constructor.
2016-11-18 11:06:18 +01:00
Mark Wielaard aba19b625f libiberty: Fix memory leak in ada_demangle when symbol cannot be demangled.
When a symbol cannot be demangled in ada_demangle a new demangled VEC
will be allocated without deleting the demangled VEC already in use.

Running testsuite/test-demangle under valgrind will show the leak for
this entry in testsuite/demangle-expected:

    # Elaborated flag (not demangled)
    --format=gnat
    x_E
    <x_E>

 11 bytes in 1 blocks are definitely lost in loss record 1 of 1
    at 0x4C27BE3: malloc (vg_replace_malloc.c:299)
    by 0x413FE7: xmalloc (xmalloc.c:148)
    by 0x4025EC: ada_demangle (cplus-dem.c:930)
    by 0x402C59: cplus_demangle (cplus-dem.c:892)
    by 0x400FEC: main (test-demangle.c:317)

libiberty/ChangeLog:

	* cplus-dem.c (ada_demangle): Initialize demangled to NULL and
	XDELETEVEC demangled when unknown.
2016-11-18 11:06:17 +01:00
Marcel Böhme 9d2cdc8657 PR c++/71696 testcase.
Add libiberty/testsuite/demangle-expected testcase for:

	PR c++/71696
	* cplus-dem.c: Prevent infinite recursion when there is a cycle
	in the referencing of remembered mangled types.
	(work_stuff): New stack to keep track of the remembered mangled
	types that are currently being processed.
	(push_processed_type): New method to push currently processed
	remembered type onto the stack.
	(pop_processed_type): New method to pop currently processed
	remembered type from the stack.
	(work_stuff_copy_to_from): Copy values of new variables.
	(delete_non_B_K_work_stuff): Free stack memory.
	(demangle_args): Push/Pop currently processed remembered type.
	(do_type): Do not demangle a cyclic reference and push/pop
	referenced remembered type.
2016-11-18 11:06:17 +01:00
Szabolcs Nagy c2c4ff8d52 [AArch64] Add ARMv8.3 FCMLA and FCADD instructions
Add support for FCMLA and FCADD complex arithmetic SIMD instructions.
FCMLA has an indexed element variant where the index range has to be
treated specially because a complex number takes two elements and the
indexed vector size depends on the other operands.

These complex number SIMD instructions are part of ARMv8.3
https://community.arm.com/groups/processors/blog/2016/10/27/armv8-a-architecture-2016-additions

include/
2016-11-18  Szabolcs Nagy  <szabolcs.nagy@arm.com>

	* opcode/aarch64.h (enum aarch64_opnd): Add AARCH64_OPND_IMM_ROT1,
	AARCH64_OPND_IMM_ROT2, AARCH64_OPND_IMM_ROT3.
	(enum aarch64_op): Add OP_FCMLA_ELEM.

opcodes/
2016-11-18  Szabolcs Nagy  <szabolcs.nagy@arm.com>

	* aarch64-tbl.h (QL_V3SAMEHSD_ROT, QL_ELEMENT_ROT): Define.
	(aarch64_feature_simd_v8_3, SIMD_V8_3): Define.
	(aarch64_opcode_table): Add fcmla and fcadd.
	(AARCH64_OPERANDS): Add IMM_ROT{1,2,3}.
	* aarch64-asm.h (aarch64_ins_imm_rotate): Declare.
	* aarch64-asm.c (aarch64_ins_imm_rotate): Define.
	* aarch64-dis.h (aarch64_ext_imm_rotate): Declare.
	* aarch64-dis.c (aarch64_ext_imm_rotate): Define.
	* aarch64-opc.h (enum aarch64_field_kind): Add FLD_rotate{1,2,3}.
	* aarch64-opc.c (fields): Add FLD_rotate{1,2,3}.
	(operand_general_constraint_met_p): Rotate and index range check.
	(aarch64_print_operand): Handle rotate operand.
	* aarch64-asm-2.c: Regenerate.
	* aarch64-dis-2.c: Likewise.
	* aarch64-opc-2.c: Likewise.

gas/
2016-11-18  Szabolcs Nagy  <szabolcs.nagy@arm.com>

	* config/tc-aarch64.c (parse_operands): Handle AARCH64_OPND_IMM_ROT*.
	* testsuite/gas/aarch64/advsimd-armv8_3.d: New.
	* testsuite/gas/aarch64/advsimd-armv8_3.s: New.
	* testsuite/gas/aarch64/illegal-fcmla.s: New.
	* testsuite/gas/aarch64/illegal-fcmla.l: New.
	* testsuite/gas/aarch64/illegal-fcmla.d: New.
2016-11-18 10:02:16 +00:00
Szabolcs Nagy 28617675c2 [AArch64] Add ARMv8.3 weaker release consistency load instructions
Add support for ARMv8.3 LDAPRB, LDAPRH and LDAPR weak release
consistency load instructions. (They are equivalent to LDARB,
LDARH and LDAR instructions other than the weaker memory ordering
requirement.)

For more details about weak release consistency see
https://community.arm.com/groups/processors/blog/2016/10/27/armv8-a-architecture-2016-additions

opcodes/
2016-11-18  Szabolcs Nagy  <szabolcs.nagy@arm.com>

	* aarch64-tbl.h (arch64_opcode_table): Add ldaprb, ldaprh, ldapr.
	* aarch64-asm-2.c: Regenerate.
	* aarch64-dis-2.c: Regenerate.
	* aarch64-opc-2.c: Regenerate.

gas/
2016-11-18  Szabolcs Nagy  <szabolcs.nagy@arm.com>

	* testsuite/gas/aarch64/ldst-exclusive-armv8_3.s: Add ldaprb, ldaprh, ldapr tests.
	* testsuite/gas/aarch64/ldst-exclusive-armv8_3.d: Likewise.
	* testsuite/gas/aarch64/illegal-ldapr.s: Likewise.
	* testsuite/gas/aarch64/illegal-ldapr.d: Likewise.
	* testsuite/gas/aarch64/illegal-ldapr.l: Likewise.
2016-11-18 09:58:38 +00:00
Szabolcs Nagy ccfc90a39b [AArch64] Add ARMv8.3 javascript floating-point conversion instruction
Add support for ARMv8.3 FJCVTZS floating-point conversion
instruction.

For details about javascript floating-point conversion see
https://community.arm.com/groups/processors/blog/2016/10/27/armv8-a-architecture-2016-additions

opcodes/
2016-11-18  Szabolcs Nagy  <szabolcs.nagy@arm.com>

	* aarch64-tbl.h (arch64_opcode_table): Add fjcvtzs.
	(QL_FP2INT_W_D, aarch64_feature_fp_v8_3, FP_V8_3): Define.
	* aarch64-asm-2.c: Regenerate.
	* aarch64-dis-2.c: Regenerate.
	* aarch64-opc-2.c: Regenerate.

gas/
2016-11-18  Szabolcs Nagy  <szabolcs.nagy@arm.com>

	* testsuite/gas/aarch64/fp-armv8_3.s: Add fjcvtzs test.
	* testsuite/gas/aarch64/fp-armv8_3.d: Likewise.
	* testsuite/gas/aarch64/illegal-fjcvtzs.s: Likewise.
	* testsuite/gas/aarch64/illegal-fjcvtzs.d: Likewise.
	* testsuite/gas/aarch64/illegal-fjcvtzs.l: Likewise.
	* testsuite/gas/aarch64/illegal-nofp-armv8_3.s: Likewise.
	* testsuite/gas/aarch64/illegal-nofp-armv8_3.d: Likewise.
	* testsuite/gas/aarch64/illegal-nofp-armv8_3.l: Likewise.
2016-11-18 09:53:45 +00:00
Szabolcs Nagy 3f06e55061 [AArch64] Add ARMv8.3 combined pointer authentication load instructions
Add support for ARMv8.3 LDRAA and LDRAB combined pointer authentication and
load instructions.

These instructions authenticate the base register and load 8 byte from it plus
a scaled 10-bit offset with optional writeback to update the base register.

A new instruction class (ldst_imm10) and operand type (AARCH64_OPND_ADDR_SIMM10)
were introduced to handle the special addressing form.

include/
2016-11-18  Szabolcs Nagy  <szabolcs.nagy@arm.com>

	* opcode/aarch64.h (enum aarch64_opnd): Add AARCH64_OPND_ADDR_SIMM10.
	(enum aarch64_insn_class): Add ldst_imm10.

opcodes/
2016-11-18  Szabolcs Nagy  <szabolcs.nagy@arm.com>

	* aarch64-tbl.h (QL_X1NIL): New.
	(arch64_opcode_table): Add ldraa, ldrab.
	(AARCH64_OPERANDS): Add "ADDR_SIMM10".
	* aarch64-asm.h (aarch64_ins_addr_simm10): Declare.
	* aarch64-asm.c (aarch64_ins_addr_simm10): Define.
	* aarch64-dis.h (aarch64_ext_addr_simm10): Declare.
	* aarch64-dis.c (aarch64_ext_addr_simm10): Define.
	* aarch64-opc.h (enum aarch64_field_kind): Add FLD_S_simm10.
	* aarch64-opc.c (fields): Add data for FLD_S_simm10.
	(operand_general_constraint_met_p): Handle AARCH64_OPND_ADDR_SIMM10.
	(aarch64_print_operand): Likewise.
	* aarch64-asm-2.c: Regenerate.
	* aarch64-dis-2.c: Regenerate.
	* aarch64-opc-2.c: Regenerate.

gas/
2016-11-18  Szabolcs Nagy  <szabolcs.nagy@arm.com>

	* config/tc-aarch64.c (parse_operands): Handle AARCH64_OPND_ADDR_SIMM10.
	(fix_insn): Likewise.
	(warn_unpredictable_ldst): Handle ldst_imm10.
	* testsuite/gas/aarch64/pac.s: Add ldraa and ldrab tests.
	* testsuite/gas/aarch64/pac.d: Likewise.
	* testsuite/gas/aarch64/illegal-ldraa.s: New.
	* testsuite/gas/aarch64/illegal-ldraa.l: New.
	* testsuite/gas/aarch64/illegal-ldraa.d: New.
2016-11-18 09:49:06 +00:00
Nick Clifton 6ec49e7c0a Help diagnose problems with the metag target when mixing static and shared binaries.
PR ld/20675
	* elf32-metag.c (elf_metag_relocate_section): Replace abort with
	an informative error message.
2016-11-18 09:27:41 +00:00
GDB Administrator cd42d70b4d Automatic date update in version.in 2016-11-18 00:00:20 +00:00