Commit Graph

5873 Commits

Author SHA1 Message Date
Richard Sandiford
bcd530a713 include/opcode/
2011-07-24  Maciej W. Rozycki  <macro@codesourcery.com>

	* mips.h (INSN_TRAP): Rename to...
	(INSN_NO_DELAY_SLOT): ... this.
	(INSN_SYNC): Remove macro.

gas/
2011-07-24  Maciej W. Rozycki  <macro@codesourcery.com>

	* config/tc-mips.c (can_swap_branch_p): Adjust for the rename of
	INSN_TRAP to INSN_NO_DELAY_SLOT.  Remove the check for INSN_SYNC
	as well as explicit checks for ERET and DERET when scheduling
	branch delay slots.

opcodes/
2011-07-24  Maciej W. Rozycki  <macro@codesourcery.com>

	* mips-opc.c (NODS): New macro.
	(TRAP): Adjust for the rename of INSN_TRAP to INSN_NO_DELAY_SLOT.
	(DSP_VOLA): Likewise.
	(mips_builtin_opcodes): Add NODS annotation to "deret" and
	"eret". Replace INSN_SYNC with NODS throughout.  Use NODS in
	place of TRAP for "wait", "waiti" and "yield".
	* mips16-opc.c (NODS): New macro.
	(TRAP): Adjust for the rename of INSN_TRAP to INSN_NO_DELAY_SLOT.
	(mips16_opcodes):  Use NODS in place of TRAP for "jalrc", "jrc",
	"restore" and "save".
2011-07-24 14:04:51 +00:00
H.J. Lu
7a9068fe16 Add initial Intel K1OM support.
bfd/

2011-07-22  H.J. Lu  <hongjiu.lu@intel.com>

	* Makefile.am (ALL_MACHINES): Add cpu-k1om.lo.
	(ALL_MACHINES_CFILES): Add cpu-k1om.c.
	* Makefile.in: Regenerated.

	* archures.c (bfd_architecture): Add bfd_arch_k1om.
	(bfd_k1om_arch): New.
	(bfd_archures_list): Add &bfd_k1om_arch.
	* bfd-in2.h: Regenerated.

	* config.bfd (targ64_selvecs): Add bfd_elf64_k1om_vec if
	bfd_elf64_x86_64_vec is supported.  Add bfd_elf64_k1om_freebsd_vec
	if bfd_elf64_x86_64_freebsd_vec is supported.
	(targ_selvecs): Likewise.

	* configure.in: Support bfd_elf64_k1om_vec and
	bfd_elf64_k1om_freebsd_vec.
	* configure: Regenerated.

	* cpu-k1om.c: New.

	* elf64-x86-64.c (elf64_k1om_elf_object_p): New.
	(bfd_elf64_k1om_vec): Likewise.
	(bfd_elf64_k1om_freebsd_vec): Likewise.

	* targets.c (bfd_elf64_k1om_vec): New.
	(bfd_elf64_k1om_freebsd_vec): Likewise.
	(_bfd_target_vector): Add bfd_elf64_k1om_vec and
	bfd_elf64_k1om_freebsd_vec.

binutils/

2011-07-22  H.J. Lu  <hongjiu.lu@intel.com>

	* dwarf.c (init_dwarf_regnames): Handle EM_K1OM.

	* elfedit.c (elf_machine): Support EM_K1OM.
	(elf_class): Likewise.

	* readelf.c (guess_is_rela): Handle EM_K1OM.
	(dump_relocations): Likewise.
	(get_machine_name): Likewise.
	(get_section_type_name): Likewise.
	(get_elf_section_flags): Likewise.
	(process_section_headers): Likewise.
	(get_symbol_index_type): Likewise.
	(is_32bit_abs_reloc): Likewise.
	(is_32bit_pcrel_reloc): Likewise.
	(is_64bit_abs_reloc): Likewise.
	(is_64bit_pcrel_reloc): Likewise.
	(is_none_reloc): Likewise.

	* doc/binutils.texi: Mention K1OM for elfedit.

binutils/testsuite/

2011-07-22  H.J. Lu  <hongjiu.lu@intel.com>

	* binutils-all/elfedit.exp: Run elfedit-4.

	* binutils-all/elfedit-4.d: New.

gas/

2011-07-22  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (cpu_arch): Add k1om.
	(i386_align_code): Handle PROCESSOR_K1OM.
	(check_cpu_arch_compatible): Check EM_K1OM.
	(i386_arch): Handle Intel K1OM.
	(i386_mach): Return bfd_mach_k1om for Intel K1OM.
	(i386_target_format): Return ELF_TARGET_K1OM_FORMAT for Intel
	K1OM.

	* config/tc-i386.h (ELF_TARGET_K1OM_FORMAT): New.
	(processor_type): Add PROCESSOR_K1OM.

	* doc/c-i386.texi: Document k1om.

gas/testsuite/

2011-07-22  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/k1om.d: New.
	* gas/i386/k1om-inval.l: Likewise.
	* gas/i386/k1om-inval.s: Likewise.

	* gas/i386/i386.exp: Run k1om-inval and k1om.

include/elf/

2011-07-22  H.J. Lu  <hongjiu.lu@intel.com>

	* common.h (EM_K1OM): New.

ld/

2011-07-22  H.J. Lu  <hongjiu.lu@intel.com>

	* Makefile.am (ALL_64_EMULATIONS): Add eelf_k1om.o and
	eelf_k1om_fbsd.o
	(eelf_k1om.c): New.
	(eelf_k1om_fbsd.c): Likewise.
	* Makefile.in: Regenerated.

	* configure.tgt (targ64_extra_emuls): Add elf_k1om if elf_x86_64
	is supported.  Add elf_k1om_fbsd if elf_x86_64_fbsd is supported.
	(targ_extra_emuls): Likewise.

	* emulparams/elf_k1om.sh: New.
	* emulparams/elf_k1om_fbsd.sh: Likewise.

ld/testsuite/

2011-07-22  H.J. Lu  <hongjiu.lu@intel.com>

	* ld-x86-64/abs-k1om.d: New.
	* ld-x86-64/protected2-k1om.d: Likewise.
	* ld-x86-64/protected3-k1om.d: Likewise.

	* ld-x86-64/x86-64.exp: Run abs-k1om, protected2-k1om and
	protected3-k1om.

opcodes/

2011-07-22  H.J. Lu  <hongjiu.lu@intel.com>

	* configure.in: Handle bfd_k1om_arch.
	* configure: Regenerated.

	* disassemble.c (disassembler): Handle bfd_k1om_arch.

	* i386-dis.c (print_insn): Handle bfd_mach_k1om and
	bfd_mach_k1om_intel_syntax.

	* i386-gen.c (cpu_flag_init): Set CPU_UNKNOWN_FLAGS to
	~(CpuL1OM|CpuK1OM).  Add CPU_K1OM_FLAGS.
	(cpu_flags): Add CpuK1OM.

	* i386-opc.h (CpuK1OM): New.
	(i386_cpu_flags): Add cpuk1om.

	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.
2011-07-22 20:22:38 +00:00
H.J. Lu
2aab8acd29 Fix a typo in doc/c-i386.texi.
2011-07-18  H.J. Lu  <hongjiu.lu@intel.com>

	* doc/c-i386.texi: Fix a typo.
2011-07-18 13:32:31 +00:00
Richard Sandiford
01f372ca0b gas/
2011-07-04  Aurelien Jarno  <aurelien@aurel32.net>

	* config/tc-mips.c (append_insn): delete prev_pinfo2 and pinfo2.
2011-07-06 18:01:51 +00:00
Maciej W. Rozycki
97fd0b2f39 * gas/mips/loc-swap.s: Add file missing from a previous commit. 2011-07-04 22:48:42 +00:00
Richard Sandiford
fe35f09f47 gas/
* config/tc-mips.c (gpr_read_mask, gpr_write_mask): Fix handling
	of register 0.
2011-07-04 20:22:52 +00:00
Maciej W. Rozycki
e3a82c8e75 gas/
* config/tc-mips.c (append_insn): Make sure DWARF-2 location
	information is properly adjusted for branches that get swapped.

	gas/testsuite/
	* gas/mips/loc-swap.d: New test case for DWARF-2 location with
	branch swapping.
	* gas/mips/loc-swap-dis.d: Likewise.
	* gas/mips/mips16@loc-swap.d: Likewise, MIPS16 version.
	* gas/mips/mips16@loc-swap-dis.d: Likewise.
	* gas/mips/loc-swap.s: Source for the new tests.
	* gas/mips/mips.exp: Run the new tests.
2011-07-04 19:27:28 +00:00
Thomas Schwinge
2bb70ae0f4 ELFOSABI_GNU
bfd/
	* elf.c (_bfd_elf_set_osabi): Use ELFOSABI_GNU name instead of
	ELFOSABI_LINUX alias.
	* elf32-hppa.c: Likewise.
	* elf32-i370.c: Likewise.
	* elf64-hppa.c: Likewise.

	binutils/
	* elfedit.c (osabis): Use ELFOSABI_GNU name instead of ELFOSABI_LINUX
	alias and ELFOSABI_HURD.  Add GNU alias.
	* readelf.c (get_osabi_name, get_symbol_binding, get_symbol_type):
	Likewise.
	* doc/binutils.texi <elfedit>: Update accordingly.

	elfcpp/
	* elfcpp.h (ELFOSABI): Add ELFOSABI_GNU with value of ELFOSABI_LINUX,
	keep ELFOSABI_LINUX as an alias.  Remove ELFOSABI_HURD.

	gas/
	* config/obj-elf.c (obj_elf_type): Use ELFOSABI_GNU name instead of
	ELFOSABI_LINUX alias.
	* config/tc-ia64.c: Likewise.

	include/elf/
	* common.h (ELFOSABI_GNU): Define, replaces...
	(ELFOSABI_LINUX): ... this, kept as an alias.
	(ELFOSABI_HURD): Remove.

	ld/testsuite/
	* ld-ifunc/ifunc.exp: Update for changed output.
	* ld-unique/unique.exp: Likewise.
2011-07-03 13:45:32 +00:00
Thomas Schwinge
9c55345c8c ELFOSABI_GNU
bfd/
	* elf.c (_bfd_elf_set_osabi): Use ELFOSABI_GNU name instead of
	ELFOSABI_LINUX alias.
	* elf32-hppa.c: Likewise.
	* elf32-i370.c: Likewise.
	* elf64-hppa.c: Likewise.

	binutils/
	* elfedit.c (osabis): Use ELFOSABI_GNU name instead of ELFOSABI_LINUX
	alias and ELFOSABI_HURD.  Add GNU alias.
	* readelf.c (get_osabi_name, get_symbol_binding, get_symbol_type):
	Likewise.
	* doc/binutils.texi <elfedit>: Update accordingly.

	elfcpp/
	* elfcpp.h (ELFOSABI): Add ELFOSABI_GNU with value of ELFOSABI_LINUX,
	keep ELFOSABI_LINUX as an alias.  Remove ELFOSABI_HURD.

	gas/
	* config/obj-elf.c (obj_elf_type): Use ELFOSABI_GNU name instead of
	ELFOSABI_LINUX alias.
	* config/tc-ia64.c: Likewise.

	include/elf/
	* common.h (ELFOSABI_GNU): Define, replaces...
	(ELFOSABI_LINUX): ... this, kept as an alias.
	(ELFOSABI_HURD): Remove.

	ld/testsuite/
	* ld-ifunc/ifunc.exp: Update for changed output.
	* ld-unique/unique.exp: Likewise.
2011-07-03 13:37:09 +00:00
H.J. Lu
4cb0953da2 Fix rorx in BMI2.
gas/testsuite/

2011-06-30  H.J. Lu  <hongjiu.lu@intel.com>

	AVX Programming Reference (June, 2011)
	* gas/i386/bmi2.s: Correct rorx tests.
	* gas/i386/x86-64-bmi2.s: Likewise.

	* gas/i386/bmi2-intel.d: Updated.
	* gas/i386/bmi2.d: Likewise.
	* gas/i386/x86-64-bmi2-intel.d: Likewise.
	* gas/i386/x86-64-bmi2.d: Likewise.

opcodes/

2011-06-30  H.J. Lu  <hongjiu.lu@intel.com>

	AVX Programming Reference (June, 2011)
	* i386-dis.c (vex_len_table): Correct rorxS.

	* i386-opc.tbl: Correct rorx.
	* i386-tbl.h: Regenerated.
2011-06-30 15:44:55 +00:00
Nick Clifton
5f4cb1986d * gas/arm/addthumb2err.s: New test file.
* gas/arm/addthumb2err.d: Test control file.
	* gas/arm/addthumb2err.l: Expected error messages.

	* config/tc-arm.c (do_t_add_sub): Only allow LSL shifts of less
	than 4 in Thumb mode.
2011-06-30 13:42:46 +00:00
Nick Clifton
68246214df PR gas/12931
* gas/arm/blx-bad.d: Add exrta nop at end of disassembly.
	* gas/arm/inst-po-be.d: Add exrta nop at end of disassembly.
	* gas/arm/inst-po.d: Add exrta nop at end of disassembly.
2011-06-30 13:07:21 +00:00
Nick Clifton
f1d0450fe0 PR 12848
* gas/arm/thumb-b-bad.s: New test.
	* gas/arm/thumb-b-bad.d: Test control file.
	* gas/arm/thumb-b-bad.l: Expected error output.
2011-06-30 13:05:04 +00:00
Nick Clifton
08f10d51f9 PR gas/12848
* config/tc-arm.c (BAD_RANGE): New error message define.
	(md_apply_fix): Use it.
	Fix range check for thumb branch instructions.
2011-06-30 12:52:58 +00:00
Richard Sandiford
a4e064680b gas/
* config/tc-mips.c (append_method): New enum.
	(can_swap_branch_p, get_append_method): New functions.
	(append_insn): Use get_append_method to decide how the instruction
	should be added.
2011-06-29 21:05:29 +00:00
Richard Sandiford
9fe77896a7 gas/
* config/tc-mips.c (append_insn): Remove bogus goto.
2011-06-29 20:48:10 +00:00
Richard Sandiford
13408f1edd gas/
* config/tc-mips.c (append_insn): Always clear the history after an
	unconditional branch.
2011-06-29 20:46:10 +00:00
Richard Sandiford
ceb94aa50d gas/
* config/tc-mips.c (find_altered_mips16_opcode): New function.
	(append_insn): Use it.

opcodes/
	* mips16-opc.c (jalrc, jrc): Move earlier in file.
2011-06-29 20:42:48 +00:00
Richard Sandiford
4c26037942 gas/
* config/tc-mips.c (insn_uses_reg): Delete.
	(gpr_read_mask, gpr_write_mask): New functions.
	(fpr_read_mask, fpr_write_mask): Likewise.
	(insns_between, nops_for_vr4130, append_insn): Use them.

gas/testsuite/
	* gas/mips/mips16-e.d, gas/mips/mips16-f.d,
	gas/mips/mipsel16-e.d, gas/mips/mipsel16-f.d,
	gas/mips/tmips16-e.d, gas/mips/tmips16-f.d,
	gas/mips/tmipsel16-e.d, gas/mips/tmipsel16-f.d: Fix GPR mask.
	* gas/mips/reginfo-1.s, gas/mips/reginfo-1a.d,
	gas/mips/reginfo-1b.d: New tests.
	* gas/mips/mips.exp: Run them.
2011-06-29 20:39:00 +00:00
Richard Sandiford
02b1ab82d7 gas/
* config/tc-mips.c (md_mips_end): Call mips_emit_delays.

gas/testsuite/
	* gas/mips/24k-triple-stores-9.d: Add -z to dump options and
	explicitly match one nop.
	* gas/mips/24k-triple-stores-10.d: Likewise.
	* gas/mips/24k-triple-stores-11.d: Likewise.
	* gas/mips/lifloat.d: Likewise.
	* gas/mips/trunc.d: Likewise 1 extra nop.
	* gas/mips/vr4111.d: Likewise 2 nops.
2011-06-29 20:35:05 +00:00
Nick Clifton
49c62a3353 PR gas/12931
* config/tc-arm.c (mapping_state): When changing to ARM or THUMB
	state set the minimum required alignment of the section.
2011-06-29 16:29:38 +00:00
Tristan Gingold
7016a5d53d 2011-06-29 Tristan Gingold <gingold@adacore.com>
* config/tc-i386.c (i386_mach): Convert to ISO-C.
	(md_begin, pe_directive_secrel, md_estimate_size_before_relax): Ditto.
	(md_convert_frag, md_apply_fix, md_undefined_symbol): Ditto.
	(md_section_align, tc_gen_reloc): Ditto.
2011-06-29 11:12:25 +00:00
Tristan Gingold
af24f60c6d 2011-06-28 Tristan Gingold <gingold@adacore.com>
* config/tc-alpha.c (s_alpha_pdesc): Fix indentation. Do not
	generate dummy fix.
2011-06-28 13:33:33 +00:00
Tristan Gingold
e1f4d6bd07 2011-06-28 Tristan Gingold <gingold@adacore.com>
* config/tc-alpha.c (load_expression): Use alloca instead of xmalloc.
	(emit_jsrjmp): Ditto.
	(tc_gen_reloc): Ditto.
2011-06-28 09:23:53 +00:00
Tristan Gingold
4b1c4d2b62 2011-06-28 Tristan Gingold <gingold@adacore.com>
* config/tc-alpha.c (alpha_evax_proc_hash): Remove.
	(alpha_evax_proc_data): New variable.
	(s_alpha_ent): Prevent nested function.  Remove has_insert call.
	(s_alpha_pdesc): Do not call demand_empty_rest_of_line in case of
	error.  Do not search in the hash table.  Check if match with .ent.
	(s_alpha_name): Remove unused variable.
	(md_begin): Remove initialization of alpha_evax_proc_hash.
2011-06-28 07:40:16 +00:00
Tristan Gingold
8aacb050e6 2011-06-27 Tristan Gingold <gingold@adacore.com>
* config/tc-alpha.c (add_to_link_pool): Remove basesym parameter.
	Locally declare basesym.  Add comments.  Do not set literal_pool_size.
	(load_expression): Adjust call to add_to_link_pool.
	(s_alpha_pdesc): Define pdesc symbol using dot.
	Do not set literal_pool_size.
	(s_alpha_end): Use NULL instead of 0.
2011-06-27 14:08:15 +00:00
Tristan Gingold
bb1d425616 2011-06-27 Tristan Gingold <gingold@adacore.com>
* config/obj-evax.c (evax_frob_file_before_adjust): Add comments.
	Fix style.
	* config/obj-evax.h (struct alpha_linkage_fixups): Remove seg
	field.  Add comments.
	(obj_symbol_type, object_headers, OBJ_SYMFIELD_TYPE): Remove
2011-06-27 10:03:42 +00:00
Richard Sandiford
cec256b1fc Remove previous patch, committed in error. 2011-06-26 09:19:17 +00:00
Richard Sandiford
96124ee0cf gas/
* config/tc-mips.c (insn_uses_reg): Delete.
	(gpr_read_mask, gpr_write_mask): New functions.
	(fpr_read_mask, fpr_write_mask): Likewise.
	(insns_between, nops_for_vr4130, append_insn): Use them.

gas/testsuite/
	* gas/mips/mips16-e.d, gas/mips/mips16-f.d,
	gas/mips/mipsel16-e.d, gas/mips/mipsel16-f.d,
	gas/mips/tmips16-e.d, gas/mips/tmips16-f.d,
	gas/mips/tmipsel16-e.d, gas/mips/tmipsel16-f.d: Fix GPR mask.
2011-06-26 09:16:35 +00:00
Richard Sandiford
ab9794cf6a gas/
* config/tc-mips.c (fix_24k_record_store_info): If the previous
	instruction was a store, and the next instructions are unknown,
	assume the worst.

gas/testsuite/
	* gas/mips/24k-branch-delay-1.d: Do not allow stores to be put
	into delay slots.
	* gas/mips/24k-triple-stores-1.d: Put the first nop after the
	second store, rather than the first.
	* gas/mips/24k-triple-stores-2.d: Likewise.
	* gas/mips/24k-triple-stores-4.d: Likewise.
	* gas/mips/24k-triple-stores-8.d: Likewise.
	* gas/mips/24k-triple-stores-3.d: Remove first nop.
	* gas/mips/24k-triple-stores-5.d: Likewise.
	* gas/mips/24k-triple-stores-6.d: Likewise.
	* gas/mips/24k-triple-stores-7.d: Likewise.
	* gas/mips/24k-triple-stores-9.d: Add a nop after the second store.
	Expect a nop at the end.
	* gas/mips/24k-triple-stores-10.d: Put the first nop after the
	second store, rather than the first.  Expect a nop at the end.
2011-06-26 08:32:50 +00:00
Richard Sandiford
932d1a1b03 gas/
PR gas/12915
	* config/tc-mips.c (nops_for_vr4130, nops_for_24k, nops_for_insn)
	(nops_for_sequence, nops_for_insn_or_target): Add ignore parameters.
	(mips_emit_delays, start_noreorder): Update accordingly.
	(append_insn): Likewise.  Revert original fix for this PR
	and use the ignore parameter instead.

gas/testsuite/
	* gas/mips/vr4130.s: Add some more ".set noreorder" tests.
	* gas/mips/vr4130.d: Update accordingly.
2011-06-25 10:11:46 +00:00
Tristan Gingold
e3a9940106 2011-06-24 Tristan Gingold <gingold@adacore.com>
PR gas/11625
	* config/obj-evax.c (evax_frob_symbol): Use as_bad instead of abort.
2011-06-24 15:44:41 +00:00
Tristan Gingold
576d330713 2011-06-24 Tristan Gingold <gingold@adacore.com>
* config/tc-alpha.c (add_to_link_pool): Remove useless offset
	variable.  Fix style.
2011-06-24 15:16:03 +00:00
Richard Sandiford
f77ef3e29a gas/
PR gas/12915
	* config/tc-mips.c (append_insn): Only consider hazards between the
	pre-noreorder block and ip.

gas/testsuite/
	* gas/mips/pr12915.s, gas/mips/pr12915.d: New test.
	* gas/mips/mips.exp: Run it.
2011-06-23 20:21:38 +00:00
Matthew Gretton-Dann
5f1af56b76 2011-06-21 Sameera Deshpande <sameera.deshpande@arm.com>
* gas/config/tc-arm.c (vfp_conv): Add check on range of immediate operand
	in vcvt instruction between floating-point and fixed-point.
	(operand_parse_code): Add "OP_oI32z".
	(parse_operands): OP_oI32z case added.
	* gas/testsuite/gas/arm/vcvt-bad.d: New test.
	* gas/testsuite/gas/arm/vcvt-bad.l: Likewise.
	* gas/testsuite/gas/arm/vcvt-bad.s: Likewise.
	* gas/testsuite/gas/arm/vcvt.d: Likewise.
	* gas/testsuite/gas/arm/vcvt.s: Likewise.
2011-06-21 15:34:27 +00:00
H.J. Lu
ade78dba78 Revert x86_64-x32-* change.
gas/

2011-06-20  H.J. Lu  <hongjiu.lu@intel.com>

	* configure.tgt: Revert x32 change.

ld/

2011-06-20  H.J. Lu  <hongjiu.lu@intel.com>

	* configure.tgt: Revert x32 change.

ld/testsuite/

2011-06-20  H.J. Lu  <hongjiu.lu@intel.com>

	* ld-elf/eh1.d: Revert x32 change.
	* ld-elf/eh2.d: Likewise.
	* ld-elf/eh3.d: Likewise.
	* ld-elf/eh4.d: Likewise.
2011-06-20 13:23:22 +00:00
Nick Clifton
b47d265edb * doc/Makefile.am: (CPU_DOCS): Add c-xstormy16.texi.
* doc/Makefile.in: Regenerate.
	* doc/all.texi: Set XSTORMY16.
	* doc/c-xstormy16.texi: New file.
2011-06-20 10:27:56 +00:00
H.J. Lu
8b7789423c Fix misc x32 bugs.
bfd/

2011-06-19  H.J. Lu  <hongjiu.lu@intel.com>

	* elf64-x86-64.c (elf_backend_post_process_headers): Defined
	for x32.

binutils/testsuite/

2011-06-19  H.J. Lu  <hongjiu.lu@intel.com>

	* binutils-all/elfedit-1.d: Updated for x32.

gas/

2011-06-19  H.J. Lu  <hongjiu.lu@intel.com>

	* configure.tgt: Support x32.

ld/

2011-06-19  H.J. Lu  <hongjiu.lu@intel.com>

	* configure.tgt: Support x32.

ld/testsuite/

2011-06-19  H.J. Lu  <hongjiu.lu@intel.com>

	* ld-elf/eh1.d: Skip x32.
	* ld-elf/eh2.d: Likewise.
	* ld-elf/eh3.d: Likewise.
	* ld-elf/eh4.d: Likewise.

	* ld-elfvsb/elfvsb.exp: Only xfail 64bit x86_64-*-linux*.
	* ld-shared/shared.exp: Likewise.

	* ld-ifunc/ifunc-1-local-x86.d: Support x32.
	* ld-ifunc/ifunc-1-x86.d: Likewise.
	* ld-ifunc/ifunc-3a-x86.d: Likewise.
	* ld-x86-64/pcrel16.d: Likewise.

	* ld-x86-64/x86-64.exp (x86_64tests): Add missing -melf_x86_64.
2011-06-19 21:22:16 +00:00
Nick Clifton
90b3661c07 * NEWS: Mention addition of TILEPRO and TIKE-Gx support. 2011-06-15 09:12:09 +00:00
Tristan Gingold
2fb4b302aa gas/
2011-06-14  Tristan Gingold  <gingold@adacore.com>

	* config/tc-ppc.h (struct ppc_tc_sy): Complete comment on within.
	(tc_new_dot_label): Define.
	(ppc_new_dot_label): Declare.
	* config/tc-ppc.c (ppc_frob_label): Set within target field.
	(ppc_fix_adjustable): Use this field to adjust the reloc.
	(ppc_new_dot_label): New function.


gas/testsuite/
2011-06-14  Tristan Gingold  <gingold@adacore.com>

	* gas/ppc/test1xcoff32.d: Adjust for csect anchor.
2011-06-14 09:03:52 +00:00
Alan Modra
85b0f90c2b * po/POTFILES.in: Regenerate. 2011-06-14 05:11:15 +00:00
Nick Clifton
aa137e4d51 * Makefile.am (ALL_MACHINES): Add cpu-tilegx.lo and cpu-tilepro.lo.
(ALL_MACHINE_CFILES): Add cpu-tilegx.c and cpu-tilepro.c.
    (BFD32_BACKENDS): Add elf32-tilegx.lo, elf32-tilepro.lo,
    and elfxx-tilegx.lo.
    (BFD32_BACKENDS_CFILES): Add elf32-tilegx.c elf32-tilepro.c, and
    elfxx-tilegx.c.
    (BFD64_BACKENDS): Add elf64-tilegx.lo.
    (BFD64_BACKENDS_CFILES): Add elf64-tilegx.c.
    * Makefile.in: Regenerate.
    * arctures.c (bfd_architecture): Define bfd_arch_tilepro,
    bfd_arch_tilegx, bfd_mach_tilepro, bfd_mach_tilegx.
    (bfd_arch_info): Add bfd_tilegx_arch, bfd_tilepro_arch.
    (bfd_archures_list): Add bfd_tilegx_arch, bfd_tilepro_arch.
    bfd-in2.h: Regenerate.
    * config.bfd: Handle tilegx-*-* and tilepro-*-*.
    * configure.in: Handle bfd_elf32_tilegx_vec, bfd_elf32_tilepro_vec,
    and bfd_elf64_tilegx_vec.
    * configure: Regenerate.
    * elf-bfd.h (enum elf_target_id): Define TILEGX_ELF_DATA and
    TILEPRO_ELF_DATA.
    * libbfd.h: Regenerate.
    * reloc.c: Add BFD_RELOC_TILEPRO_{COPY, GLOB_DAT, JMP_SLOT,
    RELATIVE, BROFF_X1, JOFFLONG_X1, JOFFLONG_X1_PLT, IMM8_X0,
    IMM8_Y0, IMM8_X1, IMM8_Y1, DEST_IMM8_X1, MT_IMM15_X1, MF_IMM15_X1,
    IMM16_X0, IMM16_X1, IMM16_X0_LO, IMM16_X1_LO, IMM16_X0_HI,
    IMM16_X1_HI, IMM16_X0_HA, IMM16_X1_HA, IMM16_X0_PCREL,
    IMM16_X1_PCREL, IMM16_X0_LO_PCREL, IMM16_X1_LO_PCREL,
    IMM16_X0_HI_PCREL, IMM16_X1_HI_PCREL, IMM16_X0_HA_PCREL,
    IMM16_X1_HA_PCREL, IMM16_X0_GOT, IMM16_X1_GOT, IMM16_X0_GOT_LO,
    IMM16_X1_GOT_LO, IMM16_X0_GOT_HI, IMM16_X1_GOT_HI,
    IMM16_X0_GOT_HA, IMM16_X1_GOT_HA, MMSTART_X0, MMEND_X0,
    MMSTART_X1, MMEND_X1, SHAMT_X0, SHAMT_X1, SHAMT_Y0, SHAMT_Y1,
    IMM16_X0_TLS_GD, IMM16_X1_TLS_GD, IMM16_X0_TLS_GD_LO,
    IMM16_X1_TLS_GD_LO, IMM16_X0_TLS_GD_HI, IMM16_X1_TLS_GD_HI,
    IMM16_X0_TLS_GD_HA, IMM16_X1_TLS_GD_HA, IMM16_X0_TLS_IE,
    IMM16_X1_TLS_IE, IMM16_X0_TLS_IE_LO, IMM16_X1_TLS_IE_LO,
    IMM16_X0_TLS_IE_HI, IMM16_X1_TLS_IE_HI, IMM16_X0_TLS_IE_HA,
    IMM16_X1_TLS_IE_HA, TLS_DTPMOD32, TLS_DTPOFF32, TLS_TPOFF32}
    Add BFD_RELOC_TILEGX_{HW0, HW1, HW2, HW3, HW0_LAST, HW1_LAST,
    HW2_LAST, COPY, GLOB_DAT, JMP_SLOT, RELATIVE, BROFF_X1,
    JUMPOFF_X1, JUMPOFF_X1_PLT, IMM8_X0, IMM8_Y0, IMM8_X1, IMM8_Y1,
    DEST_IMM8_X1, MT_IMM14_X1, MF_IMM14_X1, MMSTART_X0, MMEND_X0,
    SHAMT_X0, SHAMT_X1, SHAMT_Y0, SHAMT_Y1, IMM16_X0_HW0,
    IMM16_X1_HW0, IMM16_X0_HW1, IMM16_X1_HW1, IMM16_X0_HW2,
    IMM16_X1_HW2, IMM16_X0_HW3, IMM16_X1_HW3, IMM16_X0_HW0_LAST,
    IMM16_X1_HW0_LAST, IMM16_X0_HW1_LAST, IMM16_X1_HW1_LAST,
    IMM16_X0_HW2_LAST, IMM16_X1_HW2_LAST, IMM16_X0_HW0_PCREL,
    IMM16_X1_HW0_PCREL, IMM16_X0_HW1_PCREL, IMM16_X1_HW1_PCREL,
    IMM16_X0_HW2_PCREL, IMM16_X1_HW2_PCREL, IMM16_X0_HW3_PCREL,
    IMM16_X1_HW3_PCREL, IMM16_X0_HW0_LAST_PCREL,
    IMM16_X1_HW0_LAST_PCREL, IMM16_X0_HW1_LAST_PCREL,
    IMM16_X1_HW1_LAST_PCREL, IMM16_X0_HW2_LAST_PCREL,
    IMM16_X1_HW2_LAST_PCREL, IMM16_X0_HW0_GOT, IMM16_X1_HW0_GOT,
    IMM16_X0_HW1_GOT, IMM16_X1_HW1_GOT, IMM16_X0_HW2_GOT,
    IMM16_X1_HW2_GOT, IMM16_X0_HW3_GOT, IMM16_X1_HW3_GOT,
    IMM16_X0_HW0_LAST_GOT, IMM16_X1_HW0_LAST_GOT,
    IMM16_X0_HW1_LAST_GOT, IMM16_X1_HW1_LAST_GOT,
    IMM16_X0_HW2_LAST_GOT, IMM16_X1_HW2_LAST_GOT, IMM16_X0_HW0_TLS_GD,
    IMM16_X1_HW0_TLS_GD, IMM16_X0_HW1_TLS_GD, IMM16_X1_HW1_TLS_GD,
    IMM16_X0_HW2_TLS_GD, IMM16_X1_HW2_TLS_GD, IMM16_X0_HW3_TLS_GD,
    IMM16_X1_HW3_TLS_GD, IMM16_X0_HW0_LAST_TLS_GD,
    IMM16_X1_HW0_LAST_TLS_GD, IMM16_X0_HW1_LAST_TLS_GD,
    IMM16_X1_HW1_LAST_TLS_GD, IMM16_X0_HW2_LAST_TLS_GD,
    IMM16_X1_HW2_LAST_TLS_GD, IMM16_X0_HW0_TLS_IE,
    IMM16_X1_HW0_TLS_IE, IMM16_X0_HW1_TLS_IE, IMM16_X1_HW1_TLS_IE,
    IMM16_X0_HW2_TLS_IE, IMM16_X1_HW2_TLS_IE, IMM16_X0_HW3_TLS_IE,
    IMM16_X1_HW3_TLS_IE, IMM16_X0_HW0_LAST_TLS_IE,
    IMM16_X1_HW0_LAST_TLS_IE, IMM16_X0_HW1_LAST_TLS_IE,
    IMM16_X1_HW1_LAST_TLS_IE, IMM16_X0_HW2_LAST_TLS_IE,
    IMM16_X1_HW2_LAST_TLS_IE, TLS_DTPMOD64, TLS_DTPOFF64, TLS_TPOFF64,
    TLS_DTPMOD32, TLS_DTPOFF32, TLS_TPOFF32}
    * targets.c (bfd_elf32_tilegx_vec): Declare.
    (bfd_elf32_tilepro_vec): Declare.
    (bfd_elf64_tilegx_vec): Declare.
    (bfd_target_vector): Add bfd_elf32_tilegx_vec, bfd_elf32_tilepro_vec,
    and bfd_elf64_tilegx_vec.
    * cpu-tilegx.c: New file.
    * cpu-tilepro.c: New file.
    * elf32-tilepro.h: New file.
    * elf32-tilepro.c: New file.
    * elf32-tilegx.c: New file.
    * elf32-tilegx.h: New file.
    * elf64-tilegx.c: New file.
    * elf64-tilegx.h: New file.
    * elfxx-tilegx.c: New file.
    * elfxx-tilegx.h: New file.

	* Makefile.am (TARGET_CPU_CFILES): Add config/tc-tilegx.c and
	config/tc-tilepro.c.
	(TARGET_CPU_HFILES): Add config/tc-tilegx.h and
	config/tc-tilepro.h.
	* Makefile.in: Regenerate.
	* configure.tgt (tilepro-*-*): New.
	(tilegx-*-*): Likewise.
	* config/tc-tilegx.c: New file.
	* config/tc-tilegx.h: Likewise.
	* config/tc-tilepro.h: Likewise.
	* config/tc-tilepro.c: Likewise.
	* doc/Makefile.am (CPU_DOCS): Add c-tilegx.texi and
	c-tilepro.texi.
	* doc/Makefile.in: Regenerate.
	* doc/all.texi (TILEGX): Define.
	(TILEPRO): Define.
	* doc/as.texinfo: Add Tile-Gx and TILEPro documentation.  Include
	c-tilegx.texi and c-tilepro.texi.
	* doc/c-tilegx.texi: New.
	* doc/c-tilepro.texi: New.

        * gas/tilepro/t_constants.s: New file.
	* gas/tilepro/t_constants.d: Likewise.
	* gas/tilepro/t_insns.s: Likewise.
	* gas/tilepro/tilepro.exp: Likewise.
	* gas/tilepro/t_insns.d: Likewise.
	* gas/tilegx/tilegx.exp: Likewise.
	* gas/tilegx/t_insns.d: Likewise.
	* gas/tilegx/t_insns.s: Likewise.

	* dis-asm.h (print_insn_tilegx): Declare.
	(print_insn_tilepro): Likewise.

	* tilegx.h: New file.
	* tilepro.h: New file.

	* common.h: Add EM_TILEGX.
	* tilegx.h: New file.
	* tilepro.h: New file.

	* Makefile.am (ALL_EMULATION_SOURCES): Add eelf32tilegx.c and
	eelf32tilepro.c.
	(ALL_64_EMULATION_SOURCES): Add eelf64tilegx.c.
	(eelf32tilegx.c): New target.
	(eelf32tilepro.c): Likewise.
	(eelf64tilegx.c): Likewise.
	* Makefile.in: Regenerate.
	* configure.tgt: Handle tilegx-*-* and tilepro-*-*.
	* emulparams/elf32tilegx.sh: New file.
	* emulparams/elf64tilegx.sh: New file.
	* emulparams/elf32tilepro.sh: New file.

	* ld-elf/eh5.d: Don't run on tile*.
	* ld-srec/srec.exp: xfail on tile*.
	* ld-tilegx/external.s: New file.
	* ld-tilegx/reloc.d: New file.
	* ld-tilegx/reloc.s: New file.
	* ld-tilegx/tilegx.exp: New file.
	* ld-tilepro/external.s: New file.
	* ld-tilepro/reloc.d: New file.
	* ld-tilepro/reloc.s: New file.
	* ld-tilepro/tilepro.exp: New file.

	* Makefile.am (TARGET_LIBOPCODES_CFILES): Add tilegx-dis.c,
	tilegx-opc.c, tilepro-dis.c, and tilepro-opc.c.
	* Makefile.in: Regenerate.
	* configure.in: Handle bfd_tilegx_arch and bfd_tilepro_arch.
	* configure: Regenerate.
	* disassemble.c (disassembler): Add ARCH_tilegx and ARCH_tilepro.
	* po/POTFILES.in: Regenerate.
	* tilegx-dis.c: New file.
	* tilegx-opc.c: New file.
	* tilepro-dis.c: New file.
	* tilepro-opc.c: New file.
2011-06-13 15:18:54 +00:00
Nick Clifton
af199b0601 PR gas/12854
Add additional checks for extraneous shifts and extra tests in the testsuite.
2011-06-13 12:50:18 +00:00
Nick Clifton
94342ec38b PR gas/12854
* gas/arm/shift-bad.s: New test.
	* gas/arm/shift-bad.l: Expcted error output.
	* gas/arm/shift-bad.s: New control file.

	* config/tc-arm.c (do_shift): Do not allow shift operations at the
	end of a register based shift insn.
	(do_t_shift): Likewise.
2011-06-13 09:57:35 +00:00
Nick Clifton
f9e53abc4a * config/tc-score.c (s3_my_get_expression): Delete unused local
variable 'seg'.
	(s3_do_ldst_insn): Delete unused local variable 'strbak'.
	(s3_do16_ldst_insn): Delete unused local variable 'temp'.
	(s3_do_macro_bcmp): Zero inst_expand array.
	(s3_do_macro_bcmpz): Likewise.
	(s3_s_score_end): Delete unused local variable 'dot'.
	(s3_gen_reloc): Delete unused local variables 'f', 's', and 'e'.
	* config/tc-score7.c (s7_my_get_expression): Delete unused local
	variable 'seg'.
	(s7_do_ldst_insn): Delete unused local variable 'strbak'.
	(s7_b32_relax_to_b16): Delete unused local variables 'r_old' and
	'r_new'.
	(s7_s_score_end): Delete unused local variable 'dot'.
	(s7_relax_frag): Delete unused local variable 'relax_size'.
	(s7_gen_reloc): Delete unused local variables 'f', 's', and 'e'.
2011-06-13 09:45:28 +00:00
H.J. Lu
551497ed0e Update lzcnt testcases.
2011-06-12  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/arch-10-lzcnt.d: Updated.
	* gas/i386/x86-64-arch-2-lzcnt.d: Likewise.
2011-06-13 02:41:24 +00:00
H.J. Lu
6c30d220f1 Support AVX Programming Reference (June, 2011).
gas/

2011-06-10  H.J. Lu  <hongjiu.lu@intel.com>

	AVX Programming Reference (June, 2011)
	* config/tc-i386.c (i386_error): Add invalid_vsib_address and
	unsupported_vector_index_register.
	(cpu_arch): Add .avx2, .bmi2, .lzcnt and .invpcid.
	(check_VecOperands): New.
	(match_template): Call check_VecOperands.  Handle
	invalid_vsib_address and unsupported_vector_index_register.
	(build_modrm_byte): Support VecSIB.  Check register-only source
	operand when two source operands are swapped.
	(i386_index_check): Allow Xmm/Ymm index registers.

	* doc/c-i386.texi: Document avx2/.avx2, bmi2/.bmi2, lzcnt/.lzcnt
	and invpcid./invpcid.

gas/testsuite/

2011-06-10  H.J. Lu  <hongjiu.lu@intel.com>

	AVX Programming Reference (June, 2011)
	* gas/i386/arch-10-1.l: Updated.
	* gas/i386/arch-10-2.l: Likewise.
	* gas/i386/arch-10-3.l: Likewise.
	* gas/i386/arch-10-4.l: Likewise.

	* gas/i386/arch-10.s: Add LZCNT to comments.
	* gas/i386/x86-64-arch-2.s: Likewise.

	* gas/i386/arch-10-lzcnt.d: New.
	* gas/i386/avx-gather-intel.d: Likewise.
	* gas/i386/avx-gather.d: Likewise.
	* gas/i386/avx-gather.s: Likewise.
	* gas/i386/avx2-intel.d: Likewise.
	* gas/i386/avx2.d: Likewise.
	* gas/i386/avx2.s: Likewise
	* gas/i386/avx256int-intel.d: Likewise.
	* gas/i386/avx256int.d: Likewise.
	* gas/i386/avx256int.s: Likewise.
	* gas/i386/bmi2-intel.d: Likewise.
	* gas/i386/bmi2.d: Likewise.
	* gas/i386/bmi2.s: Likewise.
	* gas/i386/inval-invpcid.l:Likewise.
	* gas/i386/inval-invpcid.s: Likewise.
	* gas/i386/invpcid-intel.d: Likewise.
	* gas/i386/invpcid.d: Likewise.
	* gas/i386/invpcid.s: Likewise.
	* gas/i386/x86-64-arch-2-lzcnt.d: Likewise.
	* gas/i386/x86-64-avx-gather-intel.d: Likewise.
	* gas/i386/x86-64-avx-gather.d: Likewise.
	* gas/i386/x86-64-avx-gather.s: Likewise.
	* gas/i386/x86-64-avx2-intel.d: Likewise.
	* gas/i386/x86-64-avx2.d: Likewise.
	* gas/i386/x86-64-avx2.s: Likewise.
	* gas/i386/x86-64-avx256int-intel.d: Likewise.
	* gas/i386/x86-64-avx256int.d: Likewise.
	* gas/i386/x86-64-avx256int.s: Likewise.
	* gas/i386/x86-64-bmi2-intel.d: Likewise.
	* gas/i386/x86-64-bmi2.d: Likewise.
	* gas/i386/x86-64-bmi2.s: Likewise.
	* gas/i386/x86-64-inval-invpcid.l: Likewise.
	* gas/i386/x86-64-inval-invpcid.s: Likewise.
	* gas/i386/x86-64-invpcid-intel.d: Likewise.
	* gas/i386/x86-64-invpcid.d: Likewise.
	* gas/i386/x86-64-invpcid.s: Likewise.

opcodes/

2011-06-10  H.J. Lu  <hongjiu.lu@intel.com>

	AVX Programming Reference (June, 2011)
	* i386-dis.c (XMGatherQ): New.
	* i386-dis.c (EXxmm_mb): New.
	(EXxmm_mb): Likewise.
	(EXxmm_mw): Likewise.
	(EXxmm_md): Likewise.
	(EXxmm_mq): Likewise.
	(EXxmmdw): Likewise.
	(EXxmmqd): Likewise.
	(VexGatherQ): Likewise.
	(MVexVSIBDWpX): Likewise.
	(MVexVSIBQWpX): Likewise.
	(xmm_mb_mode): Likewise.
	(xmm_mw_mode): Likewise.
	(xmm_md_mode): Likewise.
	(xmm_mq_mode): Likewise.
	(xmmdw_mode): Likewise.
	(xmmqd_mode): Likewise.
	(ymmxmm_mode): Likewise.
	(vex_vsib_d_w_dq_mode): Likewise.
	(vex_vsib_q_w_dq_mode): Likewise.
	(MOD_VEX_0F385A_PREFIX_2): Likewise.
	(MOD_VEX_0F388C_PREFIX_2): Likewise.
	(MOD_VEX_0F388E_PREFIX_2): Likewise.
	(PREFIX_0F3882): Likewise.
	(PREFIX_VEX_0F3816): Likewise.
	(PREFIX_VEX_0F3836): Likewise.
	(PREFIX_VEX_0F3845): Likewise.
	(PREFIX_VEX_0F3846): Likewise.
	(PREFIX_VEX_0F3847): Likewise.
	(PREFIX_VEX_0F3858): Likewise.
	(PREFIX_VEX_0F3859): Likewise.
	(PREFIX_VEX_0F385A): Likewise.
	(PREFIX_VEX_0F3878): Likewise.
	(PREFIX_VEX_0F3879): Likewise.
	(PREFIX_VEX_0F388C): Likewise.
	(PREFIX_VEX_0F388E): Likewise.
	(PREFIX_VEX_0F3890..PREFIX_VEX_0F3893): Likewise.
	(PREFIX_VEX_0F38F5): Likewise.
	(PREFIX_VEX_0F38F6): Likewise.
	(PREFIX_VEX_0F3A00): Likewise.
	(PREFIX_VEX_0F3A01): Likewise.
	(PREFIX_VEX_0F3A02): Likewise.
	(PREFIX_VEX_0F3A38): Likewise.
	(PREFIX_VEX_0F3A39): Likewise.
	(PREFIX_VEX_0F3A46): Likewise.
	(PREFIX_VEX_0F3AF0): Likewise.
	(VEX_LEN_0F3816_P_2): Likewise.
	(VEX_LEN_0F3819_P_2): Likewise.
	(VEX_LEN_0F3836_P_2): Likewise.
	(VEX_LEN_0F385A_P_2_M_0): Likewise.
	(VEX_LEN_0F38F5_P_0): Likewise.
	(VEX_LEN_0F38F5_P_1): Likewise.
	(VEX_LEN_0F38F5_P_3): Likewise.
	(VEX_LEN_0F38F6_P_3): Likewise.
	(VEX_LEN_0F38F7_P_1): Likewise.
	(VEX_LEN_0F38F7_P_2): Likewise.
	(VEX_LEN_0F38F7_P_3): Likewise.
	(VEX_LEN_0F3A00_P_2): Likewise.
	(VEX_LEN_0F3A01_P_2): Likewise.
	(VEX_LEN_0F3A38_P_2): Likewise.
	(VEX_LEN_0F3A39_P_2): Likewise.
	(VEX_LEN_0F3A46_P_2): Likewise.
	(VEX_LEN_0F3AF0_P_3): Likewise.
	(VEX_W_0F3816_P_2): Likewise.
	(VEX_W_0F3818_P_2): Likewise.
	(VEX_W_0F3819_P_2): Likewise.
	(VEX_W_0F3836_P_2): Likewise.
	(VEX_W_0F3846_P_2): Likewise.
	(VEX_W_0F3858_P_2): Likewise.
	(VEX_W_0F3859_P_2): Likewise.
	(VEX_W_0F385A_P_2_M_0): Likewise.
	(VEX_W_0F3878_P_2): Likewise.
	(VEX_W_0F3879_P_2): Likewise.
	(VEX_W_0F3A00_P_2): Likewise.
	(VEX_W_0F3A01_P_2): Likewise.
	(VEX_W_0F3A02_P_2): Likewise.
	(VEX_W_0F3A38_P_2): Likewise.
	(VEX_W_0F3A39_P_2): Likewise.
	(VEX_W_0F3A46_P_2): Likewise.
	(MOD_VEX_0F3818_PREFIX_2): Removed.
	(MOD_VEX_0F3819_PREFIX_2): Likewise.
	(VEX_LEN_0F60_P_2..VEX_LEN_0F6D_P_2): Likewise.
	(VEX_LEN_0F70_P_1..VEX_LEN_0F76_P_2): Likewise.
	(VEX_LEN_0FD1_P_2..VEX_LEN_0FD5_P_2): Likewise.
	(VEX_LEN_0FD7_P_2_M_1..VEX_LEN_0F3819_P_2_M_0): Likewise.
	(VEX_LEN_0F381C_P_2..VEX_LEN_0F3840_P_2): Likewise.
	(VEX_LEN_0F3A0E_P_2): Likewise.
	(VEX_LEN_0F3A0F_P_2): Likewise.
	(VEX_LEN_0F3A42_P_2): Likewise.
	(VEX_LEN_0F3A4C_P_2): Likewise.
	(VEX_W_0F3818_P_2_M_0): Likewise.
	(VEX_W_0F3819_P_2_M_0): Likewise.
	(prefix_table): Updated.
	(three_byte_table): Likewise.
	(vex_table): Likewise.
	(vex_len_table): Likewise.
	(vex_w_table): Likewise.
	(mod_table): Likewise.
	(putop): Handle "LW".
	(intel_operand_size): Handle xmm_mb_mode, xmm_mw_mode,
	xmm_md_mode, xmm_mq_mode, xmmdw_mode, xmmqd_mode, ymmxmm_mode,
	vex_vsib_d_w_dq_mode, vex_vsib_q_w_dq_mode.
	(OP_EX): Likewise.
	(OP_E_memory): Handle vex_vsib_d_w_dq_mode and
	vex_vsib_q_w_dq_mode.
	(OP_XMM): Handle vex_vsib_q_w_dq_mode.
	(OP_VEX): Likewise.

	* i386-gen.c (cpu_flag_init): Add CpuAVX2 to CPU_ANY_SSE_FLAGS
	and CPU_ANY_AVX_FLAGS.  Add CPU_BMI2_FLAGS, CPU_LZCNT_FLAGS,
	CPU_INVPCID_FLAGS and CPU_AVX2_FLAGS.
	(cpu_flags): Add CpuAVX2, CpuBMI2, CpuLZCNT and CpuINVPCID.
	(opcode_modifiers): Add VecSIB.

	* i386-opc.h (CpuAVX2): New.
	(CpuBMI2): Likewise.
	(CpuLZCNT): Likewise.
	(CpuINVPCID): Likewise.
	(VecSIB128): Likewise.
	(VecSIB256): Likewise.
	(VecSIB): Likewise.
	(i386_cpu_flags): Add cpuavx2, cpubmi2, cpulzcnt and cpuinvpcid.
	(i386_opcode_modifier): Add vecsib.

	* i386-opc.tbl: Add invpcid, AVX2 and BMI2 instructions.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.
2011-06-10 21:27:40 +00:00
Nick Clifton
fd596c16fb PR gas/12861
* config/tc-cr16.c (tc_gen_reloc): Remove unused local variable
	code.
	(check_cinv_options): Remove unused local variables.  Make
	function void.
	(md_assemble): Remove unused local variable.
2011-06-09 15:43:52 +00:00
Richard Earnshaw
c56791bbad 2011-06-09 James Greenhalgh <james.greenhalgh@arm.com>
* config/tc-arm.c (do_ldrd): Warn in unpredictable cases.

2011-06-09  James Greenhalgh  <james.greenhalgh@arm.com>

	* gas/arm/ldrd-unpredicatble.d: New testcase.
	* gas/arm/ldrd-unpredicatble.s: Likewise.
	* gas/arm/ldrd-unpredicatble.l: Likewise.
2011-06-09 09:59:34 +00:00
Nick Clifton
331fe61622 Fix attributation of previous delta. 2011-06-03 14:44:04 +00:00